spu_priv1_ops      42 arch/powerpc/include/asm/spu_priv1.h extern const struct spu_priv1_ops* spu_priv1_ops;
spu_priv1_ops      47 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->int_mask_and(spu, class, mask);
spu_priv1_ops      53 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->int_mask_or(spu, class, mask);
spu_priv1_ops      59 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->int_mask_set(spu, class, mask);
spu_priv1_ops      65 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->int_mask_get(spu, class);
spu_priv1_ops      71 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->int_stat_clear(spu, class, stat);
spu_priv1_ops      77 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->int_stat_get (spu, class);
spu_priv1_ops      83 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->cpu_affinity_set(spu, cpu);
spu_priv1_ops      89 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->mfc_dar_get(spu);
spu_priv1_ops      95 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->mfc_dsisr_get(spu);
spu_priv1_ops     101 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->mfc_dsisr_set(spu, dsisr);
spu_priv1_ops     107 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->mfc_sdr_setup(spu);
spu_priv1_ops     113 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->mfc_sr1_set(spu, sr1);
spu_priv1_ops     119 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->mfc_sr1_get(spu);
spu_priv1_ops     125 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->mfc_tclass_id_set(spu, tclass_id);
spu_priv1_ops     131 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->mfc_tclass_id_get(spu);
spu_priv1_ops     137 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->tlb_invalidate(spu);
spu_priv1_ops     143 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->resource_allocation_groupID_set(spu, id);
spu_priv1_ops     149 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->resource_allocation_groupID_get(spu);
spu_priv1_ops     155 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->resource_allocation_enable_set(spu, enable);
spu_priv1_ops     161 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->resource_allocation_enable_get(spu);
spu_priv1_ops     218 arch/powerpc/include/asm/spu_priv1.h extern const struct spu_priv1_ops spu_priv1_mmio_ops;
spu_priv1_ops     219 arch/powerpc/include/asm/spu_priv1.h extern const struct spu_priv1_ops spu_priv1_beat_ops;
spu_priv1_ops     221 arch/powerpc/platforms/cell/setup.c 	spu_priv1_ops = &spu_priv1_mmio_ops;
spu_priv1_ops      33 arch/powerpc/platforms/cell/spu_base.c const struct spu_priv1_ops *spu_priv1_ops;
spu_priv1_ops      34 arch/powerpc/platforms/cell/spu_base.c EXPORT_SYMBOL_GPL(spu_priv1_ops);
spu_priv1_ops     146 arch/powerpc/platforms/cell/spu_priv1_mmio.c const struct spu_priv1_ops spu_priv1_mmio_ops =
spu_priv1_ops     592 arch/powerpc/platforms/ps3/spu.c const struct spu_priv1_ops spu_priv1_ps3_ops = {
spu_priv1_ops     617 arch/powerpc/platforms/ps3/spu.c 	spu_priv1_ops = &spu_priv1_ps3_ops;