spu_int_mask_set  116 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 0, 0ul);
spu_int_mask_set  117 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 1, 0ul);
spu_int_mask_set  118 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 2, 0ul);
spu_int_mask_set  758 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 0, 0ul);
spu_int_mask_set  759 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 1, class1_mask);
spu_int_mask_set  760 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 2, 0ul);
spu_int_mask_set 1407 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 0, 0ul);
spu_int_mask_set 1408 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 1, 0ul);
spu_int_mask_set 1409 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 2, 0ul);
spu_int_mask_set 1771 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 0, csa->priv1.int_mask_class0_RW);
spu_int_mask_set 1772 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 1, csa->priv1.int_mask_class1_RW);
spu_int_mask_set 1773 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 2, csa->priv1.int_mask_class2_RW);
spu_int_mask_set  468 arch/powerpc/platforms/ps3/spu.c 	spu_int_mask_set(spu, class, old_mask & mask);
spu_int_mask_set  476 arch/powerpc/platforms/ps3/spu.c 	spu_int_mask_set(spu, class, old_mask | mask);