spu_int_mask_or    65 arch/powerpc/platforms/cell/spufs/hw_ops.c 			spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR);
spu_int_mask_or    74 arch/powerpc/platforms/cell/spufs/hw_ops.c 			spu_int_mask_or(spu, 2,
spu_int_mask_or    96 arch/powerpc/platforms/cell/spufs/hw_ops.c 		spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR);
spu_int_mask_or   117 arch/powerpc/platforms/cell/spufs/hw_ops.c 		spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR);