spu               136 arch/powerpc/include/asm/spu.h 	void (* wbox_callback)(struct spu *spu);
spu               137 arch/powerpc/include/asm/spu.h 	void (* ibox_callback)(struct spu *spu);
spu               138 arch/powerpc/include/asm/spu.h 	void (* stop_callback)(struct spu *spu, int irq);
spu               139 arch/powerpc/include/asm/spu.h 	void (* mfc_callback)(struct spu *spu);
spu               190 arch/powerpc/include/asm/spu.h void spu_init_channels(struct spu *spu);
spu               191 arch/powerpc/include/asm/spu.h void spu_irq_setaffinity(struct spu *spu, int cpu);
spu               193 arch/powerpc/include/asm/spu.h void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
spu               196 arch/powerpc/include/asm/spu.h extern void spu_invalidate_slbs(struct spu *spu);
spu               197 arch/powerpc/include/asm/spu.h extern void spu_associate_mm(struct spu *spu, struct mm_struct *mm);
spu                14 arch/powerpc/include/asm/spu_priv1.h struct spu;
spu                20 arch/powerpc/include/asm/spu_priv1.h 	void (*int_mask_and) (struct spu *spu, int class, u64 mask);
spu                21 arch/powerpc/include/asm/spu_priv1.h 	void (*int_mask_or) (struct spu *spu, int class, u64 mask);
spu                22 arch/powerpc/include/asm/spu_priv1.h 	void (*int_mask_set) (struct spu *spu, int class, u64 mask);
spu                23 arch/powerpc/include/asm/spu_priv1.h 	u64 (*int_mask_get) (struct spu *spu, int class);
spu                24 arch/powerpc/include/asm/spu_priv1.h 	void (*int_stat_clear) (struct spu *spu, int class, u64 stat);
spu                25 arch/powerpc/include/asm/spu_priv1.h 	u64 (*int_stat_get) (struct spu *spu, int class);
spu                26 arch/powerpc/include/asm/spu_priv1.h 	void (*cpu_affinity_set) (struct spu *spu, int cpu);
spu                27 arch/powerpc/include/asm/spu_priv1.h 	u64 (*mfc_dar_get) (struct spu *spu);
spu                28 arch/powerpc/include/asm/spu_priv1.h 	u64 (*mfc_dsisr_get) (struct spu *spu);
spu                29 arch/powerpc/include/asm/spu_priv1.h 	void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
spu                30 arch/powerpc/include/asm/spu_priv1.h 	void (*mfc_sdr_setup) (struct spu *spu);
spu                31 arch/powerpc/include/asm/spu_priv1.h 	void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
spu                32 arch/powerpc/include/asm/spu_priv1.h 	u64 (*mfc_sr1_get) (struct spu *spu);
spu                33 arch/powerpc/include/asm/spu_priv1.h 	void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id);
spu                34 arch/powerpc/include/asm/spu_priv1.h 	u64 (*mfc_tclass_id_get) (struct spu *spu);
spu                35 arch/powerpc/include/asm/spu_priv1.h 	void (*tlb_invalidate) (struct spu *spu);
spu                36 arch/powerpc/include/asm/spu_priv1.h 	void (*resource_allocation_groupID_set) (struct spu *spu, u64 id);
spu                37 arch/powerpc/include/asm/spu_priv1.h 	u64 (*resource_allocation_groupID_get) (struct spu *spu);
spu                38 arch/powerpc/include/asm/spu_priv1.h 	void (*resource_allocation_enable_set) (struct spu *spu, u64 enable);
spu                39 arch/powerpc/include/asm/spu_priv1.h 	u64 (*resource_allocation_enable_get) (struct spu *spu);
spu                45 arch/powerpc/include/asm/spu_priv1.h spu_int_mask_and (struct spu *spu, int class, u64 mask)
spu                47 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->int_mask_and(spu, class, mask);
spu                51 arch/powerpc/include/asm/spu_priv1.h spu_int_mask_or (struct spu *spu, int class, u64 mask)
spu                53 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->int_mask_or(spu, class, mask);
spu                57 arch/powerpc/include/asm/spu_priv1.h spu_int_mask_set (struct spu *spu, int class, u64 mask)
spu                59 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->int_mask_set(spu, class, mask);
spu                63 arch/powerpc/include/asm/spu_priv1.h spu_int_mask_get (struct spu *spu, int class)
spu                65 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->int_mask_get(spu, class);
spu                69 arch/powerpc/include/asm/spu_priv1.h spu_int_stat_clear (struct spu *spu, int class, u64 stat)
spu                71 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->int_stat_clear(spu, class, stat);
spu                75 arch/powerpc/include/asm/spu_priv1.h spu_int_stat_get (struct spu *spu, int class)
spu                77 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->int_stat_get (spu, class);
spu                81 arch/powerpc/include/asm/spu_priv1.h spu_cpu_affinity_set (struct spu *spu, int cpu)
spu                83 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->cpu_affinity_set(spu, cpu);
spu                87 arch/powerpc/include/asm/spu_priv1.h spu_mfc_dar_get (struct spu *spu)
spu                89 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->mfc_dar_get(spu);
spu                93 arch/powerpc/include/asm/spu_priv1.h spu_mfc_dsisr_get (struct spu *spu)
spu                95 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->mfc_dsisr_get(spu);
spu                99 arch/powerpc/include/asm/spu_priv1.h spu_mfc_dsisr_set (struct spu *spu, u64 dsisr)
spu               101 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->mfc_dsisr_set(spu, dsisr);
spu               105 arch/powerpc/include/asm/spu_priv1.h spu_mfc_sdr_setup (struct spu *spu)
spu               107 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->mfc_sdr_setup(spu);
spu               111 arch/powerpc/include/asm/spu_priv1.h spu_mfc_sr1_set (struct spu *spu, u64 sr1)
spu               113 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->mfc_sr1_set(spu, sr1);
spu               117 arch/powerpc/include/asm/spu_priv1.h spu_mfc_sr1_get (struct spu *spu)
spu               119 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->mfc_sr1_get(spu);
spu               123 arch/powerpc/include/asm/spu_priv1.h spu_mfc_tclass_id_set (struct spu *spu, u64 tclass_id)
spu               125 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->mfc_tclass_id_set(spu, tclass_id);
spu               129 arch/powerpc/include/asm/spu_priv1.h spu_mfc_tclass_id_get (struct spu *spu)
spu               131 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->mfc_tclass_id_get(spu);
spu               135 arch/powerpc/include/asm/spu_priv1.h spu_tlb_invalidate (struct spu *spu)
spu               137 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->tlb_invalidate(spu);
spu               141 arch/powerpc/include/asm/spu_priv1.h spu_resource_allocation_groupID_set (struct spu *spu, u64 id)
spu               143 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->resource_allocation_groupID_set(spu, id);
spu               147 arch/powerpc/include/asm/spu_priv1.h spu_resource_allocation_groupID_get (struct spu *spu)
spu               149 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->resource_allocation_groupID_get(spu);
spu               153 arch/powerpc/include/asm/spu_priv1.h spu_resource_allocation_enable_set (struct spu *spu, u64 enable)
spu               155 arch/powerpc/include/asm/spu_priv1.h 	spu_priv1_ops->resource_allocation_enable_set(spu, enable);
spu               159 arch/powerpc/include/asm/spu_priv1.h spu_resource_allocation_enable_get (struct spu *spu)
spu               161 arch/powerpc/include/asm/spu_priv1.h 	return spu_priv1_ops->resource_allocation_enable_get(spu);
spu               168 arch/powerpc/include/asm/spu_priv1.h 	int (*create_spu)(struct spu *spu, void *data);
spu               169 arch/powerpc/include/asm/spu_priv1.h 	int (*destroy_spu)(struct spu *spu);
spu               184 arch/powerpc/include/asm/spu_priv1.h spu_create_spu (struct spu *spu, void *data)
spu               186 arch/powerpc/include/asm/spu_priv1.h 	return spu_management_ops->create_spu(spu, data);
spu               190 arch/powerpc/include/asm/spu_priv1.h spu_destroy_spu (struct spu *spu)
spu               192 arch/powerpc/include/asm/spu_priv1.h 	return spu_management_ops->destroy_spu(spu);
spu                81 arch/powerpc/oprofile/cell/pr_util.h struct vma_to_fileoffset_map *create_vma_map(const struct spu *spu,
spu                84 arch/powerpc/oprofile/cell/pr_util.h 			    unsigned int vma, const struct spu *aSpu,
spu                78 arch/powerpc/oprofile/cell/spu_profiler.c 	int spu;
spu                92 arch/powerpc/oprofile/cell/spu_profiler.c 	for (spu = SPUS_PER_TB_ENTRY-1; spu >= 0; spu--) {
spu                96 arch/powerpc/oprofile/cell/spu_profiler.c 		samples[spu * TRACE_ARRAY_SIZE + entry]
spu                98 arch/powerpc/oprofile/cell/spu_profiler.c 		samples[(spu + SPUS_PER_TB_ENTRY) * TRACE_ARRAY_SIZE + entry]
spu                41 arch/powerpc/oprofile/cell/spu_task_sync.c static void spu_buff_add(unsigned long int value, int spu)
spu                55 arch/powerpc/oprofile/cell/spu_task_sync.c 	if (spu_buff[spu].head >= spu_buff[spu].tail) {
spu                56 arch/powerpc/oprofile/cell/spu_task_sync.c 		if ((spu_buff[spu].head - spu_buff[spu].tail)
spu                60 arch/powerpc/oprofile/cell/spu_task_sync.c 	} else if (spu_buff[spu].tail > spu_buff[spu].head) {
spu                61 arch/powerpc/oprofile/cell/spu_task_sync.c 		if ((spu_buff[spu].tail - spu_buff[spu].head)
spu                67 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].buff[spu_buff[spu].head] = value;
spu                68 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].head++;
spu                70 arch/powerpc/oprofile/cell/spu_task_sync.c 		if (spu_buff[spu].head >= max_spu_buff)
spu                71 arch/powerpc/oprofile/cell/spu_task_sync.c 			spu_buff[spu].head = 0;
spu                89 arch/powerpc/oprofile/cell/spu_task_sync.c 	int spu;
spu                93 arch/powerpc/oprofile/cell/spu_task_sync.c 	for (spu = 0; spu < num_spu_nodes; spu++) {
spu                97 arch/powerpc/oprofile/cell/spu_task_sync.c 		if (spu_buff[spu].buff == NULL)
spu               106 arch/powerpc/oprofile/cell/spu_task_sync.c 		curr_head = spu_buff[spu].head;
spu               112 arch/powerpc/oprofile/cell/spu_task_sync.c 		oprofile_put_buff(spu_buff[spu].buff,
spu               113 arch/powerpc/oprofile/cell/spu_task_sync.c 				  spu_buff[spu].tail,
spu               117 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].tail = curr_head;
spu               136 arch/powerpc/oprofile/cell/spu_task_sync.c 	struct spu *the_spu;	/* needed to access pointer to local_store */
spu               156 arch/powerpc/oprofile/cell/spu_task_sync.c static struct cached_info *get_cached_info(struct spu *the_spu, int spu_num)
spu               187 arch/powerpc/oprofile/cell/spu_task_sync.c prepare_cached_spu_info(struct spu *spu, unsigned long objectId)
spu               197 arch/powerpc/oprofile/cell/spu_task_sync.c 	info = get_cached_info(spu, spu->number);
spu               215 arch/powerpc/oprofile/cell/spu_task_sync.c 	new_map = create_vma_map(spu, objectId);
spu               226 arch/powerpc/oprofile/cell/spu_task_sync.c 	info->the_spu = spu;
spu               229 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_info[spu->number] = info;
spu               240 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_set_profile_private_kref(spu->ctx, &info->cache_ref,
spu               315 arch/powerpc/oprofile/cell/spu_task_sync.c get_exec_dcookie_and_offset(struct spu *spu, unsigned int *offsetp,
spu               323 arch/powerpc/oprofile/cell/spu_task_sync.c 	struct mm_struct *mm = spu->mm;
spu               372 arch/powerpc/oprofile/cell/spu_task_sync.c static int process_context_switch(struct spu *spu, unsigned long objectId)
spu               379 arch/powerpc/oprofile/cell/spu_task_sync.c 	retval = prepare_cached_spu_info(spu, objectId);
spu               386 arch/powerpc/oprofile/cell/spu_task_sync.c 	app_dcookie = get_exec_dcookie_and_offset(spu, &offset, &spu_cookie, objectId);
spu               394 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff_add(ESCAPE_CODE, spu->number);
spu               395 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff_add(SPU_CTX_SWITCH_CODE, spu->number);
spu               396 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff_add(spu->number, spu->number);
spu               397 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff_add(spu->pid, spu->number);
spu               398 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff_add(spu->tgid, spu->number);
spu               399 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff_add(app_dcookie, spu->number);
spu               400 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff_add(spu_cookie, spu->number);
spu               401 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff_add(offset, spu->number);
spu               407 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff[spu->number].ctx_sw_seen = 1;
spu               427 arch/powerpc/oprofile/cell/spu_task_sync.c 	struct spu *the_spu = data;
spu               458 arch/powerpc/oprofile/cell/spu_task_sync.c 	int spu;
spu               462 arch/powerpc/oprofile/cell/spu_task_sync.c 	for (spu = 0; spu < num_spu_nodes; spu++) {
spu               466 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].head = 0;
spu               467 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].tail = 0;
spu               475 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].buff = kzalloc((max_spu_buff
spu               479 arch/powerpc/oprofile/cell/spu_task_sync.c 		if (!spu_buff[spu].buff) {
spu               483 arch/powerpc/oprofile/cell/spu_task_sync.c 			       __func__, __LINE__, spu);
spu               486 arch/powerpc/oprofile/cell/spu_task_sync.c 			while (spu >= 0) {
spu               487 arch/powerpc/oprofile/cell/spu_task_sync.c 				kfree(spu_buff[spu].buff);
spu               488 arch/powerpc/oprofile/cell/spu_task_sync.c 				spu_buff[spu].buff = 0;
spu               489 arch/powerpc/oprofile/cell/spu_task_sync.c 				spu--;
spu               509 arch/powerpc/oprofile/cell/spu_task_sync.c 	int spu;
spu               526 arch/powerpc/oprofile/cell/spu_task_sync.c 	for (spu = 0; spu < num_spu_nodes; spu++) {
spu               527 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff_add(ESCAPE_CODE, spu);
spu               528 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff_add(SPU_PROFILING_CODE, spu);
spu               529 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff_add(num_spu_nodes, spu);
spu               533 arch/powerpc/oprofile/cell/spu_task_sync.c 	for (spu = 0; spu < num_spu_nodes; spu++) {
spu               534 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].ctx_sw_seen = 0;
spu               535 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].last_guard_val = 0;
spu               558 arch/powerpc/oprofile/cell/spu_task_sync.c 	struct spu *the_spu;
spu                34 arch/powerpc/oprofile/cell/vma_map.c 	       const struct spu *aSpu, int *grd_val)
spu                91 arch/powerpc/oprofile/cell/vma_map.c struct vma_to_fileoffset_map *create_vma_map(const struct spu *aSpu,
spu                69 arch/powerpc/platforms/cell/cbe_thermal.c 	struct spu *spu;
spu                71 arch/powerpc/platforms/cell/cbe_thermal.c 	spu = container_of(dev, struct spu, dev);
spu                73 arch/powerpc/platforms/cell/cbe_thermal.c 	return cbe_get_pmd_regs(spu_devnode(spu));
spu                80 arch/powerpc/platforms/cell/cbe_thermal.c 	struct spu *spu;
spu                82 arch/powerpc/platforms/cell/cbe_thermal.c 	spu = container_of(dev, struct spu, dev);
spu                85 arch/powerpc/platforms/cell/cbe_thermal.c 	return value.spe[spu->spe_id];
spu               245 arch/powerpc/platforms/cell/cbe_thermal.c static DEVICE_PREFIX_ATTR(spu, throttle_end, 0600);
spu               246 arch/powerpc/platforms/cell/cbe_thermal.c static DEVICE_PREFIX_ATTR(spu, throttle_begin, 0600);
spu               247 arch/powerpc/platforms/cell/cbe_thermal.c static DEVICE_PREFIX_ATTR(spu, throttle_full_stop, 0600);
spu                66 arch/powerpc/platforms/cell/spu_base.c void spu_invalidate_slbs(struct spu *spu)
spu                68 arch/powerpc/platforms/cell/spu_base.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu                71 arch/powerpc/platforms/cell/spu_base.c 	spin_lock_irqsave(&spu->register_lock, flags);
spu                72 arch/powerpc/platforms/cell/spu_base.c 	if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
spu                74 arch/powerpc/platforms/cell/spu_base.c 	spin_unlock_irqrestore(&spu->register_lock, flags);
spu                83 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu                87 arch/powerpc/platforms/cell/spu_base.c 	list_for_each_entry(spu, &spu_full_list, full_list) {
spu                88 arch/powerpc/platforms/cell/spu_base.c 		if (spu->mm == mm)
spu                89 arch/powerpc/platforms/cell/spu_base.c 			spu_invalidate_slbs(spu);
spu               105 arch/powerpc/platforms/cell/spu_base.c void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
spu               110 arch/powerpc/platforms/cell/spu_base.c 	spu->mm = mm;
spu               123 arch/powerpc/platforms/cell/spu_base.c static void spu_restart_dma(struct spu *spu)
spu               125 arch/powerpc/platforms/cell/spu_base.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               127 arch/powerpc/platforms/cell/spu_base.c 	if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
spu               130 arch/powerpc/platforms/cell/spu_base.c 		set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
spu               135 arch/powerpc/platforms/cell/spu_base.c static inline void spu_load_slb(struct spu *spu, int slbe, struct copro_slb *slb)
spu               137 arch/powerpc/platforms/cell/spu_base.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               151 arch/powerpc/platforms/cell/spu_base.c static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
spu               156 arch/powerpc/platforms/cell/spu_base.c 	ret = copro_calculate_slb(spu->mm, ea, &slb);
spu               160 arch/powerpc/platforms/cell/spu_base.c 	spu_load_slb(spu, spu->slb_replace, &slb);
spu               162 arch/powerpc/platforms/cell/spu_base.c 	spu->slb_replace++;
spu               163 arch/powerpc/platforms/cell/spu_base.c 	if (spu->slb_replace >= 8)
spu               164 arch/powerpc/platforms/cell/spu_base.c 		spu->slb_replace = 0;
spu               166 arch/powerpc/platforms/cell/spu_base.c 	spu_restart_dma(spu);
spu               167 arch/powerpc/platforms/cell/spu_base.c 	spu->stats.slb_flt++;
spu               173 arch/powerpc/platforms/cell/spu_base.c static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
spu               186 arch/powerpc/platforms/cell/spu_base.c 		spin_unlock(&spu->register_lock);
spu               190 arch/powerpc/platforms/cell/spu_base.c 		spin_lock(&spu->register_lock);
spu               193 arch/powerpc/platforms/cell/spu_base.c 			spu_restart_dma(spu);
spu               198 arch/powerpc/platforms/cell/spu_base.c 	spu->class_1_dar = ea;
spu               199 arch/powerpc/platforms/cell/spu_base.c 	spu->class_1_dsisr = dsisr;
spu               201 arch/powerpc/platforms/cell/spu_base.c 	spu->stop_callback(spu, 1);
spu               203 arch/powerpc/platforms/cell/spu_base.c 	spu->class_1_dar = 0;
spu               204 arch/powerpc/platforms/cell/spu_base.c 	spu->class_1_dsisr = 0;
spu               250 arch/powerpc/platforms/cell/spu_base.c void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
spu               271 arch/powerpc/platforms/cell/spu_base.c 	spin_lock_irq(&spu->register_lock);
spu               274 arch/powerpc/platforms/cell/spu_base.c 		spu_load_slb(spu, i, &slbs[i]);
spu               275 arch/powerpc/platforms/cell/spu_base.c 	spin_unlock_irq(&spu->register_lock);
spu               282 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               285 arch/powerpc/platforms/cell/spu_base.c 	spu = data;
spu               287 arch/powerpc/platforms/cell/spu_base.c 	spin_lock(&spu->register_lock);
spu               288 arch/powerpc/platforms/cell/spu_base.c 	mask = spu_int_mask_get(spu, 0);
spu               289 arch/powerpc/platforms/cell/spu_base.c 	stat = spu_int_stat_get(spu, 0) & mask;
spu               291 arch/powerpc/platforms/cell/spu_base.c 	spu->class_0_pending |= stat;
spu               292 arch/powerpc/platforms/cell/spu_base.c 	spu->class_0_dar = spu_mfc_dar_get(spu);
spu               293 arch/powerpc/platforms/cell/spu_base.c 	spu->stop_callback(spu, 0);
spu               294 arch/powerpc/platforms/cell/spu_base.c 	spu->class_0_pending = 0;
spu               295 arch/powerpc/platforms/cell/spu_base.c 	spu->class_0_dar = 0;
spu               297 arch/powerpc/platforms/cell/spu_base.c 	spu_int_stat_clear(spu, 0, stat);
spu               298 arch/powerpc/platforms/cell/spu_base.c 	spin_unlock(&spu->register_lock);
spu               306 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               309 arch/powerpc/platforms/cell/spu_base.c 	spu = data;
spu               312 arch/powerpc/platforms/cell/spu_base.c 	spin_lock(&spu->register_lock);
spu               313 arch/powerpc/platforms/cell/spu_base.c 	mask  = spu_int_mask_get(spu, 1);
spu               314 arch/powerpc/platforms/cell/spu_base.c 	stat  = spu_int_stat_get(spu, 1) & mask;
spu               315 arch/powerpc/platforms/cell/spu_base.c 	dar   = spu_mfc_dar_get(spu);
spu               316 arch/powerpc/platforms/cell/spu_base.c 	dsisr = spu_mfc_dsisr_get(spu);
spu               318 arch/powerpc/platforms/cell/spu_base.c 		spu_mfc_dsisr_set(spu, 0ul);
spu               319 arch/powerpc/platforms/cell/spu_base.c 	spu_int_stat_clear(spu, 1, stat);
spu               325 arch/powerpc/platforms/cell/spu_base.c 		__spu_trap_data_seg(spu, dar);
spu               328 arch/powerpc/platforms/cell/spu_base.c 		__spu_trap_data_map(spu, dar, dsisr);
spu               336 arch/powerpc/platforms/cell/spu_base.c 	spu->class_1_dsisr = 0;
spu               337 arch/powerpc/platforms/cell/spu_base.c 	spu->class_1_dar = 0;
spu               339 arch/powerpc/platforms/cell/spu_base.c 	spin_unlock(&spu->register_lock);
spu               347 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               353 arch/powerpc/platforms/cell/spu_base.c 	spu = data;
spu               354 arch/powerpc/platforms/cell/spu_base.c 	spin_lock(&spu->register_lock);
spu               355 arch/powerpc/platforms/cell/spu_base.c 	stat = spu_int_stat_get(spu, 2);
spu               356 arch/powerpc/platforms/cell/spu_base.c 	mask = spu_int_mask_get(spu, 2);
spu               362 arch/powerpc/platforms/cell/spu_base.c 		spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs));
spu               364 arch/powerpc/platforms/cell/spu_base.c 	spu_int_stat_clear(spu, 2, stat);
spu               369 arch/powerpc/platforms/cell/spu_base.c 		spu->ibox_callback(spu);
spu               372 arch/powerpc/platforms/cell/spu_base.c 		spu->stop_callback(spu, 2);
spu               375 arch/powerpc/platforms/cell/spu_base.c 		spu->stop_callback(spu, 2);
spu               378 arch/powerpc/platforms/cell/spu_base.c 		spu->mfc_callback(spu);
spu               381 arch/powerpc/platforms/cell/spu_base.c 		spu->wbox_callback(spu);
spu               383 arch/powerpc/platforms/cell/spu_base.c 	spu->stats.class2_intr++;
spu               385 arch/powerpc/platforms/cell/spu_base.c 	spin_unlock(&spu->register_lock);
spu               390 arch/powerpc/platforms/cell/spu_base.c static int spu_request_irqs(struct spu *spu)
spu               394 arch/powerpc/platforms/cell/spu_base.c 	if (spu->irqs[0]) {
spu               395 arch/powerpc/platforms/cell/spu_base.c 		snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
spu               396 arch/powerpc/platforms/cell/spu_base.c 			 spu->number);
spu               397 arch/powerpc/platforms/cell/spu_base.c 		ret = request_irq(spu->irqs[0], spu_irq_class_0,
spu               398 arch/powerpc/platforms/cell/spu_base.c 				  0, spu->irq_c0, spu);
spu               402 arch/powerpc/platforms/cell/spu_base.c 	if (spu->irqs[1]) {
spu               403 arch/powerpc/platforms/cell/spu_base.c 		snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
spu               404 arch/powerpc/platforms/cell/spu_base.c 			 spu->number);
spu               405 arch/powerpc/platforms/cell/spu_base.c 		ret = request_irq(spu->irqs[1], spu_irq_class_1,
spu               406 arch/powerpc/platforms/cell/spu_base.c 				  0, spu->irq_c1, spu);
spu               410 arch/powerpc/platforms/cell/spu_base.c 	if (spu->irqs[2]) {
spu               411 arch/powerpc/platforms/cell/spu_base.c 		snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
spu               412 arch/powerpc/platforms/cell/spu_base.c 			 spu->number);
spu               413 arch/powerpc/platforms/cell/spu_base.c 		ret = request_irq(spu->irqs[2], spu_irq_class_2,
spu               414 arch/powerpc/platforms/cell/spu_base.c 				  0, spu->irq_c2, spu);
spu               421 arch/powerpc/platforms/cell/spu_base.c 	if (spu->irqs[1])
spu               422 arch/powerpc/platforms/cell/spu_base.c 		free_irq(spu->irqs[1], spu);
spu               424 arch/powerpc/platforms/cell/spu_base.c 	if (spu->irqs[0])
spu               425 arch/powerpc/platforms/cell/spu_base.c 		free_irq(spu->irqs[0], spu);
spu               430 arch/powerpc/platforms/cell/spu_base.c static void spu_free_irqs(struct spu *spu)
spu               432 arch/powerpc/platforms/cell/spu_base.c 	if (spu->irqs[0])
spu               433 arch/powerpc/platforms/cell/spu_base.c 		free_irq(spu->irqs[0], spu);
spu               434 arch/powerpc/platforms/cell/spu_base.c 	if (spu->irqs[1])
spu               435 arch/powerpc/platforms/cell/spu_base.c 		free_irq(spu->irqs[1], spu);
spu               436 arch/powerpc/platforms/cell/spu_base.c 	if (spu->irqs[2])
spu               437 arch/powerpc/platforms/cell/spu_base.c 		free_irq(spu->irqs[2], spu);
spu               440 arch/powerpc/platforms/cell/spu_base.c void spu_init_channels(struct spu *spu)
spu               456 arch/powerpc/platforms/cell/spu_base.c 	priv2 = spu->priv2;
spu               482 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               485 arch/powerpc/platforms/cell/spu_base.c 	list_for_each_entry(spu, &spu_full_list, full_list)
spu               486 arch/powerpc/platforms/cell/spu_base.c 		device_create_file(&spu->dev, attr);
spu               495 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               499 arch/powerpc/platforms/cell/spu_base.c 	list_for_each_entry(spu, &spu_full_list, full_list) {
spu               500 arch/powerpc/platforms/cell/spu_base.c 		rc = sysfs_create_group(&spu->dev.kobj, attrs);
spu               507 arch/powerpc/platforms/cell/spu_base.c 			list_for_each_entry_continue_reverse(spu,
spu               509 arch/powerpc/platforms/cell/spu_base.c 				sysfs_remove_group(&spu->dev.kobj, attrs);
spu               523 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               526 arch/powerpc/platforms/cell/spu_base.c 	list_for_each_entry(spu, &spu_full_list, full_list)
spu               527 arch/powerpc/platforms/cell/spu_base.c 		device_remove_file(&spu->dev, attr);
spu               534 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               537 arch/powerpc/platforms/cell/spu_base.c 	list_for_each_entry(spu, &spu_full_list, full_list)
spu               538 arch/powerpc/platforms/cell/spu_base.c 		sysfs_remove_group(&spu->dev.kobj, attrs);
spu               543 arch/powerpc/platforms/cell/spu_base.c static int spu_create_dev(struct spu *spu)
spu               547 arch/powerpc/platforms/cell/spu_base.c 	spu->dev.id = spu->number;
spu               548 arch/powerpc/platforms/cell/spu_base.c 	spu->dev.bus = &spu_subsys;
spu               549 arch/powerpc/platforms/cell/spu_base.c 	ret = device_register(&spu->dev);
spu               552 arch/powerpc/platforms/cell/spu_base.c 				spu->number);
spu               556 arch/powerpc/platforms/cell/spu_base.c 	sysfs_add_device_to_node(&spu->dev, spu->node);
spu               563 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               569 arch/powerpc/platforms/cell/spu_base.c 	spu = kzalloc(sizeof (*spu), GFP_KERNEL);
spu               570 arch/powerpc/platforms/cell/spu_base.c 	if (!spu)
spu               573 arch/powerpc/platforms/cell/spu_base.c 	spu->alloc_state = SPU_FREE;
spu               575 arch/powerpc/platforms/cell/spu_base.c 	spin_lock_init(&spu->register_lock);
spu               577 arch/powerpc/platforms/cell/spu_base.c 	spu->number = number++;
spu               580 arch/powerpc/platforms/cell/spu_base.c 	ret = spu_create_spu(spu, data);
spu               585 arch/powerpc/platforms/cell/spu_base.c 	spu_mfc_sdr_setup(spu);
spu               586 arch/powerpc/platforms/cell/spu_base.c 	spu_mfc_sr1_set(spu, 0x33);
spu               587 arch/powerpc/platforms/cell/spu_base.c 	ret = spu_request_irqs(spu);
spu               591 arch/powerpc/platforms/cell/spu_base.c 	ret = spu_create_dev(spu);
spu               595 arch/powerpc/platforms/cell/spu_base.c 	mutex_lock(&cbe_spu_info[spu->node].list_mutex);
spu               596 arch/powerpc/platforms/cell/spu_base.c 	list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
spu               597 arch/powerpc/platforms/cell/spu_base.c 	cbe_spu_info[spu->node].n_spus++;
spu               598 arch/powerpc/platforms/cell/spu_base.c 	mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
spu               602 arch/powerpc/platforms/cell/spu_base.c 	list_add(&spu->full_list, &spu_full_list);
spu               606 arch/powerpc/platforms/cell/spu_base.c 	spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
spu               607 arch/powerpc/platforms/cell/spu_base.c 	spu->stats.tstamp = ktime_get_ns();
spu               609 arch/powerpc/platforms/cell/spu_base.c 	INIT_LIST_HEAD(&spu->aff_list);
spu               614 arch/powerpc/platforms/cell/spu_base.c 	spu_free_irqs(spu);
spu               616 arch/powerpc/platforms/cell/spu_base.c 	spu_destroy_spu(spu);
spu               618 arch/powerpc/platforms/cell/spu_base.c 	kfree(spu);
spu               627 arch/powerpc/platforms/cell/spu_base.c static unsigned long long spu_acct_time(struct spu *spu,
spu               630 arch/powerpc/platforms/cell/spu_base.c 	unsigned long long time = spu->stats.times[state];
spu               637 arch/powerpc/platforms/cell/spu_base.c 	if (spu->stats.util_state == state)
spu               638 arch/powerpc/platforms/cell/spu_base.c 		time += ktime_get_ns() - spu->stats.tstamp;
spu               647 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu = container_of(dev, struct spu, dev);
spu               651 arch/powerpc/platforms/cell/spu_base.c 		spu_state_names[spu->stats.util_state],
spu               652 arch/powerpc/platforms/cell/spu_base.c 		spu_acct_time(spu, SPU_UTIL_USER),
spu               653 arch/powerpc/platforms/cell/spu_base.c 		spu_acct_time(spu, SPU_UTIL_SYSTEM),
spu               654 arch/powerpc/platforms/cell/spu_base.c 		spu_acct_time(spu, SPU_UTIL_IOWAIT),
spu               655 arch/powerpc/platforms/cell/spu_base.c 		spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
spu               656 arch/powerpc/platforms/cell/spu_base.c 		spu->stats.vol_ctx_switch,
spu               657 arch/powerpc/platforms/cell/spu_base.c 		spu->stats.invol_ctx_switch,
spu               658 arch/powerpc/platforms/cell/spu_base.c 		spu->stats.slb_flt,
spu               659 arch/powerpc/platforms/cell/spu_base.c 		spu->stats.hash_flt,
spu               660 arch/powerpc/platforms/cell/spu_base.c 		spu->stats.min_flt,
spu               661 arch/powerpc/platforms/cell/spu_base.c 		spu->stats.maj_flt,
spu               662 arch/powerpc/platforms/cell/spu_base.c 		spu->stats.class2_intr,
spu               663 arch/powerpc/platforms/cell/spu_base.c 		spu->stats.libassist);
spu               671 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               685 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               690 arch/powerpc/platforms/cell/spu_base.c 		if (!crash_spu_info[i].spu)
spu               693 arch/powerpc/platforms/cell/spu_base.c 		spu = crash_spu_info[i].spu;
spu               696 arch/powerpc/platforms/cell/spu_base.c 			in_be32(&spu->problem->spu_runcntl_RW);
spu               698 arch/powerpc/platforms/cell/spu_base.c 			in_be32(&spu->problem->spu_status_R);
spu               700 arch/powerpc/platforms/cell/spu_base.c 			in_be32(&spu->problem->spu_npc_RW);
spu               702 arch/powerpc/platforms/cell/spu_base.c 		crash_spu_info[i].saved_mfc_dar    = spu_mfc_dar_get(spu);
spu               703 arch/powerpc/platforms/cell/spu_base.c 		crash_spu_info[i].saved_mfc_dsisr  = spu_mfc_dsisr_get(spu);
spu               704 arch/powerpc/platforms/cell/spu_base.c 		tmp = spu_mfc_sr1_get(spu);
spu               708 arch/powerpc/platforms/cell/spu_base.c 		spu_mfc_sr1_set(spu, tmp);
spu               716 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               719 arch/powerpc/platforms/cell/spu_base.c 	list_for_each_entry(spu, list, full_list) {
spu               720 arch/powerpc/platforms/cell/spu_base.c 		if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
spu               723 arch/powerpc/platforms/cell/spu_base.c 		crash_spu_info[spu->number].spu = spu;
spu               739 arch/powerpc/platforms/cell/spu_base.c 	struct spu *spu;
spu               742 arch/powerpc/platforms/cell/spu_base.c 	list_for_each_entry(spu, &spu_full_list, full_list) {
spu               743 arch/powerpc/platforms/cell/spu_base.c 		spu_free_irqs(spu);
spu               744 arch/powerpc/platforms/cell/spu_base.c 		spu_destroy_spu(spu);
spu                28 arch/powerpc/platforms/cell/spu_manage.c struct device_node *spu_devnode(struct spu *spu)
spu                30 arch/powerpc/platforms/cell/spu_manage.c 	return spu->devnode;
spu                58 arch/powerpc/platforms/cell/spu_manage.c static void spu_unmap(struct spu *spu)
spu                61 arch/powerpc/platforms/cell/spu_manage.c 		iounmap(spu->priv1);
spu                62 arch/powerpc/platforms/cell/spu_manage.c 	iounmap(spu->priv2);
spu                63 arch/powerpc/platforms/cell/spu_manage.c 	iounmap(spu->problem);
spu                64 arch/powerpc/platforms/cell/spu_manage.c 	iounmap((__force u8 __iomem *)spu->local_store);
spu                67 arch/powerpc/platforms/cell/spu_manage.c static int __init spu_map_interrupts_old(struct spu *spu,
spu                83 arch/powerpc/platforms/cell/spu_manage.c 		nid = spu->node;
spu                91 arch/powerpc/platforms/cell/spu_manage.c 	spu->irqs[0] = irq_create_mapping(NULL, IIC_IRQ_CLASS_0 | isrc);
spu                92 arch/powerpc/platforms/cell/spu_manage.c 	spu->irqs[1] = irq_create_mapping(NULL, IIC_IRQ_CLASS_1 | isrc);
spu                93 arch/powerpc/platforms/cell/spu_manage.c 	spu->irqs[2] = irq_create_mapping(NULL, IIC_IRQ_CLASS_2 | isrc);
spu                96 arch/powerpc/platforms/cell/spu_manage.c 	if (!spu->irqs[2])
spu               102 arch/powerpc/platforms/cell/spu_manage.c static void __iomem * __init spu_map_prop_old(struct spu *spu,
spu               119 arch/powerpc/platforms/cell/spu_manage.c static int __init spu_map_device_old(struct spu *spu)
spu               121 arch/powerpc/platforms/cell/spu_manage.c 	struct device_node *node = spu->devnode;
spu               126 arch/powerpc/platforms/cell/spu_manage.c 	spu->name = of_get_property(node, "name", NULL);
spu               127 arch/powerpc/platforms/cell/spu_manage.c 	if (!spu->name)
spu               133 arch/powerpc/platforms/cell/spu_manage.c 	spu->local_store_phys = *(unsigned long *)prop;
spu               136 arch/powerpc/platforms/cell/spu_manage.c 	spu->local_store = (void __force *)
spu               137 arch/powerpc/platforms/cell/spu_manage.c 		spu_map_prop_old(spu, node, "local-store");
spu               138 arch/powerpc/platforms/cell/spu_manage.c 	if (!spu->local_store)
spu               144 arch/powerpc/platforms/cell/spu_manage.c 	spu->problem_phys = *(unsigned long *)prop;
spu               146 arch/powerpc/platforms/cell/spu_manage.c 	spu->problem = spu_map_prop_old(spu, node, "problem");
spu               147 arch/powerpc/platforms/cell/spu_manage.c 	if (!spu->problem)
spu               150 arch/powerpc/platforms/cell/spu_manage.c 	spu->priv2 = spu_map_prop_old(spu, node, "priv2");
spu               151 arch/powerpc/platforms/cell/spu_manage.c 	if (!spu->priv2)
spu               155 arch/powerpc/platforms/cell/spu_manage.c 		spu->priv1 = spu_map_prop_old(spu, node, "priv1");
spu               156 arch/powerpc/platforms/cell/spu_manage.c 		if (!spu->priv1)
spu               164 arch/powerpc/platforms/cell/spu_manage.c 	spu_unmap(spu);
spu               169 arch/powerpc/platforms/cell/spu_manage.c static int __init spu_map_interrupts(struct spu *spu, struct device_node *np)
spu               174 arch/powerpc/platforms/cell/spu_manage.c 		spu->irqs[i] = irq_of_parse_and_map(np, i);
spu               175 arch/powerpc/platforms/cell/spu_manage.c 		if (!spu->irqs[i])
spu               181 arch/powerpc/platforms/cell/spu_manage.c 	pr_debug("failed to map irq %x for spu %s\n", i, spu->name);
spu               183 arch/powerpc/platforms/cell/spu_manage.c 		if (spu->irqs[i])
spu               184 arch/powerpc/platforms/cell/spu_manage.c 			irq_dispose_mapping(spu->irqs[i]);
spu               189 arch/powerpc/platforms/cell/spu_manage.c static int spu_map_resource(struct spu *spu, int nr,
spu               192 arch/powerpc/platforms/cell/spu_manage.c 	struct device_node *np = spu->devnode;
spu               209 arch/powerpc/platforms/cell/spu_manage.c static int __init spu_map_device(struct spu *spu)
spu               211 arch/powerpc/platforms/cell/spu_manage.c 	struct device_node *np = spu->devnode;
spu               214 arch/powerpc/platforms/cell/spu_manage.c 	spu->name = of_get_property(np, "name", NULL);
spu               215 arch/powerpc/platforms/cell/spu_manage.c 	if (!spu->name)
spu               218 arch/powerpc/platforms/cell/spu_manage.c 	ret = spu_map_resource(spu, 0, (void __iomem**)&spu->local_store,
spu               219 arch/powerpc/platforms/cell/spu_manage.c 			       &spu->local_store_phys);
spu               225 arch/powerpc/platforms/cell/spu_manage.c 	ret = spu_map_resource(spu, 1, (void __iomem**)&spu->problem,
spu               226 arch/powerpc/platforms/cell/spu_manage.c 			       &spu->problem_phys);
spu               232 arch/powerpc/platforms/cell/spu_manage.c 	ret = spu_map_resource(spu, 2, (void __iomem**)&spu->priv2, NULL);
spu               239 arch/powerpc/platforms/cell/spu_manage.c 		ret = spu_map_resource(spu, 3,
spu               240 arch/powerpc/platforms/cell/spu_manage.c 			       (void __iomem**)&spu->priv1, NULL);
spu               248 arch/powerpc/platforms/cell/spu_manage.c 		 spu->local_store_phys, spu->local_store);
spu               250 arch/powerpc/platforms/cell/spu_manage.c 		 spu->problem_phys, spu->problem);
spu               251 arch/powerpc/platforms/cell/spu_manage.c 	pr_debug("  priv2         :                       0x%p\n", spu->priv2);
spu               252 arch/powerpc/platforms/cell/spu_manage.c 	pr_debug("  priv1         :                       0x%p\n", spu->priv1);
spu               257 arch/powerpc/platforms/cell/spu_manage.c 	spu_unmap(spu);
spu               259 arch/powerpc/platforms/cell/spu_manage.c 	pr_debug("failed to map spe %s: %d\n", spu->name, ret);
spu               283 arch/powerpc/platforms/cell/spu_manage.c static int __init of_create_spu(struct spu *spu, void *data)
spu               289 arch/powerpc/platforms/cell/spu_manage.c 	spu->devnode = of_node_get(spe);
spu               290 arch/powerpc/platforms/cell/spu_manage.c 	spu->spe_id = find_spu_unit_number(spe);
spu               292 arch/powerpc/platforms/cell/spu_manage.c 	spu->node = of_node_to_nid(spe);
spu               293 arch/powerpc/platforms/cell/spu_manage.c 	if (spu->node >= MAX_NUMNODES) {
spu               295 arch/powerpc/platforms/cell/spu_manage.c 		       " node number too big\n", spe, spu->node);
spu               301 arch/powerpc/platforms/cell/spu_manage.c 	ret = spu_map_device(spu);
spu               308 arch/powerpc/platforms/cell/spu_manage.c 		ret = spu_map_device_old(spu);
spu               311 arch/powerpc/platforms/cell/spu_manage.c 				spu->name);
spu               316 arch/powerpc/platforms/cell/spu_manage.c 	ret = spu_map_interrupts(spu, spe);
spu               323 arch/powerpc/platforms/cell/spu_manage.c 		ret = spu_map_interrupts_old(spu, spe);
spu               326 arch/powerpc/platforms/cell/spu_manage.c 				spu->name);
spu               331 arch/powerpc/platforms/cell/spu_manage.c 	pr_debug("Using SPE %s %p %p %p %p %d\n", spu->name,
spu               332 arch/powerpc/platforms/cell/spu_manage.c 		spu->local_store, spu->problem, spu->priv1,
spu               333 arch/powerpc/platforms/cell/spu_manage.c 		spu->priv2, spu->number);
spu               337 arch/powerpc/platforms/cell/spu_manage.c 	spu_unmap(spu);
spu               342 arch/powerpc/platforms/cell/spu_manage.c static int of_destroy_spu(struct spu *spu)
spu               344 arch/powerpc/platforms/cell/spu_manage.c 	spu_unmap(spu);
spu               345 arch/powerpc/platforms/cell/spu_manage.c 	of_node_put(spu->devnode);
spu               364 arch/powerpc/platforms/cell/spu_manage.c static struct spu *spu_lookup_reg(int node, u32 reg)
spu               366 arch/powerpc/platforms/cell/spu_manage.c 	struct spu *spu;
spu               369 arch/powerpc/platforms/cell/spu_manage.c 	list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) {
spu               370 arch/powerpc/platforms/cell/spu_manage.c 		spu_reg = of_get_property(spu_devnode(spu), "reg", NULL);
spu               372 arch/powerpc/platforms/cell/spu_manage.c 			return spu;
spu               380 arch/powerpc/platforms/cell/spu_manage.c 	struct spu *last_spu, *spu;
spu               387 arch/powerpc/platforms/cell/spu_manage.c 			spu = spu_lookup_reg(node, reg);
spu               388 arch/powerpc/platforms/cell/spu_manage.c 			if (!spu)
spu               390 arch/powerpc/platforms/cell/spu_manage.c 			spu->has_mem_affinity = qs20_reg_memory[reg];
spu               392 arch/powerpc/platforms/cell/spu_manage.c 				list_add_tail(&spu->aff_list,
spu               394 arch/powerpc/platforms/cell/spu_manage.c 			last_spu = spu;
spu               412 arch/powerpc/platforms/cell/spu_manage.c static struct spu *devnode_spu(int cbe, struct device_node *dn)
spu               414 arch/powerpc/platforms/cell/spu_manage.c 	struct spu *spu;
spu               416 arch/powerpc/platforms/cell/spu_manage.c 	list_for_each_entry(spu, &cbe_spu_info[cbe].spus, cbe_list)
spu               417 arch/powerpc/platforms/cell/spu_manage.c 		if (spu_devnode(spu) == dn)
spu               418 arch/powerpc/platforms/cell/spu_manage.c 			return spu;
spu               422 arch/powerpc/platforms/cell/spu_manage.c static struct spu *
spu               425 arch/powerpc/platforms/cell/spu_manage.c 	struct spu *spu;
spu               430 arch/powerpc/platforms/cell/spu_manage.c 	list_for_each_entry(spu, &cbe_spu_info[cbe].spus, cbe_list) {
spu               431 arch/powerpc/platforms/cell/spu_manage.c 		spu_dn = spu_devnode(spu);
spu               437 arch/powerpc/platforms/cell/spu_manage.c 				return spu;
spu               445 arch/powerpc/platforms/cell/spu_manage.c 	struct spu *spu, *last_spu;
spu               451 arch/powerpc/platforms/cell/spu_manage.c 	last_spu = list_first_entry(&cbe_spu_info[cbe].spus, struct spu,
spu               471 arch/powerpc/platforms/cell/spu_manage.c 				spu = devnode_spu(cbe, vic_dn);
spu               480 arch/powerpc/platforms/cell/spu_manage.c 				spu = neighbour_spu(cbe, vic_dn, last_spu_dn);
spu               481 arch/powerpc/platforms/cell/spu_manage.c 				if (!spu)
spu               485 arch/powerpc/platforms/cell/spu_manage.c 					spu->has_mem_affinity = 1;
spu               490 arch/powerpc/platforms/cell/spu_manage.c 			list_add_tail(&spu->aff_list, &last_spu->aff_list);
spu               491 arch/powerpc/platforms/cell/spu_manage.c 			last_spu = spu;
spu                18 arch/powerpc/platforms/cell/spu_notify.c void spu_switch_notify(struct spu *spu, struct spu_context *ctx)
spu                21 arch/powerpc/platforms/cell/spu_notify.c 				     ctx ? ctx->object_id : 0, spu);
spu                27 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void int_mask_and(struct spu *spu, int class, u64 mask)
spu                31 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
spu                32 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
spu                35 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void int_mask_or(struct spu *spu, int class, u64 mask)
spu                39 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
spu                40 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
spu                43 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void int_mask_set(struct spu *spu, int class, u64 mask)
spu                45 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->int_mask_RW[class], mask);
spu                48 arch/powerpc/platforms/cell/spu_priv1_mmio.c static u64 int_mask_get(struct spu *spu, int class)
spu                50 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	return in_be64(&spu->priv1->int_mask_RW[class]);
spu                53 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void int_stat_clear(struct spu *spu, int class, u64 stat)
spu                55 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->int_stat_RW[class], stat);
spu                58 arch/powerpc/platforms/cell/spu_priv1_mmio.c static u64 int_stat_get(struct spu *spu, int class)
spu                60 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	return in_be64(&spu->priv1->int_stat_RW[class]);
spu                63 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void cpu_affinity_set(struct spu *spu, int cpu)
spu                68 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	if (nr_cpus_node(spu->node)) {
spu                69 arch/powerpc/platforms/cell/spu_priv1_mmio.c 		const struct cpumask *spumask = cpumask_of_node(spu->node),
spu                78 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->int_route_RW, route);
spu                81 arch/powerpc/platforms/cell/spu_priv1_mmio.c static u64 mfc_dar_get(struct spu *spu)
spu                83 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	return in_be64(&spu->priv1->mfc_dar_RW);
spu                86 arch/powerpc/platforms/cell/spu_priv1_mmio.c static u64 mfc_dsisr_get(struct spu *spu)
spu                88 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	return in_be64(&spu->priv1->mfc_dsisr_RW);
spu                91 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void mfc_dsisr_set(struct spu *spu, u64 dsisr)
spu                93 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
spu                96 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void mfc_sdr_setup(struct spu *spu)
spu                98 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->mfc_sdr_RW, mfspr(SPRN_SDR1));
spu               101 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void mfc_sr1_set(struct spu *spu, u64 sr1)
spu               103 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->mfc_sr1_RW, sr1);
spu               106 arch/powerpc/platforms/cell/spu_priv1_mmio.c static u64 mfc_sr1_get(struct spu *spu)
spu               108 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	return in_be64(&spu->priv1->mfc_sr1_RW);
spu               111 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
spu               113 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
spu               116 arch/powerpc/platforms/cell/spu_priv1_mmio.c static u64 mfc_tclass_id_get(struct spu *spu)
spu               118 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	return in_be64(&spu->priv1->mfc_tclass_id_RW);
spu               121 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void tlb_invalidate(struct spu *spu)
spu               123 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
spu               126 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void resource_allocation_groupID_set(struct spu *spu, u64 id)
spu               128 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
spu               131 arch/powerpc/platforms/cell/spu_priv1_mmio.c static u64 resource_allocation_groupID_get(struct spu *spu)
spu               133 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	return in_be64(&spu->priv1->resource_allocation_groupID_RW);
spu               136 arch/powerpc/platforms/cell/spu_priv1_mmio.c static void resource_allocation_enable_set(struct spu *spu, u64 enable)
spu               138 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
spu               141 arch/powerpc/platforms/cell/spu_priv1_mmio.c static u64 resource_allocation_enable_get(struct spu *spu)
spu               143 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	return in_be64(&spu->priv1->resource_allocation_enable_RW);
spu                12 arch/powerpc/platforms/cell/spu_priv1_mmio.h struct device_node *spu_devnode(struct spu *spu);
spu               115 arch/powerpc/platforms/cell/spufs/fault.c 		ctx->spu->stats.hash_flt++;
spu               155 arch/powerpc/platforms/cell/spufs/fault.c 				ctx->spu->stats.maj_flt++;
spu               157 arch/powerpc/platforms/cell/spufs/fault.c 				ctx->spu->stats.min_flt++;
spu               160 arch/powerpc/platforms/cell/spufs/fault.c 		if (ctx->spu)
spu               245 arch/powerpc/platforms/cell/spufs/file.c 		pfn = (ctx->spu->local_store_phys + offset) >> PAGE_SHIFT;
spu               342 arch/powerpc/platforms/cell/spufs/file.c 		spu_context_trace(spufs_ps_fault__wake, ctx, ctx->spu);
spu               345 arch/powerpc/platforms/cell/spufs/file.c 		area = ctx->spu->problem_phys + ps_offs;
spu               348 arch/powerpc/platforms/cell/spufs/file.c 		spu_context_trace(spufs_ps_fault__insert, ctx, ctx->spu);
spu               677 arch/powerpc/platforms/cell/spufs/file.c void spufs_ibox_callback(struct spu *spu)
spu               679 arch/powerpc/platforms/cell/spufs/file.c 	struct spu_context *ctx = spu->ctx;
spu               815 arch/powerpc/platforms/cell/spufs/file.c void spufs_wbox_callback(struct spu *spu)
spu               817 arch/powerpc/platforms/cell/spufs/file.c 	struct spu_context *ctx = spu->ctx;
spu              1484 arch/powerpc/platforms/cell/spufs/file.c void spufs_mfc_callback(struct spu *spu)
spu              1486 arch/powerpc/platforms/cell/spufs/file.c 	struct spu_context *ctx = spu->ctx;
spu              1900 arch/powerpc/platforms/cell/spufs/file.c 		num = ctx->spu->number;
spu              2231 arch/powerpc/platforms/cell/spufs/file.c 	if (ctx->spu && ctx->stats.util_state == state) {
spu              2243 arch/powerpc/platforms/cell/spufs/file.c 		slb_flts += (ctx->spu->stats.slb_flt -
spu              2255 arch/powerpc/platforms/cell/spufs/file.c 		class2_intrs += (ctx->spu->stats.class2_intr -
spu              2481 arch/powerpc/platforms/cell/spufs/file.c void spu_switch_log_notify(struct spu *spu, struct spu_context *ctx,
spu              2493 arch/powerpc/platforms/cell/spufs/file.c 		p->spu_id = spu ? spu->number : -1;
spu              2510 arch/powerpc/platforms/cell/spufs/file.c 	if (ctx->spu) {
spu              2511 arch/powerpc/platforms/cell/spufs/file.c 		struct spu *spu = ctx->spu;
spu              2512 arch/powerpc/platforms/cell/spufs/file.c 		struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              2514 arch/powerpc/platforms/cell/spufs/file.c 		spin_lock_irq(&spu->register_lock);
spu              2516 arch/powerpc/platforms/cell/spufs/file.c 		spin_unlock_irq(&spu->register_lock);
spu              2530 arch/powerpc/platforms/cell/spufs/file.c 		ctx->spu ? ctx->spu->number : -1,
spu                26 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu *spu = ctx->spu;
spu                27 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu_problem __iomem *prob = spu->problem;
spu                31 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&spu->register_lock);
spu                37 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&spu->register_lock);
spu                43 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return in_be32(&ctx->spu->problem->mb_stat_R);
spu                48 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu *spu = ctx->spu;
spu                52 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&spu->register_lock);
spu                53 arch/powerpc/platforms/cell/spufs/hw_ops.c 	stat = in_be32(&spu->problem->mb_stat_R);
spu                64 arch/powerpc/platforms/cell/spufs/hw_ops.c 			spu_int_stat_clear(spu, 2, CLASS2_MAILBOX_INTR);
spu                65 arch/powerpc/platforms/cell/spufs/hw_ops.c 			spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR);
spu                72 arch/powerpc/platforms/cell/spufs/hw_ops.c 			spu_int_stat_clear(spu, 2,
spu                74 arch/powerpc/platforms/cell/spufs/hw_ops.c 			spu_int_mask_or(spu, 2,
spu                78 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&spu->register_lock);
spu                84 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu *spu = ctx->spu;
spu                85 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu_problem __iomem *prob = spu->problem;
spu                86 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu                89 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&spu->register_lock);
spu                96 arch/powerpc/platforms/cell/spufs/hw_ops.c 		spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR);
spu                99 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&spu->register_lock);
spu               105 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu *spu = ctx->spu;
spu               106 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu_problem __iomem *prob = spu->problem;
spu               109 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&spu->register_lock);
spu               117 arch/powerpc/platforms/cell/spufs/hw_ops.c 		spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR);
spu               120 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&spu->register_lock);
spu               126 arch/powerpc/platforms/cell/spufs/hw_ops.c 	out_be32(&ctx->spu->problem->signal_notify1, data);
spu               131 arch/powerpc/platforms/cell/spufs/hw_ops.c 	out_be32(&ctx->spu->problem->signal_notify2, data);
spu               136 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu *spu = ctx->spu;
spu               137 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               140 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&spu->register_lock);
spu               147 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&spu->register_lock);
spu               152 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 1) != 0);
spu               157 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu *spu = ctx->spu;
spu               158 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               161 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&spu->register_lock);
spu               168 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&spu->register_lock);
spu               173 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 2) != 0);
spu               178 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return in_be32(&ctx->spu->problem->spu_npc_RW);
spu               183 arch/powerpc/platforms/cell/spufs/hw_ops.c 	out_be32(&ctx->spu->problem->spu_npc_RW, val);
spu               188 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return in_be32(&ctx->spu->problem->spu_status_R);
spu               193 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return ctx->spu->local_store;
spu               198 arch/powerpc/platforms/cell/spufs/hw_ops.c 	out_be64(&ctx->spu->priv2->spu_privcntl_RW, val);
spu               203 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return in_be32(&ctx->spu->problem->spu_runcntl_RW);
spu               208 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&ctx->spu->register_lock);
spu               212 arch/powerpc/platforms/cell/spufs/hw_ops.c 	out_be32(&ctx->spu->problem->spu_runcntl_RW, val);
spu               213 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&ctx->spu->register_lock);
spu               218 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&ctx->spu->register_lock);
spu               219 arch/powerpc/platforms/cell/spufs/hw_ops.c 	out_be32(&ctx->spu->problem->spu_runcntl_RW, SPU_RUNCNTL_STOP);
spu               220 arch/powerpc/platforms/cell/spufs/hw_ops.c 	while (in_be32(&ctx->spu->problem->spu_status_R) & SPU_STATUS_RUNNING)
spu               222 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&ctx->spu->register_lock);
spu               227 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu *spu = ctx->spu;
spu               230 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&spu->register_lock);
spu               231 arch/powerpc/platforms/cell/spufs/hw_ops.c 	sr1 = spu_mfc_sr1_get(spu) | MFC_STATE1_MASTER_RUN_CONTROL_MASK;
spu               232 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spu_mfc_sr1_set(spu, sr1);
spu               233 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&spu->register_lock);
spu               238 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu *spu = ctx->spu;
spu               241 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&spu->register_lock);
spu               242 arch/powerpc/platforms/cell/spufs/hw_ops.c 	sr1 = spu_mfc_sr1_get(spu) & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
spu               243 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spu_mfc_sr1_set(spu, sr1);
spu               244 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&spu->register_lock);
spu               249 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu_problem __iomem *prob = ctx->spu->problem;
spu               252 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&ctx->spu->register_lock);
spu               260 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&ctx->spu->register_lock);
spu               266 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return in_be32(&ctx->spu->problem->dma_tagstatus_R);
spu               271 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return in_be32(&ctx->spu->problem->dma_qstatus_R);
spu               278 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu_problem __iomem *prob = ctx->spu->problem;
spu               280 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_lock_irq(&ctx->spu->register_lock);
spu               288 arch/powerpc/platforms/cell/spufs/hw_ops.c 	spin_unlock_irq(&ctx->spu->register_lock);
spu               302 arch/powerpc/platforms/cell/spufs/hw_ops.c 	struct spu_priv2 __iomem *priv2 = ctx->spu->priv2;
spu               304 arch/powerpc/platforms/cell/spufs/hw_ops.c 	if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &ctx->spu->flags))
spu               310 arch/powerpc/platforms/cell/spufs/inode.c 					struct spu, cbe_list))->aff_list);
spu                15 arch/powerpc/platforms/cell/spufs/run.c void spufs_stop_callback(struct spu *spu, int irq)
spu                17 arch/powerpc/platforms/cell/spufs/run.c 	struct spu_context *ctx = spu->ctx;
spu                30 arch/powerpc/platforms/cell/spufs/run.c 			ctx->csa.class_0_pending = spu->class_0_pending;
spu                31 arch/powerpc/platforms/cell/spufs/run.c 			ctx->csa.class_0_dar = spu->class_0_dar;
spu                34 arch/powerpc/platforms/cell/spufs/run.c 			ctx->csa.class_1_dsisr = spu->class_1_dsisr;
spu                35 arch/powerpc/platforms/cell/spufs/run.c 			ctx->csa.class_1_dar = spu->class_1_dar;
spu               104 arch/powerpc/platforms/cell/spufs/run.c 	mfc_cntl = &ctx->spu->priv2->mfc_control_RW;
spu               125 arch/powerpc/platforms/cell/spufs/run.c 	sr1 = spu_mfc_sr1_get(ctx->spu);
spu               127 arch/powerpc/platforms/cell/spufs/run.c 	spu_mfc_sr1_set(ctx->spu, sr1);
spu               170 arch/powerpc/platforms/cell/spufs/run.c 	spu_mfc_sr1_set(ctx->spu, sr1);
spu               356 arch/powerpc/platforms/cell/spufs/run.c 	struct spu *spu;
spu               389 arch/powerpc/platforms/cell/spufs/run.c 		spu = ctx->spu;
spu               393 arch/powerpc/platforms/cell/spufs/run.c 				spu_switch_notify(spu, ctx);
spu               142 arch/powerpc/platforms/cell/spufs/sched.c 		node = ctx->spu->node;
spu               189 arch/powerpc/platforms/cell/spufs/sched.c 		struct spu *spu;
spu               192 arch/powerpc/platforms/cell/spufs/sched.c 		list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) {
spu               193 arch/powerpc/platforms/cell/spufs/sched.c 			if (spu->alloc_state != SPU_FREE) {
spu               194 arch/powerpc/platforms/cell/spufs/sched.c 				struct spu_context *ctx = spu->ctx;
spu               210 arch/powerpc/platforms/cell/spufs/sched.c static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
spu               212 arch/powerpc/platforms/cell/spufs/sched.c 	spu_context_trace(spu_bind_context__enter, ctx, spu);
spu               217 arch/powerpc/platforms/cell/spufs/sched.c 		atomic_inc(&cbe_spu_info[spu->node].reserved_spus);
spu               219 arch/powerpc/platforms/cell/spufs/sched.c 	ctx->stats.slb_flt_base = spu->stats.slb_flt;
spu               220 arch/powerpc/platforms/cell/spufs/sched.c 	ctx->stats.class2_intr_base = spu->stats.class2_intr;
spu               222 arch/powerpc/platforms/cell/spufs/sched.c 	spu_associate_mm(spu, ctx->owner);
spu               224 arch/powerpc/platforms/cell/spufs/sched.c 	spin_lock_irq(&spu->register_lock);
spu               225 arch/powerpc/platforms/cell/spufs/sched.c 	spu->ctx = ctx;
spu               226 arch/powerpc/platforms/cell/spufs/sched.c 	spu->flags = 0;
spu               227 arch/powerpc/platforms/cell/spufs/sched.c 	ctx->spu = spu;
spu               229 arch/powerpc/platforms/cell/spufs/sched.c 	spu->pid = current->pid;
spu               230 arch/powerpc/platforms/cell/spufs/sched.c 	spu->tgid = current->tgid;
spu               231 arch/powerpc/platforms/cell/spufs/sched.c 	spu->ibox_callback = spufs_ibox_callback;
spu               232 arch/powerpc/platforms/cell/spufs/sched.c 	spu->wbox_callback = spufs_wbox_callback;
spu               233 arch/powerpc/platforms/cell/spufs/sched.c 	spu->stop_callback = spufs_stop_callback;
spu               234 arch/powerpc/platforms/cell/spufs/sched.c 	spu->mfc_callback = spufs_mfc_callback;
spu               235 arch/powerpc/platforms/cell/spufs/sched.c 	spin_unlock_irq(&spu->register_lock);
spu               239 arch/powerpc/platforms/cell/spufs/sched.c 	spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0);
spu               240 arch/powerpc/platforms/cell/spufs/sched.c 	spu_restore(&ctx->csa, spu);
spu               241 arch/powerpc/platforms/cell/spufs/sched.c 	spu->timestamp = jiffies;
spu               242 arch/powerpc/platforms/cell/spufs/sched.c 	spu_switch_notify(spu, ctx);
spu               251 arch/powerpc/platforms/cell/spufs/sched.c static inline int sched_spu(struct spu *spu)
spu               253 arch/powerpc/platforms/cell/spufs/sched.c 	BUG_ON(!mutex_is_locked(&cbe_spu_info[spu->node].list_mutex));
spu               255 arch/powerpc/platforms/cell/spufs/sched.c 	return (!spu->ctx || !(spu->ctx->flags & SPU_CREATE_NOSCHED));
spu               292 arch/powerpc/platforms/cell/spufs/sched.c static struct spu *aff_ref_location(struct spu_context *ctx, int mem_aff,
spu               295 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu;
spu               321 arch/powerpc/platforms/cell/spufs/sched.c 		list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) {
spu               322 arch/powerpc/platforms/cell/spufs/sched.c 			if (spu->ctx && spu->ctx->gang && !spu->ctx->aff_offset
spu               323 arch/powerpc/platforms/cell/spufs/sched.c 					&& spu->ctx->gang->aff_ref_spu)
spu               324 arch/powerpc/platforms/cell/spufs/sched.c 				available_spus -= spu->ctx->gang->contexts;
spu               332 arch/powerpc/platforms/cell/spufs/sched.c 		list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) {
spu               333 arch/powerpc/platforms/cell/spufs/sched.c 			if ((!mem_aff || spu->has_mem_affinity) &&
spu               334 arch/powerpc/platforms/cell/spufs/sched.c 							sched_spu(spu)) {
spu               336 arch/powerpc/platforms/cell/spufs/sched.c 				return spu;
spu               348 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *tmp;
spu               368 arch/powerpc/platforms/cell/spufs/sched.c static struct spu *ctx_location(struct spu *ref, int offset, int node)
spu               370 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu;
spu               372 arch/powerpc/platforms/cell/spufs/sched.c 	spu = NULL;
spu               374 arch/powerpc/platforms/cell/spufs/sched.c 		list_for_each_entry(spu, ref->aff_list.prev, aff_list) {
spu               375 arch/powerpc/platforms/cell/spufs/sched.c 			BUG_ON(spu->node != node);
spu               378 arch/powerpc/platforms/cell/spufs/sched.c 			if (sched_spu(spu))
spu               382 arch/powerpc/platforms/cell/spufs/sched.c 		list_for_each_entry_reverse(spu, ref->aff_list.next, aff_list) {
spu               383 arch/powerpc/platforms/cell/spufs/sched.c 			BUG_ON(spu->node != node);
spu               386 arch/powerpc/platforms/cell/spufs/sched.c 			if (sched_spu(spu))
spu               391 arch/powerpc/platforms/cell/spufs/sched.c 	return spu;
spu               424 arch/powerpc/platforms/cell/spufs/sched.c static void spu_unbind_context(struct spu *spu, struct spu_context *ctx)
spu               428 arch/powerpc/platforms/cell/spufs/sched.c 	spu_context_trace(spu_unbind_context__enter, ctx, spu);
spu               432 arch/powerpc/platforms/cell/spufs/sched.c  	if (spu->ctx->flags & SPU_CREATE_NOSCHED)
spu               433 arch/powerpc/platforms/cell/spufs/sched.c 		atomic_dec(&cbe_spu_info[spu->node].reserved_spus);
spu               443 arch/powerpc/platforms/cell/spufs/sched.c 	spu_switch_notify(spu, NULL);
spu               445 arch/powerpc/platforms/cell/spufs/sched.c 	spu_save(&ctx->csa, spu);
spu               446 arch/powerpc/platforms/cell/spufs/sched.c 	spu_switch_log_notify(spu, ctx, SWITCH_LOG_STOP, 0);
spu               448 arch/powerpc/platforms/cell/spufs/sched.c 	spin_lock_irq(&spu->register_lock);
spu               449 arch/powerpc/platforms/cell/spufs/sched.c 	spu->timestamp = jiffies;
spu               451 arch/powerpc/platforms/cell/spufs/sched.c 	spu->ibox_callback = NULL;
spu               452 arch/powerpc/platforms/cell/spufs/sched.c 	spu->wbox_callback = NULL;
spu               453 arch/powerpc/platforms/cell/spufs/sched.c 	spu->stop_callback = NULL;
spu               454 arch/powerpc/platforms/cell/spufs/sched.c 	spu->mfc_callback = NULL;
spu               455 arch/powerpc/platforms/cell/spufs/sched.c 	spu->pid = 0;
spu               456 arch/powerpc/platforms/cell/spufs/sched.c 	spu->tgid = 0;
spu               458 arch/powerpc/platforms/cell/spufs/sched.c 	spu->flags = 0;
spu               459 arch/powerpc/platforms/cell/spufs/sched.c 	spu->ctx = NULL;
spu               460 arch/powerpc/platforms/cell/spufs/sched.c 	spin_unlock_irq(&spu->register_lock);
spu               462 arch/powerpc/platforms/cell/spufs/sched.c 	spu_associate_mm(spu, NULL);
spu               465 arch/powerpc/platforms/cell/spufs/sched.c 		(spu->stats.slb_flt - ctx->stats.slb_flt_base);
spu               467 arch/powerpc/platforms/cell/spufs/sched.c 		(spu->stats.class2_intr - ctx->stats.class2_intr_base);
spu               471 arch/powerpc/platforms/cell/spufs/sched.c 	ctx->spu = NULL;
spu               559 arch/powerpc/platforms/cell/spufs/sched.c static struct spu *spu_get_idle(struct spu_context *ctx)
spu               561 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu, *aff_ref_spu;
spu               575 arch/powerpc/platforms/cell/spufs/sched.c 			spu = ctx_location(aff_ref_spu, ctx->aff_offset, node);
spu               576 arch/powerpc/platforms/cell/spufs/sched.c 			if (spu && spu->alloc_state == SPU_FREE)
spu               592 arch/powerpc/platforms/cell/spufs/sched.c 		list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) {
spu               593 arch/powerpc/platforms/cell/spufs/sched.c 			if (spu->alloc_state == SPU_FREE)
spu               604 arch/powerpc/platforms/cell/spufs/sched.c 	spu->alloc_state = SPU_USED;
spu               606 arch/powerpc/platforms/cell/spufs/sched.c 	spu_context_trace(spu_get_idle__found, ctx, spu);
spu               607 arch/powerpc/platforms/cell/spufs/sched.c 	spu_init_channels(spu);
spu               608 arch/powerpc/platforms/cell/spufs/sched.c 	return spu;
spu               617 arch/powerpc/platforms/cell/spufs/sched.c static struct spu *find_victim(struct spu_context *ctx)
spu               620 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu;
spu               640 arch/powerpc/platforms/cell/spufs/sched.c 		list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) {
spu               641 arch/powerpc/platforms/cell/spufs/sched.c 			struct spu_context *tmp = spu->ctx;
spu               646 arch/powerpc/platforms/cell/spufs/sched.c 				victim = spu->ctx;
spu               670 arch/powerpc/platforms/cell/spufs/sched.c 			spu = victim->spu;
spu               671 arch/powerpc/platforms/cell/spufs/sched.c 			if (!spu || victim->prio <= ctx->prio) {
spu               683 arch/powerpc/platforms/cell/spufs/sched.c 			spu_context_trace(__spu_deactivate__unload, ctx, spu);
spu               687 arch/powerpc/platforms/cell/spufs/sched.c 			spu_unbind_context(spu, victim);
spu               691 arch/powerpc/platforms/cell/spufs/sched.c 			spu->stats.invol_ctx_switch++;
spu               698 arch/powerpc/platforms/cell/spufs/sched.c 			return spu;
spu               705 arch/powerpc/platforms/cell/spufs/sched.c static void __spu_schedule(struct spu *spu, struct spu_context *ctx)
spu               707 arch/powerpc/platforms/cell/spufs/sched.c 	int node = spu->node;
spu               713 arch/powerpc/platforms/cell/spufs/sched.c 	if (spu->ctx == NULL) {
spu               714 arch/powerpc/platforms/cell/spufs/sched.c 		spu_bind_context(spu, ctx);
spu               716 arch/powerpc/platforms/cell/spufs/sched.c 		spu->alloc_state = SPU_USED;
spu               727 arch/powerpc/platforms/cell/spufs/sched.c static void spu_schedule(struct spu *spu, struct spu_context *ctx)
spu               733 arch/powerpc/platforms/cell/spufs/sched.c 		__spu_schedule(spu, ctx);
spu               750 arch/powerpc/platforms/cell/spufs/sched.c static void spu_unschedule(struct spu *spu, struct spu_context *ctx,
spu               753 arch/powerpc/platforms/cell/spufs/sched.c 	int node = spu->node;
spu               758 arch/powerpc/platforms/cell/spufs/sched.c 		spu->alloc_state = SPU_FREE;
spu               759 arch/powerpc/platforms/cell/spufs/sched.c 	spu_unbind_context(spu, ctx);
spu               761 arch/powerpc/platforms/cell/spufs/sched.c 	spu->stats.invol_ctx_switch++;
spu               776 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu;
spu               784 arch/powerpc/platforms/cell/spufs/sched.c 	if (ctx->spu)
spu               791 arch/powerpc/platforms/cell/spufs/sched.c 	spu = spu_get_idle(ctx);
spu               796 arch/powerpc/platforms/cell/spufs/sched.c 	if (!spu && rt_prio(ctx->prio))
spu               797 arch/powerpc/platforms/cell/spufs/sched.c 		spu = find_victim(ctx);
spu               798 arch/powerpc/platforms/cell/spufs/sched.c 	if (spu) {
spu               802 arch/powerpc/platforms/cell/spufs/sched.c 		__spu_schedule(spu, ctx);
spu               852 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu = ctx->spu;
spu               855 arch/powerpc/platforms/cell/spufs/sched.c 	if (spu) {
spu               856 arch/powerpc/platforms/cell/spufs/sched.c 		new = grab_runnable_context(max_prio, spu->node);
spu               858 arch/powerpc/platforms/cell/spufs/sched.c 			spu_unschedule(spu, ctx, new == NULL);
spu               864 arch/powerpc/platforms/cell/spufs/sched.c 					spu_schedule(spu, new);
spu               910 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu = NULL;
spu               925 arch/powerpc/platforms/cell/spufs/sched.c 	spu = ctx->spu;
spu               927 arch/powerpc/platforms/cell/spufs/sched.c 	spu_context_trace(spusched_tick__preempt, ctx, spu);
spu               929 arch/powerpc/platforms/cell/spufs/sched.c 	new = grab_runnable_context(ctx->prio + 1, spu->node);
spu               931 arch/powerpc/platforms/cell/spufs/sched.c 		spu_unschedule(spu, ctx, 0);
spu               943 arch/powerpc/platforms/cell/spufs/sched.c 		spu_schedule(spu, new);
spu               996 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu;
spu              1006 arch/powerpc/platforms/cell/spufs/sched.c 			list_for_each_entry(spu, &cbe_spu_info[node].spus,
spu              1008 arch/powerpc/platforms/cell/spufs/sched.c 				struct spu_context *ctx = spu->ctx;
spu              1030 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu;
spu              1040 arch/powerpc/platforms/cell/spufs/sched.c 	spu = ctx->spu;
spu              1048 arch/powerpc/platforms/cell/spufs/sched.c 	if (spu) {
spu              1050 arch/powerpc/platforms/cell/spufs/sched.c 		spu->stats.times[old_state] += delta;
spu              1051 arch/powerpc/platforms/cell/spufs/sched.c 		spu->stats.util_state = new_state;
spu              1052 arch/powerpc/platforms/cell/spufs/sched.c 		spu->stats.tstamp = curtime;
spu              1053 arch/powerpc/platforms/cell/spufs/sched.c 		node = spu->node;
spu              1128 arch/powerpc/platforms/cell/spufs/sched.c 	struct spu *spu;
spu              1139 arch/powerpc/platforms/cell/spufs/sched.c 		list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list)
spu              1140 arch/powerpc/platforms/cell/spufs/sched.c 			if (spu->alloc_state != SPU_FREE)
spu              1141 arch/powerpc/platforms/cell/spufs/sched.c 				spu->alloc_state = SPU_FREE;
spu                68 arch/powerpc/platforms/cell/spufs/spufs.h 	struct spu *spu;		  /* pointer to a physical SPU */
spu               152 arch/powerpc/platforms/cell/spufs/spufs.h 	struct spu *aff_ref_spu;
spu               255 arch/powerpc/platforms/cell/spufs/spufs.h struct spu *affinity_check(struct spu_context *ctx);
spu               284 arch/powerpc/platforms/cell/spufs/spufs.h void spu_switch_notify(struct spu *spu, struct spu_context *ctx);
spu               285 arch/powerpc/platforms/cell/spufs/spufs.h void spu_switch_log_notify(struct spu *spu, struct spu_context *ctx,
spu               331 arch/powerpc/platforms/cell/spufs/spufs.h void spufs_ibox_callback(struct spu *spu);
spu               332 arch/powerpc/platforms/cell/spufs/spufs.h void spufs_wbox_callback(struct spu *spu);
spu               333 arch/powerpc/platforms/cell/spufs/spufs.h void spufs_stop_callback(struct spu *spu, int irq);
spu               334 arch/powerpc/platforms/cell/spufs/spufs.h void spufs_mfc_callback(struct spu *spu);
spu               335 arch/powerpc/platforms/cell/spufs/spufs.h void spufs_dma_callback(struct spu *spu, int type);
spu               350 arch/powerpc/platforms/cell/spufs/spufs.h extern int spu_save(struct spu_state *prev, struct spu *spu);
spu               351 arch/powerpc/platforms/cell/spufs/spufs.h extern int spu_restore(struct spu_state *new, struct spu *spu);
spu               353 arch/powerpc/platforms/cell/spufs/spufs.h 		      struct spu *spu);
spu                12 arch/powerpc/platforms/cell/spufs/sputrace.h 	TP_PROTO(struct spu_context *ctx, struct spu *spu, const char *name),
spu                13 arch/powerpc/platforms/cell/spufs/sputrace.h 	TP_ARGS(ctx, spu, name),
spu                24 arch/powerpc/platforms/cell/spufs/sputrace.h 		__entry->number = spu ? spu->number : -1;
spu                31 arch/powerpc/platforms/cell/spufs/sputrace.h #define spu_context_trace(name, ctx, spu) \
spu                32 arch/powerpc/platforms/cell/spufs/sputrace.h 	trace_spufs_context(ctx, spu, __stringify(name))
spu                64 arch/powerpc/platforms/cell/spufs/switch.c static inline void acquire_spu_lock(struct spu *spu)
spu                73 arch/powerpc/platforms/cell/spufs/switch.c static inline void release_spu_lock(struct spu *spu)
spu                81 arch/powerpc/platforms/cell/spufs/switch.c static inline int check_spu_isolate(struct spu_state *csa, struct spu *spu)
spu                83 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu                97 arch/powerpc/platforms/cell/spufs/switch.c static inline void disable_interrupts(struct spu_state *csa, struct spu *spu)
spu               110 arch/powerpc/platforms/cell/spufs/switch.c 	spin_lock_irq(&spu->register_lock);
spu               112 arch/powerpc/platforms/cell/spufs/switch.c 		csa->priv1.int_mask_class0_RW = spu_int_mask_get(spu, 0);
spu               113 arch/powerpc/platforms/cell/spufs/switch.c 		csa->priv1.int_mask_class1_RW = spu_int_mask_get(spu, 1);
spu               114 arch/powerpc/platforms/cell/spufs/switch.c 		csa->priv1.int_mask_class2_RW = spu_int_mask_get(spu, 2);
spu               116 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 0, 0ul);
spu               117 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 1, 0ul);
spu               118 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 2, 0ul);
spu               120 arch/powerpc/platforms/cell/spufs/switch.c 	spin_unlock_irq(&spu->register_lock);
spu               127 arch/powerpc/platforms/cell/spufs/switch.c 	set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
spu               128 arch/powerpc/platforms/cell/spufs/switch.c 	clear_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
spu               129 arch/powerpc/platforms/cell/spufs/switch.c 	synchronize_irq(spu->irqs[0]);
spu               130 arch/powerpc/platforms/cell/spufs/switch.c 	synchronize_irq(spu->irqs[1]);
spu               131 arch/powerpc/platforms/cell/spufs/switch.c 	synchronize_irq(spu->irqs[2]);
spu               134 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_watchdog_timer(struct spu_state *csa, struct spu *spu)
spu               147 arch/powerpc/platforms/cell/spufs/switch.c static inline void inhibit_user_access(struct spu_state *csa, struct spu *spu)
spu               158 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_switch_pending(struct spu_state *csa, struct spu *spu)
spu               167 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
spu               169 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               201 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_spu_runcntl(struct spu_state *csa, struct spu *spu)
spu               203 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               212 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_mfc_sr1(struct spu_state *csa, struct spu *spu)
spu               217 arch/powerpc/platforms/cell/spufs/switch.c 	csa->priv1.mfc_sr1_RW = spu_mfc_sr1_get(spu);
spu               220 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_spu_status(struct spu_state *csa, struct spu *spu)
spu               222 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               247 arch/powerpc/platforms/cell/spufs/switch.c 		struct spu *spu)
spu               249 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               263 arch/powerpc/platforms/cell/spufs/switch.c static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu)
spu               265 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               276 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_timebase(struct spu_state *csa, struct spu *spu)
spu               286 arch/powerpc/platforms/cell/spufs/switch.c 					   struct spu *spu)
spu               294 arch/powerpc/platforms/cell/spufs/switch.c static inline void do_mfc_mssync(struct spu_state *csa, struct spu *spu)
spu               296 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               307 arch/powerpc/platforms/cell/spufs/switch.c static inline void issue_mfc_tlbie(struct spu_state *csa, struct spu *spu)
spu               315 arch/powerpc/platforms/cell/spufs/switch.c 	spu_tlb_invalidate(spu);
spu               320 arch/powerpc/platforms/cell/spufs/switch.c 					     struct spu *spu)
spu               333 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_mfc_queues(struct spu_state *csa, struct spu *spu)
spu               335 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               366 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_ppu_querymask(struct spu_state *csa, struct spu *spu)
spu               368 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               377 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_ppu_querytype(struct spu_state *csa, struct spu *spu)
spu               379 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               388 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_ppu_tagstatus(struct spu_state *csa, struct spu *spu)
spu               390 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               401 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_mfc_csr_tsq(struct spu_state *csa, struct spu *spu)
spu               403 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               413 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_mfc_csr_cmd(struct spu_state *csa, struct spu *spu)
spu               415 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               425 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_mfc_csr_ato(struct spu_state *csa, struct spu *spu)
spu               427 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               436 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_mfc_tclass_id(struct spu_state *csa, struct spu *spu)
spu               442 arch/powerpc/platforms/cell/spufs/switch.c 	csa->priv1.mfc_tclass_id_RW = spu_mfc_tclass_id_get(spu);
spu               445 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_mfc_tclass_id(struct spu_state *csa, struct spu *spu)
spu               452 arch/powerpc/platforms/cell/spufs/switch.c 	spu_mfc_tclass_id_set(spu, 0x10000000);
spu               456 arch/powerpc/platforms/cell/spufs/switch.c static inline void purge_mfc_queue(struct spu_state *csa, struct spu *spu)
spu               458 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               470 arch/powerpc/platforms/cell/spufs/switch.c static inline void wait_purge_complete(struct spu_state *csa, struct spu *spu)
spu               472 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               483 arch/powerpc/platforms/cell/spufs/switch.c static inline void setup_mfc_sr1(struct spu_state *csa, struct spu *spu)
spu               496 arch/powerpc/platforms/cell/spufs/switch.c 	spu_mfc_sr1_set(spu, (MFC_STATE1_MASTER_RUN_CONTROL_MASK |
spu               501 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_spu_npc(struct spu_state *csa, struct spu *spu)
spu               503 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               511 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_spu_privcntl(struct spu_state *csa, struct spu *spu)
spu               513 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               521 arch/powerpc/platforms/cell/spufs/switch.c static inline void reset_spu_privcntl(struct spu_state *csa, struct spu *spu)
spu               523 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               533 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_spu_lslr(struct spu_state *csa, struct spu *spu)
spu               535 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               543 arch/powerpc/platforms/cell/spufs/switch.c static inline void reset_spu_lslr(struct spu_state *csa, struct spu *spu)
spu               545 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               555 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_spu_cfg(struct spu_state *csa, struct spu *spu)
spu               557 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               565 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_pm_trace(struct spu_state *csa, struct spu *spu)
spu               573 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_mfc_rag(struct spu_state *csa, struct spu *spu)
spu               580 arch/powerpc/platforms/cell/spufs/switch.c 		spu_resource_allocation_groupID_get(spu);
spu               582 arch/powerpc/platforms/cell/spufs/switch.c 		spu_resource_allocation_enable_get(spu);
spu               585 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_ppu_mb_stat(struct spu_state *csa, struct spu *spu)
spu               587 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               595 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_ppu_mb(struct spu_state *csa, struct spu *spu)
spu               597 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               605 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_ppuint_mb(struct spu_state *csa, struct spu *spu)
spu               607 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               615 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_ch_part1(struct spu_state *csa, struct spu *spu)
spu               617 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               641 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_spu_mb(struct spu_state *csa, struct spu *spu)
spu               643 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               659 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_mfc_cmd(struct spu_state *csa, struct spu *spu)
spu               661 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               672 arch/powerpc/platforms/cell/spufs/switch.c static inline void reset_ch(struct spu_state *csa, struct spu *spu)
spu               674 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               692 arch/powerpc/platforms/cell/spufs/switch.c static inline void resume_mfc_queue(struct spu_state *csa, struct spu *spu)
spu               694 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               703 arch/powerpc/platforms/cell/spufs/switch.c static inline void setup_mfc_slbs(struct spu_state *csa, struct spu *spu,
spu               720 arch/powerpc/platforms/cell/spufs/switch.c 	spu_invalidate_slbs(spu);
spu               721 arch/powerpc/platforms/cell/spufs/switch.c 	spu_setup_kernel_slbs(spu, csa->lscsa, code, code_size);
spu               724 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
spu               735 arch/powerpc/platforms/cell/spufs/switch.c 	if (test_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags))
spu               737 arch/powerpc/platforms/cell/spufs/switch.c 	clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
spu               741 arch/powerpc/platforms/cell/spufs/switch.c static inline void enable_interrupts(struct spu_state *csa, struct spu *spu)
spu               754 arch/powerpc/platforms/cell/spufs/switch.c 	spin_lock_irq(&spu->register_lock);
spu               755 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK);
spu               756 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 1, CLASS1_INTR_MASK);
spu               757 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 2, CLASS2_INTR_MASK);
spu               758 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 0, 0ul);
spu               759 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 1, class1_mask);
spu               760 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 2, 0ul);
spu               761 arch/powerpc/platforms/cell/spufs/switch.c 	spin_unlock_irq(&spu->register_lock);
spu               764 arch/powerpc/platforms/cell/spufs/switch.c static inline int send_mfc_dma(struct spu *spu, unsigned long ea,
spu               769 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               798 arch/powerpc/platforms/cell/spufs/switch.c static inline void save_ls_16kb(struct spu_state *csa, struct spu *spu)
spu               811 arch/powerpc/platforms/cell/spufs/switch.c 	send_mfc_dma(spu, addr, ls_offset, size, tag, rclass, cmd);
spu               814 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_spu_npc(struct spu_state *csa, struct spu *spu)
spu               816 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               831 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_signot1(struct spu_state *csa, struct spu *spu)
spu               833 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               849 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_signot2(struct spu_state *csa, struct spu *spu)
spu               851 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               867 arch/powerpc/platforms/cell/spufs/switch.c static inline void send_save_code(struct spu_state *csa, struct spu *spu)
spu               880 arch/powerpc/platforms/cell/spufs/switch.c 	send_mfc_dma(spu, addr, ls_offset, size, tag, rclass, cmd);
spu               883 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_ppu_querymask(struct spu_state *csa, struct spu *spu)
spu               885 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               896 arch/powerpc/platforms/cell/spufs/switch.c static inline void wait_tag_complete(struct spu_state *csa, struct spu *spu)
spu               898 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               914 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK);
spu               915 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 2, CLASS2_INTR_MASK);
spu               919 arch/powerpc/platforms/cell/spufs/switch.c static inline void wait_spu_stopped(struct spu_state *csa, struct spu *spu)
spu               921 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               933 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK);
spu               934 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 2, CLASS2_INTR_MASK);
spu               938 arch/powerpc/platforms/cell/spufs/switch.c static inline int check_save_status(struct spu_state *csa, struct spu *spu)
spu               940 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu               953 arch/powerpc/platforms/cell/spufs/switch.c static inline void terminate_spu_app(struct spu_state *csa, struct spu *spu)
spu               962 arch/powerpc/platforms/cell/spufs/switch.c 		struct spu *spu)
spu               964 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               976 arch/powerpc/platforms/cell/spufs/switch.c 					     struct spu *spu)
spu               978 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu               989 arch/powerpc/platforms/cell/spufs/switch.c static inline int suspend_spe(struct spu_state *csa, struct spu *spu)
spu               991 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1031 arch/powerpc/platforms/cell/spufs/switch.c static inline void clear_spu_status(struct spu_state *csa, struct spu *spu)
spu              1033 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1042 arch/powerpc/platforms/cell/spufs/switch.c 			spu_mfc_sr1_set(spu,
spu              1054 arch/powerpc/platforms/cell/spufs/switch.c 			spu_mfc_sr1_set(spu,
spu              1065 arch/powerpc/platforms/cell/spufs/switch.c static inline void reset_ch_part1(struct spu_state *csa, struct spu *spu)
spu              1067 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1090 arch/powerpc/platforms/cell/spufs/switch.c static inline void reset_ch_part2(struct spu_state *csa, struct spu *spu)
spu              1092 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1111 arch/powerpc/platforms/cell/spufs/switch.c 					  struct spu *spu)
spu              1203 arch/powerpc/platforms/cell/spufs/switch.c 					  struct spu *spu)
spu              1226 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_mfc_rag(struct spu_state *csa, struct spu *spu)
spu              1232 arch/powerpc/platforms/cell/spufs/switch.c 	spu_resource_allocation_groupID_set(spu,
spu              1234 arch/powerpc/platforms/cell/spufs/switch.c 	spu_resource_allocation_enable_set(spu,
spu              1238 arch/powerpc/platforms/cell/spufs/switch.c static inline void send_restore_code(struct spu_state *csa, struct spu *spu)
spu              1251 arch/powerpc/platforms/cell/spufs/switch.c 	send_mfc_dma(spu, addr, ls_offset, size, tag, rclass, cmd);
spu              1254 arch/powerpc/platforms/cell/spufs/switch.c static inline void setup_decr(struct spu_state *csa, struct spu *spu)
spu              1279 arch/powerpc/platforms/cell/spufs/switch.c static inline void setup_ppu_mb(struct spu_state *csa, struct spu *spu)
spu              1287 arch/powerpc/platforms/cell/spufs/switch.c static inline void setup_ppuint_mb(struct spu_state *csa, struct spu *spu)
spu              1295 arch/powerpc/platforms/cell/spufs/switch.c static inline int check_restore_status(struct spu_state *csa, struct spu *spu)
spu              1297 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1310 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_spu_privcntl(struct spu_state *csa, struct spu *spu)
spu              1312 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1321 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_status_part1(struct spu_state *csa, struct spu *spu)
spu              1323 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1341 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_status_part2(struct spu_state *csa, struct spu *spu)
spu              1343 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1368 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_ls_16kb(struct spu_state *csa, struct spu *spu)
spu              1381 arch/powerpc/platforms/cell/spufs/switch.c 	send_mfc_dma(spu, addr, ls_offset, size, tag, rclass, cmd);
spu              1384 arch/powerpc/platforms/cell/spufs/switch.c static inline void suspend_mfc(struct spu_state *csa, struct spu *spu)
spu              1386 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1396 arch/powerpc/platforms/cell/spufs/switch.c static inline void clear_interrupts(struct spu_state *csa, struct spu *spu)
spu              1406 arch/powerpc/platforms/cell/spufs/switch.c 	spin_lock_irq(&spu->register_lock);
spu              1407 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 0, 0ul);
spu              1408 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 1, 0ul);
spu              1409 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 2, 0ul);
spu              1410 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK);
spu              1411 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 1, CLASS1_INTR_MASK);
spu              1412 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_stat_clear(spu, 2, CLASS2_INTR_MASK);
spu              1413 arch/powerpc/platforms/cell/spufs/switch.c 	spin_unlock_irq(&spu->register_lock);
spu              1416 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_mfc_queues(struct spu_state *csa, struct spu *spu)
spu              1418 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1450 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_ppu_querymask(struct spu_state *csa, struct spu *spu)
spu              1452 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1461 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_ppu_querytype(struct spu_state *csa, struct spu *spu)
spu              1463 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1472 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_mfc_csr_tsq(struct spu_state *csa, struct spu *spu)
spu              1474 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1484 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_mfc_csr_cmd(struct spu_state *csa, struct spu *spu)
spu              1486 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1497 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_mfc_csr_ato(struct spu_state *csa, struct spu *spu)
spu              1499 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1507 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_mfc_tclass_id(struct spu_state *csa, struct spu *spu)
spu              1512 arch/powerpc/platforms/cell/spufs/switch.c 	spu_mfc_tclass_id_set(spu, csa->priv1.mfc_tclass_id_RW);
spu              1516 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_llr_event(struct spu_state *csa, struct spu *spu)
spu              1539 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_decr_wrapped(struct spu_state *csa, struct spu *spu)
spu              1557 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_ch_part1(struct spu_state *csa, struct spu *spu)
spu              1559 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1576 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_ch_part2(struct spu_state *csa, struct spu *spu)
spu              1578 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1599 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_spu_lslr(struct spu_state *csa, struct spu *spu)
spu              1601 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1610 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_spu_cfg(struct spu_state *csa, struct spu *spu)
spu              1612 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1621 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_pm_trace(struct spu_state *csa, struct spu *spu)
spu              1629 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_spu_npc(struct spu_state *csa, struct spu *spu)
spu              1631 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1640 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_spu_mb(struct spu_state *csa, struct spu *spu)
spu              1642 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1657 arch/powerpc/platforms/cell/spufs/switch.c static inline void check_ppu_mb_stat(struct spu_state *csa, struct spu *spu)
spu              1659 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1672 arch/powerpc/platforms/cell/spufs/switch.c static inline void check_ppuint_mb_stat(struct spu_state *csa, struct spu *spu)
spu              1674 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1684 arch/powerpc/platforms/cell/spufs/switch.c 		spu_int_stat_clear(spu, 2, CLASS2_ENABLE_MAILBOX_INTR);
spu              1689 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_mfc_sr1(struct spu_state *csa, struct spu *spu)
spu              1694 arch/powerpc/platforms/cell/spufs/switch.c 	spu_mfc_sr1_set(spu, csa->priv1.mfc_sr1_RW);
spu              1698 arch/powerpc/platforms/cell/spufs/switch.c static inline void set_int_route(struct spu_state *csa, struct spu *spu)
spu              1700 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_context *ctx = spu->ctx;
spu              1702 arch/powerpc/platforms/cell/spufs/switch.c 	spu_cpu_affinity_set(spu, ctx->last_ran);
spu              1706 arch/powerpc/platforms/cell/spufs/switch.c 					    struct spu *spu)
spu              1713 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_spu_runcntl(struct spu_state *csa, struct spu *spu)
spu              1715 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1727 arch/powerpc/platforms/cell/spufs/switch.c static inline void restore_mfc_cntl(struct spu_state *csa, struct spu *spu)
spu              1729 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1747 arch/powerpc/platforms/cell/spufs/switch.c static inline void enable_user_access(struct spu_state *csa, struct spu *spu)
spu              1757 arch/powerpc/platforms/cell/spufs/switch.c static inline void reset_switch_active(struct spu_state *csa, struct spu *spu)
spu              1765 arch/powerpc/platforms/cell/spufs/switch.c static inline void reenable_interrupts(struct spu_state *csa, struct spu *spu)
spu              1770 arch/powerpc/platforms/cell/spufs/switch.c 	spin_lock_irq(&spu->register_lock);
spu              1771 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 0, csa->priv1.int_mask_class0_RW);
spu              1772 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 1, csa->priv1.int_mask_class1_RW);
spu              1773 arch/powerpc/platforms/cell/spufs/switch.c 	spu_int_mask_set(spu, 2, csa->priv1.int_mask_class2_RW);
spu              1774 arch/powerpc/platforms/cell/spufs/switch.c 	spin_unlock_irq(&spu->register_lock);
spu              1777 arch/powerpc/platforms/cell/spufs/switch.c static int quiece_spu(struct spu_state *prev, struct spu *spu)
spu              1789 arch/powerpc/platforms/cell/spufs/switch.c 	if (check_spu_isolate(prev, spu)) {	/* Step 2. */
spu              1792 arch/powerpc/platforms/cell/spufs/switch.c 	disable_interrupts(prev, spu);	        /* Step 3. */
spu              1793 arch/powerpc/platforms/cell/spufs/switch.c 	set_watchdog_timer(prev, spu);	        /* Step 4. */
spu              1794 arch/powerpc/platforms/cell/spufs/switch.c 	inhibit_user_access(prev, spu);	        /* Step 5. */
spu              1795 arch/powerpc/platforms/cell/spufs/switch.c 	if (check_spu_isolate(prev, spu)) {	/* Step 6. */
spu              1798 arch/powerpc/platforms/cell/spufs/switch.c 	set_switch_pending(prev, spu);	        /* Step 7. */
spu              1799 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_cntl(prev, spu);		/* Step 8. */
spu              1800 arch/powerpc/platforms/cell/spufs/switch.c 	save_spu_runcntl(prev, spu);	        /* Step 9. */
spu              1801 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_sr1(prev, spu);	        /* Step 10. */
spu              1802 arch/powerpc/platforms/cell/spufs/switch.c 	save_spu_status(prev, spu);	        /* Step 11. */
spu              1803 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_stopped_status(prev, spu);     /* Step 12. */
spu              1804 arch/powerpc/platforms/cell/spufs/switch.c 	halt_mfc_decr(prev, spu);	        /* Step 13. */
spu              1805 arch/powerpc/platforms/cell/spufs/switch.c 	save_timebase(prev, spu);		/* Step 14. */
spu              1806 arch/powerpc/platforms/cell/spufs/switch.c 	remove_other_spu_access(prev, spu);	/* Step 15. */
spu              1807 arch/powerpc/platforms/cell/spufs/switch.c 	do_mfc_mssync(prev, spu);	        /* Step 16. */
spu              1808 arch/powerpc/platforms/cell/spufs/switch.c 	issue_mfc_tlbie(prev, spu);	        /* Step 17. */
spu              1809 arch/powerpc/platforms/cell/spufs/switch.c 	handle_pending_interrupts(prev, spu);	/* Step 18. */
spu              1814 arch/powerpc/platforms/cell/spufs/switch.c static void save_csa(struct spu_state *prev, struct spu *spu)
spu              1821 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_queues(prev, spu);	/* Step 19. */
spu              1822 arch/powerpc/platforms/cell/spufs/switch.c 	save_ppu_querymask(prev, spu);	/* Step 20. */
spu              1823 arch/powerpc/platforms/cell/spufs/switch.c 	save_ppu_querytype(prev, spu);	/* Step 21. */
spu              1824 arch/powerpc/platforms/cell/spufs/switch.c 	save_ppu_tagstatus(prev, spu);  /* NEW.     */
spu              1825 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_csr_tsq(prev, spu);	/* Step 22. */
spu              1826 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_csr_cmd(prev, spu);	/* Step 23. */
spu              1827 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_csr_ato(prev, spu);	/* Step 24. */
spu              1828 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_tclass_id(prev, spu);	/* Step 25. */
spu              1829 arch/powerpc/platforms/cell/spufs/switch.c 	set_mfc_tclass_id(prev, spu);	/* Step 26. */
spu              1830 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_cmd(prev, spu);	/* Step 26a - moved from 44. */
spu              1831 arch/powerpc/platforms/cell/spufs/switch.c 	purge_mfc_queue(prev, spu);	/* Step 27. */
spu              1832 arch/powerpc/platforms/cell/spufs/switch.c 	wait_purge_complete(prev, spu);	/* Step 28. */
spu              1833 arch/powerpc/platforms/cell/spufs/switch.c 	setup_mfc_sr1(prev, spu);	/* Step 30. */
spu              1834 arch/powerpc/platforms/cell/spufs/switch.c 	save_spu_npc(prev, spu);	/* Step 31. */
spu              1835 arch/powerpc/platforms/cell/spufs/switch.c 	save_spu_privcntl(prev, spu);	/* Step 32. */
spu              1836 arch/powerpc/platforms/cell/spufs/switch.c 	reset_spu_privcntl(prev, spu);	/* Step 33. */
spu              1837 arch/powerpc/platforms/cell/spufs/switch.c 	save_spu_lslr(prev, spu);	/* Step 34. */
spu              1838 arch/powerpc/platforms/cell/spufs/switch.c 	reset_spu_lslr(prev, spu);	/* Step 35. */
spu              1839 arch/powerpc/platforms/cell/spufs/switch.c 	save_spu_cfg(prev, spu);	/* Step 36. */
spu              1840 arch/powerpc/platforms/cell/spufs/switch.c 	save_pm_trace(prev, spu);	/* Step 37. */
spu              1841 arch/powerpc/platforms/cell/spufs/switch.c 	save_mfc_rag(prev, spu);	/* Step 38. */
spu              1842 arch/powerpc/platforms/cell/spufs/switch.c 	save_ppu_mb_stat(prev, spu);	/* Step 39. */
spu              1843 arch/powerpc/platforms/cell/spufs/switch.c 	save_ppu_mb(prev, spu);	        /* Step 40. */
spu              1844 arch/powerpc/platforms/cell/spufs/switch.c 	save_ppuint_mb(prev, spu);	/* Step 41. */
spu              1845 arch/powerpc/platforms/cell/spufs/switch.c 	save_ch_part1(prev, spu);	/* Step 42. */
spu              1846 arch/powerpc/platforms/cell/spufs/switch.c 	save_spu_mb(prev, spu);	        /* Step 43. */
spu              1847 arch/powerpc/platforms/cell/spufs/switch.c 	reset_ch(prev, spu);	        /* Step 45. */
spu              1850 arch/powerpc/platforms/cell/spufs/switch.c static void save_lscsa(struct spu_state *prev, struct spu *spu)
spu              1858 arch/powerpc/platforms/cell/spufs/switch.c 	resume_mfc_queue(prev, spu);	/* Step 46. */
spu              1860 arch/powerpc/platforms/cell/spufs/switch.c 	setup_mfc_slbs(prev, spu, spu_save_code, sizeof(spu_save_code));
spu              1861 arch/powerpc/platforms/cell/spufs/switch.c 	set_switch_active(prev, spu);	/* Step 48. */
spu              1862 arch/powerpc/platforms/cell/spufs/switch.c 	enable_interrupts(prev, spu);	/* Step 49. */
spu              1863 arch/powerpc/platforms/cell/spufs/switch.c 	save_ls_16kb(prev, spu);	/* Step 50. */
spu              1864 arch/powerpc/platforms/cell/spufs/switch.c 	set_spu_npc(prev, spu);	        /* Step 51. */
spu              1865 arch/powerpc/platforms/cell/spufs/switch.c 	set_signot1(prev, spu);		/* Step 52. */
spu              1866 arch/powerpc/platforms/cell/spufs/switch.c 	set_signot2(prev, spu);		/* Step 53. */
spu              1867 arch/powerpc/platforms/cell/spufs/switch.c 	send_save_code(prev, spu);	/* Step 54. */
spu              1868 arch/powerpc/platforms/cell/spufs/switch.c 	set_ppu_querymask(prev, spu);	/* Step 55. */
spu              1869 arch/powerpc/platforms/cell/spufs/switch.c 	wait_tag_complete(prev, spu);	/* Step 56. */
spu              1870 arch/powerpc/platforms/cell/spufs/switch.c 	wait_spu_stopped(prev, spu);	/* Step 57. */
spu              1873 arch/powerpc/platforms/cell/spufs/switch.c static void force_spu_isolate_exit(struct spu *spu)
spu              1875 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1876 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_priv2 __iomem *priv2 = spu->priv2;
spu              1884 arch/powerpc/platforms/cell/spufs/switch.c 	spu_mfc_sr1_set(spu, MFC_STATE1_MASTER_RUN_CONTROL_MASK);
spu              1905 arch/powerpc/platforms/cell/spufs/switch.c static void stop_spu_isolate(struct spu *spu)
spu              1907 arch/powerpc/platforms/cell/spufs/switch.c 	struct spu_problem __iomem *prob = spu->problem;
spu              1914 arch/powerpc/platforms/cell/spufs/switch.c 		force_spu_isolate_exit(spu);
spu              1918 arch/powerpc/platforms/cell/spufs/switch.c static void harvest(struct spu_state *prev, struct spu *spu)
spu              1926 arch/powerpc/platforms/cell/spufs/switch.c 	disable_interrupts(prev, spu);	        /* Step 2.  */
spu              1927 arch/powerpc/platforms/cell/spufs/switch.c 	inhibit_user_access(prev, spu);	        /* Step 3.  */
spu              1928 arch/powerpc/platforms/cell/spufs/switch.c 	terminate_spu_app(prev, spu);	        /* Step 4.  */
spu              1929 arch/powerpc/platforms/cell/spufs/switch.c 	set_switch_pending(prev, spu);	        /* Step 5.  */
spu              1930 arch/powerpc/platforms/cell/spufs/switch.c 	stop_spu_isolate(spu);			/* NEW.     */
spu              1931 arch/powerpc/platforms/cell/spufs/switch.c 	remove_other_spu_access(prev, spu);	/* Step 6.  */
spu              1932 arch/powerpc/platforms/cell/spufs/switch.c 	suspend_mfc_and_halt_decr(prev, spu);	/* Step 7.  */
spu              1933 arch/powerpc/platforms/cell/spufs/switch.c 	wait_suspend_mfc_complete(prev, spu);	/* Step 8.  */
spu              1934 arch/powerpc/platforms/cell/spufs/switch.c 	if (!suspend_spe(prev, spu))	        /* Step 9.  */
spu              1935 arch/powerpc/platforms/cell/spufs/switch.c 		clear_spu_status(prev, spu);	/* Step 10. */
spu              1936 arch/powerpc/platforms/cell/spufs/switch.c 	do_mfc_mssync(prev, spu);	        /* Step 11. */
spu              1937 arch/powerpc/platforms/cell/spufs/switch.c 	issue_mfc_tlbie(prev, spu);	        /* Step 12. */
spu              1938 arch/powerpc/platforms/cell/spufs/switch.c 	handle_pending_interrupts(prev, spu);	/* Step 13. */
spu              1939 arch/powerpc/platforms/cell/spufs/switch.c 	purge_mfc_queue(prev, spu);	        /* Step 14. */
spu              1940 arch/powerpc/platforms/cell/spufs/switch.c 	wait_purge_complete(prev, spu);	        /* Step 15. */
spu              1941 arch/powerpc/platforms/cell/spufs/switch.c 	reset_spu_privcntl(prev, spu);	        /* Step 16. */
spu              1942 arch/powerpc/platforms/cell/spufs/switch.c 	reset_spu_lslr(prev, spu);              /* Step 17. */
spu              1943 arch/powerpc/platforms/cell/spufs/switch.c 	setup_mfc_sr1(prev, spu);	        /* Step 18. */
spu              1944 arch/powerpc/platforms/cell/spufs/switch.c 	spu_invalidate_slbs(spu);		/* Step 19. */
spu              1945 arch/powerpc/platforms/cell/spufs/switch.c 	reset_ch_part1(prev, spu);	        /* Step 20. */
spu              1946 arch/powerpc/platforms/cell/spufs/switch.c 	reset_ch_part2(prev, spu);	        /* Step 21. */
spu              1947 arch/powerpc/platforms/cell/spufs/switch.c 	enable_interrupts(prev, spu);	        /* Step 22. */
spu              1948 arch/powerpc/platforms/cell/spufs/switch.c 	set_switch_active(prev, spu);	        /* Step 23. */
spu              1949 arch/powerpc/platforms/cell/spufs/switch.c 	set_mfc_tclass_id(prev, spu);	        /* Step 24. */
spu              1950 arch/powerpc/platforms/cell/spufs/switch.c 	resume_mfc_queue(prev, spu);	        /* Step 25. */
spu              1953 arch/powerpc/platforms/cell/spufs/switch.c static void restore_lscsa(struct spu_state *next, struct spu *spu)
spu              1961 arch/powerpc/platforms/cell/spufs/switch.c 	set_watchdog_timer(next, spu);	        /* Step 26. */
spu              1962 arch/powerpc/platforms/cell/spufs/switch.c 	setup_spu_status_part1(next, spu);	/* Step 27. */
spu              1963 arch/powerpc/platforms/cell/spufs/switch.c 	setup_spu_status_part2(next, spu);	/* Step 28. */
spu              1964 arch/powerpc/platforms/cell/spufs/switch.c 	restore_mfc_rag(next, spu);	        /* Step 29. */
spu              1966 arch/powerpc/platforms/cell/spufs/switch.c 	setup_mfc_slbs(next, spu, spu_restore_code, sizeof(spu_restore_code));
spu              1967 arch/powerpc/platforms/cell/spufs/switch.c 	set_spu_npc(next, spu);	                /* Step 31. */
spu              1968 arch/powerpc/platforms/cell/spufs/switch.c 	set_signot1(next, spu);	                /* Step 32. */
spu              1969 arch/powerpc/platforms/cell/spufs/switch.c 	set_signot2(next, spu);	                /* Step 33. */
spu              1970 arch/powerpc/platforms/cell/spufs/switch.c 	setup_decr(next, spu);	                /* Step 34. */
spu              1971 arch/powerpc/platforms/cell/spufs/switch.c 	setup_ppu_mb(next, spu);	        /* Step 35. */
spu              1972 arch/powerpc/platforms/cell/spufs/switch.c 	setup_ppuint_mb(next, spu);	        /* Step 36. */
spu              1973 arch/powerpc/platforms/cell/spufs/switch.c 	send_restore_code(next, spu);	        /* Step 37. */
spu              1974 arch/powerpc/platforms/cell/spufs/switch.c 	set_ppu_querymask(next, spu);	        /* Step 38. */
spu              1975 arch/powerpc/platforms/cell/spufs/switch.c 	wait_tag_complete(next, spu);	        /* Step 39. */
spu              1976 arch/powerpc/platforms/cell/spufs/switch.c 	wait_spu_stopped(next, spu);	        /* Step 40. */
spu              1979 arch/powerpc/platforms/cell/spufs/switch.c static void restore_csa(struct spu_state *next, struct spu *spu)
spu              1986 arch/powerpc/platforms/cell/spufs/switch.c 	restore_spu_privcntl(next, spu);	/* Step 41. */
spu              1987 arch/powerpc/platforms/cell/spufs/switch.c 	restore_status_part1(next, spu);	/* Step 42. */
spu              1988 arch/powerpc/platforms/cell/spufs/switch.c 	restore_status_part2(next, spu);	/* Step 43. */
spu              1989 arch/powerpc/platforms/cell/spufs/switch.c 	restore_ls_16kb(next, spu);	        /* Step 44. */
spu              1990 arch/powerpc/platforms/cell/spufs/switch.c 	wait_tag_complete(next, spu);	        /* Step 45. */
spu              1991 arch/powerpc/platforms/cell/spufs/switch.c 	suspend_mfc(next, spu);	                /* Step 46. */
spu              1992 arch/powerpc/platforms/cell/spufs/switch.c 	wait_suspend_mfc_complete(next, spu);	/* Step 47. */
spu              1993 arch/powerpc/platforms/cell/spufs/switch.c 	issue_mfc_tlbie(next, spu);	        /* Step 48. */
spu              1994 arch/powerpc/platforms/cell/spufs/switch.c 	clear_interrupts(next, spu);	        /* Step 49. */
spu              1995 arch/powerpc/platforms/cell/spufs/switch.c 	restore_mfc_queues(next, spu);	        /* Step 50. */
spu              1996 arch/powerpc/platforms/cell/spufs/switch.c 	restore_ppu_querymask(next, spu);	/* Step 51. */
spu              1997 arch/powerpc/platforms/cell/spufs/switch.c 	restore_ppu_querytype(next, spu);	/* Step 52. */
spu              1998 arch/powerpc/platforms/cell/spufs/switch.c 	restore_mfc_csr_tsq(next, spu);	        /* Step 53. */
spu              1999 arch/powerpc/platforms/cell/spufs/switch.c 	restore_mfc_csr_cmd(next, spu);	        /* Step 54. */
spu              2000 arch/powerpc/platforms/cell/spufs/switch.c 	restore_mfc_csr_ato(next, spu);	        /* Step 55. */
spu              2001 arch/powerpc/platforms/cell/spufs/switch.c 	restore_mfc_tclass_id(next, spu);	/* Step 56. */
spu              2002 arch/powerpc/platforms/cell/spufs/switch.c 	set_llr_event(next, spu);	        /* Step 57. */
spu              2003 arch/powerpc/platforms/cell/spufs/switch.c 	restore_decr_wrapped(next, spu);	/* Step 58. */
spu              2004 arch/powerpc/platforms/cell/spufs/switch.c 	restore_ch_part1(next, spu);	        /* Step 59. */
spu              2005 arch/powerpc/platforms/cell/spufs/switch.c 	restore_ch_part2(next, spu);	        /* Step 60. */
spu              2006 arch/powerpc/platforms/cell/spufs/switch.c 	restore_spu_lslr(next, spu);	        /* Step 61. */
spu              2007 arch/powerpc/platforms/cell/spufs/switch.c 	restore_spu_cfg(next, spu);	        /* Step 62. */
spu              2008 arch/powerpc/platforms/cell/spufs/switch.c 	restore_pm_trace(next, spu);	        /* Step 63. */
spu              2009 arch/powerpc/platforms/cell/spufs/switch.c 	restore_spu_npc(next, spu);	        /* Step 64. */
spu              2010 arch/powerpc/platforms/cell/spufs/switch.c 	restore_spu_mb(next, spu);	        /* Step 65. */
spu              2011 arch/powerpc/platforms/cell/spufs/switch.c 	check_ppu_mb_stat(next, spu);	        /* Step 66. */
spu              2012 arch/powerpc/platforms/cell/spufs/switch.c 	check_ppuint_mb_stat(next, spu);	/* Step 67. */
spu              2013 arch/powerpc/platforms/cell/spufs/switch.c 	spu_invalidate_slbs(spu);		/* Modified Step 68. */
spu              2014 arch/powerpc/platforms/cell/spufs/switch.c 	restore_mfc_sr1(next, spu);	        /* Step 69. */
spu              2015 arch/powerpc/platforms/cell/spufs/switch.c 	set_int_route(next, spu);		/* NEW      */
spu              2016 arch/powerpc/platforms/cell/spufs/switch.c 	restore_other_spu_access(next, spu);	/* Step 70. */
spu              2017 arch/powerpc/platforms/cell/spufs/switch.c 	restore_spu_runcntl(next, spu);	        /* Step 71. */
spu              2018 arch/powerpc/platforms/cell/spufs/switch.c 	restore_mfc_cntl(next, spu);	        /* Step 72. */
spu              2019 arch/powerpc/platforms/cell/spufs/switch.c 	enable_user_access(next, spu);	        /* Step 73. */
spu              2020 arch/powerpc/platforms/cell/spufs/switch.c 	reset_switch_active(next, spu);	        /* Step 74. */
spu              2021 arch/powerpc/platforms/cell/spufs/switch.c 	reenable_interrupts(next, spu);	        /* Step 75. */
spu              2024 arch/powerpc/platforms/cell/spufs/switch.c static int __do_spu_save(struct spu_state *prev, struct spu *spu)
spu              2040 arch/powerpc/platforms/cell/spufs/switch.c 	rc = quiece_spu(prev, spu);	        /* Steps 2-16. */
spu              2045 arch/powerpc/platforms/cell/spufs/switch.c 		harvest(prev, spu);
spu              2051 arch/powerpc/platforms/cell/spufs/switch.c 	save_csa(prev, spu);	                /* Steps 17-43. */
spu              2052 arch/powerpc/platforms/cell/spufs/switch.c 	save_lscsa(prev, spu);	                /* Steps 44-53. */
spu              2053 arch/powerpc/platforms/cell/spufs/switch.c 	return check_save_status(prev, spu);	/* Step 54.     */
spu              2056 arch/powerpc/platforms/cell/spufs/switch.c static int __do_spu_restore(struct spu_state *next, struct spu *spu)
spu              2071 arch/powerpc/platforms/cell/spufs/switch.c 	restore_lscsa(next, spu);	        /* Steps 24-39. */
spu              2072 arch/powerpc/platforms/cell/spufs/switch.c 	rc = check_restore_status(next, spu);	/* Step 40.     */
spu              2082 arch/powerpc/platforms/cell/spufs/switch.c 	restore_csa(next, spu);
spu              2094 arch/powerpc/platforms/cell/spufs/switch.c int spu_save(struct spu_state *prev, struct spu *spu)
spu              2098 arch/powerpc/platforms/cell/spufs/switch.c 	acquire_spu_lock(spu);	        /* Step 1.     */
spu              2099 arch/powerpc/platforms/cell/spufs/switch.c 	rc = __do_spu_save(prev, spu);	/* Steps 2-53. */
spu              2100 arch/powerpc/platforms/cell/spufs/switch.c 	release_spu_lock(spu);
spu              2103 arch/powerpc/platforms/cell/spufs/switch.c 		      __func__, spu->number, rc);
spu              2118 arch/powerpc/platforms/cell/spufs/switch.c int spu_restore(struct spu_state *new, struct spu *spu)
spu              2122 arch/powerpc/platforms/cell/spufs/switch.c 	acquire_spu_lock(spu);
spu              2123 arch/powerpc/platforms/cell/spufs/switch.c 	harvest(NULL, spu);
spu              2124 arch/powerpc/platforms/cell/spufs/switch.c 	spu->slb_replace = 0;
spu              2125 arch/powerpc/platforms/cell/spufs/switch.c 	rc = __do_spu_restore(new, spu);
spu              2126 arch/powerpc/platforms/cell/spufs/switch.c 	release_spu_lock(spu);
spu              2129 arch/powerpc/platforms/cell/spufs/switch.c 		       __func__, spu->number, rc);
spu               116 arch/powerpc/platforms/ps3/spu.c static struct spu_pdata *spu_pdata(struct spu *spu)
spu               118 arch/powerpc/platforms/ps3/spu.c 	return spu->pdata;
spu               150 arch/powerpc/platforms/ps3/spu.c static int __init construct_spu(struct spu *spu)
spu               159 arch/powerpc/platforms/ps3/spu.c 		&spu_pdata(spu)->priv2_addr, &problem_phys,
spu               161 arch/powerpc/platforms/ps3/spu.c 		&spu_pdata(spu)->shadow_addr,
spu               162 arch/powerpc/platforms/ps3/spu.c 		&spu_pdata(spu)->spe_id);
spu               163 arch/powerpc/platforms/ps3/spu.c 	spu->problem_phys = problem_phys;
spu               164 arch/powerpc/platforms/ps3/spu.c 	spu->local_store_phys = local_store_phys;
spu               175 arch/powerpc/platforms/ps3/spu.c static void spu_unmap(struct spu *spu)
spu               177 arch/powerpc/platforms/ps3/spu.c 	iounmap(spu->priv2);
spu               178 arch/powerpc/platforms/ps3/spu.c 	iounmap(spu->problem);
spu               179 arch/powerpc/platforms/ps3/spu.c 	iounmap((__force u8 __iomem *)spu->local_store);
spu               180 arch/powerpc/platforms/ps3/spu.c 	iounmap(spu_pdata(spu)->shadow);
spu               190 arch/powerpc/platforms/ps3/spu.c static int __init setup_areas(struct spu *spu)
spu               195 arch/powerpc/platforms/ps3/spu.c 	spu_pdata(spu)->shadow = ioremap_prot(spu_pdata(spu)->shadow_addr,
spu               197 arch/powerpc/platforms/ps3/spu.c 	if (!spu_pdata(spu)->shadow) {
spu               202 arch/powerpc/platforms/ps3/spu.c 	spu->local_store = (__force void *)ioremap_wc(spu->local_store_phys, LS_SIZE);
spu               204 arch/powerpc/platforms/ps3/spu.c 	if (!spu->local_store) {
spu               210 arch/powerpc/platforms/ps3/spu.c 	spu->problem = ioremap(spu->problem_phys,
spu               213 arch/powerpc/platforms/ps3/spu.c 	if (!spu->problem) {
spu               218 arch/powerpc/platforms/ps3/spu.c 	spu->priv2 = ioremap(spu_pdata(spu)->priv2_addr,
spu               221 arch/powerpc/platforms/ps3/spu.c 	if (!spu->priv2) {
spu               226 arch/powerpc/platforms/ps3/spu.c 	dump_areas(spu_pdata(spu)->spe_id, spu_pdata(spu)->priv2_addr,
spu               227 arch/powerpc/platforms/ps3/spu.c 		spu->problem_phys, spu->local_store_phys,
spu               228 arch/powerpc/platforms/ps3/spu.c 		spu_pdata(spu)->shadow_addr);
spu               229 arch/powerpc/platforms/ps3/spu.c 	dump_areas(spu_pdata(spu)->spe_id, (unsigned long)spu->priv2,
spu               230 arch/powerpc/platforms/ps3/spu.c 		(unsigned long)spu->problem, (unsigned long)spu->local_store,
spu               231 arch/powerpc/platforms/ps3/spu.c 		(unsigned long)spu_pdata(spu)->shadow);
spu               236 arch/powerpc/platforms/ps3/spu.c 	spu_unmap(spu);
spu               241 arch/powerpc/platforms/ps3/spu.c static int __init setup_interrupts(struct spu *spu)
spu               245 arch/powerpc/platforms/ps3/spu.c 	result = ps3_spe_irq_setup(PS3_BINDING_CPU_ANY, spu_pdata(spu)->spe_id,
spu               246 arch/powerpc/platforms/ps3/spu.c 		0, &spu->irqs[0]);
spu               251 arch/powerpc/platforms/ps3/spu.c 	result = ps3_spe_irq_setup(PS3_BINDING_CPU_ANY, spu_pdata(spu)->spe_id,
spu               252 arch/powerpc/platforms/ps3/spu.c 		1, &spu->irqs[1]);
spu               257 arch/powerpc/platforms/ps3/spu.c 	result = ps3_spe_irq_setup(PS3_BINDING_CPU_ANY, spu_pdata(spu)->spe_id,
spu               258 arch/powerpc/platforms/ps3/spu.c 		2, &spu->irqs[2]);
spu               266 arch/powerpc/platforms/ps3/spu.c 	ps3_spe_irq_destroy(spu->irqs[1]);
spu               268 arch/powerpc/platforms/ps3/spu.c 	ps3_spe_irq_destroy(spu->irqs[0]);
spu               270 arch/powerpc/platforms/ps3/spu.c 	spu->irqs[0] = spu->irqs[1] = spu->irqs[2] = 0;
spu               274 arch/powerpc/platforms/ps3/spu.c static int __init enable_spu(struct spu *spu)
spu               278 arch/powerpc/platforms/ps3/spu.c 	result = lv1_enable_logical_spe(spu_pdata(spu)->spe_id,
spu               279 arch/powerpc/platforms/ps3/spu.c 		spu_pdata(spu)->resource_id);
spu               287 arch/powerpc/platforms/ps3/spu.c 	result = setup_areas(spu);
spu               292 arch/powerpc/platforms/ps3/spu.c 	result = setup_interrupts(spu);
spu               300 arch/powerpc/platforms/ps3/spu.c 	spu_unmap(spu);
spu               302 arch/powerpc/platforms/ps3/spu.c 	lv1_disable_logical_spe(spu_pdata(spu)->spe_id, 0);
spu               307 arch/powerpc/platforms/ps3/spu.c static int ps3_destroy_spu(struct spu *spu)
spu               311 arch/powerpc/platforms/ps3/spu.c 	pr_debug("%s:%d spu_%d\n", __func__, __LINE__, spu->number);
spu               313 arch/powerpc/platforms/ps3/spu.c 	result = lv1_disable_logical_spe(spu_pdata(spu)->spe_id, 0);
spu               316 arch/powerpc/platforms/ps3/spu.c 	ps3_spe_irq_destroy(spu->irqs[2]);
spu               317 arch/powerpc/platforms/ps3/spu.c 	ps3_spe_irq_destroy(spu->irqs[1]);
spu               318 arch/powerpc/platforms/ps3/spu.c 	ps3_spe_irq_destroy(spu->irqs[0]);
spu               320 arch/powerpc/platforms/ps3/spu.c 	spu->irqs[0] = spu->irqs[1] = spu->irqs[2] = 0;
spu               322 arch/powerpc/platforms/ps3/spu.c 	spu_unmap(spu);
spu               324 arch/powerpc/platforms/ps3/spu.c 	result = lv1_destruct_logical_spe(spu_pdata(spu)->spe_id);
spu               327 arch/powerpc/platforms/ps3/spu.c 	kfree(spu->pdata);
spu               328 arch/powerpc/platforms/ps3/spu.c 	spu->pdata = NULL;
spu               333 arch/powerpc/platforms/ps3/spu.c static int __init ps3_create_spu(struct spu *spu, void *data)
spu               337 arch/powerpc/platforms/ps3/spu.c 	pr_debug("%s:%d spu_%d\n", __func__, __LINE__, spu->number);
spu               339 arch/powerpc/platforms/ps3/spu.c 	spu->pdata = kzalloc(sizeof(struct spu_pdata),
spu               342 arch/powerpc/platforms/ps3/spu.c 	if (!spu->pdata) {
spu               347 arch/powerpc/platforms/ps3/spu.c 	spu_pdata(spu)->resource_id = (unsigned long)data;
spu               351 arch/powerpc/platforms/ps3/spu.c 	spu_pdata(spu)->cache.sr1 = 0x33;
spu               353 arch/powerpc/platforms/ps3/spu.c 	result = construct_spu(spu);
spu               360 arch/powerpc/platforms/ps3/spu.c 	result = enable_spu(spu);
spu               368 arch/powerpc/platforms/ps3/spu.c 	while (in_be64(&spu_pdata(spu)->shadow->spe_execution_status)
spu               376 arch/powerpc/platforms/ps3/spu.c 	ps3_destroy_spu(spu);
spu               462 arch/powerpc/platforms/ps3/spu.c static void int_mask_and(struct spu *spu, int class, u64 mask)
spu               467 arch/powerpc/platforms/ps3/spu.c 	old_mask = spu_int_mask_get(spu, class);
spu               468 arch/powerpc/platforms/ps3/spu.c 	spu_int_mask_set(spu, class, old_mask & mask);
spu               471 arch/powerpc/platforms/ps3/spu.c static void int_mask_or(struct spu *spu, int class, u64 mask)
spu               475 arch/powerpc/platforms/ps3/spu.c 	old_mask = spu_int_mask_get(spu, class);
spu               476 arch/powerpc/platforms/ps3/spu.c 	spu_int_mask_set(spu, class, old_mask | mask);
spu               479 arch/powerpc/platforms/ps3/spu.c static void int_mask_set(struct spu *spu, int class, u64 mask)
spu               481 arch/powerpc/platforms/ps3/spu.c 	spu_pdata(spu)->cache.masks[class] = mask;
spu               482 arch/powerpc/platforms/ps3/spu.c 	lv1_set_spe_interrupt_mask(spu_pdata(spu)->spe_id, class,
spu               483 arch/powerpc/platforms/ps3/spu.c 		spu_pdata(spu)->cache.masks[class]);
spu               486 arch/powerpc/platforms/ps3/spu.c static u64 int_mask_get(struct spu *spu, int class)
spu               488 arch/powerpc/platforms/ps3/spu.c 	return spu_pdata(spu)->cache.masks[class];
spu               491 arch/powerpc/platforms/ps3/spu.c static void int_stat_clear(struct spu *spu, int class, u64 stat)
spu               495 arch/powerpc/platforms/ps3/spu.c 	lv1_clear_spe_interrupt_status(spu_pdata(spu)->spe_id, class,
spu               499 arch/powerpc/platforms/ps3/spu.c static u64 int_stat_get(struct spu *spu, int class)
spu               503 arch/powerpc/platforms/ps3/spu.c 	lv1_get_spe_interrupt_status(spu_pdata(spu)->spe_id, class, &stat);
spu               507 arch/powerpc/platforms/ps3/spu.c static void cpu_affinity_set(struct spu *spu, int cpu)
spu               512 arch/powerpc/platforms/ps3/spu.c static u64 mfc_dar_get(struct spu *spu)
spu               514 arch/powerpc/platforms/ps3/spu.c 	return in_be64(&spu_pdata(spu)->shadow->mfc_dar_RW);
spu               517 arch/powerpc/platforms/ps3/spu.c static void mfc_dsisr_set(struct spu *spu, u64 dsisr)
spu               522 arch/powerpc/platforms/ps3/spu.c static u64 mfc_dsisr_get(struct spu *spu)
spu               524 arch/powerpc/platforms/ps3/spu.c 	return in_be64(&spu_pdata(spu)->shadow->mfc_dsisr_RW);
spu               527 arch/powerpc/platforms/ps3/spu.c static void mfc_sdr_setup(struct spu *spu)
spu               532 arch/powerpc/platforms/ps3/spu.c static void mfc_sr1_set(struct spu *spu, u64 sr1)
spu               539 arch/powerpc/platforms/ps3/spu.c 	BUG_ON((sr1 & allowed) != (spu_pdata(spu)->cache.sr1 & allowed));
spu               541 arch/powerpc/platforms/ps3/spu.c 	spu_pdata(spu)->cache.sr1 = sr1;
spu               543 arch/powerpc/platforms/ps3/spu.c 		spu_pdata(spu)->spe_id,
spu               545 arch/powerpc/platforms/ps3/spu.c 		spu_pdata(spu)->cache.sr1);
spu               548 arch/powerpc/platforms/ps3/spu.c static u64 mfc_sr1_get(struct spu *spu)
spu               550 arch/powerpc/platforms/ps3/spu.c 	return spu_pdata(spu)->cache.sr1;
spu               553 arch/powerpc/platforms/ps3/spu.c static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
spu               555 arch/powerpc/platforms/ps3/spu.c 	spu_pdata(spu)->cache.tclass_id = tclass_id;
spu               557 arch/powerpc/platforms/ps3/spu.c 		spu_pdata(spu)->spe_id,
spu               559 arch/powerpc/platforms/ps3/spu.c 		spu_pdata(spu)->cache.tclass_id);
spu               562 arch/powerpc/platforms/ps3/spu.c static u64 mfc_tclass_id_get(struct spu *spu)
spu               564 arch/powerpc/platforms/ps3/spu.c 	return spu_pdata(spu)->cache.tclass_id;
spu               567 arch/powerpc/platforms/ps3/spu.c static void tlb_invalidate(struct spu *spu)
spu               572 arch/powerpc/platforms/ps3/spu.c static void resource_allocation_groupID_set(struct spu *spu, u64 id)
spu               577 arch/powerpc/platforms/ps3/spu.c static u64 resource_allocation_groupID_get(struct spu *spu)
spu               582 arch/powerpc/platforms/ps3/spu.c static void resource_allocation_enable_set(struct spu *spu, u64 enable)
spu               587 arch/powerpc/platforms/ps3/spu.c static u64 resource_allocation_enable_get(struct spu *spu)
spu              3937 arch/powerpc/xmon/xmon.c 	struct spu *spu;
spu              3950 arch/powerpc/xmon/xmon.c 	struct spu *spu;
spu              3952 arch/powerpc/xmon/xmon.c 	list_for_each_entry(spu, list, full_list) {
spu              3953 arch/powerpc/xmon/xmon.c 		if (spu->number >= XMON_NUM_SPUS) {
spu              3958 arch/powerpc/xmon/xmon.c 		spu_info[spu->number].spu = spu;
spu              3959 arch/powerpc/xmon/xmon.c 		spu_info[spu->number].stopped_ok = 0;
spu              3960 arch/powerpc/xmon/xmon.c 		spu_info[spu->number].dump_addr = (unsigned long)
spu              3961 arch/powerpc/xmon/xmon.c 				spu_info[spu->number].spu->local_store;
spu              3967 arch/powerpc/xmon/xmon.c 	struct spu *spu;
spu              3972 arch/powerpc/xmon/xmon.c 		if (!spu_info[i].spu)
spu              3979 arch/powerpc/xmon/xmon.c 			spu = spu_info[i].spu;
spu              3982 arch/powerpc/xmon/xmon.c 				in_be32(&spu->problem->spu_runcntl_RW);
spu              3984 arch/powerpc/xmon/xmon.c 			tmp = spu_mfc_sr1_get(spu);
spu              3988 arch/powerpc/xmon/xmon.c 			spu_mfc_sr1_set(spu, tmp);
spu              4008 arch/powerpc/xmon/xmon.c 	struct spu *spu;
spu              4012 arch/powerpc/xmon/xmon.c 		if (!spu_info[i].spu)
spu              4025 arch/powerpc/xmon/xmon.c 			spu = spu_info[i].spu;
spu              4026 arch/powerpc/xmon/xmon.c 			spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
spu              4027 arch/powerpc/xmon/xmon.c 			out_be32(&spu->problem->spu_runcntl_RW,
spu              4063 arch/powerpc/xmon/xmon.c static void dump_spu_fields(struct spu *spu)
spu              4065 arch/powerpc/xmon/xmon.c 	printf("Dumping spu fields at address %p:\n", spu);
spu              4067 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%x", number);
spu              4068 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "%s", name);
spu              4069 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%lx", local_store_phys);
spu              4070 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%p", local_store);
spu              4071 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%lx", ls_size);
spu              4072 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%x", node);
spu              4073 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%lx", flags);
spu              4074 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "%llu", class_0_pending);
spu              4075 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%llx", class_0_dar);
spu              4076 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%llx", class_1_dar);
spu              4077 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%llx", class_1_dsisr);
spu              4078 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%x", irqs[0]);
spu              4079 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%x", irqs[1]);
spu              4080 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%x", irqs[2]);
spu              4081 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%x", slb_replace);
spu              4082 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "%d", pid);
spu              4083 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%p", mm);
spu              4084 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%p", ctx);
spu              4085 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%p", rq);
spu              4086 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%llx", timestamp);
spu              4087 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%lx", problem_phys);
spu              4088 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%p", problem);
spu              4090 arch/powerpc/xmon/xmon.c 			in_be32(&spu->problem->spu_runcntl_RW));
spu              4092 arch/powerpc/xmon/xmon.c 			in_be32(&spu->problem->spu_status_R));
spu              4094 arch/powerpc/xmon/xmon.c 			in_be32(&spu->problem->spu_npc_RW));
spu              4095 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%p", priv2);
spu              4096 arch/powerpc/xmon/xmon.c 	DUMP_FIELD(spu, "0x%p", pdata);
spu              4112 arch/powerpc/xmon/xmon.c 		ls_addr = (unsigned long)spu_info[num].spu->local_store;
spu              4167 arch/powerpc/xmon/xmon.c 		if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
spu              4174 arch/powerpc/xmon/xmon.c 			dump_spu_fields(spu_info[num].spu);
spu               109 drivers/crypto/bcm/cipher.c 	return chan_idx % iproc_priv.spu.num_chan;
spu               138 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu               143 drivers/crypto/bcm/cipher.c 	mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
spu               145 drivers/crypto/bcm/cipher.c 	if (!mssg->spu.dst)
spu               148 drivers/crypto/bcm/cipher.c 	sg = mssg->spu.dst;
spu               155 drivers/crypto/bcm/cipher.c 	    spu->spu_xts_tweak_in_payload())
spu               176 drivers/crypto/bcm/cipher.c 	sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
spu               205 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu               211 drivers/crypto/bcm/cipher.c 	mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
spu               213 drivers/crypto/bcm/cipher.c 	if (unlikely(!mssg->spu.src))
spu               216 drivers/crypto/bcm/cipher.c 	sg = mssg->spu.src;
spu               224 drivers/crypto/bcm/cipher.c 	    spu->spu_xts_tweak_in_payload())
spu               239 drivers/crypto/bcm/cipher.c 	stat_len = spu->spu_tx_status_len();
spu               305 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu               433 drivers/crypto/bcm/cipher.c 	spu->spu_cipher_req_finish(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
spu               439 drivers/crypto/bcm/cipher.c 	stat_pad_len = spu->spu_wordalign_padlen(chunksize);
spu               445 drivers/crypto/bcm/cipher.c 		spu->spu_request_pad(rctx->msg_buf.spu_req_pad, 0,
spu               450 drivers/crypto/bcm/cipher.c 	spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
spu               468 drivers/crypto/bcm/cipher.c 	    spu->spu_xts_tweak_in_payload())
spu               478 drivers/crypto/bcm/cipher.c 	if (spu->spu_tx_status_len())
spu               482 drivers/crypto/bcm/cipher.c 	    spu->spu_xts_tweak_in_payload())
spu               504 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu               513 drivers/crypto/bcm/cipher.c 	payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
spu               520 drivers/crypto/bcm/cipher.c 	    spu->spu_xts_tweak_in_payload() &&
spu               567 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu               571 drivers/crypto/bcm/cipher.c 	mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
spu               573 drivers/crypto/bcm/cipher.c 	if (!mssg->spu.dst)
spu               576 drivers/crypto/bcm/cipher.c 	sg = mssg->spu.dst;
spu               588 drivers/crypto/bcm/cipher.c 	sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
spu               621 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu               626 drivers/crypto/bcm/cipher.c 	mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
spu               628 drivers/crypto/bcm/cipher.c 	if (!mssg->spu.src)
spu               631 drivers/crypto/bcm/cipher.c 	sg = mssg->spu.src;
spu               654 drivers/crypto/bcm/cipher.c 	stat_len = spu->spu_tx_status_len();
spu               691 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu               812 drivers/crypto/bcm/cipher.c 		hash_parms.type = spu->spu_hash_type(rctx->total_sent);
spu               814 drivers/crypto/bcm/cipher.c 	digestsize = spu->spu_digest_size(ctx->digestsize, ctx->auth.alg,
spu               824 drivers/crypto/bcm/cipher.c 		hash_parms.pad_len = spu->spu_hash_pad_len(hash_parms.alg,
spu               855 drivers/crypto/bcm/cipher.c 	spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
spu               870 drivers/crypto/bcm/cipher.c 	data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, chunksize);
spu               873 drivers/crypto/bcm/cipher.c 	if (spu->spu_tx_status_len())
spu               874 drivers/crypto/bcm/cipher.c 		stat_pad_len = spu->spu_wordalign_padlen(db_size);
spu               880 drivers/crypto/bcm/cipher.c 		spu->spu_request_pad(rctx->msg_buf.spu_req_pad, data_pad_len,
spu               886 drivers/crypto/bcm/cipher.c 	spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
spu               909 drivers/crypto/bcm/cipher.c 	if (spu->spu_tx_status_len())
spu               982 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu               990 drivers/crypto/bcm/cipher.c 	if (spu->spu_type == SPU_TYPE_SPUM) {
spu              1087 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              1096 drivers/crypto/bcm/cipher.c 		data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
spu              1100 drivers/crypto/bcm/cipher.c 		data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
spu              1102 drivers/crypto/bcm/cipher.c 		assoc_buf_len = spu->spu_assoc_resp_len(ctx->cipher.mode,
spu              1109 drivers/crypto/bcm/cipher.c 		data_padlen += spu->spu_wordalign_padlen(assoc_buf_len +
spu              1117 drivers/crypto/bcm/cipher.c 	mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
spu              1119 drivers/crypto/bcm/cipher.c 	if (!mssg->spu.dst)
spu              1122 drivers/crypto/bcm/cipher.c 	sg = mssg->spu.dst;
spu              1167 drivers/crypto/bcm/cipher.c 	sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
spu              1210 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              1219 drivers/crypto/bcm/cipher.c 	mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
spu              1221 drivers/crypto/bcm/cipher.c 	if (!mssg->spu.src)
spu              1224 drivers/crypto/bcm/cipher.c 	sg = mssg->spu.src;
spu              1271 drivers/crypto/bcm/cipher.c 	stat_len = spu->spu_tx_status_len();
spu              1298 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              1391 drivers/crypto/bcm/cipher.c 	if (spu->spu_assoc_resp_len(ctx->cipher.mode,
spu              1397 drivers/crypto/bcm/cipher.c 	aead_parms.iv_len = spu->spu_aead_ivlen(ctx->cipher.mode,
spu              1404 drivers/crypto/bcm/cipher.c 	aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
spu              1408 drivers/crypto/bcm/cipher.c 	aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
spu              1416 drivers/crypto/bcm/cipher.c 		aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(
spu              1426 drivers/crypto/bcm/cipher.c 				spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
spu              1430 drivers/crypto/bcm/cipher.c 		spu->spu_ccm_update_iv(digestsize, &cipher_parms, req->assoclen,
spu              1442 drivers/crypto/bcm/cipher.c 			aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
spu              1447 drivers/crypto/bcm/cipher.c 			aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
spu              1470 drivers/crypto/bcm/cipher.c 	spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
spu              1480 drivers/crypto/bcm/cipher.c 	stat_pad_len = spu->spu_wordalign_padlen(db_size);
spu              1487 drivers/crypto/bcm/cipher.c 		spu->spu_request_pad(rctx->msg_buf.spu_req_pad,
spu              1493 drivers/crypto/bcm/cipher.c 	spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
spu              1546 drivers/crypto/bcm/cipher.c 	if (spu->spu_tx_status_len())
spu              1568 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              1578 drivers/crypto/bcm/cipher.c 	payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
spu              1631 drivers/crypto/bcm/cipher.c 	kfree(mssg->spu.src);
spu              1632 drivers/crypto/bcm/cipher.c 	kfree(mssg->spu.dst);
spu              1664 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              1678 drivers/crypto/bcm/cipher.c 	err = spu->spu_status_process(rctx->msg_buf.rx_stat);
spu              1880 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              1923 drivers/crypto/bcm/cipher.c 	if (spu->spu_type == SPU_TYPE_SPUM)
spu              1925 drivers/crypto/bcm/cipher.c 	else if (spu->spu_type == SPU_TYPE_SPU2)
spu              1941 drivers/crypto/bcm/cipher.c 	    spu->spu_cipher_req_init(ctx->bcm_spu_req_hdr + BCM_HDR_LEN,
spu              1944 drivers/crypto/bcm/cipher.c 	ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
spu              1993 drivers/crypto/bcm/cipher.c 	    (iproc_priv.spu.spu_type == SPU_TYPE_SPU2)) {
spu              2024 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              2046 drivers/crypto/bcm/cipher.c 	ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 0,
spu              2067 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              2069 drivers/crypto/bcm/cipher.c 	if (spu->spu_type == SPU_TYPE_SPU2)
spu              2458 drivers/crypto/bcm/cipher.c 	if (iproc_priv.spu.spu_type == SPU_TYPE_SPUM) {
spu              2542 drivers/crypto/bcm/cipher.c 	if (iproc_priv.spu.spu_type == SPU_TYPE_SPU2) {
spu              2570 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              2591 drivers/crypto/bcm/cipher.c 	    (spu->spu_type == SPU_TYPE_SPUM) &&
spu              2604 drivers/crypto/bcm/cipher.c 	    (spu->spu_subtype == SPU_SUBTYPE_SPUM_NSP) &&
spu              2625 drivers/crypto/bcm/cipher.c 	if (spu->spu_type == SPU_TYPE_SPUM)
spu              2822 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              2906 drivers/crypto/bcm/cipher.c 	ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
spu              2926 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              2979 drivers/crypto/bcm/cipher.c 	ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
spu              4261 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              4271 drivers/crypto/bcm/cipher.c 	ctx->max_payload = spu->spu_ctx_max_payload(ctx->cipher.alg,
spu              4390 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              4394 drivers/crypto/bcm/cipher.c 		spu->spu_dump_msg_hdr = spum_dump_msg_hdr;
spu              4395 drivers/crypto/bcm/cipher.c 		spu->spu_payload_length = spum_payload_length;
spu              4396 drivers/crypto/bcm/cipher.c 		spu->spu_response_hdr_len = spum_response_hdr_len;
spu              4397 drivers/crypto/bcm/cipher.c 		spu->spu_hash_pad_len = spum_hash_pad_len;
spu              4398 drivers/crypto/bcm/cipher.c 		spu->spu_gcm_ccm_pad_len = spum_gcm_ccm_pad_len;
spu              4399 drivers/crypto/bcm/cipher.c 		spu->spu_assoc_resp_len = spum_assoc_resp_len;
spu              4400 drivers/crypto/bcm/cipher.c 		spu->spu_aead_ivlen = spum_aead_ivlen;
spu              4401 drivers/crypto/bcm/cipher.c 		spu->spu_hash_type = spum_hash_type;
spu              4402 drivers/crypto/bcm/cipher.c 		spu->spu_digest_size = spum_digest_size;
spu              4403 drivers/crypto/bcm/cipher.c 		spu->spu_create_request = spum_create_request;
spu              4404 drivers/crypto/bcm/cipher.c 		spu->spu_cipher_req_init = spum_cipher_req_init;
spu              4405 drivers/crypto/bcm/cipher.c 		spu->spu_cipher_req_finish = spum_cipher_req_finish;
spu              4406 drivers/crypto/bcm/cipher.c 		spu->spu_request_pad = spum_request_pad;
spu              4407 drivers/crypto/bcm/cipher.c 		spu->spu_tx_status_len = spum_tx_status_len;
spu              4408 drivers/crypto/bcm/cipher.c 		spu->spu_rx_status_len = spum_rx_status_len;
spu              4409 drivers/crypto/bcm/cipher.c 		spu->spu_status_process = spum_status_process;
spu              4410 drivers/crypto/bcm/cipher.c 		spu->spu_xts_tweak_in_payload = spum_xts_tweak_in_payload;
spu              4411 drivers/crypto/bcm/cipher.c 		spu->spu_ccm_update_iv = spum_ccm_update_iv;
spu              4412 drivers/crypto/bcm/cipher.c 		spu->spu_wordalign_padlen = spum_wordalign_padlen;
spu              4414 drivers/crypto/bcm/cipher.c 			spu->spu_ctx_max_payload = spum_ns2_ctx_max_payload;
spu              4416 drivers/crypto/bcm/cipher.c 			spu->spu_ctx_max_payload = spum_nsp_ctx_max_payload;
spu              4419 drivers/crypto/bcm/cipher.c 		spu->spu_dump_msg_hdr = spu2_dump_msg_hdr;
spu              4420 drivers/crypto/bcm/cipher.c 		spu->spu_ctx_max_payload = spu2_ctx_max_payload;
spu              4421 drivers/crypto/bcm/cipher.c 		spu->spu_payload_length = spu2_payload_length;
spu              4422 drivers/crypto/bcm/cipher.c 		spu->spu_response_hdr_len = spu2_response_hdr_len;
spu              4423 drivers/crypto/bcm/cipher.c 		spu->spu_hash_pad_len = spu2_hash_pad_len;
spu              4424 drivers/crypto/bcm/cipher.c 		spu->spu_gcm_ccm_pad_len = spu2_gcm_ccm_pad_len;
spu              4425 drivers/crypto/bcm/cipher.c 		spu->spu_assoc_resp_len = spu2_assoc_resp_len;
spu              4426 drivers/crypto/bcm/cipher.c 		spu->spu_aead_ivlen = spu2_aead_ivlen;
spu              4427 drivers/crypto/bcm/cipher.c 		spu->spu_hash_type = spu2_hash_type;
spu              4428 drivers/crypto/bcm/cipher.c 		spu->spu_digest_size = spu2_digest_size;
spu              4429 drivers/crypto/bcm/cipher.c 		spu->spu_create_request = spu2_create_request;
spu              4430 drivers/crypto/bcm/cipher.c 		spu->spu_cipher_req_init = spu2_cipher_req_init;
spu              4431 drivers/crypto/bcm/cipher.c 		spu->spu_cipher_req_finish = spu2_cipher_req_finish;
spu              4432 drivers/crypto/bcm/cipher.c 		spu->spu_request_pad = spu2_request_pad;
spu              4433 drivers/crypto/bcm/cipher.c 		spu->spu_tx_status_len = spu2_tx_status_len;
spu              4434 drivers/crypto/bcm/cipher.c 		spu->spu_rx_status_len = spu2_rx_status_len;
spu              4435 drivers/crypto/bcm/cipher.c 		spu->spu_status_process = spu2_status_process;
spu              4436 drivers/crypto/bcm/cipher.c 		spu->spu_xts_tweak_in_payload = spu2_xts_tweak_in_payload;
spu              4437 drivers/crypto/bcm/cipher.c 		spu->spu_ccm_update_iv = spu2_ccm_update_iv;
spu              4438 drivers/crypto/bcm/cipher.c 		spu->spu_wordalign_padlen = spu2_wordalign_padlen;
spu              4455 drivers/crypto/bcm/cipher.c 	iproc_priv.mbox = devm_kcalloc(dev, iproc_priv.spu.num_chan,
spu              4467 drivers/crypto/bcm/cipher.c 	for (i = 0; i < iproc_priv.spu.num_chan; i++) {
spu              4481 drivers/crypto/bcm/cipher.c 	for (i = 0; i < iproc_priv.spu.num_chan; i++) {
spu              4493 drivers/crypto/bcm/cipher.c 	for (i = 0; i < iproc_priv.spu.num_chan; i++)
spu              4504 drivers/crypto/bcm/cipher.c 	atomic_set(&iproc_priv.next_chan, (int)iproc_priv.spu.num_chan);
spu              4529 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              4535 drivers/crypto/bcm/cipher.c 	    (spu->spu_type == SPU_TYPE_SPU2))
spu              4563 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              4570 drivers/crypto/bcm/cipher.c 	    (spu->spu_type == SPU_TYPE_SPUM))
spu              4575 drivers/crypto/bcm/cipher.c 	    (spu->spu_subtype != SPU_SUBTYPE_SPU2_V2))
spu              4743 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              4750 drivers/crypto/bcm/cipher.c 	spu->num_chan = of_count_phandle_with_args(dn, "mboxes", "#mbox-cells");
spu              4758 drivers/crypto/bcm/cipher.c 	spu->spu_type = matched_spu_type->type;
spu              4759 drivers/crypto/bcm/cipher.c 	spu->spu_subtype = matched_spu_type->subtype;
spu              4765 drivers/crypto/bcm/cipher.c 		spu->reg_vbase[i] = devm_ioremap_resource(dev, spu_ctrl_regs);
spu              4766 drivers/crypto/bcm/cipher.c 		if (IS_ERR(spu->reg_vbase[i])) {
spu              4767 drivers/crypto/bcm/cipher.c 			err = PTR_ERR(spu->reg_vbase[i]);
spu              4770 drivers/crypto/bcm/cipher.c 			spu->reg_vbase[i] = NULL;
spu              4774 drivers/crypto/bcm/cipher.c 	spu->num_spu = i;
spu              4775 drivers/crypto/bcm/cipher.c 	dev_dbg(dev, "Device has %d SPUs", spu->num_spu);
spu              4783 drivers/crypto/bcm/cipher.c 	struct spu_hw *spu = &iproc_priv.spu;
spu              4798 drivers/crypto/bcm/cipher.c 	if (spu->spu_type == SPU_TYPE_SPUM)
spu              4800 drivers/crypto/bcm/cipher.c 	else if (spu->spu_type == SPU_TYPE_SPU2)
spu              4803 drivers/crypto/bcm/cipher.c 	spu_functions_register(&pdev->dev, spu->spu_type, spu->spu_subtype);
spu               424 drivers/crypto/bcm/cipher.h 	struct spu_hw spu;
spu               371 drivers/crypto/bcm/util.c 			       ipriv->spu.num_spu);
spu               453 drivers/crypto/bcm/util.c 	if (ipriv->spu.spu_type == SPU_TYPE_SPUM)
spu               454 drivers/crypto/bcm/util.c 		for (i = 0; i < ipriv->spu.num_spu; i++) {
spu               455 drivers/crypto/bcm/util.c 			spu_ofifo_ctrl = ioread32(ipriv->spu.reg_vbase[i] +
spu               578 drivers/mailbox/bcm-flexrm-mailbox.c 	if (!msg->spu.src || !msg->spu.dst)
spu               580 drivers/mailbox/bcm-flexrm-mailbox.c 	for (sg = msg->spu.src; sg; sg = sg_next(sg)) {
spu               589 drivers/mailbox/bcm-flexrm-mailbox.c 	for (sg = msg->spu.dst; sg; sg = sg_next(sg)) {
spu               606 drivers/mailbox/bcm-flexrm-mailbox.c 	struct scatterlist *src_sg = msg->spu.src, *dst_sg = msg->spu.dst;
spu               633 drivers/mailbox/bcm-flexrm-mailbox.c 	rc = dma_map_sg(dev, msg->spu.src, sg_nents(msg->spu.src),
spu               638 drivers/mailbox/bcm-flexrm-mailbox.c 	rc = dma_map_sg(dev, msg->spu.dst, sg_nents(msg->spu.dst),
spu               641 drivers/mailbox/bcm-flexrm-mailbox.c 		dma_unmap_sg(dev, msg->spu.src, sg_nents(msg->spu.src),
spu               651 drivers/mailbox/bcm-flexrm-mailbox.c 	dma_unmap_sg(dev, msg->spu.dst, sg_nents(msg->spu.dst),
spu               653 drivers/mailbox/bcm-flexrm-mailbox.c 	dma_unmap_sg(dev, msg->spu.src, sg_nents(msg->spu.src),
spu               665 drivers/mailbox/bcm-flexrm-mailbox.c 	struct scatterlist *src_sg = msg->spu.src, *dst_sg = msg->spu.dst;
spu              1209 drivers/mailbox/bcm-pdc-mailbox.c 	src_nent = sg_nents(mssg->spu.src);
spu              1211 drivers/mailbox/bcm-pdc-mailbox.c 		nent = dma_map_sg(dev, mssg->spu.src, src_nent, DMA_TO_DEVICE);
spu              1216 drivers/mailbox/bcm-pdc-mailbox.c 	dst_nent = sg_nents(mssg->spu.dst);
spu              1218 drivers/mailbox/bcm-pdc-mailbox.c 		nent = dma_map_sg(dev, mssg->spu.dst, dst_nent,
spu              1221 drivers/mailbox/bcm-pdc-mailbox.c 			dma_unmap_sg(dev, mssg->spu.src, src_nent,
spu              1236 drivers/mailbox/bcm-pdc-mailbox.c 	tx_desc_req = pdc_desc_count(mssg->spu.src);
spu              1237 drivers/mailbox/bcm-pdc-mailbox.c 	rx_desc_req = pdc_desc_count(mssg->spu.dst);
spu              1242 drivers/mailbox/bcm-pdc-mailbox.c 	err = pdc_rx_list_init(pdcs, mssg->spu.dst, mssg->ctx);
spu              1243 drivers/mailbox/bcm-pdc-mailbox.c 	err |= pdc_rx_list_sg_add(pdcs, mssg->spu.dst);
spu              1246 drivers/mailbox/bcm-pdc-mailbox.c 	err |= pdc_tx_list_sg_add(pdcs, mssg->spu.src);
spu                49 include/linux/mailbox/brcm-message.h 		} spu;