spin 114 arch/ia64/kernel/mca.c #define NOTIFY_INIT(event, regs, arg, spin) \ spin 117 arch/ia64/kernel/mca.c == NOTIFY_STOP) && ((spin) == 1)) \ spin 121 arch/ia64/kernel/mca.c #define NOTIFY_MCA(event, regs, arg, spin) \ spin 124 arch/ia64/kernel/mca.c == NOTIFY_STOP) && ((spin) == 1)) \ spin 3500 block/blk-mq.c int blk_poll(struct request_queue *q, blk_qc_t cookie, bool spin) spin 3544 block/blk-mq.c if (ret < 0 || !spin) spin 717 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct igt_spinner **spin) spin 722 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c *spin = NULL; spin 726 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c *spin = kzalloc(sizeof(**spin), GFP_KERNEL); spin 727 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (!*spin) spin 730 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ret = igt_spinner_init(*spin, ce->engine->gt); spin 734 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c rq = igt_spinner_create_request(*spin, ce, MI_NOOP); spin 742 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (!igt_wait_for_spinner(*spin, rq)) { spin 751 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c igt_spinner_end(*spin); spin 753 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c igt_spinner_fini(*spin); spin 755 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c kfree(fetch_and_zero(spin)); spin 762 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct igt_spinner *spin, spin 775 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (spin) spin 776 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c igt_spinner_end(spin); spin 837 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct igt_spinner *spin) spin 850 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c flags & TEST_RESET ? NULL : spin, &rpcs); spin 859 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (spin) spin 860 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c igt_spinner_end(spin); spin 883 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct igt_spinner *spin = NULL; spin 886 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ret = __sseu_prepare(name, flags, ce, &spin); spin 895 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c hweight32(sseu.slice_mask), spin); spin 898 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (spin) { spin 899 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c igt_spinner_end(spin); spin 900 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c igt_spinner_fini(spin); spin 901 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c kfree(spin); spin 28 drivers/gpu/drm/i915/gt/selftest_lrc.c struct igt_spinner spin; spin 38 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&spin, &i915->gt)) spin 48 drivers/gpu/drm/i915/gt/selftest_lrc.c rq = igt_spinner_create_request(&spin, ce, MI_NOOP); spin 55 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!igt_wait_for_spinner(&spin, rq)) { spin 63 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&spin); spin 75 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_fini(&spin); spin 485 drivers/gpu/drm/i915/gt/selftest_lrc.c spinner_create_request(struct igt_spinner *spin, spin 497 drivers/gpu/drm/i915/gt/selftest_lrc.c rq = igt_spinner_create_request(spin, ce, arb); spin 722 drivers/gpu/drm/i915/gt/selftest_lrc.c struct igt_spinner spin; spin 733 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&c->spin, &i915->gt)) spin 745 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_fini(&c->spin); spin 783 drivers/gpu/drm/i915/gt/selftest_lrc.c rq_a = spinner_create_request(&a.spin, spin 795 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!igt_wait_for_spinner(&a.spin, rq_a)) { spin 800 drivers/gpu/drm/i915/gt/selftest_lrc.c rq_b = spinner_create_request(&b.spin, spin 814 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_wait_for_spinner(&b.spin, rq_b)) { spin 819 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&a.spin); spin 821 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!igt_wait_for_spinner(&b.spin, rq_b)) { spin 826 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&b.spin); spin 850 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&b.spin); spin 851 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&a.spin); spin 902 drivers/gpu/drm/i915/gt/selftest_lrc.c rq_a = spinner_create_request(&a.spin, spin 911 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!igt_wait_for_spinner(&a.spin, rq_a)) { spin 919 drivers/gpu/drm/i915/gt/selftest_lrc.c rq_b = spinner_create_request(&b.spin, spin 930 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&a.spin); spin 932 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!igt_wait_for_spinner(&b.spin, rq_b)) { spin 940 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&a.spin); spin 966 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&b.spin); spin 967 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&a.spin); spin 1073 drivers/gpu/drm/i915/gt/selftest_lrc.c rq[i] = spinner_create_request(&client[i].spin, spin 1090 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!igt_wait_for_spinner(&client[0].spin, rq[0])) { spin 1106 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&client[i].spin); spin 1138 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&client[i].spin); spin 1182 drivers/gpu/drm/i915/gt/selftest_lrc.c rq = spinner_create_request(&lo.spin, spin 1196 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&lo.spin); spin 1208 drivers/gpu/drm/i915/gt/selftest_lrc.c rq = spinner_create_request(&hi.spin, spin 1214 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!igt_wait_for_spinner(&hi.spin, rq)) spin 1217 drivers/gpu/drm/i915/gt/selftest_lrc.c rq = spinner_create_request(&lo.spin, spin 1237 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&hi.spin); spin 1248 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&lo.spin); spin 1283 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&hi.spin); spin 1284 drivers/gpu/drm/i915/gt/selftest_lrc.c igt_spinner_end(&lo.spin); spin 241 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct igt_spinner *spin) spin 260 drivers/gpu/drm/i915/gt/selftest_workarounds.c rq = igt_spinner_create_request(spin, ce, MI_NOOP); spin 266 drivers/gpu/drm/i915/gt/selftest_workarounds.c spin = NULL; spin 273 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (spin && !igt_wait_for_spinner(spin, rq)) { spin 279 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (err && spin) spin 280 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_spinner_end(spin); spin 291 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct igt_spinner spin; spin 302 drivers/gpu/drm/i915/gt/selftest_workarounds.c err = igt_spinner_init(&spin, engine->gt); spin 312 drivers/gpu/drm/i915/gt/selftest_workarounds.c err = switch_to_scratch_context(engine, &spin); spin 319 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_spinner_end(&spin); spin 349 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_spinner_fini(&spin); spin 1159 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct igt_spinner spin; spin 1197 drivers/gpu/drm/i915/gt/selftest_workarounds.c ret = igt_spinner_init(&spin, engine->gt); spin 1201 drivers/gpu/drm/i915/gt/selftest_workarounds.c rq = igt_spinner_create_request(&spin, ce, MI_NOOP); spin 1204 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_spinner_fini(&spin); spin 1210 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (!igt_wait_for_spinner(&spin, rq)) { spin 1212 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_spinner_fini(&spin); spin 1219 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_spinner_end(&spin); spin 1220 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_spinner_fini(&spin); spin 12 drivers/gpu/drm/i915/selftests/igt_spinner.c int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt) spin 20 drivers/gpu/drm/i915/selftests/igt_spinner.c memset(spin, 0, sizeof(*spin)); spin 21 drivers/gpu/drm/i915/selftests/igt_spinner.c spin->gt = gt; spin 23 drivers/gpu/drm/i915/selftests/igt_spinner.c spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); spin 24 drivers/gpu/drm/i915/selftests/igt_spinner.c if (IS_ERR(spin->hws)) { spin 25 drivers/gpu/drm/i915/selftests/igt_spinner.c err = PTR_ERR(spin->hws); spin 29 drivers/gpu/drm/i915/selftests/igt_spinner.c spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); spin 30 drivers/gpu/drm/i915/selftests/igt_spinner.c if (IS_ERR(spin->obj)) { spin 31 drivers/gpu/drm/i915/selftests/igt_spinner.c err = PTR_ERR(spin->obj); spin 35 drivers/gpu/drm/i915/selftests/igt_spinner.c i915_gem_object_set_cache_coherency(spin->hws, I915_CACHE_LLC); spin 36 drivers/gpu/drm/i915/selftests/igt_spinner.c vaddr = i915_gem_object_pin_map(spin->hws, I915_MAP_WB); spin 41 drivers/gpu/drm/i915/selftests/igt_spinner.c spin->seqno = memset(vaddr, 0xff, PAGE_SIZE); spin 44 drivers/gpu/drm/i915/selftests/igt_spinner.c vaddr = i915_gem_object_pin_map(spin->obj, mode); spin 49 drivers/gpu/drm/i915/selftests/igt_spinner.c spin->batch = vaddr; spin 54 drivers/gpu/drm/i915/selftests/igt_spinner.c i915_gem_object_unpin_map(spin->hws); spin 56 drivers/gpu/drm/i915/selftests/igt_spinner.c i915_gem_object_put(spin->obj); spin 58 drivers/gpu/drm/i915/selftests/igt_spinner.c i915_gem_object_put(spin->hws); spin 91 drivers/gpu/drm/i915/selftests/igt_spinner.c igt_spinner_create_request(struct igt_spinner *spin, spin 101 drivers/gpu/drm/i915/selftests/igt_spinner.c GEM_BUG_ON(spin->gt != ce->vm->gt); spin 103 drivers/gpu/drm/i915/selftests/igt_spinner.c vma = i915_vma_instance(spin->obj, ce->vm, NULL); spin 107 drivers/gpu/drm/i915/selftests/igt_spinner.c hws = i915_vma_instance(spin->hws, ce->vm, NULL); spin 133 drivers/gpu/drm/i915/selftests/igt_spinner.c batch = spin->batch; spin 171 drivers/gpu/drm/i915/selftests/igt_spinner.c hws_seqno(const struct igt_spinner *spin, const struct i915_request *rq) spin 173 drivers/gpu/drm/i915/selftests/igt_spinner.c u32 *seqno = spin->seqno + seqno_offset(rq->fence.context); spin 178 drivers/gpu/drm/i915/selftests/igt_spinner.c void igt_spinner_end(struct igt_spinner *spin) spin 180 drivers/gpu/drm/i915/selftests/igt_spinner.c *spin->batch = MI_BATCH_BUFFER_END; spin 181 drivers/gpu/drm/i915/selftests/igt_spinner.c intel_gt_chipset_flush(spin->gt); spin 184 drivers/gpu/drm/i915/selftests/igt_spinner.c void igt_spinner_fini(struct igt_spinner *spin) spin 186 drivers/gpu/drm/i915/selftests/igt_spinner.c igt_spinner_end(spin); spin 188 drivers/gpu/drm/i915/selftests/igt_spinner.c i915_gem_object_unpin_map(spin->obj); spin 189 drivers/gpu/drm/i915/selftests/igt_spinner.c i915_gem_object_put(spin->obj); spin 191 drivers/gpu/drm/i915/selftests/igt_spinner.c i915_gem_object_unpin_map(spin->hws); spin 192 drivers/gpu/drm/i915/selftests/igt_spinner.c i915_gem_object_put(spin->hws); spin 195 drivers/gpu/drm/i915/selftests/igt_spinner.c bool igt_wait_for_spinner(struct igt_spinner *spin, struct i915_request *rq) spin 197 drivers/gpu/drm/i915/selftests/igt_spinner.c return !(wait_for_us(i915_seqno_passed(hws_seqno(spin, rq), spin 200 drivers/gpu/drm/i915/selftests/igt_spinner.c wait_for(i915_seqno_passed(hws_seqno(spin, rq), spin 27 drivers/gpu/drm/i915/selftests/igt_spinner.h int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt); spin 28 drivers/gpu/drm/i915/selftests/igt_spinner.h void igt_spinner_fini(struct igt_spinner *spin); spin 31 drivers/gpu/drm/i915/selftests/igt_spinner.h igt_spinner_create_request(struct igt_spinner *spin, spin 34 drivers/gpu/drm/i915/selftests/igt_spinner.h void igt_spinner_end(struct igt_spinner *spin); spin 36 drivers/gpu/drm/i915/selftests/igt_spinner.h bool igt_wait_for_spinner(struct igt_spinner *spin, struct i915_request *rq); spin 801 drivers/media/dvb-frontends/drxk_hard.c const char *spin = ""; spin 855 drivers/media/dvb-frontends/drxk_hard.c spin = "A1"; spin 859 drivers/media/dvb-frontends/drxk_hard.c spin = "A2"; spin 863 drivers/media/dvb-frontends/drxk_hard.c spin = "A3"; spin 984 drivers/media/dvb-frontends/drxk_hard.c ((sio_top_jtagid_lo >> 12) & 0xFF), spin, spin 41 drivers/net/can/softing/softing.h spinlock_t spin; /* protect this structure & DPRAM access */ spin 33 drivers/net/can/softing/softing_main.c spin_lock_bh(&card->spin); spin 36 drivers/net/can/softing/softing_main.c spin_unlock_bh(&card->spin); spin 43 drivers/net/can/softing/softing_main.c spin_lock_bh(&card->spin); spin 46 drivers/net/can/softing/softing_main.c spin_unlock_bh(&card->spin); spin 65 drivers/net/can/softing/softing_main.c spin_lock(&card->spin); spin 114 drivers/net/can/softing/softing_main.c spin_unlock(&card->spin); spin 326 drivers/net/can/softing/softing_main.c spin_lock_bh(&card->spin); spin 331 drivers/net/can/softing/softing_main.c spin_unlock_bh(&card->spin); spin 772 drivers/net/can/softing/softing_main.c spin_lock_init(&card->spin); spin 806 fs/io_uring.c bool spin; spin 813 fs/io_uring.c spin = !ctx->poll_multi_file && *nr_events < min; spin 831 fs/io_uring.c ret = kiocb->ki_filp->f_op->iopoll(kiocb, spin); spin 835 fs/io_uring.c if (ret && spin) spin 836 fs/io_uring.c spin = false; spin 51 fs/iomap/direct-io.c int iomap_dio_iopoll(struct kiocb *kiocb, bool spin) spin 57 fs/iomap/direct-io.c return blk_poll(q, READ_ONCE(kiocb->ki_cookie), spin); spin 896 include/linux/blkdev.h int blk_poll(struct request_queue *q, blk_qc_t cookie, bool spin); spin 1829 include/linux/fs.h int (*iopoll)(struct kiocb *kiocb, bool spin); spin 199 include/linux/iomap.h int iomap_dio_iopoll(struct kiocb *kiocb, bool spin); spin 126 kernel/locking/spinlock.c BUILD_LOCK_OPS(spin, raw_spinlock); spin 1741 kernel/printk/printk.c bool spin = false; spin 1754 kernel/printk/printk.c spin = true; spin 1767 kernel/printk/printk.c if (!spin) { spin 3723 kernel/trace/ring_buffer.c spin: spin 3772 kernel/trace/ring_buffer.c goto spin; spin 3339 net/core/pktgen.c spin(pkt_dev, pkt_dev->next_tx);