spec_op           431 arch/mips/kernel/branch.c 	case spec_op:
spec_op           393 arch/mips/kernel/kgdb.c 	.gdb_bpt_instr = { spec_op << 2, 0x00, 0x00, break_op },
spec_op           395 arch/mips/kernel/kgdb.c 	.gdb_bpt_instr = { break_op, 0x00, 0x00, spec_op << 2 },
spec_op            28 arch/mips/kernel/kprobes.c 		.opcode = spec_op,
spec_op            36 arch/mips/kernel/kprobes.c 		.opcode = spec_op,
spec_op           102 arch/mips/kernel/mips-r2-to-r6-emul.c 	case spec_op:
spec_op           928 arch/mips/kernel/mips-r2-to-r6-emul.c 	case spec_op:
spec_op            20 arch/mips/kernel/probes-common.h 	case spec_op:
spec_op           314 arch/mips/kernel/process.c 	if (ip->r_format.opcode != spec_op)
spec_op            69 arch/mips/kernel/uprobes.c 	case spec_op:
spec_op           107 arch/mips/kvm/dyntrans.c 		mfc0_inst.r_format.opcode = spec_op;
spec_op            63 arch/mips/kvm/emulate.c 	case spec_op:
spec_op           253 arch/mips/math-emu/cp1emu.c 				mips32_insn.r_format.opcode = spec_op;
spec_op           434 arch/mips/math-emu/cp1emu.c 	case spec_op:
spec_op          1308 arch/mips/math-emu/cp1emu.c 				case spec_op:
spec_op          1368 arch/mips/math-emu/cp1emu.c 	case spec_op:
spec_op            52 arch/mips/mm/uasm-mips.c 	[insn_addu]	= {M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD},
spec_op            53 arch/mips/mm/uasm-mips.c 	[insn_and]	= {M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD},
spec_op            66 arch/mips/mm/uasm-mips.c 	[insn_break]	= {M(spec_op, 0, 0, 0, 0, break_op), SCIMM},
spec_op            77 arch/mips/mm/uasm-mips.c 	[insn_daddu]	= {M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD},
spec_op            78 arch/mips/mm/uasm-mips.c 	[insn_ddivu]	= {M(spec_op, 0, 0, 0, 0, ddivu_op), RS | RT},
spec_op            79 arch/mips/mm/uasm-mips.c 	[insn_ddivu_r6]	= {M(spec_op, 0, 0, 0, ddivu_ddivu6_op, ddivu_op),
spec_op            85 arch/mips/mm/uasm-mips.c 	[insn_divu]	= {M(spec_op, 0, 0, 0, 0, divu_op), RS | RT},
spec_op            86 arch/mips/mm/uasm-mips.c 	[insn_divu_r6]	= {M(spec_op, 0, 0, 0, divu_divu6_op, divu_op),
spec_op            89 arch/mips/mm/uasm-mips.c 	[insn_dmodu]	= {M(spec_op, 0, 0, 0, ddivu_dmodu_op, ddivu_op),
spec_op            92 arch/mips/mm/uasm-mips.c 	[insn_dmultu]	= {M(spec_op, 0, 0, 0, 0, dmultu_op), RS | RT},
spec_op            93 arch/mips/mm/uasm-mips.c 	[insn_dmulu]	= {M(spec_op, 0, 0, 0, dmult_dmul_op, dmultu_op),
spec_op            95 arch/mips/mm/uasm-mips.c 	[insn_drotr]	= {M(spec_op, 1, 0, 0, 0, dsrl_op), RT | RD | RE},
spec_op            96 arch/mips/mm/uasm-mips.c 	[insn_drotr32]	= {M(spec_op, 1, 0, 0, 0, dsrl32_op), RT | RD | RE},
spec_op            99 arch/mips/mm/uasm-mips.c 	[insn_dsll]	= {M(spec_op, 0, 0, 0, 0, dsll_op), RT | RD | RE},
spec_op           100 arch/mips/mm/uasm-mips.c 	[insn_dsll32]	= {M(spec_op, 0, 0, 0, 0, dsll32_op), RT | RD | RE},
spec_op           101 arch/mips/mm/uasm-mips.c 	[insn_dsllv]	= {M(spec_op, 0, 0, 0, 0, dsllv_op),  RS | RT | RD},
spec_op           102 arch/mips/mm/uasm-mips.c 	[insn_dsra]	= {M(spec_op, 0, 0, 0, 0, dsra_op), RT | RD | RE},
spec_op           103 arch/mips/mm/uasm-mips.c 	[insn_dsra32]	= {M(spec_op, 0, 0, 0, 0, dsra32_op), RT | RD | RE},
spec_op           104 arch/mips/mm/uasm-mips.c 	[insn_dsrav]	= {M(spec_op, 0, 0, 0, 0, dsrav_op),  RS | RT | RD},
spec_op           105 arch/mips/mm/uasm-mips.c 	[insn_dsrl]	= {M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE},
spec_op           106 arch/mips/mm/uasm-mips.c 	[insn_dsrl32]	= {M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE},
spec_op           107 arch/mips/mm/uasm-mips.c 	[insn_dsrlv]	= {M(spec_op, 0, 0, 0, 0, dsrlv_op),  RS | RT | RD},
spec_op           108 arch/mips/mm/uasm-mips.c 	[insn_dsubu]	= {M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD},
spec_op           114 arch/mips/mm/uasm-mips.c 	[insn_jalr]	= {M(spec_op, 0, 0, 0, 0, jalr_op), RS | RD},
spec_op           116 arch/mips/mm/uasm-mips.c 	[insn_jr]	= {M(spec_op, 0, 0, 0, 0, jr_op),  RS},
spec_op           118 arch/mips/mm/uasm-mips.c 	[insn_jr]	= {M(spec_op, 0, 0, 0, 0, jalr_op),  RS},
spec_op           141 arch/mips/mm/uasm-mips.c 	[insn_mfhi]	= {M(spec_op, 0, 0, 0, 0, mfhi_op), RD},
spec_op           142 arch/mips/mm/uasm-mips.c 	[insn_mflo]	= {M(spec_op, 0, 0, 0, 0, mflo_op), RD},
spec_op           143 arch/mips/mm/uasm-mips.c 	[insn_modu]	= {M(spec_op, 0, 0, 0, divu_modu_op, divu_op),
spec_op           145 arch/mips/mm/uasm-mips.c 	[insn_movn]	= {M(spec_op, 0, 0, 0, 0, movn_op), RS | RT | RD},
spec_op           146 arch/mips/mm/uasm-mips.c 	[insn_movz]	= {M(spec_op, 0, 0, 0, 0, movz_op), RS | RT | RD},
spec_op           149 arch/mips/mm/uasm-mips.c 	[insn_mthi]	= {M(spec_op, 0, 0, 0, 0, mthi_op), RS},
spec_op           150 arch/mips/mm/uasm-mips.c 	[insn_mtlo]	= {M(spec_op, 0, 0, 0, 0, mtlo_op), RS},
spec_op           151 arch/mips/mm/uasm-mips.c 	[insn_mulu]	= {M(spec_op, 0, 0, 0, multu_mulu_op, multu_op),
spec_op           156 arch/mips/mm/uasm-mips.c 	[insn_mul]	= {M(spec_op, 0, 0, 0, mult_mul_op, mult_op), RS | RT | RD},
spec_op           158 arch/mips/mm/uasm-mips.c 	[insn_multu]	= {M(spec_op, 0, 0, 0, 0, multu_op), RS | RT},
spec_op           159 arch/mips/mm/uasm-mips.c 	[insn_nor]	= {M(spec_op, 0, 0, 0, 0, nor_op),  RS | RT | RD},
spec_op           160 arch/mips/mm/uasm-mips.c 	[insn_or]	= {M(spec_op, 0, 0, 0, 0, or_op),  RS | RT | RD},
spec_op           168 arch/mips/mm/uasm-mips.c 	[insn_rotr]	= {M(spec_op, 1, 0, 0, 0, srl_op),  RT | RD | RE},
spec_op           178 arch/mips/mm/uasm-mips.c 	[insn_seleqz]	= {M(spec_op, 0, 0, 0, 0, seleqz_op), RS | RT | RD},
spec_op           179 arch/mips/mm/uasm-mips.c 	[insn_selnez]	= {M(spec_op, 0, 0, 0, 0, selnez_op), RS | RT | RD},
spec_op           181 arch/mips/mm/uasm-mips.c 	[insn_sll]	= {M(spec_op, 0, 0, 0, 0, sll_op),  RT | RD | RE},
spec_op           182 arch/mips/mm/uasm-mips.c 	[insn_sllv]	= {M(spec_op, 0, 0, 0, 0, sllv_op),  RS | RT | RD},
spec_op           183 arch/mips/mm/uasm-mips.c 	[insn_slt]	= {M(spec_op, 0, 0, 0, 0, slt_op),  RS | RT | RD},
spec_op           186 arch/mips/mm/uasm-mips.c 	[insn_sltu]	= {M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD},
spec_op           187 arch/mips/mm/uasm-mips.c 	[insn_sra]	= {M(spec_op, 0, 0, 0, 0, sra_op),  RT | RD | RE},
spec_op           188 arch/mips/mm/uasm-mips.c 	[insn_srav]	= {M(spec_op, 0, 0, 0, 0, srav_op), RS | RT | RD},
spec_op           189 arch/mips/mm/uasm-mips.c 	[insn_srl]	= {M(spec_op, 0, 0, 0, 0, srl_op),  RT | RD | RE},
spec_op           190 arch/mips/mm/uasm-mips.c 	[insn_srlv]	= {M(spec_op, 0, 0, 0, 0, srlv_op),  RS | RT | RD},
spec_op           191 arch/mips/mm/uasm-mips.c 	[insn_subu]	= {M(spec_op, 0, 0, 0, 0, subu_op),	RS | RT | RD},
spec_op           193 arch/mips/mm/uasm-mips.c 	[insn_sync]	= {M(spec_op, 0, 0, 0, 0, sync_op), RE},
spec_op           194 arch/mips/mm/uasm-mips.c 	[insn_syscall]	= {M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM},
spec_op           201 arch/mips/mm/uasm-mips.c 	[insn_xor]	= {M(spec_op, 0, 0, 0, 0, xor_op),  RS | RT | RD},