spec3_op 936 arch/mips/kernel/unaligned.c case spec3_op: spec3_op 1958 arch/mips/kvm/emulate.c case spec3_op: spec3_op 2513 arch/mips/kvm/emulate.c if (inst.r_format.opcode == spec3_op && spec3_op 604 arch/mips/kvm/vz.c if (inst.spec3_format.opcode != spec3_op) spec3_op 1161 arch/mips/kvm/vz.c case spec3_op: spec3_op 70 arch/mips/mm/uasm-mips.c [insn_cache] = {M6(spec3_op, 0, 0, 0, cache6_op), RS | RT | SIMM9}, spec3_op 82 arch/mips/mm/uasm-mips.c [insn_dins] = {M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE}, spec3_op 83 arch/mips/mm/uasm-mips.c [insn_dinsm] = {M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE}, spec3_op 84 arch/mips/mm/uasm-mips.c [insn_dinsu] = {M(spec3_op, 0, 0, 0, 0, dinsu_op), RS | RT | RD | RE}, spec3_op 97 arch/mips/mm/uasm-mips.c [insn_dsbh] = {M(spec3_op, 0, 0, 0, dsbh_op, dbshfl_op), RT | RD}, spec3_op 98 arch/mips/mm/uasm-mips.c [insn_dshd] = {M(spec3_op, 0, 0, 0, dshd_op, dbshfl_op), RT | RD}, spec3_op 110 arch/mips/mm/uasm-mips.c [insn_ext] = {M(spec3_op, 0, 0, 0, 0, ext_op), RS | RT | RD | RE}, spec3_op 111 arch/mips/mm/uasm-mips.c [insn_ins] = {M(spec3_op, 0, 0, 0, 0, ins_op), RS | RT | RD | RE}, spec3_op 125 arch/mips/mm/uasm-mips.c [insn_ldx] = {M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD}, spec3_op 132 arch/mips/mm/uasm-mips.c [insn_ll] = {M6(spec3_op, 0, 0, 0, ll6_op), RS | RT | SIMM9}, spec3_op 133 arch/mips/mm/uasm-mips.c [insn_lld] = {M6(spec3_op, 0, 0, 0, lld6_op), RS | RT | SIMM9}, spec3_op 138 arch/mips/mm/uasm-mips.c [insn_lwx] = {M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD}, spec3_op 165 arch/mips/mm/uasm-mips.c [insn_pref] = {M6(spec3_op, 0, 0, 0, pref6_op), RS | RT | SIMM9}, spec3_op 174 arch/mips/mm/uasm-mips.c [insn_sc] = {M6(spec3_op, 0, 0, 0, sc6_op), RS | RT | SIMM9}, spec3_op 175 arch/mips/mm/uasm-mips.c [insn_scd] = {M6(spec3_op, 0, 0, 0, scd6_op), RS | RT | SIMM9}, spec3_op 200 arch/mips/mm/uasm-mips.c [insn_wsbh] = {M(spec3_op, 0, 0, 0, wsbh_op, bshfl_op), RT | RD}, spec3_op 203 arch/mips/mm/uasm-mips.c [insn_yield] = {M(spec3_op, 0, 0, 0, 0, yield_op), RS | RD},