sparc_config 77 arch/sparc/kernel/irq.h extern struct sparc_config sparc_config; sparc_config 29 arch/sparc/kernel/irq_32.c struct sparc_config sparc_config; sparc_config 317 arch/sparc/kernel/leon_kernel.c sparc_config.get_cycles_offset = leon_cycles_offset; sparc_config 318 arch/sparc/kernel/leon_kernel.c sparc_config.cs_period = 1000000 / HZ; sparc_config 319 arch/sparc/kernel/leon_kernel.c sparc_config.features |= FEAT_L10_CLOCKSOURCE; sparc_config 322 arch/sparc/kernel/leon_kernel.c sparc_config.features |= FEAT_L10_CLOCKEVENT; sparc_config 506 arch/sparc/kernel/leon_kernel.c sparc_config.init_timers = leon_init_timers; sparc_config 507 arch/sparc/kernel/leon_kernel.c sparc_config.build_device_irq = _leon_build_device_irq; sparc_config 508 arch/sparc/kernel/leon_kernel.c sparc_config.clock_rate = 1000000; sparc_config 509 arch/sparc/kernel/leon_kernel.c sparc_config.clear_clock_irq = leon_clear_clock_irq; sparc_config 510 arch/sparc/kernel/leon_kernel.c sparc_config.load_profile_irq = leon_load_profile_irq; sparc_config 361 arch/sparc/kernel/of_device_32.c sparc_config.build_device_irq(op, intr[i].pri); sparc_config 370 arch/sparc/kernel/of_device_32.c sparc_config.build_device_irq(op, irq[i]); sparc_config 715 arch/sparc/kernel/pcic.c sparc_config.clock_rate = SBUS_CLOCK_RATE / HZ; sparc_config 716 arch/sparc/kernel/pcic.c sparc_config.features |= FEAT_L10_CLOCKEVENT; sparc_config 718 arch/sparc/kernel/pcic.c sparc_config.features |= FEAT_L10_CLOCKSOURCE; sparc_config 719 arch/sparc/kernel/pcic.c sparc_config.get_cycles_offset = pcic_cycles_offset; sparc_config 836 arch/sparc/kernel/pcic.c sparc_config.build_device_irq = pcic_build_device_irq; sparc_config 837 arch/sparc/kernel/pcic.c sparc_config.clear_clock_irq = pcic_clear_clock_irq; sparc_config 838 arch/sparc/kernel/pcic.c sparc_config.load_profile_irq = pcic_load_profile_irq; sparc_config 462 arch/sparc/kernel/sun4d_irq.c sparc_config.cs_period = SBUS_CLOCK_RATE * 2; /* 2 seconds */ sparc_config 464 arch/sparc/kernel/sun4d_irq.c sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec */ sparc_config 465 arch/sparc/kernel/sun4d_irq.c sparc_config.features |= FEAT_L10_CLOCKEVENT; sparc_config 467 arch/sparc/kernel/sun4d_irq.c sparc_config.features |= FEAT_L10_CLOCKSOURCE; sparc_config 468 arch/sparc/kernel/sun4d_irq.c sbus_writel(timer_value(sparc_config.cs_period), sparc_config 512 arch/sparc/kernel/sun4d_irq.c sparc_config.init_timers = sun4d_init_timers; sparc_config 513 arch/sparc/kernel/sun4d_irq.c sparc_config.build_device_irq = sun4d_build_device_irq; sparc_config 514 arch/sparc/kernel/sun4d_irq.c sparc_config.clock_rate = SBUS_CLOCK_RATE; sparc_config 515 arch/sparc/kernel/sun4d_irq.c sparc_config.clear_clock_irq = sun4d_clear_clock_irq; sparc_config 516 arch/sparc/kernel/sun4d_irq.c sparc_config.load_profile_irq = sun4d_load_profile_irq; sparc_config 390 arch/sparc/kernel/sun4m_irq.c sparc_config.cs_period = SBUS_CLOCK_RATE * 2; /* 2 seconds */ sparc_config 391 arch/sparc/kernel/sun4m_irq.c sparc_config.features |= FEAT_L14_ONESHOT; sparc_config 393 arch/sparc/kernel/sun4m_irq.c sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec */ sparc_config 394 arch/sparc/kernel/sun4m_irq.c sparc_config.features |= FEAT_L10_CLOCKEVENT; sparc_config 396 arch/sparc/kernel/sun4m_irq.c sparc_config.features |= FEAT_L10_CLOCKSOURCE; sparc_config 397 arch/sparc/kernel/sun4m_irq.c sbus_writel(timer_value(sparc_config.cs_period), sparc_config 471 arch/sparc/kernel/sun4m_irq.c sparc_config.init_timers = sun4m_init_timers; sparc_config 472 arch/sparc/kernel/sun4m_irq.c sparc_config.build_device_irq = sun4m_build_device_irq; sparc_config 473 arch/sparc/kernel/sun4m_irq.c sparc_config.clock_rate = SBUS_CLOCK_RATE; sparc_config 474 arch/sparc/kernel/sun4m_irq.c sparc_config.clear_clock_irq = sun4m_clear_clock_irq; sparc_config 475 arch/sparc/kernel/sun4m_irq.c sparc_config.load_profile_irq = sun4m_load_profile_irq; sparc_config 254 arch/sparc/kernel/sun4m_smp.c sparc_config.load_profile_irq(cpu, 0); /* Is this needless? */ sparc_config 93 arch/sparc/kernel/time_32.c sparc_config.clear_clock_irq(); sparc_config 96 arch/sparc/kernel/time_32.c sparc_config.clear_clock_irq(); sparc_config 133 arch/sparc/kernel/time_32.c ce->mult = div_sc(sparc_config.clock_rate, NSEC_PER_SEC, sparc_config 147 arch/sparc/kernel/time_32.c offset += sparc_config.cs_period; sparc_config 161 arch/sparc/kernel/time_32.c offset = sparc_config.get_cycles_offset(); sparc_config 165 arch/sparc/kernel/time_32.c cycles *= sparc_config.cs_period; sparc_config 182 arch/sparc/kernel/time_32.c return clocksource_register_hz(&timer_cs, sparc_config.clock_rate); sparc_config 190 arch/sparc/kernel/time_32.c sparc_config.load_profile_irq(cpu, 0); sparc_config 198 arch/sparc/kernel/time_32.c sparc_config.load_profile_irq(cpu, SBUS_CLOCK_RATE / HZ); sparc_config 208 arch/sparc/kernel/time_32.c sparc_config.load_profile_irq(cpu, next); sparc_config 217 arch/sparc/kernel/time_32.c if (sparc_config.features & FEAT_L14_ONESHOT) sparc_config 229 arch/sparc/kernel/time_32.c ce->mult = div_sc(sparc_config.clock_rate, NSEC_PER_SEC, sparc_config 231 arch/sparc/kernel/time_32.c ce->max_delta_ns = clockevent_delta2ns(sparc_config.clock_rate, ce); sparc_config 232 arch/sparc/kernel/time_32.c ce->max_delta_ticks = (unsigned long)sparc_config.clock_rate; sparc_config 331 arch/sparc/kernel/time_32.c if (sparc_config.features & FEAT_L10_CLOCKEVENT) sparc_config 333 arch/sparc/kernel/time_32.c if (sparc_config.features & FEAT_L10_CLOCKSOURCE) sparc_config 342 arch/sparc/kernel/time_32.c sparc_config.get_cycles_offset = sbus_cycles_offset; sparc_config 343 arch/sparc/kernel/time_32.c sparc_config.init_timers(); sparc_config 348 arch/sparc/kernel/time_32.c sparc_config.features = 0;