source_macro_tile_size  256 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c enum source_macro_tile_size swizzle_mode_to_macro_tile_size(enum swizzle_mode_values sw_mode)
source_macro_tile_size  155 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size)
source_macro_tile_size  429 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 			256 : get_blk_size_bytes((enum source_macro_tile_size) macro_tile_size);
source_macro_tile_size  155 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size)
source_macro_tile_size  429 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 			256 : get_blk_size_bytes((enum source_macro_tile_size) macro_tile_size);
source_macro_tile_size  132 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size)
source_macro_tile_size  422 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 			256 : get_blk_size_bytes((enum source_macro_tile_size) macro_tile_size);
source_macro_tile_size  196 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size)
source_macro_tile_size  416 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 			256 : get_blk_size_bytes((enum source_macro_tile_size) macro_tile_size);
source_macro_tile_size  656 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 							(enum source_macro_tile_size) pipe_src_param.macro_tile_size);
source_macro_tile_size  635 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h enum source_macro_tile_size swizzle_mode_to_macro_tile_size(enum swizzle_mode_values sw_mode);