smu_context 918 drivers/gpu/drm/amd/amdgpu/amdgpu.h struct smu_context smu; smu_context 440 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct smu_context *smu = &adev->smu; smu_context 297 drivers/gpu/drm/amd/amdgpu/nv.c struct smu_context *smu = &adev->smu; smu_context 317 drivers/gpu/drm/amd/amdgpu/nv.c struct smu_context *smu = &adev->smu; smu_context 43 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 669 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 729 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 745 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 761 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 778 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 800 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 823 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 836 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 871 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 890 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; smu_context 40 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c const char *smu_get_message_name(struct smu_context *smu, enum smu_message_type type) smu_context 53 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c const char *smu_get_feature_name(struct smu_context *smu, enum smu_feature_mask feature) smu_context 60 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf) smu_context 98 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_sys_set_pp_feature_mask(struct smu_context *smu, uint64_t new_mask) smu_context 129 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_get_smc_version(struct smu_context *smu, uint32_t *if_version, uint32_t *smu_version) smu_context 159 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 195 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 231 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 274 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_get_dpm_freq_by_index(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 308 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_get_dpm_level_count(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 314 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type) smu_context 342 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type, smu_context 367 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu) smu_context 373 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_get_power_num_states(struct smu_context *smu, smu_context 387 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_common_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, smu_context 433 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int argument, smu_context 495 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_sys_get_pp_table(struct smu_context *smu, void **table) smu_context 510 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_sys_set_pp_table(struct smu_context *smu, void *buf, size_t size) smu_context 547 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_feature_init_dpm(struct smu_context *smu) smu_context 572 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_feature_update_enable_state(struct smu_context *smu, uint64_t feature_mask, bool enabled) smu_context 608 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_feature_is_enabled(struct smu_context *smu, enum smu_feature_mask mask) smu_context 631 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_feature_set_enabled(struct smu_context *smu, enum smu_feature_mask mask, smu_context 663 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_feature_is_supported(struct smu_context *smu, enum smu_feature_mask mask) smu_context 682 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_feature_set_supported(struct smu_context *smu, smu_context 708 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; smu_context 735 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; smu_context 747 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; smu_context 761 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_get_atom_data_table(struct smu_context *smu, uint32_t table, smu_context 777 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_initialize_pptable(struct smu_context *smu) smu_context 783 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_smc_table_sw_init(struct smu_context *smu) smu_context 816 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_smc_table_sw_fini(struct smu_context *smu) smu_context 832 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; smu_context 897 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; smu_context 918 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_init_fb_allocations(struct smu_context *smu) smu_context 957 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_fini_fb_allocations(struct smu_context *smu) smu_context 978 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_override_pcie_parameters(struct smu_context *smu) smu_context 1022 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_smc_table_hw_init(struct smu_context *smu, smu_context 1177 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_alloc_memory_pool(struct smu_context *smu) smu_context 1212 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_free_memory_pool(struct smu_context *smu) smu_context 1234 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; smu_context 1298 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; smu_context 1327 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_reset(struct smu_context *smu) smu_context 1347 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; smu_context 1378 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; smu_context 1402 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_display_configuration_change(struct smu_context *smu, smu_context 1436 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_get_clock_info(struct smu_context *smu, smu_context 1465 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_get_current_clocks(struct smu_context *smu, smu_context 1534 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = (struct smu_context*)(handle); smu_context 1569 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_default_set_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) smu_context 1606 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_adjust_power_state_dynamic(struct smu_context *smu, smu_context 1666 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_handle_task(struct smu_context *smu, smu_context 1693 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_switch_power_profile(struct smu_context *smu, smu_context 1729 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu) smu_context 1744 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) smu_context 1762 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c int smu_set_display_count(struct smu_context *smu, uint32_t count) smu_context 190 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_smu_msg_index(struct smu_context *smc, uint32_t index) smu_context 204 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_smu_clk_index(struct smu_context *smc, uint32_t index) smu_context 220 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_smu_feature_index(struct smu_context *smc, uint32_t index) smu_context 235 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_smu_table_index(struct smu_context *smc, uint32_t index) smu_context 251 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_pwr_src_index(struct smu_context *smc, uint32_t index) smu_context 268 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER_PROFILE profile) smu_context 284 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_tables_init(struct smu_context *smu, struct smu_table *tables) smu_context 305 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_allocate_dpm_context(struct smu_context *smu) smu_context 341 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c arcturus_get_allowed_feature_mask(struct smu_context *smu, smu_context 354 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c arcturus_set_single_dpm_table(struct smu_context *smu, smu_context 403 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_set_default_dpm_table(struct smu_context *smu) smu_context 479 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_check_powerplay_table(struct smu_context *smu) smu_context 484 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_store_powerplay_table(struct smu_context *smu) smu_context 503 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_append_powerplay_table(struct smu_context *smu) smu_context 531 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_run_btc_afll(struct smu_context *smu) smu_context 536 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_populate_umd_state_clk(struct smu_context *smu) smu_context 562 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_clk_table(struct smu_context *smu, smu_context 586 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_print_clk_levels(struct smu_context *smu, smu_context 694 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_upload_dpm_level(struct smu_context *smu, bool max, smu_context 751 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_force_clk_levels(struct smu_context *smu, smu_context 883 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_thermal_temperature_range(struct smu_context *smu, smu_context 907 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_metrics_table(struct smu_context *smu, smu_context 932 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_current_activity_percent(struct smu_context *smu, smu_context 961 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_gpu_power(struct smu_context *smu, uint32_t *value) smu_context 978 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_thermal_get_temperature(struct smu_context *smu, smu_context 1013 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_read_sensor(struct smu_context *smu, smu_context 1056 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_fan_speed_rpm(struct smu_context *smu, smu_context 1074 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_fan_speed_percent(struct smu_context *smu, smu_context 1094 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_current_clk_freq_by_table(struct smu_context *smu, smu_context 1188 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_force_dpm_limit_value(struct smu_context *smu, bool highest) smu_context 1242 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_unforce_dpm_levels(struct smu_context *smu) smu_context 1289 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c arcturus_get_profiling_clk_mask(struct smu_context *smu, smu_context 1333 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_power_limit(struct smu_context *smu, smu_context 1383 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_get_power_profile_mode(struct smu_context *smu, smu_context 1421 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static int arcturus_set_power_profile_mode(struct smu_context *smu, smu_context 1460 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static void arcturus_dump_pptable(struct smu_context *smu) smu_context 1891 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c static bool arcturus_is_dpm_running(struct smu_context *smu) smu_context 1942 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c void arcturus_set_ppt_funcs(struct smu_context *smu) smu_context 70 drivers/gpu/drm/amd/powerplay/arcturus_ppt.h extern void arcturus_set_ppt_funcs(struct smu_context *smu); smu_context 392 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*alloc_dpm_context)(struct smu_context *smu); smu_context 393 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*store_powerplay_table)(struct smu_context *smu); smu_context 394 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*check_powerplay_table)(struct smu_context *smu); smu_context 395 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*append_powerplay_table)(struct smu_context *smu); smu_context 396 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_smu_msg_index)(struct smu_context *smu, uint32_t index); smu_context 397 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_smu_clk_index)(struct smu_context *smu, uint32_t index); smu_context 398 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_smu_feature_index)(struct smu_context *smu, uint32_t index); smu_context 399 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_smu_table_index)(struct smu_context *smu, uint32_t index); smu_context 400 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_smu_power_index)(struct smu_context *smu, uint32_t index); smu_context 401 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_workload_type)(struct smu_context *smu, enum PP_SMC_POWER_PROFILE profile); smu_context 402 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*run_afll_btc)(struct smu_context *smu); smu_context 403 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num); smu_context 404 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h enum amd_pm_state_type (*get_current_power_state)(struct smu_context *smu); smu_context 405 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_default_dpm_table)(struct smu_context *smu); smu_context 406 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_power_state)(struct smu_context *smu); smu_context 407 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*populate_umd_state_clk)(struct smu_context *smu); smu_context 408 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*print_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, char *buf); smu_context 409 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*force_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask); smu_context 410 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_default_od8_settings)(struct smu_context *smu); smu_context 411 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_od_percentage)(struct smu_context *smu, enum smu_clk_type clk_type); smu_context 412 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_od_percentage)(struct smu_context *smu, smu_context 415 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*od_edit_dpm_table)(struct smu_context *smu, smu_context 418 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_clock_by_type_with_latency)(struct smu_context *smu, smu_context 423 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_clock_by_type_with_voltage)(struct smu_context *smu, smu_context 428 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_power_profile_mode)(struct smu_context *smu, char *buf); smu_context 429 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size); smu_context 430 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*dpm_set_uvd_enable)(struct smu_context *smu, bool enable); smu_context 431 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*dpm_set_vce_enable)(struct smu_context *smu, bool enable); smu_context 432 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor, smu_context 434 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*pre_display_config_changed)(struct smu_context *smu); smu_context 435 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*display_config_changed)(struct smu_context *smu); smu_context 436 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*apply_clocks_adjust_rules)(struct smu_context *smu); smu_context 437 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*notify_smc_dispaly_config)(struct smu_context *smu); smu_context 438 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*force_dpm_limit_value)(struct smu_context *smu, bool highest); smu_context 439 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*unforce_dpm_levels)(struct smu_context *smu); smu_context 440 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_profiling_clk_mask)(struct smu_context *smu, smu_context 445 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_cpu_power_state)(struct smu_context *smu); smu_context 446 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h bool (*is_dpm_running)(struct smu_context *smu); smu_context 447 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*tables_init)(struct smu_context *smu, struct smu_table *tables); smu_context 448 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_thermal_fan_table)(struct smu_context *smu); smu_context 449 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_fan_speed_percent)(struct smu_context *smu, uint32_t *speed); smu_context 450 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_fan_speed_rpm)(struct smu_context *smu, uint32_t *speed); smu_context 451 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_watermarks_table)(struct smu_context *smu, void *watermarks, smu_context 453 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_current_clk_freq_by_table)(struct smu_context *smu, smu_context 456 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_thermal_temperature_range)(struct smu_context *smu, struct smu_temperature_range *range); smu_context 457 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states); smu_context 458 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_default_od_settings)(struct smu_context *smu, bool initialize); smu_context 459 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_performance_level)(struct smu_context *smu, enum amd_dpm_forced_level level); smu_context 460 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*display_disable_memory_clock_switch)(struct smu_context *smu, bool disable_memory_clock_switch); smu_context 461 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h void (*dump_pptable)(struct smu_context *smu); smu_context 462 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_power_limit)(struct smu_context *smu, uint32_t *limit, bool asic_default); smu_context 463 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_dpm_uclk_limited)(struct smu_context *smu, uint32_t *clock, bool max); smu_context 468 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*init_microcode)(struct smu_context *smu); smu_context 469 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*init_smc_tables)(struct smu_context *smu); smu_context 470 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*fini_smc_tables)(struct smu_context *smu); smu_context 471 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*init_power)(struct smu_context *smu); smu_context 472 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*fini_power)(struct smu_context *smu); smu_context 473 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*load_microcode)(struct smu_context *smu); smu_context 474 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*check_fw_status)(struct smu_context *smu); smu_context 475 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*setup_pptable)(struct smu_context *smu); smu_context 476 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_vbios_bootup_values)(struct smu_context *smu); smu_context 477 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_clk_info_from_vbios)(struct smu_context *smu); smu_context 478 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*check_pptable)(struct smu_context *smu); smu_context 479 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*parse_pptable)(struct smu_context *smu); smu_context 480 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*populate_smc_tables)(struct smu_context *smu); smu_context 481 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*check_fw_version)(struct smu_context *smu); smu_context 482 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*powergate_sdma)(struct smu_context *smu, bool gate); smu_context 483 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*powergate_vcn)(struct smu_context *smu, bool gate); smu_context 484 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_gfx_cgpg)(struct smu_context *smu, bool enable); smu_context 485 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*write_pptable)(struct smu_context *smu); smu_context 486 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_min_dcef_deep_sleep)(struct smu_context *smu); smu_context 487 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_tool_table_location)(struct smu_context *smu); smu_context 488 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*notify_memory_pool_location)(struct smu_context *smu); smu_context 489 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*write_watermarks_table)(struct smu_context *smu); smu_context 490 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_last_dcef_min_deep_sleep_clk)(struct smu_context *smu); smu_context 491 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*system_features_control)(struct smu_context *smu, bool en); smu_context 492 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*send_smc_msg)(struct smu_context *smu, uint16_t msg); smu_context 493 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*send_smc_msg_with_param)(struct smu_context *smu, uint16_t msg, uint32_t param); smu_context 494 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*read_smc_arg)(struct smu_context *smu, uint32_t *arg); smu_context 495 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*init_display_count)(struct smu_context *smu, uint32_t count); smu_context 496 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_allowed_mask)(struct smu_context *smu); smu_context 497 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num); smu_context 498 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*notify_display_change)(struct smu_context *smu); smu_context 499 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_power_limit)(struct smu_context *smu, uint32_t n); smu_context 500 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_current_clk_freq)(struct smu_context *smu, enum smu_clk_type clk_id, uint32_t *value); smu_context 501 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*init_max_sustainable_clocks)(struct smu_context *smu); smu_context 502 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*start_thermal_control)(struct smu_context *smu); smu_context 503 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor, smu_context 505 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_deep_sleep_dcefclk)(struct smu_context *smu, uint32_t clk); smu_context 506 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_active_display_count)(struct smu_context *smu, uint32_t count); smu_context 507 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*store_cc6_data)(struct smu_context *smu, uint32_t separation_time, smu_context 510 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_clock_by_type)(struct smu_context *smu, smu_context 513 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_max_high_clocks)(struct smu_context *smu, smu_context 515 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*display_clock_voltage_request)(struct smu_context *smu, struct smu_context 518 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_dal_power_level)(struct smu_context *smu, smu_context 520 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_perf_level)(struct smu_context *smu, smu_context 523 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_current_shallow_sleep_clocks)(struct smu_context *smu, smu_context 525 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*notify_smu_enable_pwe)(struct smu_context *smu); smu_context 526 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_watermarks_for_clock_ranges)(struct smu_context *smu, smu_context 529 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h uint32_t (*get_fan_control_mode)(struct smu_context *smu); smu_context 530 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_fan_control_mode)(struct smu_context *smu, uint32_t mode); smu_context 531 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_fan_speed_percent)(struct smu_context *smu, uint32_t speed); smu_context 532 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_fan_speed_rpm)(struct smu_context *smu, uint32_t speed); smu_context 533 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_xgmi_pstate)(struct smu_context *smu, uint32_t pstate); smu_context 534 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*gfx_off_control)(struct smu_context *smu, bool enable); smu_context 535 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*register_irq_handler)(struct smu_context *smu); smu_context 536 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*set_azalia_d3_pme)(struct smu_context *smu); smu_context 537 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_max_sustainable_clocks_by_dc)(struct smu_context *smu, struct pp_smu_nv_clock_table *max_clocks); smu_context 538 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h bool (*baco_is_support)(struct smu_context *smu); smu_context 539 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h enum smu_baco_state (*baco_get_state)(struct smu_context *smu); smu_context 540 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*baco_set_state)(struct smu_context *smu, enum smu_baco_state state); smu_context 541 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*baco_reset)(struct smu_context *smu); smu_context 542 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_dpm_ultimate_freq)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max); smu_context 771 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table, smu_context 780 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_feature_init_dpm(struct smu_context *smu); smu_context 782 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_feature_is_enabled(struct smu_context *smu, smu_context 784 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_feature_set_enabled(struct smu_context *smu, smu_context 786 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_feature_is_supported(struct smu_context *smu, smu_context 788 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_feature_set_supported(struct smu_context *smu, smu_context 791 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int argument, smu_context 796 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_reset(struct smu_context *smu); smu_context 797 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_common_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, smu_context 799 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_sys_get_pp_table(struct smu_context *smu, void **table); smu_context 800 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_sys_set_pp_table(struct smu_context *smu, void *buf, size_t size); smu_context 801 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_get_power_num_states(struct smu_context *smu, struct pp_states_info *state_info); smu_context 802 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu); smu_context 805 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_display_configuration_change(struct smu_context *smu, const smu_context 808 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_get_current_clocks(struct smu_context *smu, smu_context 810 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_dpm_set_power_gate(struct smu_context *smu,uint32_t block_type, bool gate); smu_context 811 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h extern int smu_handle_task(struct smu_context *smu, smu_context 814 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_switch_power_profile(struct smu_context *smu, smu_context 817 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_get_smc_version(struct smu_context *smu, uint32_t *if_version, uint32_t *smu_version); smu_context 818 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_get_dpm_freq_by_index(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 820 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_get_dpm_level_count(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 822 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 824 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 826 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 828 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu); smu_context 829 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level); smu_context 830 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_set_display_count(struct smu_context *smu, uint32_t count); smu_context 831 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type); smu_context 832 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_feature_update_enable_state(struct smu_context *smu, uint64_t feature_mask, bool enabled); smu_context 833 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h const char *smu_get_message_name(struct smu_context *smu, enum smu_message_type type); smu_context 834 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h const char *smu_get_feature_name(struct smu_context *smu, enum smu_feature_mask feature); smu_context 835 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf); smu_context 836 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int smu_sys_set_pp_feature_mask(struct smu_context *smu, uint64_t new_mask); smu_context 133 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h void smu_v11_0_set_smu_funcs(struct smu_context *smu); smu_context 40 drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h void smu_v12_0_set_smu_funcs(struct smu_context *smu); smu_context 212 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_smu_msg_index(struct smu_context *smc, uint32_t index) smu_context 227 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_smu_clk_index(struct smu_context *smc, uint32_t index) smu_context 242 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_smu_feature_index(struct smu_context *smc, uint32_t index) smu_context 257 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_smu_table_index(struct smu_context *smc, uint32_t index) smu_context 272 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_pwr_src_index(struct smu_context *smc, uint32_t index) smu_context 288 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER_PROFILE profile) smu_context 303 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static bool is_asic_secure(struct smu_context *smu) smu_context 319 drivers/gpu/drm/amd/powerplay/navi10_ppt.c navi10_get_allowed_feature_mask(struct smu_context *smu, smu_context 392 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_check_powerplay_table(struct smu_context *smu) smu_context 397 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_append_powerplay_table(struct smu_context *smu) smu_context 493 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_store_powerplay_table(struct smu_context *smu) smu_context 518 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_tables_init(struct smu_context *smu, struct smu_table *tables) smu_context 544 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_metrics_table(struct smu_context *smu, smu_context 568 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_allocate_dpm_context(struct smu_context *smu) smu_context 585 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_set_default_dpm_table(struct smu_context *smu) smu_context 624 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_dpm_set_uvd_enable(struct smu_context *smu, bool enable) smu_context 650 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_current_clk_freq_by_table(struct smu_context *smu, smu_context 670 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static bool navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum smu_clk_type clk_type) smu_context 683 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_print_clk_levels(struct smu_context *smu, smu_context 747 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_force_clk_levels(struct smu_context *smu, smu_context 790 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_populate_umd_state_clk(struct smu_context *smu) smu_context 810 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_clock_by_type_with_latency(struct smu_context *smu, smu_context 844 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_pre_display_config_changed(struct smu_context *smu) smu_context 865 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_display_config_changed(struct smu_context *smu) smu_context 890 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_force_dpm_limit_value(struct smu_context *smu, bool highest) smu_context 917 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_unforce_dpm_levels(struct smu_context *smu) smu_context 943 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_gpu_power(struct smu_context *smu, uint32_t *value) smu_context 960 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_current_activity_percent(struct smu_context *smu, smu_context 989 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static bool navi10_is_dpm_running(struct smu_context *smu) smu_context 1000 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_fan_speed_rpm(struct smu_context *smu, smu_context 1018 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_fan_speed_percent(struct smu_context *smu, smu_context 1036 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_power_profile_mode(struct smu_context *smu, char *buf) smu_context 1133 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) smu_context 1212 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_profiling_clk_mask(struct smu_context *smu, smu_context 1253 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_notify_smc_dispaly_config(struct smu_context *smu) smu_context 1292 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_set_watermarks_table(struct smu_context *smu, smu_context 1352 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_thermal_get_temperature(struct smu_context *smu, smu_context 1387 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_read_sensor(struct smu_context *smu, smu_context 1427 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_uclk_dpm_states(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states) smu_context 1456 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_set_peak_clock_by_device(struct smu_context *smu) smu_context 1494 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_set_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) smu_context 1514 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_thermal_temperature_range(struct smu_context *smu, smu_context 1529 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_display_disable_memory_clock_switch(struct smu_context *smu, smu_context 1553 drivers/gpu/drm/amd/powerplay/navi10_ppt.c static int navi10_get_power_limit(struct smu_context *smu, smu_context 1643 drivers/gpu/drm/amd/powerplay/navi10_ppt.c void navi10_set_ppt_funcs(struct smu_context *smu) smu_context 30 drivers/gpu/drm/amd/powerplay/navi10_ppt.h extern void navi10_set_ppt_funcs(struct smu_context *smu); smu_context 113 drivers/gpu/drm/amd/powerplay/renoir_ppt.c static int renoir_get_smu_msg_index(struct smu_context *smc, uint32_t index) smu_context 127 drivers/gpu/drm/amd/powerplay/renoir_ppt.c static int renoir_get_smu_table_index(struct smu_context *smc, uint32_t index) smu_context 141 drivers/gpu/drm/amd/powerplay/renoir_ppt.c static int renoir_tables_init(struct smu_context *smu, struct smu_table *tables) smu_context 163 drivers/gpu/drm/amd/powerplay/renoir_ppt.c static int renoir_get_dpm_uclk_limited(struct smu_context *smu, uint32_t *clock, bool max) smu_context 180 drivers/gpu/drm/amd/powerplay/renoir_ppt.c static int renoir_print_clk_levels(struct smu_context *smu, smu_context 266 drivers/gpu/drm/amd/powerplay/renoir_ppt.c void renoir_set_ppt_funcs(struct smu_context *smu) smu_context 26 drivers/gpu/drm/amd/powerplay/renoir_ppt.h extern void renoir_set_ppt_funcs(struct smu_context *smu); smu_context 56 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_send_msg_without_waiting(struct smu_context *smu, smu_context 64 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_read_arg(struct smu_context *smu, uint32_t *arg) smu_context 72 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_wait_for_response(struct smu_context *smu) smu_context 91 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_send_msg(struct smu_context *smu, uint16_t msg) smu_context 117 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, smu_context 147 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_init_microcode(struct smu_context *smu) smu_context 209 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_load_microcode(struct smu_context *smu) smu_context 247 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_check_fw_status(struct smu_context *smu) smu_context 262 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_check_fw_version(struct smu_context *smu) smu_context 315 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_pptable_v2_0(struct smu_context *smu, void **table, uint32_t *size) smu_context 330 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_pptable_v2_1(struct smu_context *smu, void **table, smu_context 357 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_setup_pptable(struct smu_context *smu) smu_context 406 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_init_dpm_context(struct smu_context *smu) smu_context 416 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_fini_dpm_context(struct smu_context *smu) smu_context 436 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_init_smc_tables(struct smu_context *smu) smu_context 463 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_fini_smc_tables(struct smu_context *smu) smu_context 484 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_init_power(struct smu_context *smu) smu_context 502 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_fini_power(struct smu_context *smu) smu_context 518 drivers/gpu/drm/amd/powerplay/smu_v11_0.c int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu) smu_context 579 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_get_clk_info_from_vbios(struct smu_context *smu) smu_context 676 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_notify_memory_pool_location(struct smu_context *smu) smu_context 722 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_check_pptable(struct smu_context *smu) smu_context 730 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_parse_pptable(struct smu_context *smu) smu_context 754 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_populate_smc_pptable(struct smu_context *smu) smu_context 763 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_write_pptable(struct smu_context *smu) smu_context 774 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_write_watermarks_table(struct smu_context *smu) smu_context 791 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk) smu_context 803 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_min_dcef_deep_sleep(struct smu_context *smu) smu_context 816 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_tool_table_location(struct smu_context *smu) smu_context 834 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_init_display_count(struct smu_context *smu, uint32_t count) smu_context 846 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_allowed_mask(struct smu_context *smu) smu_context 873 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_get_enabled_mask(struct smu_context *smu, smu_context 902 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_system_features_control(struct smu_context *smu, smu_context 928 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_notify_display_change(struct smu_context *smu) smu_context 942 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_get_max_sustainable_clock(struct smu_context *smu, uint32_t *clock, smu_context 986 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_init_max_sustainable_clocks(struct smu_context *smu) smu_context 1070 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_power_limit(struct smu_context *smu, uint32_t n) smu_context 1098 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_get_current_clk_freq(struct smu_context *smu, smu_context 1133 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_thermal_range(struct smu_context *smu, smu_context 1163 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_enable_thermal_alert(struct smu_context *smu) smu_context 1177 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_start_thermal_control(struct smu_context *smu) smu_context 1224 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value) smu_context 1243 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_read_sensor(struct smu_context *smu, smu_context 1281 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_display_clock_voltage_request(struct smu_context *smu, smu_context 1336 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_set_watermarks_for_clock_ranges(struct smu_context *smu, struct smu_context 1355 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable) smu_context 1383 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_get_fan_control_mode(struct smu_context *smu) smu_context 1392 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_auto_fan_control(struct smu_context *smu, bool auto_fan_control) smu_context 1408 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_set_fan_static_mode(struct smu_context *smu, uint32_t mode) smu_context 1423 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_set_fan_speed_percent(struct smu_context *smu, uint32_t speed) smu_context 1452 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_set_fan_control_mode(struct smu_context *smu, smu_context 1479 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_fan_speed_rpm(struct smu_context *smu, smu_context 1511 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_xgmi_pstate(struct smu_context *smu, smu_context 1566 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_register_irq_handler(struct smu_context *smu) smu_context 1598 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu, smu_context 1628 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu) smu_context 1639 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_baco_set_armd3_sequence(struct smu_context *smu, enum smu_v11_0_baco_seq baco_seq) smu_context 1644 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static bool smu_v11_0_baco_is_support(struct smu_context *smu) smu_context 1668 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static enum smu_baco_state smu_v11_0_baco_get_state(struct smu_context *smu) smu_context 1680 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state) smu_context 1704 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_baco_reset(struct smu_context *smu) smu_context 1725 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 1814 drivers/gpu/drm/amd/powerplay/smu_v11_0.c void smu_v11_0_set_smu_funcs(struct smu_context *smu) smu_context 44 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_send_msg_without_waiting(struct smu_context *smu, smu_context 53 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_read_arg(struct smu_context *smu, uint32_t *arg) smu_context 61 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_wait_for_response(struct smu_context *smu) smu_context 80 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_send_msg(struct smu_context *smu, uint16_t msg) smu_context 106 drivers/gpu/drm/amd/powerplay/smu_v12_0.c smu_v12_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, smu_context 135 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_check_fw_status(struct smu_context *smu) smu_context 150 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_check_fw_version(struct smu_context *smu) smu_context 184 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_powergate_sdma(struct smu_context *smu, bool gate) smu_context 195 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_powergate_vcn(struct smu_context *smu, bool gate) smu_context 206 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_set_gfx_cgpg(struct smu_context *smu, bool enable) smu_context 227 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static uint32_t smu_v12_0_get_gfxoff_status(struct smu_context *smu) smu_context 240 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_gfx_off_control(struct smu_context *smu, bool enable) smu_context 273 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_init_smc_tables(struct smu_context *smu) smu_context 291 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_fini_smc_tables(struct smu_context *smu) smu_context 307 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_populate_smc_tables(struct smu_context *smu) smu_context 322 drivers/gpu/drm/amd/powerplay/smu_v12_0.c static int smu_v12_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, smu_context 399 drivers/gpu/drm/amd/powerplay/smu_v12_0.c void smu_v12_0_set_smu_funcs(struct smu_context *smu) smu_context 226 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_smu_table_index(struct smu_context *smc, uint32_t index) smu_context 241 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_pwr_src_index(struct smu_context *smc, uint32_t index) smu_context 256 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_smu_feature_index(struct smu_context *smc, uint32_t index) smu_context 271 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_smu_clk_index(struct smu_context *smc, uint32_t index) smu_context 286 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_smu_msg_index(struct smu_context *smc, uint32_t index) smu_context 301 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER_PROFILE profile) smu_context 316 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_tables_init(struct smu_context *smu, struct smu_table *tables) smu_context 342 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_allocate_dpm_context(struct smu_context *smu) smu_context 377 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_setup_od8_information(struct smu_context *smu) smu_context 453 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_store_powerplay_table(struct smu_context *smu) smu_context 472 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_append_powerplay_table(struct smu_context *smu) smu_context 563 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_check_powerplay_table(struct smu_context *smu) smu_context 583 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_run_btc_afll(struct smu_context *smu) smu_context 590 drivers/gpu/drm/amd/powerplay/vega20_ppt.c vega20_get_allowed_feature_mask(struct smu_context *smu, smu_context 628 drivers/gpu/drm/amd/powerplay/vega20_ppt.c amd_pm_state_type vega20_get_current_power_state(struct smu_context *smu) smu_context 661 drivers/gpu/drm/amd/powerplay/vega20_ppt.c vega20_set_single_dpm_table(struct smu_context *smu, smu_context 711 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_set_default_dpm_table(struct smu_context *smu) smu_context 896 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_populate_umd_state_clk(struct smu_context *smu) smu_context 922 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_clk_table(struct smu_context *smu, smu_context 940 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_print_clk_levels(struct smu_context *smu, smu_context 1183 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_upload_dpm_level(struct smu_context *smu, bool max, smu_context 1271 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_force_clk_levels(struct smu_context *smu, smu_context 1443 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_clock_by_type_with_latency(struct smu_context *smu, smu_context 1481 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_overdrive_get_gfx_clk_base_voltage(struct smu_context *smu, smu_context 1501 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_set_default_od8_setttings(struct smu_context *smu) smu_context 1688 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_metrics_table(struct smu_context *smu, smu_context 1712 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_set_default_od_settings(struct smu_context *smu, smu_context 1749 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_od_percentage(struct smu_context *smu, smu_context 1785 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_power_profile_mode(struct smu_context *smu, char *buf) smu_context 1896 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) smu_context 1986 drivers/gpu/drm/amd/powerplay/vega20_ppt.c vega20_get_profiling_clk_mask(struct smu_context *smu, smu_context 2030 drivers/gpu/drm/amd/powerplay/vega20_ppt.c vega20_set_uclk_to_highest_dpm_level(struct smu_context *smu, smu_context 2062 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_pre_display_config_changed(struct smu_context *smu) smu_context 2078 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_display_config_changed(struct smu_context *smu) smu_context 2103 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_apply_clocks_adjust_rules(struct smu_context *smu) smu_context 2251 drivers/gpu/drm/amd/powerplay/vega20_ppt.c vega20_notify_smc_dispaly_config(struct smu_context *smu) smu_context 2340 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_force_dpm_limit_value(struct smu_context *smu, bool highest) smu_context 2391 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_unforce_dpm_levels(struct smu_context *smu) smu_context 2434 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_update_specified_od8_value(struct smu_context *smu, smu_context 2511 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_update_od8_settings(struct smu_context *smu, smu_context 2539 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_set_od_percentage(struct smu_context *smu, smu_context 2612 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_odn_edit_dpm_table(struct smu_context *smu, smu_context 2842 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_dpm_set_uvd_enable(struct smu_context *smu, bool enable) smu_context 2853 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_dpm_set_vce_enable(struct smu_context *smu, bool enable) smu_context 2864 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static bool vega20_is_dpm_running(struct smu_context *smu) smu_context 2875 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_set_thermal_fan_table(struct smu_context *smu) smu_context 2887 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_fan_speed_rpm(struct smu_context *smu, smu_context 2904 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_fan_speed_percent(struct smu_context *smu, smu_context 2921 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_gpu_power(struct smu_context *smu, uint32_t *value) smu_context 2947 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_current_activity_percent(struct smu_context *smu, smu_context 2976 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_thermal_get_temperature(struct smu_context *smu, smu_context 3018 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_read_sensor(struct smu_context *smu, smu_context 3060 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_set_watermarks_table(struct smu_context *smu, smu_context 3120 drivers/gpu/drm/amd/powerplay/vega20_ppt.c static int vega20_get_thermal_temperature_range(struct smu_context *smu, smu_context 3192 drivers/gpu/drm/amd/powerplay/vega20_ppt.c void vega20_set_ppt_funcs(struct smu_context *smu) smu_context 177 drivers/gpu/drm/amd/powerplay/vega20_ppt.h extern void vega20_set_ppt_funcs(struct smu_context *smu);