smu7_power_state  112 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c static struct smu7_power_state *cast_phw_smu7_power_state(
smu7_power_state  119 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	return (struct smu7_power_state *)hw_ps;
smu7_power_state  122 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c static const struct smu7_power_state *cast_const_phw_smu7_power_state(
smu7_power_state  129 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	return (const struct smu7_power_state *)hw_ps;
smu7_power_state 2851 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	return sizeof(struct smu7_power_state);
smu7_power_state 2888 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state *smu7_ps =
smu7_power_state 3017 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state  *smu7_ps;
smu7_power_state 3039 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state  *smu7_ps;
smu7_power_state 3062 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state *ps = (struct smu7_power_state *)hw_ps;
smu7_power_state 3123 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state  *smu7_power_state =
smu7_power_state 3124 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			(struct smu7_power_state *)(&(power_state->hardware));
smu7_power_state 3168 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	performance_level = &(smu7_power_state->performance_levels
smu7_power_state 3169 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			[smu7_power_state->performance_level_count++]);
smu7_power_state 3172 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			(smu7_power_state->performance_level_count < smum_get_mac_definition(hwmgr, SMU_MAX_LEVELS_GRAPHICS)),
smu7_power_state 3177 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			(smu7_power_state->performance_level_count <=
smu7_power_state 3196 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	performance_level = &(smu7_power_state->performance_levels
smu7_power_state 3197 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			[smu7_power_state->performance_level_count++]);
smu7_power_state 3220 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state *ps;
smu7_power_state 3229 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	ps = (struct smu7_power_state *)(&state->hardware);
smu7_power_state 3323 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state  *ps = cast_phw_smu7_power_state(power_state);
smu7_power_state 3365 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state *ps;
smu7_power_state 3374 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	ps = (struct smu7_power_state *)(&state->hardware);
smu7_power_state 3596 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	const struct smu7_power_state *smu7_ps =
smu7_power_state 3647 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		const struct smu7_power_state *smu7_ps)
smu7_power_state 3677 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	const struct smu7_power_state *smu7_nps =
smu7_power_state 3679 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	const struct smu7_power_state *polaris10_cps =
smu7_power_state 3824 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		const struct smu7_power_state *smu7_ps)
smu7_power_state 3855 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	const struct smu7_power_state *smu7_ps =
smu7_power_state 3916 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	const struct smu7_power_state *smu7_ps =
smu7_power_state 4198 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	const struct smu7_power_state *psa;
smu7_power_state 4199 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	const struct smu7_power_state *psb;
smu7_power_state 4588 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state  *smu7_ps;
smu7_power_state 4630 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct smu7_power_state  *smu7_ps;
smu7_power_state 5076 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	const struct smu7_power_state *ps;