smu7_force_clock_level  109 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c static int smu7_force_clock_level(struct pp_hwmgr *hwmgr,
smu7_force_clock_level 2830 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		smu7_force_clock_level(hwmgr, PP_SCLK, 1<<sclk_mask);
smu7_force_clock_level 2831 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		smu7_force_clock_level(hwmgr, PP_MCLK, 1<<mclk_mask);
smu7_force_clock_level 2832 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		smu7_force_clock_level(hwmgr, PP_PCIE, 1<<pcie_mask);
smu7_force_clock_level 4994 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 				smu7_force_clock_level(hwmgr, PP_SCLK, 3 << (level-1));
smu7_force_clock_level 4997 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		smu7_force_clock_level(hwmgr, PP_SCLK, data->dpm_level_enable_mask.sclk_dpm_enable_mask);
smu7_force_clock_level 5143 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	.force_clock_level = smu7_force_clock_level,