CVMX_MIO_BOOT_LOC_ADR  147 arch/mips/cavium-octeon/executive/cvmx-boot-vector.c 		cvmx_write_csr(CVMX_MIO_BOOT_LOC_ADR, i * 8);
CVMX_MIO_BOOT_LOC_ADR  150 arch/mips/cavium-octeon/executive/cvmx-boot-vector.c 	cvmx_write_csr(CVMX_MIO_BOOT_LOC_ADR, 15 * 8);