CVMX_GMXX_TXX_SLOT  110 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c 	cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);
CVMX_GMXX_TXX_SLOT  387 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c 		cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);
CVMX_GMXX_TXX_SLOT  391 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c 		cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);
CVMX_GMXX_TXX_SLOT  395 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c 		cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);
CVMX_GMXX_TXX_SLOT  257 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c 		cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);
CVMX_GMXX_TXX_SLOT  265 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c 		cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);
CVMX_GMXX_TXX_SLOT  273 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c 		cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 512);
CVMX_GMXX_TXX_SLOT  204 arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c 	cvmx_write_csr(CVMX_GMXX_TXX_SLOT(0, interface), 512);