CVMX_CIU_ADDR      16 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_EN2_PPX_IP4(c)		CVMX_CIU_ADDR(0xA400, c, 0x0F, 8)
CVMX_CIU_ADDR      17 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_EN2_PPX_IP4_W1C(c)	CVMX_CIU_ADDR(0xCC00, c, 0x0F, 8)
CVMX_CIU_ADDR      18 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_EN2_PPX_IP4_W1S(c)	CVMX_CIU_ADDR(0xAC00, c, 0x0F, 8)
CVMX_CIU_ADDR      19 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_FUSE			CVMX_CIU_ADDR(0x0728, 0, 0x00, 0)
CVMX_CIU_ADDR      20 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_INT_SUM1		CVMX_CIU_ADDR(0x0108, 0, 0x00, 0)
CVMX_CIU_ADDR      21 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_INTX_EN0(c)		CVMX_CIU_ADDR(0x0200, c, 0x3F, 16)
CVMX_CIU_ADDR      22 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_INTX_EN0_W1C(c)	CVMX_CIU_ADDR(0x2200, c, 0x3F, 16)
CVMX_CIU_ADDR      23 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_INTX_EN0_W1S(c)	CVMX_CIU_ADDR(0x6200, c, 0x3F, 16)
CVMX_CIU_ADDR      24 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_INTX_EN1(c)		CVMX_CIU_ADDR(0x0208, c, 0x3F, 16)
CVMX_CIU_ADDR      25 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_INTX_EN1_W1C(c)	CVMX_CIU_ADDR(0x2208, c, 0x3F, 16)
CVMX_CIU_ADDR      26 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_INTX_EN1_W1S(c)	CVMX_CIU_ADDR(0x6208, c, 0x3F, 16)
CVMX_CIU_ADDR      27 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_INTX_SUM0(c)		CVMX_CIU_ADDR(0x0000, c, 0x3F, 8)
CVMX_CIU_ADDR      28 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_NMI			CVMX_CIU_ADDR(0x0718, 0, 0x00, 0)
CVMX_CIU_ADDR      29 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_PCI_INTA		CVMX_CIU_ADDR(0x0750, 0, 0x00, 0)
CVMX_CIU_ADDR      30 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_PP_BIST_STAT		CVMX_CIU_ADDR(0x07E0, 0, 0x00, 0)
CVMX_CIU_ADDR      31 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_PP_DBG			CVMX_CIU_ADDR(0x0708, 0, 0x00, 0)
CVMX_CIU_ADDR      32 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_PP_RST			CVMX_CIU_ADDR(0x0700, 0, 0x00, 0)
CVMX_CIU_ADDR      33 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_QLM0			CVMX_CIU_ADDR(0x0780, 0, 0x00, 0)
CVMX_CIU_ADDR      34 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_QLM1			CVMX_CIU_ADDR(0x0788, 0, 0x00, 0)
CVMX_CIU_ADDR      35 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_QLM_JTGC		CVMX_CIU_ADDR(0x0768, 0, 0x00, 0)
CVMX_CIU_ADDR      36 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_QLM_JTGD		CVMX_CIU_ADDR(0x0770, 0, 0x00, 0)
CVMX_CIU_ADDR      37 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_SOFT_BIST		CVMX_CIU_ADDR(0x0738, 0, 0x00, 0)
CVMX_CIU_ADDR      38 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_SOFT_PRST1		CVMX_CIU_ADDR(0x0758, 0, 0x00, 0)
CVMX_CIU_ADDR      39 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_SOFT_PRST		CVMX_CIU_ADDR(0x0748, 0, 0x00, 0)
CVMX_CIU_ADDR      40 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_SOFT_RST		CVMX_CIU_ADDR(0x0740, 0, 0x00, 0)
CVMX_CIU_ADDR      41 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_SUM2_PPX_IP4(c)	CVMX_CIU_ADDR(0x8C00, c, 0x0F, 8)
CVMX_CIU_ADDR      42 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_TIM_MULTI_CAST		CVMX_CIU_ADDR(0xC200, 0, 0x00, 0)
CVMX_CIU_ADDR      43 arch/mips/include/asm/octeon/cvmx-ciu-defs.h #define CVMX_CIU_TIMX(c)		CVMX_CIU_ADDR(0x0480, c, 0x0F, 8)
CVMX_CIU_ADDR      48 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x100100600, coreid, 0x0F, 8);
CVMX_CIU_ADDR      50 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x000000680, coreid, 0x0F, 8);
CVMX_CIU_ADDR      56 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x100100400, coreid, 0x0F, 8);
CVMX_CIU_ADDR      58 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x000000600, coreid, 0x0F, 8);
CVMX_CIU_ADDR      65 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x100100200, coreid, 0x0F, 8);
CVMX_CIU_ADDR      69 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x000030000, coreid, 0x0F, 8) -
CVMX_CIU_ADDR      72 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x000000580, coreid, 0x0F, 8);
CVMX_CIU_ADDR      80 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x100100000, coreid, 0x0F, 8);
CVMX_CIU_ADDR      84 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x000020000, coreid, 0x0F, 8) -
CVMX_CIU_ADDR      87 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		return CVMX_CIU_ADDR(0x000000500, coreid, 0x0F, 8);