sirfsoc_rtc_iobrg_readl   34 arch/arm/mach-prima2/pm.c 	pwr_trigger_en_reg = sirfsoc_rtc_iobrg_readl(sirfsoc_pwrc_base +
sirfsoc_rtc_iobrg_readl   46 arch/arm/mach-prima2/pm.c 	u32 sleep_mode = sirfsoc_rtc_iobrg_readl(sirfsoc_pwrc_base +
sirfsoc_rtc_iobrg_readl   78 arch/arm/mach-prima2/rtciobrg.c EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_readl);
sirfsoc_rtc_iobrg_readl  118 arch/arm/mach-prima2/rtciobrg.c 	*val = (u32)sirfsoc_rtc_iobrg_readl(reg);
sirfsoc_rtc_iobrg_readl   33 drivers/input/misc/sirfsoc-onkey.c 	u32 state = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base +
sirfsoc_rtc_iobrg_readl   57 drivers/input/misc/sirfsoc-onkey.c 	int_status = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base +
sirfsoc_rtc_iobrg_readl   75 drivers/input/misc/sirfsoc-onkey.c 	int_mask = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base + PWRC_INT_MASK);
sirfsoc_rtc_iobrg_readl   15 include/linux/rtc/sirfsoc_rtciobrg.h extern u32 sirfsoc_rtc_iobrg_readl(u32 addr);