sii8620_write 240 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, seq[i], seq[i + 1]); sii8620_write 258 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, addr, val); sii8620_write 364 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_MSC_COMMAND_START, sii8620_write 369 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_MSC_COMMAND_START, sii8620_write 374 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_MSC_CMD_OR_OFFSET, msg->reg[1]); sii8620_write 375 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_MSC_COMMAND_START, sii8620_write 789 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_DDC_STATUS, sii8620_write 793 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_DDC_ADDR, 0x50 << 1); sii8620_write 929 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_DIV_CTL_MAIN, rates[i].div); sii8620_write 930 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_HDCP2X_TP1, rates[i].tp1); sii8620_write 962 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST sii8620_write 965 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN); sii8620_write 1010 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_TPI_SC, val); sii8620_write 1114 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_TPI_SC, sii8620_write 1116 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_PKT_FILTER_0, sii8620_write 1124 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_PKT_FILTER_0, sii8620_write 1133 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_TPI_INFO_FSEL, BIT_TPI_INFO_FSEL_EN sii8620_write 1150 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_RX_HDMI_CTRL2, sii8620_write 1152 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_TPI_SC, 0); sii8620_write 1411 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_EMSCINTR, reg); sii8620_write 1412 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_EMSCINTRMASK, BIT_EMSCINTR_SPI_DVLD); sii8620_write 1450 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_M3_CTRL, VAL_M3_CTRL_MHL3_VALUE); sii8620_write 1481 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_CBUS3_CNVT, 0x85); sii8620_write 1636 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_CBUS_DISC_INTR0, stat); sii8620_write 1644 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_MDT_RCV_CTRL, BIT_MDT_RCV_CTRL_MDT_RCV_EN | sii8620_write 1663 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_MDT_XMIT_CTRL, 0); sii8620_write 1665 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_MDT_INT_0, stat); sii8620_write 1676 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_INTR9_MASK, BIT_INTR9_DEVCAP_DONE sii8620_write 1749 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_MDT_XMIT_CTRL, BIT_MDT_XMIT_CTRL_EN sii8620_write 1859 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_CBUS_INT_0, stat & ~BIT_CBUS_HPD_CHG); sii8620_write 1865 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_CBUS_INT_0, BIT_CBUS_HPD_CHG); sii8620_write 1912 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_COC_INTR, stat); sii8620_write 1919 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_CBUS_INT_1, stat); sii8620_write 1926 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_INTR9, stat); sii8620_write 1943 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_INTR5, stat); sii8620_write 1973 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_TRXINTH, stat); sii8620_write 1987 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_EMSCINTR, stat); sii8620_write 1995 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_INTR3_MASK, 0); sii8620_write 2002 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_INTR3, stat); sii8620_write 2075 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_DPD,