sii8620_setbits   874 drivers/gpu/drm/bridge/sil-sii8620.c 	sii8620_setbits(ctx, REG_DPD, BIT_DPD_PDNRX12 | BIT_DPD_PDIDCK_N
sii8620_setbits   884 drivers/gpu/drm/bridge/sil-sii8620.c 	sii8620_setbits(ctx, REG_RX_HDMI_CLR_BUFFER,
sii8620_setbits  1018 drivers/gpu/drm/bridge/sil-sii8620.c 		sii8620_setbits(ctx, REG_M3_P0CTRL,
sii8620_setbits  1203 drivers/gpu/drm/bridge/sil-sii8620.c 		sii8620_setbits(ctx, REG_M3_P0CTRL,
sii8620_setbits  1206 drivers/gpu/drm/bridge/sil-sii8620.c 		sii8620_setbits(ctx, REG_M3_POSTM, MSK_M3_POSTM_RRP_DECODE,
sii8620_setbits  1222 drivers/gpu/drm/bridge/sil-sii8620.c 	sii8620_setbits(ctx, REG_EDID_CTRL, BIT_EDID_CTRL_EDID_PRIME_VALID, 0);
sii8620_setbits  1231 drivers/gpu/drm/bridge/sil-sii8620.c 	sii8620_setbits(ctx, REG_TMDS_CSTAT_P3,
sii8620_setbits  1360 drivers/gpu/drm/bridge/sil-sii8620.c 	sii8620_setbits(ctx, REG_LM_DDC, BIT_LM_DDC_SW_TPI_EN_DISABLED, 0);
sii8620_setbits  1404 drivers/gpu/drm/bridge/sil-sii8620.c 	sii8620_setbits(ctx, REG_GENCTL, BIT_GENCTL_EMSC_EN
sii8620_setbits  1407 drivers/gpu/drm/bridge/sil-sii8620.c 	sii8620_setbits(ctx, REG_GENCTL, BIT_GENCTL_CLR_EMSC_RFIFO
sii8620_setbits  1409 drivers/gpu/drm/bridge/sil-sii8620.c 	sii8620_setbits(ctx, REG_COMMECNT, BIT_COMMECNT_I2C_TO_EMSC_EN, ~0);