shift 14 arch/alpha/include/uapi/asm/compiler.h # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) shift 15 arch/alpha/include/uapi/asm/compiler.h # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) shift 16 arch/alpha/include/uapi/asm/compiler.h # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) shift 17 arch/alpha/include/uapi/asm/compiler.h # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) shift 18 arch/alpha/include/uapi/asm/compiler.h # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) shift 19 arch/alpha/include/uapi/asm/compiler.h # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) shift 22 arch/alpha/include/uapi/asm/compiler.h # define __kernel_insbl(val, shift) \ shift 24 arch/alpha/include/uapi/asm/compiler.h __asm__("insbl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \ shift 26 arch/alpha/include/uapi/asm/compiler.h # define __kernel_inswl(val, shift) \ shift 28 arch/alpha/include/uapi/asm/compiler.h __asm__("inswl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \ shift 30 arch/alpha/include/uapi/asm/compiler.h # define __kernel_insql(val, shift) \ shift 32 arch/alpha/include/uapi/asm/compiler.h __asm__("insql %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \ shift 34 arch/alpha/include/uapi/asm/compiler.h # define __kernel_inslh(val, shift) \ shift 36 arch/alpha/include/uapi/asm/compiler.h __asm__("inslh %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \ shift 38 arch/alpha/include/uapi/asm/compiler.h # define __kernel_extbl(val, shift) \ shift 40 arch/alpha/include/uapi/asm/compiler.h __asm__("extbl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \ shift 42 arch/alpha/include/uapi/asm/compiler.h # define __kernel_extwl(val, shift) \ shift 44 arch/alpha/include/uapi/asm/compiler.h __asm__("extwl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \ shift 281 arch/alpha/kernel/core_apecs.c int shift; shift 287 arch/alpha/kernel/core_apecs.c shift = (where & 3) * 8; shift 289 arch/alpha/kernel/core_apecs.c *value = conf_read(addr, type1) >> (shift); shift 215 arch/alpha/kernel/core_cia.c int shift; shift 221 arch/alpha/kernel/core_cia.c shift = (where & 3) * 8; shift 223 arch/alpha/kernel/core_cia.c *value = conf_read(addr, type1) >> (shift); shift 207 arch/alpha/kernel/core_lca.c int shift; shift 212 arch/alpha/kernel/core_lca.c shift = (where & 3) * 8; shift 215 arch/alpha/kernel/core_lca.c *value = conf_read(addr) >> (shift); shift 289 arch/alpha/kernel/core_t2.c int shift; shift 296 arch/alpha/kernel/core_t2.c shift = (where & 3) * 8; shift 298 arch/alpha/kernel/core_t2.c *value = conf_read(addr, type1) >> (shift); shift 1242 arch/alpha/kernel/osf_sys.c int shift; /* interval duration (s) (shift) (ro) */ shift 40 arch/alpha/kernel/pci-sysfs.c int shift = sparse ? 5 : 0; shift 44 arch/alpha/kernel/pci-sysfs.c size = ((pci_resource_len(pdev, num) - 1) >> (PAGE_SHIFT - shift)) + 1; shift 464 arch/arc/kernel/unwind.c unsigned shift; shift 466 arch/arc/kernel/unwind.c for (shift = 0, value = 0; cur < end; shift += 7) { shift 467 arch/arc/kernel/unwind.c if (shift + 7 > 8 * sizeof(value) shift 468 arch/arc/kernel/unwind.c && (*cur & 0x7fU) >= (1U << (8 * sizeof(value) - shift))) { shift 472 arch/arc/kernel/unwind.c value |= (uleb128_t) (*cur & 0x7f) << shift; shift 485 arch/arc/kernel/unwind.c unsigned shift; shift 487 arch/arc/kernel/unwind.c for (shift = 0, value = 0; cur < end; shift += 7) { shift 488 arch/arc/kernel/unwind.c if (shift + 7 > 8 * sizeof(value) shift 489 arch/arc/kernel/unwind.c && (*cur & 0x7fU) >= (1U << (8 * sizeof(value) - shift))) { shift 493 arch/arc/kernel/unwind.c value |= (sleb128_t) (*cur & 0x7f) << shift; shift 495 arch/arc/kernel/unwind.c value |= -(*cur++ & 0x40) << shift; shift 180 arch/arm/common/it8152.c int shift; shift 182 arch/arm/common/it8152.c shift = (where & 3); shift 185 arch/arm/common/it8152.c v = (__raw_readl(IT8152_PCI_CFG_DATA) >> (8 * (shift))); shift 198 arch/arm/common/it8152.c int shift; shift 205 arch/arm/common/it8152.c shift = (where & 3); shift 211 arch/arm/common/it8152.c vtemp &= ~(mask << (8 * shift)); shift 215 arch/arm/common/it8152.c v = (value << (8 * shift)); shift 324 arch/arm/kernel/vdso.c tk->tkr_mono.shift); shift 333 arch/arm/kernel/vdso.c vdso_data->cs_shift = tk->tkr_mono.shift; shift 40 arch/arm/lib/delay.c static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) shift 42 arch/arm/lib/delay.c return (cyc * mult) >> shift; shift 62 arch/arm/mach-bcm/bcm63xx_pmb.c u32 shift, u32 mask, u32 cond) shift 76 arch/arm/mach-bcm/bcm63xx_pmb.c } while (((*val >> shift) & mask) != cond); shift 91 arch/arm/mach-cns3xxx/pcie.c int shift = (where % 4) * 8; shift 102 arch/arm/mach-cns3xxx/pcie.c *val = ((((*val << shift) & 0xff) | (0x604 << 16)) >> shift) & mask; shift 218 arch/arm/mach-cns3xxx/pcie.c int shift = (where % 4) * 8; shift 222 arch/arm/mach-cns3xxx/pcie.c v &= ~(mask << shift); shift 223 arch/arm/mach-cns3xxx/pcie.c v |= (val & mask) << shift; shift 82 arch/arm/mach-imx/iomux-v1.c unsigned long shift = (pin & 0xf) << 1; shift 83 arch/arm/mach-imx/iomux-v1.c unsigned long mask = 3 << shift; shift 84 arch/arm/mach-imx/iomux-v1.c unsigned long value = ocr << shift; shift 93 arch/arm/mach-imx/iomux-v1.c unsigned long shift = (pin & 0xf) << 1; shift 94 arch/arm/mach-imx/iomux-v1.c unsigned long mask = 3 << shift; shift 95 arch/arm/mach-imx/iomux-v1.c unsigned long value = aout << shift; shift 104 arch/arm/mach-imx/iomux-v1.c unsigned long shift = (pin & 0xf) << 1; shift 105 arch/arm/mach-imx/iomux-v1.c unsigned long mask = 3 << shift; shift 106 arch/arm/mach-imx/iomux-v1.c unsigned long value = bout << shift; shift 141 arch/arm/mach-omap2/prm.h int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset); shift 142 arch/arm/mach-omap2/prm.h int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod, shift 144 arch/arm/mach-omap2/prm.h int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod, shift 155 arch/arm/mach-omap2/prm.h int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset); shift 156 arch/arm/mach-omap2/prm.h int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod, shift 158 arch/arm/mach-omap2/prm.h int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset); shift 33 arch/arm/mach-omap2/prm2xxx_3xxx.c int omap2_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset) shift 36 arch/arm/mach-omap2/prm2xxx_3xxx.c (1 << shift)); shift 53 arch/arm/mach-omap2/prm2xxx_3xxx.c int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset) shift 57 arch/arm/mach-omap2/prm2xxx_3xxx.c mask = 1 << shift; shift 100 arch/arm/mach-omap2/prm2xxx_3xxx.h int omap2_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset); shift 101 arch/arm/mach-omap2/prm2xxx_3xxx.h int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, shift 67 arch/arm/mach-omap2/prm33xx.c static int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst, shift 73 arch/arm/mach-omap2/prm33xx.c v &= 1 << shift; shift 74 arch/arm/mach-omap2/prm33xx.c v >>= shift; shift 93 arch/arm/mach-omap2/prm33xx.c static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst, shift 96 arch/arm/mach-omap2/prm33xx.c u32 mask = 1 << shift; shift 122 arch/arm/mach-omap2/prm33xx.c static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, shift 130 arch/arm/mach-omap2/prm33xx.c if (am33xx_prm_is_hardreset_asserted(shift, 0, inst, rstctrl_offs) == 0) shift 137 arch/arm/mach-omap2/prm33xx.c mask = 1 << shift; shift 436 arch/arm/mach-omap2/prm_common.c int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset) shift 444 arch/arm/mach-omap2/prm_common.c return prm_ll_data->assert_hardreset(shift, part, prm_mod, offset); shift 458 arch/arm/mach-omap2/prm_common.c int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod, shift 467 arch/arm/mach-omap2/prm_common.c return prm_ll_data->deassert_hardreset(shift, st_shift, part, prm_mod, shift 480 arch/arm/mach-omap2/prm_common.c int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset) shift 488 arch/arm/mach-omap2/prm_common.c return prm_ll_data->is_hardreset_asserted(shift, part, prm_mod, offset); shift 99 arch/arm/mach-omap2/prminst44xx.c int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, shift 105 arch/arm/mach-omap2/prminst44xx.c v &= 1 << shift; shift 106 arch/arm/mach-omap2/prminst44xx.c v >>= shift; shift 123 arch/arm/mach-omap2/prminst44xx.c int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, shift 126 arch/arm/mach-omap2/prminst44xx.c u32 mask = 1 << shift; shift 152 arch/arm/mach-omap2/prminst44xx.c int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst, shift 156 arch/arm/mach-omap2/prminst44xx.c u32 mask = 1 << shift; shift 160 arch/arm/mach-omap2/prminst44xx.c if (omap4_prminst_is_hardreset_asserted(shift, part, inst, shift 27 arch/arm/mach-omap2/prminst44xx.h extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, shift 29 arch/arm/mach-omap2/prminst44xx.h extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, shift 31 arch/arm/mach-omap2/prminst44xx.h int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, shift 487 arch/arm/mach-omap2/vc.c static u32 omap4_usec_to_val_scrm(u32 usec, int shift, u32 mask) shift 491 arch/arm/mach-omap2/vc.c val = omap_usec_to_32k(usec) << shift; shift 102 arch/arm/mach-s3c24xx/iotiming-s3c2410.c unsigned long *v, int shift) shift 108 arch/arm/mach-s3c24xx/iotiming-s3c2410.c __func__, cyc, hclk_tns, shift, div); shift 128 arch/arm/mach-s3c24xx/iotiming-s3c2410.c *v |= val << shift; shift 283 arch/arm/mach-s3c64xx/common.c int shift; shift 327 arch/arm/mach-s3c64xx/common.c shift = (offs / 2) * 4; shift 329 arch/arm/mach-s3c64xx/common.c shift = ((offs - 16) / 2) * 4; shift 330 arch/arm/mach-s3c64xx/common.c mask = 0x7 << shift; shift 334 arch/arm/mach-s3c64xx/common.c ctrl |= newvalue << shift; shift 154 arch/arm/mach-spear/time.c .shift = 0, /* to be computed */ shift 157 arch/arm/plat-omap/dma.c int shift = ((req - 1) % 5) * 6; shift 161 arch/arm/plat-omap/dma.c l &= ~(0x3f << shift); shift 162 arch/arm/plat-omap/dma.c l |= (dev - 1) << shift; shift 49 arch/arm/plat-orion/mpp.c int shift, gpio_mode; shift 63 arch/arm/plat-orion/mpp.c shift = (num & 7) << 2; shift 64 arch/arm/plat-orion/mpp.c mpp_ctrl[num / 8] &= ~(0xf << shift); shift 65 arch/arm/plat-orion/mpp.c mpp_ctrl[num / 8] |= sel << shift; shift 44 arch/arm/plat-samsung/gpio-samsung.c int shift = off * 2; shift 48 arch/arm/plat-samsung/gpio-samsung.c pup &= ~(3 << shift); shift 49 arch/arm/plat-samsung/gpio-samsung.c pup |= pull << shift; shift 59 arch/arm/plat-samsung/gpio-samsung.c int shift = off * 2; shift 62 arch/arm/plat-samsung/gpio-samsung.c pup >>= shift; shift 179 arch/arm/plat-samsung/gpio-samsung.c unsigned int shift = off * 2; shift 187 arch/arm/plat-samsung/gpio-samsung.c cfg <<= shift; shift 191 arch/arm/plat-samsung/gpio-samsung.c con &= ~(0x3 << shift); shift 242 arch/arm/plat-samsung/gpio-samsung.c unsigned int shift = (off & 7) * 4; shift 250 arch/arm/plat-samsung/gpio-samsung.c cfg <<= shift; shift 254 arch/arm/plat-samsung/gpio-samsung.c con &= ~(0xf << shift); shift 277 arch/arm/plat-samsung/gpio-samsung.c unsigned int shift = (off & 7) * 4; shift 284 arch/arm/plat-samsung/gpio-samsung.c con >>= shift; shift 307 arch/arm/plat-samsung/gpio-samsung.c unsigned int shift = off; shift 318 arch/arm/plat-samsung/gpio-samsung.c cfg <<= shift; shift 322 arch/arm/plat-samsung/gpio-samsung.c con &= ~(0x1 << shift); shift 9 arch/arm/vfp/vfp.h static inline u32 vfp_shiftright32jamming(u32 val, unsigned int shift) shift 11 arch/arm/vfp/vfp.h if (shift) { shift 12 arch/arm/vfp/vfp.h if (shift < 32) shift 13 arch/arm/vfp/vfp.h val = val >> shift | ((val << (32 - shift)) != 0); shift 20 arch/arm/vfp/vfp.h static inline u64 vfp_shiftright64jamming(u64 val, unsigned int shift) shift 22 arch/arm/vfp/vfp.h if (shift) { shift 23 arch/arm/vfp/vfp.h if (shift < 64) shift 24 arch/arm/vfp/vfp.h val = val >> shift | ((val << (64 - shift)) != 0); shift 73 arch/arm/vfp/vfpdouble.c int exponent, shift, underflow; shift 95 arch/arm/vfp/vfpdouble.c shift = 32 - fls(significand >> 32); shift 96 arch/arm/vfp/vfpdouble.c if (shift == 32) shift 97 arch/arm/vfp/vfpdouble.c shift = 64 - fls(significand); shift 98 arch/arm/vfp/vfpdouble.c if (shift) { shift 99 arch/arm/vfp/vfpdouble.c exponent -= shift; shift 100 arch/arm/vfp/vfpdouble.c significand <<= shift; shift 529 arch/arm/vfp/vfpdouble.c int shift = 1023 + 63 - vdm.exponent; shift 535 arch/arm/vfp/vfpdouble.c d = (vdm.significand << 1) >> shift; shift 536 arch/arm/vfp/vfpdouble.c rem = vdm.significand << (65 - shift); shift 611 arch/arm/vfp/vfpdouble.c int shift = 1023 + 63 - vdm.exponent; /* 58 */ shift 614 arch/arm/vfp/vfpdouble.c d = (vdm.significand << 1) >> shift; shift 615 arch/arm/vfp/vfpdouble.c rem = vdm.significand << (65 - shift); shift 76 arch/arm/vfp/vfpsingle.c int exponent, shift, underflow; shift 102 arch/arm/vfp/vfpsingle.c shift = 32 - fls(significand); shift 103 arch/arm/vfp/vfpsingle.c if (shift < 32 && shift) { shift 104 arch/arm/vfp/vfpsingle.c exponent -= shift; shift 105 arch/arm/vfp/vfpsingle.c significand <<= shift; shift 571 arch/arm/vfp/vfpsingle.c int shift = 127 + 31 - vsm.exponent; shift 577 arch/arm/vfp/vfpsingle.c d = (vsm.significand << 1) >> shift; shift 578 arch/arm/vfp/vfpsingle.c rem = vsm.significand << (33 - shift); shift 656 arch/arm/vfp/vfpsingle.c int shift = 127 + 31 - vsm.exponent; shift 660 arch/arm/vfp/vfpsingle.c d = (vsm.significand << 1) >> shift; shift 661 arch/arm/vfp/vfpsingle.c rem = vsm.significand << (33 - shift); shift 104 arch/arm/xen/enlighten.c now.tv_nsec = (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); shift 61 arch/arm64/include/asm/cpufeature.h u8 shift; shift 452 arch/arm64/include/asm/cpufeature.h return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift); shift 476 arch/arm64/include/asm/cpufeature.h return (s64)cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width, ftrp->sign); shift 413 arch/arm64/include/asm/insn.h int imm, int shift, shift 419 arch/arm64/include/asm/insn.h int shift, shift 440 arch/arm64/include/asm/insn.h int shift, shift 68 arch/arm64/include/asm/kernel-pgtable.h #define EARLY_ENTRIES(vstart, vend, shift) (((vend) >> (shift)) \ shift 69 arch/arm64/include/asm/kernel-pgtable.h - ((vstart) >> (shift)) + 1 + EARLY_KASLR) shift 91 arch/arm64/kernel/cpufeature.c .shift = SHIFT, \ shift 467 arch/arm64/kernel/cpufeature.c reg |= (ftr_val << ftrp->shift) & mask; shift 232 arch/arm64/kernel/insn.c int shift; shift 237 arch/arm64/kernel/insn.c shift = 0; shift 241 arch/arm64/kernel/insn.c shift = 5; shift 245 arch/arm64/kernel/insn.c shift = 5; shift 249 arch/arm64/kernel/insn.c shift = 5; shift 253 arch/arm64/kernel/insn.c shift = 10; shift 257 arch/arm64/kernel/insn.c shift = 12; shift 261 arch/arm64/kernel/insn.c shift = 15; shift 266 arch/arm64/kernel/insn.c shift = 10; shift 270 arch/arm64/kernel/insn.c shift = 16; shift 274 arch/arm64/kernel/insn.c shift = 22; shift 281 arch/arm64/kernel/insn.c *shiftp = shift; shift 296 arch/arm64/kernel/insn.c int shift; shift 300 arch/arm64/kernel/insn.c shift = 0; shift 307 arch/arm64/kernel/insn.c if (aarch64_get_imm_shift_mask(type, &mask, &shift) < 0) { shift 314 arch/arm64/kernel/insn.c return (insn >> shift) & mask; shift 321 arch/arm64/kernel/insn.c int shift; shift 328 arch/arm64/kernel/insn.c shift = 0; shift 337 arch/arm64/kernel/insn.c if (aarch64_get_imm_shift_mask(type, &mask, &shift) < 0) { shift 345 arch/arm64/kernel/insn.c insn &= ~(mask << shift); shift 346 arch/arm64/kernel/insn.c insn |= (imm & mask) << shift; shift 354 arch/arm64/kernel/insn.c int shift; shift 359 arch/arm64/kernel/insn.c shift = 0; shift 362 arch/arm64/kernel/insn.c shift = 5; shift 366 arch/arm64/kernel/insn.c shift = 10; shift 369 arch/arm64/kernel/insn.c shift = 16; shift 377 arch/arm64/kernel/insn.c return (insn >> shift) & GENMASK(4, 0); shift 384 arch/arm64/kernel/insn.c int shift; shift 397 arch/arm64/kernel/insn.c shift = 0; shift 400 arch/arm64/kernel/insn.c shift = 5; shift 404 arch/arm64/kernel/insn.c shift = 10; shift 408 arch/arm64/kernel/insn.c shift = 16; shift 416 arch/arm64/kernel/insn.c insn &= ~(GENMASK(4, 0) << shift); shift 417 arch/arm64/kernel/insn.c insn |= reg << shift; shift 635 arch/arm64/kernel/insn.c int shift; shift 662 arch/arm64/kernel/insn.c shift = 2; shift 670 arch/arm64/kernel/insn.c shift = 3; shift 688 arch/arm64/kernel/insn.c offset >> shift); shift 953 arch/arm64/kernel/insn.c int imm, int shift, shift 981 arch/arm64/kernel/insn.c if (shift != 0 && shift != 16) { shift 983 arch/arm64/kernel/insn.c shift); shift 989 arch/arm64/kernel/insn.c if (shift != 0 && shift != 16 && shift != 32 && shift != 48) { shift 991 arch/arm64/kernel/insn.c shift); shift 1000 arch/arm64/kernel/insn.c insn |= (shift >> 4) << 21; shift 1010 arch/arm64/kernel/insn.c int shift, shift 1036 arch/arm64/kernel/insn.c if (shift & ~(SZ_32 - 1)) { shift 1038 arch/arm64/kernel/insn.c shift); shift 1044 arch/arm64/kernel/insn.c if (shift & ~(SZ_64 - 1)) { shift 1046 arch/arm64/kernel/insn.c shift); shift 1062 arch/arm64/kernel/insn.c return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_6, insn, shift); shift 1204 arch/arm64/kernel/insn.c int shift, shift 1242 arch/arm64/kernel/insn.c if (shift & ~(SZ_32 - 1)) { shift 1244 arch/arm64/kernel/insn.c shift); shift 1250 arch/arm64/kernel/insn.c if (shift & ~(SZ_64 - 1)) { shift 1252 arch/arm64/kernel/insn.c shift); shift 1268 arch/arm64/kernel/insn.c return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_6, insn, shift); shift 1204 arch/arm64/kernel/perf_event.c u32 shift; shift 1213 arch/arm64/kernel/perf_event.c clocks_calc_mult_shift(&userpg->time_mult, &shift, freq, shift 1221 arch/arm64/kernel/perf_event.c if (shift == 32) { shift 1222 arch/arm64/kernel/perf_event.c shift = 31; shift 1225 arch/arm64/kernel/perf_event.c userpg->time_shift = (u16)shift; shift 90 arch/arm64/mm/mmu.c static phys_addr_t __init early_pgtable_alloc(int shift) shift 364 arch/arm64/mm/mmu.c static phys_addr_t __pgd_pgtable_alloc(int shift) shift 374 arch/arm64/mm/mmu.c static phys_addr_t pgd_pgtable_alloc(int shift) shift 376 arch/arm64/mm/mmu.c phys_addr_t pa = __pgd_pgtable_alloc(shift); shift 386 arch/arm64/mm/mmu.c if (shift == PAGE_SHIFT) shift 388 arch/arm64/mm/mmu.c else if (shift == PMD_SHIFT) shift 116 arch/arm64/net/bpf_jit.h #define A64_LSL(sf, Rd, Rn, shift) ({ \ shift 118 arch/arm64/net/bpf_jit.h A64_UBFM(sf, Rd, Rn, (unsigned)-(shift) % sz, sz - 1 - (shift)); \ shift 121 arch/arm64/net/bpf_jit.h #define A64_LSR(sf, Rd, Rn, shift) A64_UBFM(sf, Rd, Rn, shift, (sf) ? 63 : 31) shift 123 arch/arm64/net/bpf_jit.h #define A64_ASR(sf, Rd, Rn, shift) A64_SBFM(sf, Rd, Rn, shift, (sf) ? 63 : 31) shift 130 arch/arm64/net/bpf_jit.h #define A64_MOVEW(sf, Rd, imm16, shift, type) \ shift 131 arch/arm64/net/bpf_jit.h aarch64_insn_gen_movewide(Rd, imm16, shift, \ shift 136 arch/arm64/net/bpf_jit.h #define A64_MOVN(sf, Rd, imm16, shift) A64_MOVEW(sf, Rd, imm16, shift, INVERSE) shift 137 arch/arm64/net/bpf_jit.h #define A64_MOVZ(sf, Rd, imm16, shift) A64_MOVEW(sf, Rd, imm16, shift, ZERO) shift 138 arch/arm64/net/bpf_jit.h #define A64_MOVK(sf, Rd, imm16, shift) A64_MOVEW(sf, Rd, imm16, shift, KEEP) shift 105 arch/arm64/net/bpf_jit_comp.c int shift; shift 111 arch/arm64/net/bpf_jit_comp.c shift = max(round_down((inverse ? (fls64(rev_tmp) - 1) : shift 114 arch/arm64/net/bpf_jit_comp.c emit(A64_MOVN(1, reg, (rev_tmp >> shift) & 0xffff, shift), ctx); shift 116 arch/arm64/net/bpf_jit_comp.c emit(A64_MOVZ(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx); shift 117 arch/arm64/net/bpf_jit_comp.c shift -= 16; shift 118 arch/arm64/net/bpf_jit_comp.c while (shift >= 0) { shift 119 arch/arm64/net/bpf_jit_comp.c if (((nrm_tmp >> shift) & 0xffff) != (inverse ? 0xffff : 0x0000)) shift 120 arch/arm64/net/bpf_jit_comp.c emit(A64_MOVK(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx); shift 121 arch/arm64/net/bpf_jit_comp.c shift -= 16; shift 134 arch/arm64/net/bpf_jit_comp.c int shift = 0; shift 136 arch/arm64/net/bpf_jit_comp.c emit(A64_MOVN(1, reg, ~tmp & 0xffff, shift), ctx); shift 137 arch/arm64/net/bpf_jit_comp.c while (shift < 32) { shift 139 arch/arm64/net/bpf_jit_comp.c shift += 16; shift 140 arch/arm64/net/bpf_jit_comp.c emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx); shift 13 arch/c6x/kernel/module.c static inline int fixup_pcr(u32 *ip, Elf32_Addr dest, u32 maskbits, int shift) shift 23 arch/c6x/kernel/module.c opcode &= ~(mask << shift); shift 24 arch/c6x/kernel/module.c opcode |= ((delta & mask) << shift); shift 70 arch/c6x/platforms/dscr.c u8 shift; /* starting (rightmost) bit in range */ shift 88 arch/c6x/platforms/dscr.c u8 shift; /* starting (rightmost) bit in range */ shift 209 arch/c6x/platforms/dscr.c ctl_shift = ctl->shift + ctl->nbits * (id - ctl->start_id); shift 238 arch/c6x/platforms/dscr.c ctl_shift = stat->shift + stat->nbits * (id - stat->start_id); shift 490 arch/c6x/platforms/dscr.c r->shift = be32_to_cpup(p++); shift 544 arch/c6x/platforms/dscr.c r->shift = be32_to_cpup(p++); shift 482 arch/ia64/hp/common/sba_iommu.c unsigned long shift; shift 492 arch/ia64/hp/common/sba_iommu.c shift = ioc->ibase >> iovp_shift; shift 549 arch/ia64/hp/common/sba_iommu.c shift, shift 576 arch/ia64/hp/common/sba_iommu.c shift, boundary_size); shift 49 arch/ia64/kernel/patch.c unsigned long shift; shift 52 arch/ia64/kernel/patch.c shift = 5 + 41 * (insn_addr % 16); /* 5 bits of template, then 3 x 41-bit instructions */ shift 53 arch/ia64/kernel/patch.c if (shift >= 64) { shift 54 arch/ia64/kernel/patch.c m1 = mask << (shift - 64); shift 55 arch/ia64/kernel/patch.c v1 = val << (shift - 64); shift 57 arch/ia64/kernel/patch.c m0 = mask << shift; m1 = mask >> (64 - shift); shift 58 arch/ia64/kernel/patch.c v0 = val << shift; v1 = val >> (64 - shift); shift 258 arch/ia64/kernel/ptrace.c unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift; shift 279 arch/ia64/kernel/ptrace.c shift = ia64_rse_slot_num(slot0_kaddr); shift 292 arch/ia64/kernel/ptrace.c m = mask << shift; shift 297 arch/ia64/kernel/ptrace.c urnat |= (rnat0 & m) >> shift; shift 299 arch/ia64/kernel/ptrace.c m = mask >> (63 - shift); shift 304 arch/ia64/kernel/ptrace.c urnat |= (rnat1 & m) << (63 - shift); shift 317 arch/ia64/kernel/ptrace.c unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift; shift 353 arch/ia64/kernel/ptrace.c shift = ia64_rse_slot_num(slot0_kaddr); shift 369 arch/ia64/kernel/ptrace.c rnat0 = (urnat << shift); shift 370 arch/ia64/kernel/ptrace.c m = mask << shift; shift 376 arch/ia64/kernel/ptrace.c rnat1 = (urnat >> (63 - shift)); shift 377 arch/ia64/kernel/ptrace.c m = mask >> (63 - shift); shift 192 arch/ia64/kernel/salinfo.c shift1_data_saved (struct salinfo_data *data, int shift) shift 194 arch/ia64/kernel/salinfo.c memcpy(data->data_saved+shift, data->data_saved+shift+1, shift 195 arch/ia64/kernel/salinfo.c (ARRAY_SIZE(data->data_saved) - (shift+1)) * sizeof(data->data_saved[0])); shift 222 arch/ia64/kernel/time.c unsigned long shift = 0, delta; shift 234 arch/ia64/kernel/time.c shift = (2*(cpu - hi) + 1) * delta/hi/2; shift 236 arch/ia64/kernel/time.c local_cpu_data->itm_next = ia64_get_itc() + delta + shift; shift 438 arch/ia64/kernel/time.c fsyscall_gtod_data.clk_shift = tk->tkr_mono.shift; shift 449 arch/ia64/kernel/time.c << tk->tkr_mono.shift); shift 453 arch/ia64/kernel/time.c (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) { shift 455 arch/ia64/kernel/time.c ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift; shift 69 arch/ia64/kernel/unwind_decoder.c unsigned shift = 0; shift 76 arch/ia64/kernel/unwind_decoder.c result |= (byte & 0x7f) << shift; shift 79 arch/ia64/kernel/unwind_decoder.c shift += 7; shift 90 arch/m68k/coldfire/pit.c .shift = 32, shift 67 arch/m68k/emu/nfblock.c int dir, len, shift; shift 71 arch/m68k/emu/nfblock.c shift = dev->bshift; shift 75 arch/m68k/emu/nfblock.c nfhd_read_write(dev->id, 0, dir, sec >> shift, len >> shift, shift 136 arch/m68k/include/asm/page_mm.h int shift; shift 141 arch/m68k/include/asm/page_mm.h : "=d" (shift) shift 143 arch/m68k/include/asm/page_mm.h return shift; shift 65 arch/m68k/math-emu/multi_arith.h int shift; shift 68 arch/m68k/math-emu/multi_arith.h asm ("bfffo %1{#0,#32},%0" : "=d" (shift) : "dm" (reg->mant.m32[0])); shift 69 arch/m68k/math-emu/multi_arith.h reg->mant.m32[0] = (reg->mant.m32[0] << shift) | (reg->mant.m32[1] >> (32 - shift)); shift 70 arch/m68k/math-emu/multi_arith.h reg->mant.m32[1] = (reg->mant.m32[1] << shift); shift 72 arch/m68k/math-emu/multi_arith.h asm ("bfffo %1{#0,#32},%0" : "=d" (shift) : "dm" (reg->mant.m32[1])); shift 73 arch/m68k/math-emu/multi_arith.h reg->mant.m32[0] = (reg->mant.m32[1] << shift); shift 75 arch/m68k/math-emu/multi_arith.h shift += 32; shift 78 arch/m68k/math-emu/multi_arith.h return shift; shift 244 arch/m68k/math-emu/multi_arith.h int shift) shift 248 arch/m68k/math-emu/multi_arith.h switch (shift) { shift 144 arch/microblaze/kernel/timer.c .shift = 8, shift 175 arch/microblaze/kernel/timer.c clockevent_xilinx_timer.shift); shift 211 arch/microblaze/kernel/timer.c .shift = 8, shift 217 arch/microblaze/kernel/timer.c xilinx_cc.shift); shift 362 arch/mips/alchemy/common/clock.c int shift; /* offset in register */ shift 491 arch/mips/alchemy/common/clock.c v |= (1 << 1) << c->shift; shift 501 arch/mips/alchemy/common/clock.c unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 1); shift 513 arch/mips/alchemy/common/clock.c v &= ~((1 << 1) << c->shift); shift 526 arch/mips/alchemy/common/clock.c v |= (1 << c->shift); shift 528 arch/mips/alchemy/common/clock.c v &= ~(1 << c->shift); shift 539 arch/mips/alchemy/common/clock.c return (alchemy_rdsys(c->reg) >> c->shift) & 1; shift 547 arch/mips/alchemy/common/clock.c int sh = c->shift + 2; shift 566 arch/mips/alchemy/common/clock.c unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 2); shift 594 arch/mips/alchemy/common/clock.c v &= ~(3 << c->shift); shift 595 arch/mips/alchemy/common/clock.c v |= (c->parent & 3) << c->shift; shift 617 arch/mips/alchemy/common/clock.c return ((alchemy_rdsys(c->reg) >> c->shift) & 3) != 0; shift 627 arch/mips/alchemy/common/clock.c v &= ~(3 << c->shift); /* set input mux to "disabled" state */ shift 667 arch/mips/alchemy/common/clock.c int sh = c->shift + 2; shift 691 arch/mips/alchemy/common/clock.c int sh = c->shift + 2; shift 776 arch/mips/alchemy/common/clock.c a->shift = 10 * (i < 3 ? i : i - 3); shift 790 arch/mips/alchemy/common/clock.c a->parent = (v >> a->shift) & 3; shift 817 arch/mips/alchemy/common/clock.c return (((v >> c->shift) >> 2) & 7) != 0; shift 824 arch/mips/alchemy/common/clock.c v &= ~((7 << 2) << c->shift); shift 825 arch/mips/alchemy/common/clock.c v |= ((c->parent & 7) << 2) << c->shift; shift 850 arch/mips/alchemy/common/clock.c v &= ~((3 << 2) << c->shift); /* mux to "disabled" state */ shift 881 arch/mips/alchemy/common/clock.c unsigned long v = (alchemy_rdsys(c->reg) >> c->shift) & 3; shift 911 arch/mips/alchemy/common/clock.c v &= ~(3 << c->shift); shift 912 arch/mips/alchemy/common/clock.c v |= (i & 3) << c->shift; shift 1000 arch/mips/alchemy/common/clock.c a->shift = i * 5; shift 1009 arch/mips/alchemy/common/clock.c a->parent = ((v >> a->shift) >> 2) & 7; shift 126 arch/mips/alchemy/common/time.c cd->shift = 32; shift 127 arch/mips/alchemy/common/time.c cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift); shift 159 arch/mips/ar7/clock.c static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock, shift 171 arch/mips/ar7/clock.c switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { shift 205 arch/mips/ar7/clock.c static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, shift 211 arch/mips/ar7/clock.c switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { shift 199 arch/mips/ar7/gpio.c u32 shift; shift 271 arch/mips/ar7/gpio.c mux_status = (readl(pin_sel + pin_sel_reg) >> gpio_cfg.shift) & 0x3; shift 279 arch/mips/ar7/gpio.c tmp |= ((gpio_cfg.func & 0x3) << gpio_cfg.shift); shift 120 arch/mips/cavium-octeon/csrc-octeon.c u64 shift = clocksource_mips.shift; shift 133 arch/mips/cavium-octeon/csrc-octeon.c : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift) shift 91 arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c jtgd.s.shift = 1; shift 99 arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c } while (jtgd.s.shift); shift 317 arch/mips/cavium-octeon/executive/cvmx-l2c.c int shift = CVMX_L2C_TAG_ADDR_ALIAS_SHIFT; shift 319 arch/mips/cavium-octeon/executive/cvmx-l2c.c uint64_t tag = addr >> shift; shift 328 arch/mips/cavium-octeon/executive/cvmx-l2c.c CVMX_CACHE_LTGL2I(index | (way << shift), 0); shift 13 arch/mips/include/asm/mach-ralink/pinmux.h { .name = _name, .mask = _mask, .shift = _shift, \ shift 18 arch/mips/include/asm/mach-ralink/pinmux.h { .name = _name, .mask = _mask, .shift = _shift, \ shift 42 arch/mips/include/asm/mach-ralink/pinmux.h const u32 shift; shift 130 arch/mips/include/asm/octeon/cvmx-ciu-defs.h __BITFIELD_FIELD(uint64_t shift:1, shift 307 arch/mips/include/asm/txx9/tx4938.h void tx4938_ata_init(unsigned int irq, unsigned int shift, int tune); shift 98 arch/mips/kernel/cevt-txx9.c __raw_writel(((u64)(NSEC_PER_SEC / HZ) * evt->mult) >> evt->shift, shift 14 arch/mips/kernel/cmpxchg.c unsigned int shift; shift 28 arch/mips/kernel/cmpxchg.c shift = (unsigned long)ptr & 0x3; shift 30 arch/mips/kernel/cmpxchg.c shift ^= sizeof(u32) - size; shift 31 arch/mips/kernel/cmpxchg.c shift *= BITS_PER_BYTE; shift 32 arch/mips/kernel/cmpxchg.c mask <<= shift; shift 43 arch/mips/kernel/cmpxchg.c new32 = (load32 & ~mask) | (val << shift); shift 47 arch/mips/kernel/cmpxchg.c return (load32 & mask) >> shift; shift 55 arch/mips/kernel/cmpxchg.c unsigned int shift; shift 70 arch/mips/kernel/cmpxchg.c shift = (unsigned long)ptr & 0x3; shift 72 arch/mips/kernel/cmpxchg.c shift ^= sizeof(u32) - size; shift 73 arch/mips/kernel/cmpxchg.c shift *= BITS_PER_BYTE; shift 74 arch/mips/kernel/cmpxchg.c mask <<= shift; shift 88 arch/mips/kernel/cmpxchg.c load = (load32 & mask) >> shift; shift 98 arch/mips/kernel/cmpxchg.c old32 = (load32 & ~mask) | (old << shift); shift 99 arch/mips/kernel/cmpxchg.c new32 = (load32 & ~mask) | (new << shift); shift 71 arch/mips/kernel/smp-bmips.c #define CPUNUM(cpu, shift) (((cpu) + bmips_cpu_offset) << (shift)) shift 481 arch/mips/kernel/smp-bmips.c int shift = info->cpu & 0x01 ? 16 : 0; shift 482 arch/mips/kernel/smp-bmips.c u32 mask = ~(0xffff << shift), val = info->val >> 16; shift 495 arch/mips/kernel/smp-bmips.c (val << shift)); shift 294 arch/mips/lantiq/xway/sysctrl.c int shift = 14 - (2 * clk->module); shift 298 arch/mips/lantiq/xway/sysctrl.c val &= ~(3 << shift); shift 299 arch/mips/lantiq/xway/sysctrl.c val |= i << shift; shift 85 arch/mips/lasat/at93c.c int shift = size - 1; shift 86 arch/mips/lasat/at93c.c u32 mask = (1 << shift); shift 89 arch/mips/lasat/at93c.c at93c_write_databit((data & mask) >> shift); shift 115 arch/mips/lasat/ds1603.c unsigned long shift = 0; shift 118 arch/mips/lasat/ds1603.c word |= rtc_read_databit() << shift; shift 119 arch/mips/lasat/ds1603.c shift++; shift 280 arch/mips/loongson64/loongson-3/hpet.c .shift = 10, shift 285 arch/mips/loongson64/loongson-3/hpet.c csrc_hpet.mult = clocksource_hz2mult(HPET_FREQ, csrc_hpet.shift); shift 998 arch/mips/mm/tlbex.c unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12; shift 1010 arch/mips/mm/tlbex.c shift += 2; shift 1017 arch/mips/mm/tlbex.c if (shift) shift 1018 arch/mips/mm/tlbex.c UASM_i_SRL(p, ctx, ctx, shift); shift 121 arch/mips/pci/ops-emma2rh.c int shift; shift 138 arch/mips/pci/ops-emma2rh.c shift = (where & 3) << 3; shift 139 arch/mips/pci/ops-emma2rh.c data &= ~(0xffU << shift); shift 140 arch/mips/pci/ops-emma2rh.c data |= ((val & 0xffU) << shift); shift 143 arch/mips/pci/ops-emma2rh.c shift = (where & 2) << 3; shift 144 arch/mips/pci/ops-emma2rh.c data &= ~(0xffffU << shift); shift 145 arch/mips/pci/ops-emma2rh.c data |= ((val & 0xffffU) << shift); shift 80 arch/mips/pci/ops-vr41xx.c int shift; shift 89 arch/mips/pci/ops-vr41xx.c shift = (where & 3) << 3; shift 90 arch/mips/pci/ops-vr41xx.c data &= ~(0xffU << shift); shift 91 arch/mips/pci/ops-vr41xx.c data |= ((val & 0xffU) << shift); shift 94 arch/mips/pci/ops-vr41xx.c shift = (where & 2) << 3; shift 95 arch/mips/pci/ops-vr41xx.c data &= ~(0xffffU << shift); shift 96 arch/mips/pci/ops-vr41xx.c data |= ((val & 0xffffU) << shift); shift 25 arch/mips/pci/pci-xtalk-bridge.c u32 cf, shift, mask; shift 41 arch/mips/pci/pci-xtalk-bridge.c shift = (where & 3) << 3; shift 43 arch/mips/pci/pci-xtalk-bridge.c *value = (cf >> shift) & mask; shift 50 arch/mips/pci/pci-xtalk-bridge.c u32 cf, shift, mask, smask; shift 58 arch/mips/pci/pci-xtalk-bridge.c shift = ((where & 3) << 3); shift 60 arch/mips/pci/pci-xtalk-bridge.c smask = mask << shift; shift 62 arch/mips/pci/pci-xtalk-bridge.c cf = (cf & ~smask) | ((value & mask) << shift); shift 150 arch/mips/ralink/cevt-rt3352.c np, systick.dev.mult, systick.dev.shift); shift 333 arch/mips/txx9/generic/setup_tx4938.c void __init tx4938_ata_init(unsigned int irq, unsigned int shift, int tune) shift 346 arch/mips/txx9/generic/setup_tx4938.c .ioport_shift = shift, shift 382 arch/mips/txx9/generic/setup_tx4938.c .shift = 1, shift 458 arch/mips/txx9/generic/setup_tx4939.c .shift = 1, shift 293 arch/mips/txx9/rbtx4939/setup.c unsigned char shift; shift 297 arch/mips/txx9/rbtx4939/setup.c shift = bdipsw & 3; shift 299 arch/mips/txx9/rbtx4939/setup.c return (ofs & ~0xc00000) | ((((ofs >> 22) + shift) & 3) << 22); shift 330 arch/mips/txx9/rbtx4939/setup.c unsigned char shift; shift 336 arch/mips/txx9/rbtx4939/setup.c shift = bdipsw & 3; shift 342 arch/mips/txx9/rbtx4939/setup.c ((((from >> 22) + shift) & 3) << 22)), shift 214 arch/nds32/kernel/vdso.c vdso_data->cs_shift = tk->tkr_mono.shift; shift 222 arch/nds32/kernel/vdso.c tk->tkr_mono.shift; shift 200 arch/nds32/mm/alignment.c shift = 0; shift 286 arch/nds32/mm/alignment.c shift = IMM3U(inst) * len; shift 289 arch/nds32/mm/alignment.c unaligned_addr += shift; shift 305 arch/nds32/mm/alignment.c *idx_to_addr(regs, source_idx) = unaligned_addr + shift; shift 316 arch/nds32/mm/alignment.c unsigned long unaligned_addr, target_val, shift; shift 473 arch/nds32/mm/alignment.c shift = GET_IMMSVAL(IMM(inst)) * len; shift 475 arch/nds32/mm/alignment.c shift = *idx_to_addr(regs, RB(inst)) << SV(inst); shift 478 arch/nds32/mm/alignment.c unaligned_addr += shift; shift 502 arch/nds32/mm/alignment.c *idx_to_addr(regs, RA(inst)) = unaligned_addr + shift; shift 234 arch/nios2/kernel/time.c .shift = 32, shift 482 arch/parisc/kernel/unaligned.c int shift=0; shift 486 arch/parisc/kernel/unaligned.c shift= 1; break; shift 488 arch/parisc/kernel/unaligned.c shift= 2; break; shift 491 arch/parisc/kernel/unaligned.c shift= 3; break; shift 493 arch/parisc/kernel/unaligned.c newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0)<<shift; shift 335 arch/parisc/math-emu/dbl_float.h #define Dbl_right_align(srcdstA,srcdstB,shift,extent) \ shift 336 arch/parisc/math-emu/dbl_float.h if( shift >= 32 ) \ shift 340 arch/parisc/math-emu/dbl_float.h if(shift < 64) \ shift 342 arch/parisc/math-emu/dbl_float.h if(shift > 32) \ shift 345 arch/parisc/math-emu/dbl_float.h shift-32, Extall(extent)); \ shift 346 arch/parisc/math-emu/dbl_float.h if(Dallp2(srcdstB) << 64 - (shift)) Ext_setone_low(extent); \ shift 349 arch/parisc/math-emu/dbl_float.h Dallp2(srcdstB) = Dallp1(srcdstA) >> (shift - 32); \ shift 362 arch/parisc/math-emu/dbl_float.h if (shift > 0) \ shift 364 arch/parisc/math-emu/dbl_float.h Extall(extent) = Dallp2(srcdstB) << 32 - (shift); \ shift 365 arch/parisc/math-emu/dbl_float.h Variable_shift_double(Dallp1(srcdstA),Dallp2(srcdstB),shift, \ shift 367 arch/parisc/math-emu/dbl_float.h Dallp1(srcdstA) >>= shift; \ shift 376 arch/parisc/math-emu/dbl_float.h #define Dbl_fix_overshift(srcdstA,srcdstB,shift,extent) \ shift 377 arch/parisc/math-emu/dbl_float.h Extall(extent) = Dallp2(srcdstB) << 32 - (shift); \ shift 378 arch/parisc/math-emu/dbl_float.h Dallp2(srcdstB) = (Dallp1(srcdstA) << 32 - (shift)) | \ shift 379 arch/parisc/math-emu/dbl_float.h (Dallp2(srcdstB) >> (shift)); \ shift 380 arch/parisc/math-emu/dbl_float.h Dallp1(srcdstA) = Dallp1(srcdstA) >> shift shift 559 arch/parisc/math-emu/dbl_float.h #define Dblext_right_align(srcdstA,srcdstB,srcdstC,srcdstD,shift) \ shift 561 arch/parisc/math-emu/dbl_float.h shiftamt = shift % 32; \ shift 563 arch/parisc/math-emu/dbl_float.h switch (shift/32) { \ shift 206 arch/parisc/math-emu/sgl_float.h #define Sgl_right_align(srcdst,shift,extent) \ shift 208 arch/parisc/math-emu/sgl_float.h if (shift < 32) { \ shift 209 arch/parisc/math-emu/sgl_float.h Extall(extent) = Sall(srcdst) << (32-(shift)); \ shift 210 arch/parisc/math-emu/sgl_float.h Sall(srcdst) >>= shift; \ shift 335 arch/parisc/math-emu/sgl_float.h #define Sglext_right_align(srcdstA,srcdstB,shift) \ shift 337 arch/parisc/math-emu/sgl_float.h shiftamt = shift % 32; \ shift 339 arch/parisc/math-emu/sgl_float.h switch (shift/32) { \ shift 159 arch/powerpc/boot/4xx.c #define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask)) shift 53 arch/powerpc/include/asm/book3s/32/pgalloc.h void *table, int shift) shift 56 arch/powerpc/include/asm/book3s/32/pgalloc.h BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE); shift 57 arch/powerpc/include/asm/book3s/32/pgalloc.h pgf |= shift; shift 64 arch/powerpc/include/asm/book3s/32/pgalloc.h unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE; shift 66 arch/powerpc/include/asm/book3s/32/pgalloc.h pgtable_free(table, shift); shift 145 arch/powerpc/include/asm/book3s/64/hash-64k.h #define pte_iterate_hashed_subpages(rpte, psize, vpn, index, shift) \ shift 150 arch/powerpc/include/asm/book3s/64/hash-64k.h shift = mmu_psize_defs[psize].shift; \ shift 152 arch/powerpc/include/asm/book3s/64/hash-64k.h vpn += (1L << (shift - VPN_SHIFT))) { \ shift 216 arch/powerpc/include/asm/book3s/64/hash.h unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift, shift 22 arch/powerpc/include/asm/book3s/64/hugetlb.h unsigned long shift; shift 24 arch/powerpc/include/asm/book3s/64/hugetlb.h shift = huge_page_shift(hstate); shift 25 arch/powerpc/include/asm/book3s/64/hugetlb.h if (shift == mmu_psize_defs[MMU_PAGE_2M].shift) shift 27 arch/powerpc/include/asm/book3s/64/hugetlb.h else if (shift == mmu_psize_defs[MMU_PAGE_1G].shift) shift 29 arch/powerpc/include/asm/book3s/64/hugetlb.h else if (shift == mmu_psize_defs[MMU_PAGE_16M].shift) shift 31 arch/powerpc/include/asm/book3s/64/hugetlb.h else if (shift == mmu_psize_defs[MMU_PAGE_16G].shift) shift 109 arch/powerpc/include/asm/book3s/64/hugetlb.h static inline int check_and_get_huge_psize(int shift) shift 113 arch/powerpc/include/asm/book3s/64/hugetlb.h if (shift > SLICE_HIGH_SHIFT) shift 116 arch/powerpc/include/asm/book3s/64/hugetlb.h mmu_psize = shift_to_mmu_psize(shift); shift 163 arch/powerpc/include/asm/book3s/64/mmu-hash.h int (*resize_hpt)(unsigned long shift); shift 185 arch/powerpc/include/asm/book3s/64/mmu-hash.h static inline int shift_to_mmu_psize(unsigned int shift) shift 190 arch/powerpc/include/asm/book3s/64/mmu-hash.h if (mmu_psize_defs[psize].shift == shift) shift 197 arch/powerpc/include/asm/book3s/64/mmu-hash.h if (mmu_psize_defs[mmu_psize].shift) shift 198 arch/powerpc/include/asm/book3s/64/mmu-hash.h return mmu_psize_defs[mmu_psize].shift; shift 208 arch/powerpc/include/asm/book3s/64/mmu-hash.h return mmu_psize_defs[psize].shift; shift 291 arch/powerpc/include/asm/book3s/64/mmu-hash.h return 1ul << mmu_psize_defs[i & 0xf].shift; shift 412 arch/powerpc/include/asm/book3s/64/mmu-hash.h unsigned int shift = mmu_psize_defs[actual_psize].shift; shift 413 arch/powerpc/include/asm/book3s/64/mmu-hash.h return (pa & ~((1ul << shift) - 1)) | (penc << LP_SHIFT); shift 434 arch/powerpc/include/asm/book3s/64/mmu-hash.h unsigned int shift, int ssize) shift 443 arch/powerpc/include/asm/book3s/64/mmu-hash.h ((vpn & mask) >> (shift - VPN_SHIFT)); shift 448 arch/powerpc/include/asm/book3s/64/mmu-hash.h ((vpn & mask) >> (shift - VPN_SHIFT)) ; shift 471 arch/powerpc/include/asm/book3s/64/mmu-hash.h int ssize, unsigned int shift, unsigned int mmu_psize); shift 18 arch/powerpc/include/asm/book3s/64/mmu.h unsigned int shift; /* number of bits */ shift 21 arch/powerpc/include/asm/book3s/64/pgalloc.h extern void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift); shift 338 arch/powerpc/include/asm/book3s/64/pgtable.h #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ shift 341 arch/powerpc/include/asm/book3s/64/pgtable.h shift = mmu_psize_defs[psize].shift; \ shift 1041 arch/powerpc/include/asm/book3s/64/pgtable.h unsigned long page_size = 1 << mmu_psize_defs[mmu_io_psize].shift; shift 260 arch/powerpc/include/asm/book3s/64/radix.h if (mmu_psize_defs[MMU_PAGE_2M].shift == PMD_SHIFT) shift 62 arch/powerpc/include/asm/cacheflush.h unsigned long shift = l1_dcache_shift(); shift 73 arch/powerpc/include/asm/cacheflush.h for (i = 0; i < size >> shift; i++, addr += bytes) shift 88 arch/powerpc/include/asm/cacheflush.h unsigned long shift = l1_dcache_shift(); shift 94 arch/powerpc/include/asm/cacheflush.h for (i = 0; i < size >> shift; i++, addr += bytes) shift 107 arch/powerpc/include/asm/cacheflush.h unsigned long shift = l1_dcache_shift(); shift 113 arch/powerpc/include/asm/cacheflush.h for (i = 0; i < size >> shift; i++, addr += bytes) shift 198 arch/powerpc/include/asm/kvm_book3s.h unsigned int shift, shift 266 arch/powerpc/include/asm/kvm_book3s_64.h int shift = kvmppc_hpte_actual_page_shift(v, r); shift 268 arch/powerpc/include/asm/kvm_book3s_64.h if (shift) shift 269 arch/powerpc/include/asm/kvm_book3s_64.h return 1ul << shift; shift 39 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h static inline int check_and_get_huge_psize(int shift) shift 41 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h return shift_to_mmu_psize(shift); shift 279 arch/powerpc/include/asm/nohash/32/mmu-8xx.h unsigned int shift; /* number of bits */ shift 289 arch/powerpc/include/asm/nohash/32/mmu-8xx.h static inline int shift_to_mmu_psize(unsigned int shift) shift 294 arch/powerpc/include/asm/nohash/32/mmu-8xx.h if (mmu_psize_defs[psize].shift == shift) shift 301 arch/powerpc/include/asm/nohash/32/mmu-8xx.h if (mmu_psize_defs[mmu_psize].shift) shift 302 arch/powerpc/include/asm/nohash/32/mmu-8xx.h return mmu_psize_defs[mmu_psize].shift; shift 37 arch/powerpc/include/asm/nohash/hugetlb-book3e.h static inline int check_and_get_huge_psize(int shift) shift 39 arch/powerpc/include/asm/nohash/hugetlb-book3e.h if (shift & 1) /* Not a power of 4 */ shift 42 arch/powerpc/include/asm/nohash/hugetlb-book3e.h return shift_to_mmu_psize(shift); shift 243 arch/powerpc/include/asm/nohash/mmu-book3e.h unsigned int shift; /* number of bits */ shift 252 arch/powerpc/include/asm/nohash/mmu-book3e.h static inline int shift_to_mmu_psize(unsigned int shift) shift 257 arch/powerpc/include/asm/nohash/mmu-book3e.h if (mmu_psize_defs[psize].shift == shift) shift 264 arch/powerpc/include/asm/nohash/mmu-book3e.h if (mmu_psize_defs[mmu_psize].shift) shift 265 arch/powerpc/include/asm/nohash/mmu-book3e.h return mmu_psize_defs[mmu_psize].shift; shift 37 arch/powerpc/include/asm/nohash/pgalloc.h static inline void pgtable_free(void *table, int shift) shift 39 arch/powerpc/include/asm/nohash/pgalloc.h if (!shift) { shift 42 arch/powerpc/include/asm/nohash/pgalloc.h BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE); shift 43 arch/powerpc/include/asm/nohash/pgalloc.h kmem_cache_free(PGT_CACHE(shift), table); shift 49 arch/powerpc/include/asm/nohash/pgalloc.h static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift) shift 53 arch/powerpc/include/asm/nohash/pgalloc.h BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE); shift 54 arch/powerpc/include/asm/nohash/pgalloc.h pgf |= shift; shift 61 arch/powerpc/include/asm/nohash/pgalloc.h unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE; shift 63 arch/powerpc/include/asm/nohash/pgalloc.h pgtable_free(table, shift); shift 65 arch/powerpc/include/asm/pgalloc.h #define PGT_CACHE(shift) pgtable_cache[shift] shift 89 arch/powerpc/include/asm/pgtable.h void pgtable_cache_add(unsigned int shift); shift 209 arch/powerpc/include/asm/plpar_wrappers.h unsigned long shift) shift 211 arch/powerpc/include/asm/plpar_wrappers.h return plpar_hcall_norets(H_RESIZE_HPT_PREPARE, flags, shift); shift 215 arch/powerpc/include/asm/plpar_wrappers.h unsigned long shift) shift 217 arch/powerpc/include/asm/plpar_wrappers.h return plpar_hcall_norets(H_RESIZE_HPT_COMMIT, flags, shift); shift 97 arch/powerpc/include/asm/pmac_pfunc.h int (*read_reg32_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift, shift 99 arch/powerpc/include/asm/pmac_pfunc.h int (*read_reg16_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift, shift 101 arch/powerpc/include/asm/pmac_pfunc.h int (*read_reg8_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift, shift 104 arch/powerpc/include/asm/pmac_pfunc.h int (*write_reg32_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask); shift 105 arch/powerpc/include/asm/pmac_pfunc.h int (*write_reg16_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask); shift 106 arch/powerpc/include/asm/pmac_pfunc.h int (*write_reg8_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask); shift 80 arch/powerpc/kernel/legacy_serial.c u32 shift = 0; shift 94 arch/powerpc/kernel/legacy_serial.c shift = be32_to_cpup(rs); shift 139 arch/powerpc/kernel/legacy_serial.c legacy_serial_ports[index].regshift = shift; shift 87 arch/powerpc/kernel/machine_kexec.c VMCOREINFO_OFFSET(mmu_psize_def, shift); shift 31 arch/powerpc/kernel/mce_power.c unsigned int shift; shift 41 arch/powerpc/kernel/mce_power.c ptep = __find_linux_pte(mm->pgd, addr, NULL, &shift); shift 48 arch/powerpc/kernel/mce_power.c if (shift <= PAGE_SHIFT) shift 51 arch/powerpc/kernel/mce_power.c unsigned long rpnmask = (1ul << shift) - PAGE_SIZE; shift 730 arch/powerpc/kernel/prom_init.c int shift = 0; shift 738 arch/powerpc/kernel/prom_init.c shift = 30; shift 741 arch/powerpc/kernel/prom_init.c shift = 20; shift 744 arch/powerpc/kernel/prom_init.c shift = 10; shift 746 arch/powerpc/kernel/prom_init.c if (shift) { shift 747 arch/powerpc/kernel/prom_init.c ret <<= shift; shift 42 arch/powerpc/kernel/syscalls.c unsigned long fd, unsigned long off, int shift) shift 49 arch/powerpc/kernel/syscalls.c if (shift) { shift 50 arch/powerpc/kernel/syscalls.c if (off & ((1 << shift) - 1)) shift 52 arch/powerpc/kernel/syscalls.c off >>= shift; shift 873 arch/powerpc/kernel/time.c u32 shift = tk->tkr_mono.shift; shift 882 arch/powerpc/kernel/time.c xt.tv_nsec = (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); shift 905 arch/powerpc/kernel/time.c if (mult <= 62500000 && clock->shift >= 16) shift 906 arch/powerpc/kernel/time.c new_tb_to_xs = ((u64) mult * 295147905179ULL) >> (clock->shift - 16); shift 908 arch/powerpc/kernel/time.c new_tb_to_xs = (u64) mult * (19342813113834067ULL >> clock->shift); shift 918 arch/powerpc/kernel/time.c frac_sec = tk->tkr_mono.xtime_nsec << (32 - shift); shift 971 arch/powerpc/kernel/time.c clock->name, clock->mult, clock->shift); shift 1003 arch/powerpc/kernel/time.c dec->name, dec->mult, dec->shift, cpu); shift 1007 arch/powerpc/kernel/time.c decrementer_clockevent.shift = dec->shift; shift 1078 arch/powerpc/kernel/time.c unsigned shift; shift 1109 arch/powerpc/kernel/time.c for (shift = 0; res.result_high != 0; ++shift) { shift 1114 arch/powerpc/kernel/time.c tb_to_ns_shift = shift; shift 1234 arch/powerpc/kernel/traps.c u32 shift = 8 * (3 - (pos & 0x3)); shift 1249 arch/powerpc/kernel/traps.c regs->gpr[rT] |= val << shift; shift 1253 arch/powerpc/kernel/traps.c val = regs->gpr[rT] >> shift; shift 1357 arch/powerpc/kernel/traps.c int shift = (instword >> 21) & 0x1c; shift 1358 arch/powerpc/kernel/traps.c unsigned long msk = 0xf0000000UL >> shift; shift 1361 arch/powerpc/kernel/traps.c regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); shift 638 arch/powerpc/kvm/book3s_64_mmu.c mmu_psize_defs[MMU_PAGE_64K].shift && shift 147 arch/powerpc/kvm/book3s_64_mmu_host.c hash = hpt_hash(vpn, mmu_psize_defs[hpsize].shift, MMU_SEGSIZE_256M); shift 1504 arch/powerpc/kvm/book3s_64_mmu_hv.c unsigned long shift = rhpt->shift; shift 1511 arch/powerpc/kvm/book3s_64_mmu_hv.c if (shift && ((shift < 18) || (shift > 46))) shift 1519 arch/powerpc/kvm/book3s_64_mmu_hv.c if (resize->order == shift) { shift 1535 arch/powerpc/kvm/book3s_64_mmu_hv.c if (!shift) shift 1547 arch/powerpc/kvm/book3s_64_mmu_hv.c resize->order = shift; shift 1570 arch/powerpc/kvm/book3s_64_mmu_hv.c unsigned long shift = rhpt->shift; shift 1577 arch/powerpc/kvm/book3s_64_mmu_hv.c if (shift && ((shift < 18) || (shift > 46))) shift 1598 arch/powerpc/kvm/book3s_64_mmu_hv.c if (!resize || (resize->order != shift)) shift 191 arch/powerpc/kvm/book3s_64_mmu_radix.c if (offset == mmu_psize_defs[ps].shift) shift 340 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned long addr, unsigned int shift) shift 376 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned int shift, shift 386 arch/powerpc/kvm/book3s_64_mmu_radix.c old = kvmppc_radix_update_pte(kvm, pte, ~0UL, 0, gpa, shift); shift 387 arch/powerpc/kvm/book3s_64_mmu_radix.c kvmppc_radix_tlbie_page(kvm, gpa, shift, lpid); shift 398 arch/powerpc/kvm/book3s_64_mmu_radix.c if (shift) { /* 1GB or 2MB page */ shift 399 arch/powerpc/kvm/book3s_64_mmu_radix.c page_size = 1ul << shift; shift 400 arch/powerpc/kvm/book3s_64_mmu_radix.c if (shift == PMD_SHIFT) shift 402 arch/powerpc/kvm/book3s_64_mmu_radix.c else if (shift == PUD_SHIFT) shift 742 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned int shift; shift 758 arch/powerpc/kvm/book3s_64_mmu_radix.c ptep = __find_linux_pte(pgtable, gpa, NULL, &shift); shift 760 arch/powerpc/kvm/book3s_64_mmu_radix.c kvmppc_radix_update_pte(kvm, ptep, 0, pgflags, gpa, shift); shift 779 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned int shift, level; shift 817 arch/powerpc/kvm/book3s_64_mmu_radix.c ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift); shift 835 arch/powerpc/kvm/book3s_64_mmu_radix.c if (large_enable && shift == PUD_SHIFT && shift 839 arch/powerpc/kvm/book3s_64_mmu_radix.c } else if (large_enable && shift == PMD_SHIFT && shift 845 arch/powerpc/kvm/book3s_64_mmu_radix.c if (shift > PAGE_SHIFT) { shift 851 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned long rpnmask = (1ul << shift) - PAGE_SIZE; shift 973 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned int shift; shift 975 arch/powerpc/kvm/book3s_64_mmu_radix.c ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift); shift 977 arch/powerpc/kvm/book3s_64_mmu_radix.c kvmppc_unmap_pte(kvm, ptep, gpa, shift, memslot, shift 988 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned int shift; shift 992 arch/powerpc/kvm/book3s_64_mmu_radix.c ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift); shift 995 arch/powerpc/kvm/book3s_64_mmu_radix.c gpa, shift); shift 1001 arch/powerpc/kvm/book3s_64_mmu_radix.c 1UL << shift); shift 1013 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned int shift; shift 1016 arch/powerpc/kvm/book3s_64_mmu_radix.c ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift); shift 1029 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned int shift; shift 1033 arch/powerpc/kvm/book3s_64_mmu_radix.c ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift); shift 1036 arch/powerpc/kvm/book3s_64_mmu_radix.c if (shift) shift 1037 arch/powerpc/kvm/book3s_64_mmu_radix.c ret = 1 << (shift - PAGE_SHIFT); shift 1040 arch/powerpc/kvm/book3s_64_mmu_radix.c gpa, shift); shift 1041 arch/powerpc/kvm/book3s_64_mmu_radix.c kvmppc_radix_tlbie_page(kvm, gpa, shift, kvm->arch.lpid); shift 1046 arch/powerpc/kvm/book3s_64_mmu_radix.c 1UL << shift); shift 1083 arch/powerpc/kvm/book3s_64_mmu_radix.c unsigned int shift; shift 1088 arch/powerpc/kvm/book3s_64_mmu_radix.c ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift); shift 1090 arch/powerpc/kvm/book3s_64_mmu_radix.c kvmppc_unmap_pte(kvm, ptep, gpa, shift, memslot, shift 1100 arch/powerpc/kvm/book3s_64_mmu_radix.c if (!mmu_psize_defs[psize].shift) shift 1102 arch/powerpc/kvm/book3s_64_mmu_radix.c info->ap_encodings[*indexp] = mmu_psize_defs[psize].shift | shift 1203 arch/powerpc/kvm/book3s_64_mmu_radix.c int shift; shift 1286 arch/powerpc/kvm/book3s_64_mmu_radix.c shift = PUD_SHIFT; shift 1298 arch/powerpc/kvm/book3s_64_mmu_radix.c shift = PMD_SHIFT; shift 1308 arch/powerpc/kvm/book3s_64_mmu_radix.c shift = PAGE_SHIFT; shift 1311 arch/powerpc/kvm/book3s_64_mmu_radix.c " %lx: %lx %d\n", gpa, pte, shift); shift 1312 arch/powerpc/kvm/book3s_64_mmu_radix.c gpa += 1ul << shift; shift 370 arch/powerpc/kvm/book3s_64_vio.c long shift = stit->tbl->it_page_shift; shift 372 arch/powerpc/kvm/book3s_64_vio.c mem = mm_iommu_lookup(stt->kvm->mm, ua, 1ULL << shift); shift 376 arch/powerpc/kvm/book3s_64_vio.c if (mm_iommu_ua_to_hpa(mem, ua, shift, &hpa)) shift 126 arch/powerpc/kvm/book3s_64_vio_hv.c long shift = stit->tbl->it_page_shift; shift 128 arch/powerpc/kvm/book3s_64_vio_hv.c mem = mm_iommu_lookup_rm(stt->kvm->mm, ua, 1ULL << shift); shift 132 arch/powerpc/kvm/book3s_64_vio_hv.c if (mm_iommu_ua_to_hpa_rm(mem, ua, shift, &hpa)) shift 445 arch/powerpc/kvm/book3s_64_vio_hv.c unsigned shift = 0; shift 456 arch/powerpc/kvm/book3s_64_vio_hv.c ptep = __find_linux_pte(vcpu->arch.pgdir, ua, NULL, &shift); shift 461 arch/powerpc/kvm/book3s_64_vio_hv.c if (!shift) shift 462 arch/powerpc/kvm/book3s_64_vio_hv.c shift = PAGE_SHIFT; shift 465 arch/powerpc/kvm/book3s_64_vio_hv.c if (shift > PAGE_SHIFT) shift 471 arch/powerpc/kvm/book3s_64_vio_hv.c *phpa = (pte_pfn(pte) << PAGE_SHIFT) | (ua & ((1ULL << shift) - 1)) | shift 4340 arch/powerpc/kvm/book3s_hv.c int shift, int sllp) shift 4342 arch/powerpc/kvm/book3s_hv.c (*sps)->page_shift = shift; shift 4344 arch/powerpc/kvm/book3s_hv.c (*sps)->enc[0].page_shift = shift; shift 4345 arch/powerpc/kvm/book3s_hv.c (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); shift 4349 arch/powerpc/kvm/book3s_hv.c if (shift != 24) { shift 4350 arch/powerpc/kvm/book3s_hv.c int penc = kvmppc_pgsize_lp_encoding(shift, 24); shift 797 arch/powerpc/kvm/book3s_hv_nested.c unsigned int shift, lpid; shift 807 arch/powerpc/kvm/book3s_hv_nested.c ptep = __find_linux_pte(gp->shadow_pgtable, gpa, NULL, &shift); shift 816 arch/powerpc/kvm/book3s_hv_nested.c kvmppc_radix_tlbie_page(kvm, gpa, shift, lpid); shift 847 arch/powerpc/kvm/book3s_hv_nested.c unsigned int shift, lpid; shift 857 arch/powerpc/kvm/book3s_hv_nested.c ptep = __find_linux_pte(gp->shadow_pgtable, gpa, NULL, &shift); shift 860 arch/powerpc/kvm/book3s_hv_nested.c kvmppc_unmap_pte(kvm, ptep, gpa, shift, NULL, gp->shadow_lpid); shift 921 arch/powerpc/kvm/book3s_hv_nested.c int shift; shift 924 arch/powerpc/kvm/book3s_hv_nested.c ptep = __find_linux_pte(gp->shadow_pgtable, gpa, NULL, &shift); shift 925 arch/powerpc/kvm/book3s_hv_nested.c if (!shift) shift 926 arch/powerpc/kvm/book3s_hv_nested.c shift = PAGE_SHIFT; shift 928 arch/powerpc/kvm/book3s_hv_nested.c kvmppc_unmap_pte(kvm, ptep, gpa, shift, NULL, gp->shadow_lpid); shift 934 arch/powerpc/kvm/book3s_hv_nested.c *shift_ret = shift; shift 979 arch/powerpc/kvm/book3s_hv_nested.c int shift, shadow_shift; shift 982 arch/powerpc/kvm/book3s_hv_nested.c shift = ap_to_shift(ap); shift 984 arch/powerpc/kvm/book3s_hv_nested.c if (shift < 0) shift 988 arch/powerpc/kvm/book3s_hv_nested.c addr &= ~((1UL << shift) - 1); shift 989 arch/powerpc/kvm/book3s_hv_nested.c npages = 1UL << (shift - PAGE_SHIFT); shift 1247 arch/powerpc/kvm/book3s_hv_nested.c static inline int kvmppc_radix_shift_to_level(int shift) shift 1249 arch/powerpc/kvm/book3s_hv_nested.c if (shift == PUD_SHIFT) shift 1251 arch/powerpc/kvm/book3s_hv_nested.c if (shift == PMD_SHIFT) shift 1253 arch/powerpc/kvm/book3s_hv_nested.c if (shift == PAGE_SHIFT) shift 1274 arch/powerpc/kvm/book3s_hv_nested.c unsigned int shift, l1_shift, level; shift 1365 arch/powerpc/kvm/book3s_hv_nested.c pte_p = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift); shift 1366 arch/powerpc/kvm/book3s_hv_nested.c if (!shift) shift 1367 arch/powerpc/kvm/book3s_hv_nested.c shift = PAGE_SHIFT; shift 1380 arch/powerpc/kvm/book3s_hv_nested.c shift = kvmppc_radix_level_to_shift(level); shift 1383 arch/powerpc/kvm/book3s_hv_nested.c gfn = (gpa & ~((1UL << shift) - 1)) >> PAGE_SHIFT; shift 1397 arch/powerpc/kvm/book3s_hv_nested.c if (shift > l1_shift) { shift 1402 arch/powerpc/kvm/book3s_hv_nested.c mask = (1UL << shift) - (1UL << actual_shift); shift 1404 arch/powerpc/kvm/book3s_hv_nested.c shift = actual_shift; shift 1406 arch/powerpc/kvm/book3s_hv_nested.c level = kvmppc_radix_shift_to_level(shift); shift 1407 arch/powerpc/kvm/book3s_hv_nested.c n_gpa &= ~((1UL << shift) - 1); shift 898 arch/powerpc/kvm/book3s_hv_rm_mmu.c unsigned int shift; shift 911 arch/powerpc/kvm/book3s_hv_rm_mmu.c ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift); shift 919 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (shift) shift 920 arch/powerpc/kvm/book3s_hv_rm_mmu.c psize = 1UL << shift; shift 1005 arch/powerpc/lib/sstep.c unsigned int crval, shift; shift 1015 arch/powerpc/lib/sstep.c shift = (7 - crfld) * 4; shift 1016 arch/powerpc/lib/sstep.c op->ccval = (regs->ccr & ~(0xf << shift)) | (crval << shift); shift 1024 arch/powerpc/lib/sstep.c unsigned int crval, shift; shift 1034 arch/powerpc/lib/sstep.c shift = (7 - crfld) * 4; shift 1035 arch/powerpc/lib/sstep.c op->ccval = (regs->ccr & ~(0xf << shift)) | (crval << shift); shift 28 arch/powerpc/mm/book3s64/hash_4k.c unsigned long shift = mmu_psize_defs[MMU_PAGE_4K].shift; shift 69 arch/powerpc/mm/book3s64/hash_4k.c unsigned long gslot = pte_get_hash_gslot(vpn, shift, ssize, shift 80 arch/powerpc/mm/book3s64/hash_4k.c hash = hpt_hash(vpn, shift, ssize); shift 46 arch/powerpc/mm/book3s64/hash_64k.c unsigned long shift = mmu_psize_defs[MMU_PAGE_4K].shift; shift 87 arch/powerpc/mm/book3s64/hash_64k.c subpg_index = (ea & (PAGE_SIZE - 1)) >> shift; shift 116 arch/powerpc/mm/book3s64/hash_64k.c gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, shift 153 arch/powerpc/mm/book3s64/hash_64k.c pa += (subpg_index << shift); shift 155 arch/powerpc/mm/book3s64/hash_64k.c hash = hpt_hash(vpn, shift, ssize); shift 232 arch/powerpc/mm/book3s64/hash_64k.c unsigned long shift = mmu_psize_defs[MMU_PAGE_64K].shift; shift 277 arch/powerpc/mm/book3s64/hash_64k.c gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, 0); shift 287 arch/powerpc/mm/book3s64/hash_64k.c hash = hpt_hash(vpn, shift, ssize); shift 30 arch/powerpc/mm/book3s64/hash_hugepage.c unsigned long vpn, hash, shift, slot; shift 75 arch/powerpc/mm/book3s64/hash_hugepage.c shift = mmu_psize_defs[psize].shift; shift 76 arch/powerpc/mm/book3s64/hash_hugepage.c index = (ea & ~HPAGE_PMD_MASK) >> shift; shift 105 arch/powerpc/mm/book3s64/hash_hugepage.c hash = hpt_hash(vpn, shift, ssize); shift 131 arch/powerpc/mm/book3s64/hash_hugepage.c hash = hpt_hash(vpn, shift, ssize); shift 27 arch/powerpc/mm/book3s64/hash_hugetlbpage.c int ssize, unsigned int shift, unsigned int mmu_psize) shift 35 arch/powerpc/mm/book3s64/hash_hugetlbpage.c BUG_ON(shift != mmu_psize_defs[mmu_psize].shift); shift 94 arch/powerpc/mm/book3s64/hash_hugetlbpage.c gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, 0); shift 101 arch/powerpc/mm/book3s64/hash_hugetlbpage.c unsigned long hash = hpt_hash(vpn, shift, ssize); shift 162 arch/powerpc/mm/book3s64/hash_hugetlbpage.c if (mmu_psize_defs[MMU_PAGE_16M].shift) shift 163 arch/powerpc/mm/book3s64/hash_hugetlbpage.c hpage_shift = mmu_psize_defs[MMU_PAGE_16M].shift; shift 164 arch/powerpc/mm/book3s64/hash_hugetlbpage.c else if (mmu_psize_defs[MMU_PAGE_1M].shift) shift 165 arch/powerpc/mm/book3s64/hash_hugetlbpage.c hpage_shift = mmu_psize_defs[MMU_PAGE_1M].shift; shift 166 arch/powerpc/mm/book3s64/hash_hugetlbpage.c else if (mmu_psize_defs[MMU_PAGE_2M].shift) shift 167 arch/powerpc/mm/book3s64/hash_hugetlbpage.c hpage_shift = mmu_psize_defs[MMU_PAGE_2M].shift; shift 180 arch/powerpc/mm/book3s64/hash_native.c va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); shift 270 arch/powerpc/mm/book3s64/hash_native.c va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); shift 493 arch/powerpc/mm/book3s64/hash_native.c hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize); shift 626 arch/powerpc/mm/book3s64/hash_native.c unsigned long hpte_v, want_v, shift; shift 629 arch/powerpc/mm/book3s64/hash_native.c shift = mmu_psize_defs[psize].shift; shift 630 arch/powerpc/mm/book3s64/hash_native.c max_hpte_count = 1U << (PMD_SHIFT - shift); shift 640 arch/powerpc/mm/book3s64/hash_native.c addr = s_addr + (i * (1ul << shift)); shift 642 arch/powerpc/mm/book3s64/hash_native.c hash = hpt_hash(vpn, shift, ssize); shift 694 arch/powerpc/mm/book3s64/hash_native.c int size, a_size, shift; shift 711 arch/powerpc/mm/book3s64/hash_native.c shift = mmu_psize_defs[size].shift; shift 724 arch/powerpc/mm/book3s64/hash_native.c if (shift < 23) { shift 726 arch/powerpc/mm/book3s64/hash_native.c seg_off |= vpi << shift; shift 734 arch/powerpc/mm/book3s64/hash_native.c if (shift < 23) { shift 736 arch/powerpc/mm/book3s64/hash_native.c seg_off |= vpi << shift; shift 805 arch/powerpc/mm/book3s64/hash_native.c unsigned long hash, index, hidx, shift, slot; shift 826 arch/powerpc/mm/book3s64/hash_native.c pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) { shift 827 arch/powerpc/mm/book3s64/hash_native.c hash = hpt_hash(vpn, shift, ssize); shift 858 arch/powerpc/mm/book3s64/hash_native.c vpn, index, shift) { shift 875 arch/powerpc/mm/book3s64/hash_native.c vpn, index, shift) { shift 388 arch/powerpc/mm/book3s64/hash_pgtable.c if (mmu_psize_defs[MMU_PAGE_16M].shift != PMD_SHIFT) shift 398 arch/powerpc/mm/book3s64/hash_pgtable.c if (mmu_psize_defs[MMU_PAGE_64K].shift && shift 418 arch/powerpc/mm/book3s64/hash_pgtable.c unsigned int step, shift; shift 420 arch/powerpc/mm/book3s64/hash_pgtable.c shift = mmu_psize_defs[mmu_linear_psize].shift; shift 421 arch/powerpc/mm/book3s64/hash_pgtable.c step = 1 << shift; shift 66 arch/powerpc/mm/book3s64/hash_tlb.c addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1); shift 142 arch/powerpc/mm/book3s64/hash_utils.c .shift = 12, shift 157 arch/powerpc/mm/book3s64/hash_utils.c .shift = 12, shift 164 arch/powerpc/mm/book3s64/hash_utils.c .shift = 24, shift 249 arch/powerpc/mm/book3s64/hash_utils.c unsigned int step, shift; shift 252 arch/powerpc/mm/book3s64/hash_utils.c shift = mmu_psize_defs[psize].shift; shift 253 arch/powerpc/mm/book3s64/hash_utils.c step = 1 << shift; shift 290 arch/powerpc/mm/book3s64/hash_utils.c hash = hpt_hash(vpn, shift, ssize); shift 322 arch/powerpc/mm/book3s64/hash_utils.c unsigned int step, shift; shift 326 arch/powerpc/mm/book3s64/hash_utils.c shift = mmu_psize_defs[psize].shift; shift 327 arch/powerpc/mm/book3s64/hash_utils.c step = 1 << shift; shift 386 arch/powerpc/mm/book3s64/hash_utils.c static int __init get_idx_from_shift(unsigned int shift) shift 390 arch/powerpc/mm/book3s64/hash_utils.c switch (shift) { shift 447 arch/powerpc/mm/book3s64/hash_utils.c def->shift = base_shift; shift 463 arch/powerpc/mm/book3s64/hash_utils.c unsigned int shift = be32_to_cpu(prop[0]); shift 469 arch/powerpc/mm/book3s64/hash_utils.c idx = get_idx_from_shift(shift); shift 475 arch/powerpc/mm/book3s64/hash_utils.c "shift=%d\n", base_shift, shift); shift 480 arch/powerpc/mm/book3s64/hash_utils.c base_shift, shift, def->sllp, shift 617 arch/powerpc/mm/book3s64/hash_utils.c long int shift, penc; shift 620 arch/powerpc/mm/book3s64/hash_utils.c if (!mmu_psize_defs[bp].shift) shift 624 arch/powerpc/mm/book3s64/hash_utils.c if (penc == -1 || !mmu_psize_defs[ap].shift) shift 626 arch/powerpc/mm/book3s64/hash_utils.c shift = mmu_psize_defs[ap].shift - LP_SHIFT; shift 627 arch/powerpc/mm/book3s64/hash_utils.c if (shift <= 0) shift 636 arch/powerpc/mm/book3s64/hash_utils.c penc += 1 << shift; shift 651 arch/powerpc/mm/book3s64/hash_utils.c if (mmu_psize_defs[MMU_PAGE_16M].shift) shift 653 arch/powerpc/mm/book3s64/hash_utils.c else if (mmu_psize_defs[MMU_PAGE_1M].shift) shift 667 arch/powerpc/mm/book3s64/hash_utils.c if (mmu_psize_defs[MMU_PAGE_64K].shift) { shift 690 arch/powerpc/mm/book3s64/hash_utils.c if (mmu_psize_defs[MMU_PAGE_16M].shift && shift 703 arch/powerpc/mm/book3s64/hash_utils.c mmu_psize_defs[mmu_linear_psize].shift, shift 704 arch/powerpc/mm/book3s64/hash_utils.c mmu_psize_defs[mmu_virtual_psize].shift, shift 705 arch/powerpc/mm/book3s64/hash_utils.c mmu_psize_defs[mmu_io_psize].shift shift 707 arch/powerpc/mm/book3s64/hash_utils.c ,mmu_psize_defs[mmu_vmemmap_psize].shift shift 735 arch/powerpc/mm/book3s64/hash_utils.c unsigned pshift = mmu_psize_defs[mmu_virtual_psize].shift; shift 1321 arch/powerpc/mm/book3s64/hash_utils.c ea &= ~((1ul << mmu_psize_defs[psize].shift) - 1); shift 1704 arch/powerpc/mm/book3s64/hash_utils.c unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift, shift 1709 arch/powerpc/mm/book3s64/hash_utils.c hash = hpt_hash(vpn, shift, ssize); shift 1725 arch/powerpc/mm/book3s64/hash_utils.c unsigned long index, shift, gslot; shift 1729 arch/powerpc/mm/book3s64/hash_utils.c pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) { shift 1730 arch/powerpc/mm/book3s64/hash_utils.c gslot = pte_get_hash_gslot(vpn, shift, ssize, pte, index); shift 1751 arch/powerpc/mm/book3s64/hash_utils.c unsigned long hidx, shift, vpn, hash, slot; shift 1772 arch/powerpc/mm/book3s64/hash_utils.c shift = mmu_psize_defs[psize].shift; shift 1773 arch/powerpc/mm/book3s64/hash_utils.c max_hpte_count = HPAGE_PMD_SIZE >> shift; shift 1785 arch/powerpc/mm/book3s64/hash_utils.c addr = s_addr + (i * (1ul << shift)); shift 1787 arch/powerpc/mm/book3s64/hash_utils.c hash = hpt_hash(vpn, shift, ssize); shift 272 arch/powerpc/mm/book3s64/radix_pgtable.c mmu_psize_defs[MMU_PAGE_1G].shift) { shift 276 arch/powerpc/mm/book3s64/radix_pgtable.c mmu_psize_defs[MMU_PAGE_2M].shift) { shift 402 arch/powerpc/mm/book3s64/radix_pgtable.c static int __init get_idx_from_shift(unsigned int shift) shift 406 arch/powerpc/mm/book3s64/radix_pgtable.c switch (shift) { shift 428 arch/powerpc/mm/book3s64/radix_pgtable.c int shift, idx; shift 453 arch/powerpc/mm/book3s64/radix_pgtable.c shift = be32_to_cpu(prop[0]) & ~(0xe << 28); shift 455 arch/powerpc/mm/book3s64/radix_pgtable.c pr_info("Page size shift = %d AP=0x%x\n", shift, ap); shift 457 arch/powerpc/mm/book3s64/radix_pgtable.c idx = get_idx_from_shift(shift); shift 462 arch/powerpc/mm/book3s64/radix_pgtable.c def->shift = shift; shift 484 arch/powerpc/mm/book3s64/radix_pgtable.c mmu_psize_defs[MMU_PAGE_4K].shift = 12; shift 487 arch/powerpc/mm/book3s64/radix_pgtable.c mmu_psize_defs[MMU_PAGE_64K].shift = 16; shift 554 arch/powerpc/mm/book3s64/radix_pgtable.c if (mmu_psize_defs[MMU_PAGE_2M].shift) { shift 840 arch/powerpc/mm/book3s64/radix_tlb.c unsigned int page_shift = mmu_psize_defs[mmu_virtual_psize].shift; shift 956 arch/powerpc/mm/book3s64/radix_tlb.c if (page_size == (1UL << mmu_psize_defs[mmu_virtual_psize].shift)) shift 958 arch/powerpc/mm/book3s64/radix_tlb.c else if (page_size == (1UL << mmu_psize_defs[MMU_PAGE_2M].shift)) shift 960 arch/powerpc/mm/book3s64/radix_tlb.c else if (page_size == (1UL << mmu_psize_defs[MMU_PAGE_1G].shift)) shift 1078 arch/powerpc/mm/book3s64/radix_tlb.c unsigned int page_shift = mmu_psize_defs[psize].shift; shift 311 arch/powerpc/mm/hugetlbpage.c unsigned int shift = hugepd_shift(*hpdp); shift 314 arch/powerpc/mm/hugetlbpage.c if (shift > pdshift) shift 315 arch/powerpc/mm/hugetlbpage.c num_hugepd = 1 << (shift - pdshift); shift 331 arch/powerpc/mm/hugetlbpage.c if (shift >= pdshift) shift 337 arch/powerpc/mm/hugetlbpage.c get_hugepd_cache_index(pdshift - shift)); shift 504 arch/powerpc/mm/hugetlbpage.c int shift = hugepd_shift(hpd); shift 517 arch/powerpc/mm/hugetlbpage.c mask = (1UL << shift) - 1; shift 563 arch/powerpc/mm/hugetlbpage.c int shift = __ffs(size); shift 571 arch/powerpc/mm/hugetlbpage.c mmu_psize = check_and_get_huge_psize(shift); shift 575 arch/powerpc/mm/hugetlbpage.c BUG_ON(mmu_psize_defs[mmu_psize].shift != shift); shift 581 arch/powerpc/mm/hugetlbpage.c hugetlb_add_hstate(shift - PAGE_SHIFT); shift 616 arch/powerpc/mm/hugetlbpage.c unsigned shift; shift 619 arch/powerpc/mm/hugetlbpage.c if (!mmu_psize_defs[psize].shift) shift 622 arch/powerpc/mm/hugetlbpage.c shift = mmu_psize_to_shift(psize); shift 625 arch/powerpc/mm/hugetlbpage.c if (shift > PGDIR_SHIFT) shift 627 arch/powerpc/mm/hugetlbpage.c else if (shift > PUD_SHIFT) shift 629 arch/powerpc/mm/hugetlbpage.c else if (shift > PMD_SHIFT) shift 634 arch/powerpc/mm/hugetlbpage.c if (shift < PUD_SHIFT) shift 636 arch/powerpc/mm/hugetlbpage.c else if (shift < PGDIR_SHIFT) shift 642 arch/powerpc/mm/hugetlbpage.c if (add_huge_page_size(1ULL << shift) < 0) shift 648 arch/powerpc/mm/hugetlbpage.c if (pdshift > shift) { shift 650 arch/powerpc/mm/hugetlbpage.c pgtable_cache_add(pdshift - shift); shift 49 arch/powerpc/mm/init-common.c #define CTOR(shift) static void ctor_##shift(void *addr) \ shift 51 arch/powerpc/mm/init-common.c memset(addr, 0, sizeof(void *) << (shift)); \ shift 57 arch/powerpc/mm/init-common.c static inline void (*ctor(int shift))(void *) shift 61 arch/powerpc/mm/init-common.c switch (shift) { shift 92 arch/powerpc/mm/init-common.c void pgtable_cache_add(unsigned int shift) shift 95 arch/powerpc/mm/init-common.c unsigned long table_size = sizeof(void *) << shift; shift 113 arch/powerpc/mm/init-common.c BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE); shift 115 arch/powerpc/mm/init-common.c if (PGT_CACHE(shift)) shift 119 arch/powerpc/mm/init-common.c name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift); shift 120 arch/powerpc/mm/init-common.c new = kmem_cache_create(name, table_size, align, 0, ctor(shift)); shift 122 arch/powerpc/mm/init-common.c panic("Could not allocate pgtable cache for order %d", shift); shift 125 arch/powerpc/mm/init-common.c pgtable_cache[shift] = new; shift 127 arch/powerpc/mm/init-common.c pr_debug("Allocated pgtable cache for order %d\n", shift); shift 193 arch/powerpc/mm/init_64.c unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift; shift 274 arch/powerpc/mm/init_64.c unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift; shift 384 arch/powerpc/mm/mem.c unsigned long shift = l1_icache_shift(); shift 390 arch/powerpc/mm/mem.c for (i = 0; i < size >> shift; i++, addr += bytes) shift 41 arch/powerpc/mm/mmap.c unsigned long shift, rnd; shift 43 arch/powerpc/mm/mmap.c shift = mmap_rnd_bits; shift 46 arch/powerpc/mm/mmap.c shift = mmap_rnd_compat_bits; shift 48 arch/powerpc/mm/mmap.c rnd = get_random_long() % (1ul << shift); shift 130 arch/powerpc/mm/nohash/book3e_hugetlbpage.c unsigned long psize, tsize, shift; shift 141 arch/powerpc/mm/nohash/book3e_hugetlbpage.c shift = __ilog2(psize); shift 142 arch/powerpc/mm/nohash/book3e_hugetlbpage.c tsize = shift - 10; shift 162 arch/powerpc/mm/nohash/book3e_hugetlbpage.c mas2 = ea & ~((1UL << shift) - 1); shift 55 arch/powerpc/mm/nohash/tlb.c .shift = 12, shift 59 arch/powerpc/mm/nohash/tlb.c .shift = 21, shift 63 arch/powerpc/mm/nohash/tlb.c .shift = 22, shift 67 arch/powerpc/mm/nohash/tlb.c .shift = 24, shift 71 arch/powerpc/mm/nohash/tlb.c .shift = 26, shift 75 arch/powerpc/mm/nohash/tlb.c .shift = 28, shift 79 arch/powerpc/mm/nohash/tlb.c .shift = 30, shift 88 arch/powerpc/mm/nohash/tlb.c .shift = 12, shift 92 arch/powerpc/mm/nohash/tlb.c .shift = 14, shift 96 arch/powerpc/mm/nohash/tlb.c .shift = 19, shift 99 arch/powerpc/mm/nohash/tlb.c .shift = 23, shift 105 arch/powerpc/mm/nohash/tlb.c .shift = 12, shift 110 arch/powerpc/mm/nohash/tlb.c .shift = 14, shift 114 arch/powerpc/mm/nohash/tlb.c .shift = 16, shift 119 arch/powerpc/mm/nohash/tlb.c .shift = 20, shift 123 arch/powerpc/mm/nohash/tlb.c .shift = 24, shift 128 arch/powerpc/mm/nohash/tlb.c .shift = 28, shift 132 arch/powerpc/mm/nohash/tlb.c .shift = 30, shift 416 arch/powerpc/mm/nohash/tlb.c unsigned long size = 1UL << mmu_psize_defs[mmu_pte_psize].shift; shift 457 arch/powerpc/mm/nohash/tlb.c unsigned int shift; shift 460 arch/powerpc/mm/nohash/tlb.c shift = def->shift; shift 462 arch/powerpc/mm/nohash/tlb.c if (shift == 0 || shift & 1) shift 466 arch/powerpc/mm/nohash/tlb.c shift = (shift - 10) >> 1; shift 468 arch/powerpc/mm/nohash/tlb.c if ((shift >= min_pg) && (shift <= max_pg)) shift 497 arch/powerpc/mm/nohash/tlb.c if (!def->shift) shift 500 arch/powerpc/mm/nohash/tlb.c if (tlb1ps & (1U << (def->shift - 10))) { shift 520 arch/powerpc/mm/nohash/tlb.c if (tlb0ps & (1U << (def->shift - 10))) shift 548 arch/powerpc/mm/nohash/tlb.c if (ps == (def->shift - 10)) shift 550 arch/powerpc/mm/nohash/tlb.c if (sps == (def->shift - 10)) shift 567 arch/powerpc/mm/nohash/tlb.c def->shift = 0; shift 570 arch/powerpc/mm/nohash/tlb.c pr_info(" %8ld KB as %s\n", 1ul << (def->shift - 10), shift 92 arch/powerpc/mm/ptdump/book3s64.c .shift = H_PAGE_F_GIX_SHIFT, shift 59 arch/powerpc/mm/ptdump/hashpagetable.c int shift; shift 170 arch/powerpc/mm/ptdump/hashpagetable.c if (flag->shift) shift 171 arch/powerpc/mm/ptdump/hashpagetable.c val = val >> flag->shift; shift 213 arch/powerpc/mm/ptdump/hashpagetable.c unsigned long shift = mmu_psize_defs[psize].shift; shift 218 arch/powerpc/mm/ptdump/hashpagetable.c hash = hpt_hash(vpn, shift, ssize); shift 246 arch/powerpc/mm/ptdump/hashpagetable.c unsigned long shift = mmu_psize_defs[psize].shift; shift 251 arch/powerpc/mm/ptdump/hashpagetable.c hash = hpt_hash(vpn, shift, ssize); shift 282 arch/powerpc/mm/ptdump/hashpagetable.c int penc = -2, idx = 0, shift; shift 300 arch/powerpc/mm/ptdump/hashpagetable.c if ((penc != -1) && (mmu_psize_defs[idx].shift)) { shift 301 arch/powerpc/mm/ptdump/hashpagetable.c shift = mmu_psize_defs[idx].shift - HPTE_R_RPN_SHIFT; shift 302 arch/powerpc/mm/ptdump/hashpagetable.c mask = (0x1 << (shift)) - 1; shift 306 arch/powerpc/mm/ptdump/hashpagetable.c *rpn = arpn >> shift; shift 461 arch/powerpc/mm/ptdump/hashpagetable.c unsigned long psize = 1 << mmu_psize_defs[mmu_linear_psize].shift; shift 129 arch/powerpc/mm/ptdump/ptdump.c if (flag->shift) shift 130 arch/powerpc/mm/ptdump/ptdump.c val = val >> flag->shift; shift 10 arch/powerpc/mm/ptdump/ptdump.h int shift; shift 283 arch/powerpc/mm/slice.c int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT); shift 329 arch/powerpc/mm/slice.c int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT); shift 438 arch/powerpc/mm/slice.c int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT); shift 116 arch/powerpc/perf/callchain.c unsigned shift; shift 127 arch/powerpc/perf/callchain.c ptep = find_current_mm_pte(pgdir, addr, NULL, &shift); shift 130 arch/powerpc/perf/callchain.c if (!shift) shift 131 arch/powerpc/perf/callchain.c shift = PAGE_SHIFT; shift 134 arch/powerpc/perf/callchain.c offset = addr & ((1UL << shift) - 1); shift 404 arch/powerpc/perf/ppc970-pmu.c int shift, i; shift 407 arch/powerpc/perf/ppc970-pmu.c shift = MMCR0_PMC1SEL_SH - 7 * pmc; shift 410 arch/powerpc/perf/ppc970-pmu.c shift = MMCR1_PMC3SEL_SH - 5 * (pmc - 2); shift 416 arch/powerpc/perf/ppc970-pmu.c mmcr[i] = (mmcr[i] & ~(0x1fUL << shift)) | (0x08UL << shift); shift 399 arch/powerpc/platforms/8xx/cpm1.c int shift; shift 463 arch/powerpc/platforms/8xx/cpm1.c shift = 0; shift 468 arch/powerpc/platforms/8xx/cpm1.c shift = 8; shift 473 arch/powerpc/platforms/8xx/cpm1.c shift = 16; shift 478 arch/powerpc/platforms/8xx/cpm1.c shift = 24; shift 483 arch/powerpc/platforms/8xx/cpm1.c shift = 12; shift 488 arch/powerpc/platforms/8xx/cpm1.c shift = 28; shift 508 arch/powerpc/platforms/8xx/cpm1.c bits <<= shift; shift 509 arch/powerpc/platforms/8xx/cpm1.c mask <<= shift; shift 95 arch/powerpc/platforms/cell/iommu.c #define IO_PAGENO_BITS(shift) (IO_SEGMENT_SHIFT - (shift)) shift 119 arch/powerpc/platforms/cell/spu_base.c return mmu_psize_defs[MMU_PAGE_64K].shift != 0; shift 191 arch/powerpc/platforms/powermac/pfunc_base.c u32 shift, u32 xor) shift 199 arch/powerpc/platforms/powermac/pfunc_base.c *args->u[0].p = ((MACIO_IN32(offset) & mask) >> shift) ^ xor; shift 204 arch/powerpc/platforms/powermac/pfunc_base.c u32 shift, u32 xor) shift 212 arch/powerpc/platforms/powermac/pfunc_base.c *((u8 *)(args->u[0].p)) = ((MACIO_IN8(offset) & mask) >> shift) ^ xor; shift 216 arch/powerpc/platforms/powermac/pfunc_base.c static int macio_do_write_reg32_slm(PMF_STD_ARGS, u32 offset, u32 shift, shift 229 arch/powerpc/platforms/powermac/pfunc_base.c val = args->u[0].v << shift; shift 236 arch/powerpc/platforms/powermac/pfunc_base.c static int macio_do_write_reg8_slm(PMF_STD_ARGS, u32 offset, u32 shift, shift 249 arch/powerpc/platforms/powermac/pfunc_base.c val = args->u[0].v << shift; shift 409 arch/powerpc/platforms/powermac/pfunc_core.c u32 shift = pmf_next32(cmd); shift 413 arch/powerpc/platforms/powermac/pfunc_core.c " xor: %x\n", offset, mask, shift, xor); shift 415 arch/powerpc/platforms/powermac/pfunc_core.c PMF_PARSE_CALL(read_reg32_msrx, cmd, h, offset, mask, shift, xor); shift 423 arch/powerpc/platforms/powermac/pfunc_core.c u32 shift = pmf_next32(cmd); shift 427 arch/powerpc/platforms/powermac/pfunc_core.c " xor: %x\n", offset, mask, shift, xor); shift 429 arch/powerpc/platforms/powermac/pfunc_core.c PMF_PARSE_CALL(read_reg16_msrx, cmd, h, offset, mask, shift, xor); shift 436 arch/powerpc/platforms/powermac/pfunc_core.c u32 shift = pmf_next32(cmd); shift 440 arch/powerpc/platforms/powermac/pfunc_core.c " xor: %x\n", offset, mask, shift, xor); shift 442 arch/powerpc/platforms/powermac/pfunc_core.c PMF_PARSE_CALL(read_reg8_msrx, cmd, h, offset, mask, shift, xor); shift 449 arch/powerpc/platforms/powermac/pfunc_core.c u32 shift = pmf_next32(cmd); shift 453 arch/powerpc/platforms/powermac/pfunc_core.c offset, shift, mask); shift 455 arch/powerpc/platforms/powermac/pfunc_core.c PMF_PARSE_CALL(write_reg32_slm, cmd, h, offset, shift, mask); shift 462 arch/powerpc/platforms/powermac/pfunc_core.c u32 shift = pmf_next32(cmd); shift 466 arch/powerpc/platforms/powermac/pfunc_core.c offset, shift, mask); shift 468 arch/powerpc/platforms/powermac/pfunc_core.c PMF_PARSE_CALL(write_reg16_slm, cmd, h, offset, shift, mask); shift 475 arch/powerpc/platforms/powermac/pfunc_core.c u32 shift = pmf_next32(cmd); shift 479 arch/powerpc/platforms/powermac/pfunc_core.c offset, shift, mask); shift 481 arch/powerpc/platforms/powermac/pfunc_core.c PMF_PARSE_CALL(write_reg8_slm, cmd, h, offset, shift, mask); shift 321 arch/powerpc/platforms/powernv/ocxl.c int shift, idx; shift 325 arch/powerpc/platforms/powernv/ocxl.c shift = 4 * (1 - ((PNV_OCXL_TL_MAX_TEMPLATE - templ) % 2)); shift 326 arch/powerpc/platforms/powernv/ocxl.c buf[idx] |= rate << shift; shift 34 arch/powerpc/platforms/powernv/pci-ioda-tce.c static __be64 *pnv_alloc_tce_level(int nid, unsigned int shift) shift 40 arch/powerpc/platforms/powernv/pci-ioda-tce.c shift - PAGE_SHIFT); shift 43 arch/powerpc/platforms/powernv/pci-ioda-tce.c shift); shift 47 arch/powerpc/platforms/powernv/pci-ioda-tce.c memset(addr, 0, 1UL << shift); shift 59 arch/powerpc/platforms/powernv/pci-ioda-tce.c const long shift = ilog2(tbl->it_level_size); shift 60 arch/powerpc/platforms/powernv/pci-ioda-tce.c unsigned long mask = (tbl->it_level_size - 1) << (level * shift); shift 63 arch/powerpc/platforms/powernv/pci-ioda-tce.c int n = (idx & mask) >> (level * shift); shift 89 arch/powerpc/platforms/powernv/pci-ioda-tce.c mask >>= shift; shift 229 arch/powerpc/platforms/powernv/pci-ioda-tce.c static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned int shift, shift 234 arch/powerpc/platforms/powernv/pci-ioda-tce.c unsigned long allocated = 1UL << shift; shift 235 arch/powerpc/platforms/powernv/pci-ioda-tce.c unsigned int entries = 1UL << (shift - 3); shift 238 arch/powerpc/platforms/powernv/pci-ioda-tce.c addr = pnv_alloc_tce_level(nid, shift); shift 248 arch/powerpc/platforms/powernv/pci-ioda-tce.c tmp = pnv_pci_ioda2_table_do_alloc_pages(nid, shift, shift 2008 arch/powerpc/platforms/powernv/pci-ioda.c unsigned shift, unsigned long index, shift 2020 arch/powerpc/platforms/powernv/pci-ioda.c start |= (index << shift); shift 2021 arch/powerpc/platforms/powernv/pci-ioda.c end |= ((index + npages - 1) << shift); shift 2022 arch/powerpc/platforms/powernv/pci-ioda.c inc = (0x1ull << shift); shift 2054 arch/powerpc/platforms/powernv/pci-ioda.c unsigned int shift = tbl->it_page_shift; shift 2071 arch/powerpc/platforms/powernv/pci-ioda.c pnv_pci_phb3_tce_invalidate(pe, rm, shift, shift 2076 arch/powerpc/platforms/powernv/pci-ioda.c pe->pe_number, 1u << shift, shift 2077 arch/powerpc/platforms/powernv/pci-ioda.c index << shift, npages); shift 30 arch/powerpc/platforms/powernv/vas-window.c u64 base, shift; shift 33 arch/powerpc/platforms/powernv/vas-window.c shift = window->vinst->paste_win_id_shift; shift 36 arch/powerpc/platforms/powernv/vas-window.c *addr = base + (winid << shift); shift 938 arch/powerpc/platforms/pseries/lpar.c hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize); shift 1086 arch/powerpc/platforms/pseries/lpar.c unsigned long shift, current_vpgb, vpgb; shift 1089 arch/powerpc/platforms/pseries/lpar.c shift = mmu_psize_defs[psize].shift; shift 1096 arch/powerpc/platforms/pseries/lpar.c vpgb = (vpn[i] >> (shift - VPN_SHIFT + 3)); shift 1193 arch/powerpc/platforms/pseries/lpar.c unsigned long shift, hidx, vpn = 0, hash, slot; shift 1195 arch/powerpc/platforms/pseries/lpar.c shift = mmu_psize_defs[psize].shift; shift 1196 arch/powerpc/platforms/pseries/lpar.c max_hpte_count = 1U << (PMD_SHIFT - shift); shift 1205 arch/powerpc/platforms/pseries/lpar.c addr = s_addr + (i * (1ul << shift)); shift 1207 arch/powerpc/platforms/pseries/lpar.c hash = hpt_hash(vpn, shift, ssize); shift 1266 arch/powerpc/platforms/pseries/lpar.c unsigned long shift, shift 1271 arch/powerpc/platforms/pseries/lpar.c hash = hpt_hash(vpn, shift, ssize); shift 1289 arch/powerpc/platforms/pseries/lpar.c unsigned long index, shift, slot, current_vpgb, vpgb; shift 1299 arch/powerpc/platforms/pseries/lpar.c pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) { shift 1304 arch/powerpc/platforms/pseries/lpar.c vpgb = (vpn >> (shift - VPN_SHIFT + 3)); shift 1319 arch/powerpc/platforms/pseries/lpar.c slot = compute_slot(pte, vpn, index, shift, ssize); shift 1488 arch/powerpc/platforms/pseries/lpar.c unsigned long index, shift, slot; shift 1506 arch/powerpc/platforms/pseries/lpar.c pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) { shift 1507 arch/powerpc/platforms/pseries/lpar.c slot = compute_slot(pte, vpn, index, shift, ssize); shift 1558 arch/powerpc/platforms/pseries/lpar.c unsigned long shift; shift 1566 arch/powerpc/platforms/pseries/lpar.c state->commit_rc = plpar_resize_hpt_commit(0, state->shift); shift 1571 arch/powerpc/platforms/pseries/lpar.c ppc64_pft_size = state->shift; shift 1582 arch/powerpc/platforms/pseries/lpar.c static int pseries_lpar_resize_hpt(unsigned long shift) shift 1585 arch/powerpc/platforms/pseries/lpar.c .shift = shift, shift 1597 arch/powerpc/platforms/pseries/lpar.c pr_info("Attempting to resize HPT to shift %lu\n", shift); shift 1601 arch/powerpc/platforms/pseries/lpar.c rc = plpar_resize_hpt_prepare(0, shift); shift 1614 arch/powerpc/platforms/pseries/lpar.c rc = plpar_resize_hpt_prepare(0, shift); shift 1653 arch/powerpc/platforms/pseries/lpar.c shift, (long long) ktime_ms_delta(t1, t0), shift 142 arch/powerpc/sysdev/cpm2.c int shift; shift 212 arch/powerpc/sysdev/cpm2.c shift = 24; shift 216 arch/powerpc/sysdev/cpm2.c shift = 16; shift 220 arch/powerpc/sysdev/cpm2.c shift = 8; shift 224 arch/powerpc/sysdev/cpm2.c shift = 0; shift 228 arch/powerpc/sysdev/cpm2.c shift = 24; shift 232 arch/powerpc/sysdev/cpm2.c shift = 16; shift 236 arch/powerpc/sysdev/cpm2.c shift = 8; shift 252 arch/powerpc/sysdev/cpm2.c bits <<= shift; shift 253 arch/powerpc/sysdev/cpm2.c mask <<= shift; shift 272 arch/powerpc/sysdev/cpm2.c int shift; shift 295 arch/powerpc/sysdev/cpm2.c shift = 4; shift 300 arch/powerpc/sysdev/cpm2.c shift = 0; shift 316 arch/powerpc/sysdev/cpm2.c bits <<= shift; shift 317 arch/powerpc/sysdev/cpm2.c mask <<= shift; shift 36 arch/powerpc/xmon/ppc-dis.c if (operand->shift >= 0) shift 37 arch/powerpc/xmon/ppc-dis.c value = (insn >> operand->shift) & operand->bitm; shift 39 arch/powerpc/xmon/ppc-dis.c value = (insn << -operand->shift) & operand->bitm; shift 242 arch/powerpc/xmon/ppc.h int shift; shift 444 arch/powerpc/xmon/ppc.h return (operand+1)->shift; shift 527 arch/riscv/net/bpf_jit_comp.c int shift; shift 542 arch/riscv/net/bpf_jit_comp.c shift = __ffs(upper); shift 543 arch/riscv/net/bpf_jit_comp.c upper >>= shift; shift 544 arch/riscv/net/bpf_jit_comp.c shift += 12; shift 548 arch/riscv/net/bpf_jit_comp.c emit(rv_slli(rd, rd, shift), ctx); shift 842 arch/riscv/net/bpf_jit_comp.c int shift = 64 - imm; shift 844 arch/riscv/net/bpf_jit_comp.c emit(rv_slli(rd, rd, shift), ctx); shift 845 arch/riscv/net/bpf_jit_comp.c emit(rv_srli(rd, rd, shift), ctx); shift 1238 arch/s390/include/asm/pgtable.h unsigned int shift; shift 1243 arch/s390/include/asm/pgtable.h shift = ((rste & _REGION_ENTRY_TYPE_MASK) >> 2) * 11 + 20; shift 1244 arch/s390/include/asm/pgtable.h return pgd + ((address >> shift) & (PTRS_PER_PGD - 1)); shift 49 arch/s390/kernel/dis.c unsigned char shift; /* The number of bits to shift. */ shift 350 arch/s390/kernel/dis.c cp = code + operand->shift / 8; shift 351 arch/s390/kernel/dis.c bits = (operand->shift & 7) + operand->bits; shift 362 arch/s390/kernel/dis.c if (operand->bits == 20 && operand->shift == 20) shift 367 arch/s390/kernel/dis.c if (operand->shift == 8) shift 369 arch/s390/kernel/dis.c else if (operand->shift == 12) shift 371 arch/s390/kernel/dis.c else if (operand->shift == 16) shift 373 arch/s390/kernel/dis.c else if (operand->shift == 32) shift 177 arch/s390/kernel/module.c int sign, int bits, int shift) shift 182 arch/s390/kernel/module.c if (val & ((1UL << shift) - 1)) shift 185 arch/s390/kernel/module.c val = (Elf_Addr)(((long) val) >> shift); shift 191 arch/s390/kernel/module.c val >>= shift; shift 172 arch/s390/kernel/time.c cd->shift = 12; shift 267 arch/s390/kernel/time.c .shift = 12, shift 292 arch/s390/kernel/time.c + ((u64) tk->wall_to_monotonic.tv_nsec << tk->tkr_mono.shift); shift 293 arch/s390/kernel/time.c nsecps = (u64) NSEC_PER_SEC << tk->tkr_mono.shift; shift 301 arch/s390/kernel/time.c (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); shift 312 arch/s390/kernel/time.c vdso_data->tk_shift = tk->tkr_mono.shift; shift 204 arch/s390/pci/pci_mmio.c int shift = ulen * 8; shift 230 arch/s390/pci/pci_mmio.c [shift] "+d" (shift) shift 63 arch/sh/boards/mach-x3proto/ilsel.c unsigned int tmp, shift; shift 69 arch/sh/boards/mach-x3proto/ilsel.c shift = mk_ilsel_shift(bit); shift 72 arch/sh/boards/mach-x3proto/ilsel.c __func__, bit, addr, shift, set); shift 75 arch/sh/boards/mach-x3proto/ilsel.c tmp &= ~(0xf << shift); shift 76 arch/sh/boards/mach-x3proto/ilsel.c tmp |= set << shift; shift 65 arch/sh/drivers/pci/ops-sh4.c int shift; shift 75 arch/sh/drivers/pci/ops-sh4.c shift = (where & 3) << 3; shift 76 arch/sh/drivers/pci/ops-sh4.c data &= ~(0xff << shift); shift 77 arch/sh/drivers/pci/ops-sh4.c data |= ((val & 0xff) << shift); shift 80 arch/sh/drivers/pci/ops-sh4.c shift = (where & 2) << 3; shift 81 arch/sh/drivers/pci/ops-sh4.c data &= ~(0xffff << shift); shift 82 arch/sh/drivers/pci/ops-sh4.c data |= ((val & 0xffff) << shift); shift 129 arch/sh/drivers/pci/ops-sh7786.c int shift, ret; shift 148 arch/sh/drivers/pci/ops-sh7786.c shift = (where & 3) << 3; shift 149 arch/sh/drivers/pci/ops-sh7786.c data &= ~(0xff << shift); shift 150 arch/sh/drivers/pci/ops-sh7786.c data |= ((val & 0xff) << shift); shift 152 arch/sh/drivers/pci/ops-sh7786.c shift = (where & 2) << 3; shift 153 arch/sh/drivers/pci/ops-sh7786.c data &= ~(0xffff << shift); shift 154 arch/sh/drivers/pci/ops-sh7786.c data |= ((val & 0xffff) << shift); shift 14 arch/sh/include/asm/hw_irq.h unsigned char shift; /* Number of bits to shift the data */ shift 35 arch/sh/kernel/cpu/irq/ipr.c __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr); shift 44 arch/sh/kernel/cpu/irq/ipr.c __raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr); shift 149 arch/sh/kernel/dwarf.c int shift, count; shift 152 arch/sh/kernel/dwarf.c shift = 0; shift 160 arch/sh/kernel/dwarf.c result |= (byte & 0x7f) << shift; shift 161 arch/sh/kernel/dwarf.c shift += 7; shift 183 arch/sh/kernel/dwarf.c int result, shift; shift 188 arch/sh/kernel/dwarf.c shift = 0; shift 194 arch/sh/kernel/dwarf.c result |= (byte & 0x7f) << shift; shift 195 arch/sh/kernel/dwarf.c shift += 7; shift 205 arch/sh/kernel/dwarf.c if ((shift < num_bits) && (byte & 0x40)) shift 206 arch/sh/kernel/dwarf.c result |= (-1 << shift); shift 181 arch/sh/kernel/perf_event.c int shift = 0; shift 211 arch/sh/kernel/perf_event.c delta = (new_raw_count << shift) - (prev_raw_count << shift); shift 212 arch/sh/kernel/perf_event.c delta >>= shift; shift 649 arch/sh/kernel/traps_64.c unsigned long index, shift; shift 691 arch/sh/kernel/traps_64.c shift = minor << 1; shift 692 arch/sh/kernel/traps_64.c opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3; shift 21 arch/sparc/include/asm/vvar.h int shift; shift 113 arch/sparc/kernel/iommu-common.c unsigned long shift; shift 152 arch/sparc/kernel/iommu-common.c shift = iommu->table_map_base >> iommu->table_shift; shift 153 arch/sparc/kernel/iommu-common.c if (limit + shift > mask) { shift 154 arch/sparc/kernel/iommu-common.c limit = mask - shift + 1; shift 182 arch/sparc/kernel/iommu-common.c shift = 0; shift 185 arch/sparc/kernel/iommu-common.c n = iommu_area_alloc(iommu->map, limit, start, npages, shift, shift 255 arch/sparc/kernel/iommu-common.c unsigned long shift = iommu->table_shift; shift 258 arch/sparc/kernel/iommu-common.c entry = (dma_addr - iommu->table_map_base) >> shift; shift 39 arch/sparc/kernel/iommu_common.h unsigned long shift, shift 48 arch/sparc/kernel/iommu_common.h return iommu_is_span_boundary(entry, nr, shift, boundary_size); shift 1026 arch/sparc/kernel/ldc.c unsigned long i, shift; shift 1028 arch/sparc/kernel/ldc.c shift = (cookie >> COOKIE_PGSZ_CODE_SHIFT) * 3; shift 1032 arch/sparc/kernel/ldc.c sun4v_ldc_revoke(id, cookie + (i << shift), shift 652 arch/sparc/kernel/pci_sun4v.c unsigned long shift = IO_PAGE_SHIFT; shift 665 arch/sparc/kernel/pci_sun4v.c entry = ((dma_handle - tbl->table_map_base) >> shift); shift 193 arch/sparc/kernel/perf_event.c u64 shift, mask, pic; shift 195 arch/sparc/kernel/perf_event.c shift = 0; shift 197 arch/sparc/kernel/perf_event.c shift = 32; shift 199 arch/sparc/kernel/perf_event.c mask = ((u64) 0xffffffff) << shift; shift 200 arch/sparc/kernel/perf_event.c val <<= shift; shift 866 arch/sparc/kernel/perf_event.c int shift = 64 - 32; shift 878 arch/sparc/kernel/perf_event.c delta = (new_raw_count << shift) - (prev_raw_count << shift); shift 879 arch/sparc/kernel/perf_event.c delta >>= shift; shift 132 arch/sparc/kernel/time_32.c ce->shift = 32; shift 134 arch/sparc/kernel/time_32.c ce->shift); shift 228 arch/sparc/kernel/time_32.c ce->shift = 32; shift 230 arch/sparc/kernel/time_32.c ce->shift); shift 711 arch/sparc/kernel/time_64.c .shift = 30, shift 862 arch/sparc/kernel/time_64.c clocksource_tick.mult, clocksource_tick.shift); shift 875 arch/sparc/kernel/time_64.c sparc64_clockevent.mult, sparc64_clockevent.shift); shift 37 arch/sparc/kernel/vdso.c vdata->clock.shift = tk->tkr_mono.shift; shift 46 arch/sparc/kernel/vdso.c tk->tkr_mono.shift); shift 49 arch/sparc/kernel/vdso.c (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) { shift 51 arch/sparc/kernel/vdso.c ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift; shift 57 arch/sparc/kernel/vdso.c (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); shift 135 arch/sparc/mm/hugetlbpage.c static pte_t sun4u_hugepage_shift_to_tte(pte_t entry, unsigned int shift) shift 140 arch/sparc/mm/hugetlbpage.c static pte_t sun4v_hugepage_shift_to_tte(pte_t entry, unsigned int shift) shift 146 arch/sparc/mm/hugetlbpage.c switch (shift) { shift 166 arch/sparc/mm/hugetlbpage.c WARN_ONCE(1, "unsupported hugepage shift=%u\n", shift); shift 173 arch/sparc/mm/hugetlbpage.c static pte_t hugepage_shift_to_tte(pte_t entry, unsigned int shift) shift 176 arch/sparc/mm/hugetlbpage.c return sun4v_hugepage_shift_to_tte(entry, shift); shift 178 arch/sparc/mm/hugetlbpage.c return sun4u_hugepage_shift_to_tte(entry, shift); shift 184 arch/sparc/mm/hugetlbpage.c unsigned int shift = huge_page_shift(hstate_vma(vma)); shift 187 arch/sparc/mm/hugetlbpage.c pte = hugepage_shift_to_tte(entry, shift); shift 204 arch/sparc/mm/hugetlbpage.c unsigned int shift; shift 208 arch/sparc/mm/hugetlbpage.c shift = HPAGE_16GB_SHIFT; shift 211 arch/sparc/mm/hugetlbpage.c shift = HPAGE_2GB_SHIFT; shift 214 arch/sparc/mm/hugetlbpage.c shift = HPAGE_256MB_SHIFT; shift 217 arch/sparc/mm/hugetlbpage.c shift = REAL_HPAGE_SHIFT; shift 220 arch/sparc/mm/hugetlbpage.c shift = HPAGE_64K_SHIFT; shift 223 arch/sparc/mm/hugetlbpage.c shift = PAGE_SHIFT; shift 226 arch/sparc/mm/hugetlbpage.c return shift; shift 232 arch/sparc/mm/hugetlbpage.c unsigned int shift; shift 236 arch/sparc/mm/hugetlbpage.c shift = HPAGE_256MB_SHIFT; shift 239 arch/sparc/mm/hugetlbpage.c shift = REAL_HPAGE_SHIFT; shift 242 arch/sparc/mm/hugetlbpage.c shift = HPAGE_64K_SHIFT; shift 245 arch/sparc/mm/hugetlbpage.c shift = PAGE_SHIFT; shift 248 arch/sparc/mm/hugetlbpage.c return shift; shift 253 arch/sparc/mm/hugetlbpage.c unsigned long shift; shift 256 arch/sparc/mm/hugetlbpage.c shift = sun4v_huge_tte_to_shift(entry); shift 258 arch/sparc/mm/hugetlbpage.c shift = sun4u_huge_tte_to_shift(entry); shift 260 arch/sparc/mm/hugetlbpage.c if (shift == PAGE_SHIFT) shift 264 arch/sparc/mm/hugetlbpage.c return shift; shift 323 arch/sparc/mm/hugetlbpage.c unsigned int nptes, orig_shift, shift; shift 329 arch/sparc/mm/hugetlbpage.c shift = PAGE_SHIFT; shift 331 arch/sparc/mm/hugetlbpage.c shift = PUD_SHIFT; shift 333 arch/sparc/mm/hugetlbpage.c shift = PMD_SHIFT; shift 335 arch/sparc/mm/hugetlbpage.c shift = PAGE_SHIFT; shift 337 arch/sparc/mm/hugetlbpage.c nptes = size >> shift; shift 347 arch/sparc/mm/hugetlbpage.c ptep[i] = __pte(pte_val(entry) + (i << shift)); shift 359 arch/sparc/mm/hugetlbpage.c unsigned int i, nptes, orig_shift, shift; shift 366 arch/sparc/mm/hugetlbpage.c shift = PAGE_SHIFT; shift 368 arch/sparc/mm/hugetlbpage.c shift = PUD_SHIFT; shift 370 arch/sparc/mm/hugetlbpage.c shift = PMD_SHIFT; shift 372 arch/sparc/mm/hugetlbpage.c shift = PAGE_SHIFT; shift 374 arch/sparc/mm/hugetlbpage.c nptes = size >> shift; shift 2291 arch/sparc/mm/init_64.c unsigned long end_pfn, shift, phys_base; shift 2396 arch/sparc/mm/init_64.c shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE); shift 2406 arch/sparc/mm/init_64.c init_mm.pgd += ((shift) / (sizeof(pgd_t))); shift 412 arch/sparc/net/bpf_jit_comp_64.c int lowest_bit_set, int shift) shift 417 arch/sparc/net/bpf_jit_comp_64.c lo = (low_bits >> lowest_bit_set) << shift; shift 418 arch/sparc/net/bpf_jit_comp_64.c hi = ((high_bits << (32 - lowest_bit_set)) << shift); shift 421 arch/sparc/net/bpf_jit_comp_64.c hi = ((high_bits >> (lowest_bit_set - 32)) << shift); shift 493 arch/sparc/net/bpf_jit_comp_64.c int shift = lowest_bit_set; shift 502 arch/sparc/net/bpf_jit_comp_64.c shift = -(63 - highest_bit_set); shift 505 arch/sparc/net/bpf_jit_comp_64.c if (shift > 0) shift 506 arch/sparc/net/bpf_jit_comp_64.c emit_alu_K(SLLX, dest, shift, ctx); shift 507 arch/sparc/net/bpf_jit_comp_64.c else if (shift < 0) shift 508 arch/sparc/net/bpf_jit_comp_64.c emit_alu_K(SRLX, dest, -shift, ctx); shift 157 arch/sparc/vdso/vclock_gettime.c ns >>= vvar->clock.shift; shift 177 arch/sparc/vdso/vclock_gettime.c ns >>= vvar->clock.shift; shift 197 arch/sparc/vdso/vclock_gettime.c ns >>= vvar->clock.shift; shift 217 arch/sparc/vdso/vclock_gettime.c ns >>= vvar->clock.shift; shift 116 arch/um/kernel/time.c .shift = 0, shift 157 arch/x86/events/amd/ibs.c int shift = 64 - width; shift 181 arch/x86/events/amd/ibs.c delta = (new_raw_count << shift) - (prev_raw_count << shift); shift 182 arch/x86/events/amd/ibs.c delta >>= shift; shift 159 arch/x86/events/amd/iommu.c u32 shift, bank, cntr; shift 165 arch/x86/events/amd/iommu.c for (bank = 0, shift = 0; bank < max_banks; bank++) { shift 167 arch/x86/events/amd/iommu.c shift = bank + (bank*3) + cntr; shift 168 arch/x86/events/amd/iommu.c if (piommu->cntr_assign_mask & BIT_ULL(shift)) { shift 171 arch/x86/events/amd/iommu.c piommu->cntr_assign_mask |= BIT_ULL(shift); shift 190 arch/x86/events/amd/iommu.c int shift = 0; shift 198 arch/x86/events/amd/iommu.c shift = bank + cntr + (bank*3); shift 201 arch/x86/events/amd/iommu.c perf_iommu->cntr_assign_mask &= ~(1ULL<<shift); shift 71 arch/x86/events/core.c int shift = 64 - x86_pmu.cntval_bits; shift 102 arch/x86/events/core.c delta = (new_raw_count << shift) - (prev_raw_count << shift); shift 103 arch/x86/events/core.c delta >>= shift; shift 1669 arch/x86/events/intel/ds.c int shift = 64 - x86_pmu.cntval_bits; shift 1712 arch/x86/events/intel/ds.c new = ((s64)(new_raw_count << shift) >> shift); shift 1713 arch/x86/events/intel/ds.c old = ((s64)(prev_raw_count << shift) >> shift); shift 75 arch/x86/events/intel/pt.c unsigned int shift = __ffs(cd->mask); shift 77 arch/x86/events/intel/pt.c return (c & cd->mask) >> shift; shift 181 arch/x86/events/intel/rapl.c int shift = RAPL_CNTR_WIDTH; shift 201 arch/x86/events/intel/rapl.c delta = (new_raw_count << shift) - (prev_raw_count << shift); shift 202 arch/x86/events/intel/rapl.c delta >>= shift; shift 236 arch/x86/events/intel/uncore.c int shift; shift 239 arch/x86/events/intel/uncore.c shift = 64 - uncore_freerunning_bits(box, event); shift 241 arch/x86/events/intel/uncore.c shift = 64 - uncore_fixed_ctr_bits(box); shift 243 arch/x86/events/intel/uncore.c shift = 64 - uncore_perf_ctr_bits(box); shift 252 arch/x86/events/intel/uncore.c delta = (new_count << shift) - (prev_count << shift); shift 253 arch/x86/events/intel/uncore.c delta >>= shift; shift 42 arch/x86/include/asm/pvclock.h static inline u64 pvclock_scale_delta(u64 delta, u32 mul_frac, int shift) shift 51 arch/x86/include/asm/pvclock.h if (shift < 0) shift 52 arch/x86/include/asm/pvclock.h delta >>= -shift; shift 54 arch/x86/include/asm/pvclock.h delta <<= shift; shift 356 arch/x86/kernel/apb_timer.c u32 loop, shift; shift 388 arch/x86/kernel/apb_timer.c shift = 5; shift 389 arch/x86/kernel/apb_timer.c if (unlikely(loop >> shift == 0)) { shift 394 arch/x86/kernel/apb_timer.c scale = (int)div_u64((t2 - t1), loop >> shift); shift 395 arch/x86/kernel/apb_timer.c khz = (scale * (apbt_freq / 1000)) >> shift; shift 535 arch/x86/kernel/apic/apic.c .shift = 32, shift 813 arch/x86/kernel/apic/apic.c TICK_NSEC, lapic_clockevent.shift); shift 790 arch/x86/kernel/apic/x2apic_uv_x.c int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT; shift 806 arch/x86/kernel/apic/x2apic_uv_x.c base = (gru.v & mask) >> shift; shift 807 arch/x86/kernel/apic/x2apic_uv_x.c map_high("GRU", base, shift, shift, max_pnode, map_wb); shift 808 arch/x86/kernel/apic/x2apic_uv_x.c gru_start_paddr = ((u64)base << shift); shift 809 arch/x86/kernel/apic/x2apic_uv_x.c gru_end_paddr = gru_start_paddr + (1UL << shift) * (max_pnode + 1); shift 815 arch/x86/kernel/apic/x2apic_uv_x.c int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT; shift 819 arch/x86/kernel/apic/x2apic_uv_x.c map_high("MMR", mmr.s.base, shift, shift, max_pnode, map_uc); shift 832 arch/x86/kernel/apic/x2apic_uv_x.c int i, n, shift, m_io, max_io; shift 844 arch/x86/kernel/apic/x2apic_uv_x.c shift = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0_MMR_M_IO_SHFT; shift 855 arch/x86/kernel/apic/x2apic_uv_x.c shift = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG1_MMR_M_IO_SHFT; shift 902 arch/x86/kernel/apic/x2apic_uv_x.c addr1 = (base << shift) + f * (1ULL << m_io); shift 903 arch/x86/kernel/apic/x2apic_uv_x.c addr2 = (base << shift) + (l + 1) * (1ULL << m_io); shift 912 arch/x86/kernel/apic/x2apic_uv_x.c pr_info("UV: %s base:0x%lx shift:%d M_IO:%d MAX_IO:%d\n", id, base, shift, m_io, max_io); shift 915 arch/x86/kernel/apic/x2apic_uv_x.c map_high(id, base, shift, m_io, max_io, map_uc); shift 922 arch/x86/kernel/apic/x2apic_uv_x.c int shift, enable, m_io, n_io; shift 933 arch/x86/kernel/apic/x2apic_uv_x.c shift = UV1H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT; shift 941 arch/x86/kernel/apic/x2apic_uv_x.c shift = UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT; shift 953 arch/x86/kernel/apic/x2apic_uv_x.c pr_info("UV: base:0x%lx shift:%d N_IO:%d M_IO:%d max_pnode:0x%x\n", base, shift, m_io, n_io, max_pnode); shift 954 arch/x86/kernel/apic/x2apic_uv_x.c map_high("MMIOH", base, shift, m_io, max_pnode, map_uc); shift 658 arch/x86/kernel/cpu/mce/core.c u8 shift = MCI_MISC_ADDR_LSB(m->misc); shift 659 arch/x86/kernel/cpu/mce/core.c m->addr >>= shift; shift 660 arch/x86/kernel/cpu/mce/core.c m->addr <<= shift; shift 17 arch/x86/kernel/cpu/mtrr/cyrix.c unsigned char arr, ccr3, rcr, shift; shift 34 arch/x86/kernel/cpu/mtrr/cyrix.c shift = ((unsigned char *) base)[1] & 0x0f; shift 41 arch/x86/kernel/cpu/mtrr/cyrix.c if (shift) shift 42 arch/x86/kernel/cpu/mtrr/cyrix.c *size = (reg < 7 ? 0x1UL : 0x40UL) << (shift - 1); shift 219 arch/x86/kernel/cpu/resctrl/monitor.c u64 shift = 64 - MBM_CNTR_WIDTH, chunks; shift 221 arch/x86/kernel/cpu/resctrl/monitor.c chunks = (cur_msr << shift) - (prev_msr << shift); shift 222 arch/x86/kernel/cpu/resctrl/monitor.c return chunks >>= shift; shift 303 arch/x86/kernel/hpet.c delta >>= evt->shift; shift 1095 arch/x86/kernel/hpet.c clc >>= evt->shift + DEFAULT_RTC_SHIFT; shift 1193 arch/x86/kernel/hpet.c clc >>= evt->shift; shift 640 arch/x86/kvm/mmu.c int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; shift 642 arch/x86/kvm/mmu.c return (gpte & PT32_DIR_PSE36_MASK) << shift; shift 7184 arch/x86/kvm/vmx/vmx.c static inline int u64_shl_div_u64(u64 a, unsigned int shift, shift 7187 arch/x86/kvm/vmx/vmx.c u64 low = a << shift, high = a >> (64 - shift); shift 1627 arch/x86/kvm/x86.c u32 shift; shift 1651 arch/x86/kvm/x86.c vdata->clock.shift = tk->tkr_mono.shift; shift 1722 arch/x86/kvm/x86.c int32_t shift = 0; shift 1730 arch/x86/kvm/x86.c shift--; shift 1739 arch/x86/kvm/x86.c shift++; shift 1742 arch/x86/kvm/x86.c *pshift = shift; shift 2128 arch/x86/kvm/x86.c ns >>= gtod->clock.shift; shift 2148 arch/x86/kvm/x86.c ns >>= gtod->clock.shift; shift 55 arch/x86/math-emu/poly_2xm1.c long int exponent, shift; shift 74 arch/x86/math-emu/poly_2xm1.c shift = (argSignif.msw & 0x40000000) ? 3 : 2; shift 80 arch/x86/math-emu/poly_2xm1.c shift = 1; shift 86 arch/x86/math-emu/poly_2xm1.c shift = 0; shift 102 arch/x86/math-emu/poly_2xm1.c if (shift) { shift 108 arch/x86/math-emu/poly_2xm1.c mul_Xsig_Xsig(&accumulator, shiftterm[shift]); shift 231 arch/x86/mm/dump_pagetables.c int shift; shift 235 arch/x86/mm/dump_pagetables.c shift = 64 - (__VIRTUAL_MASK_SHIFT + 1); shift 236 arch/x86/mm/dump_pagetables.c return (signed long)(u << shift) >> shift; shift 35 arch/x86/platform/uv/uv_time.c .shift = 20, shift 376 arch/x86/platform/uv/uv_time.c NSEC_PER_SEC, clock_event_device_uv.shift); shift 101 arch/x86/xen/time.c now.tv_nsec = (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); shift 225 arch/x86/xen/time.c .shift = 0, shift 286 arch/x86/xen/time.c .shift = 0, shift 63 block/badblocks.c if (bb->shift > 0) { shift 65 block/badblocks.c s >>= bb->shift; shift 66 block/badblocks.c target += (1<<bb->shift) - 1; shift 67 block/badblocks.c target >>= bb->shift; shift 171 block/badblocks.c if (bb->shift < 0) shift 175 block/badblocks.c if (bb->shift) { shift 179 block/badblocks.c s >>= bb->shift; shift 180 block/badblocks.c next += (1<<bb->shift) - 1; shift 181 block/badblocks.c next >>= bb->shift; shift 338 block/badblocks.c if (bb->shift > 0) { shift 345 block/badblocks.c s += (1<<bb->shift) - 1; shift 346 block/badblocks.c s >>= bb->shift; shift 347 block/badblocks.c target >>= bb->shift; shift 474 block/badblocks.c if (bb->shift < 0) shift 494 block/badblocks.c (unsigned long long)s << bb->shift, shift 495 block/badblocks.c length << bb->shift); shift 550 block/badblocks.c bb->shift = 0; shift 552 block/badblocks.c bb->shift = -1; shift 558 block/badblocks.c bb->shift = -1; shift 6335 block/bfq-iosched.c bfqd->word_depths[0][0] = max((1U << bt->sb.shift) >> 1, 1U); shift 6341 block/bfq-iosched.c bfqd->word_depths[0][1] = max(((1U << bt->sb.shift) * 3) >> 2, 1U); shift 6351 block/bfq-iosched.c bfqd->word_depths[1][0] = max(((1U << bt->sb.shift) * 3) >> 4, 1U); shift 6353 block/bfq-iosched.c bfqd->word_depths[1][1] = max(((1U << bt->sb.shift) * 6) >> 4, 1U); shift 362 block/kyber-iosched.c return q->queue_hw_ctx[0]->sched_tags->bitmap_tags.sb.shift; shift 368 block/kyber-iosched.c unsigned int shift; shift 403 block/kyber-iosched.c shift = kyber_sched_tags_shift(q); shift 404 block/kyber-iosched.c kqd->async_depth = (1U << shift) * KYBER_ASYNC_PERCENT / 100U; shift 222 crypto/ecc.c static u64 vli_lshift(u64 *result, const u64 *in, unsigned int shift, shift 231 crypto/ecc.c result[i] = (temp << shift) | carry; shift 232 crypto/ecc.c carry = temp >> (64 - shift); shift 608 crypto/ecc.c int shift = (ndigits * 2 * 64) - vli_num_bits(mod, ndigits); shift 609 crypto/ecc.c int word_shift = shift / 64; shift 610 crypto/ecc.c int bit_shift = shift % 64; shift 621 crypto/ecc.c for (i = 1; shift >= 0; --shift) { shift 81 drivers/ata/ahci_sunxi.c static u32 sunxi_getbits(void __iomem *reg, u8 mask, u8 shift) shift 83 drivers/ata/ahci_sunxi.c return (readl(reg) >> shift) & mask; shift 894 drivers/ata/libata-core.c int shift, bits; shift 921 drivers/ata/libata-core.c for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) shift 922 drivers/ata/libata-core.c if (highbit >= ent->shift && highbit < ent->shift + ent->bits) shift 923 drivers/ata/libata-core.c return ent->base + highbit - ent->shift; shift 943 drivers/ata/libata-core.c for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) shift 945 drivers/ata/libata-core.c return ((2 << (ent->shift + xfer_mode - ent->base)) - 1) shift 946 drivers/ata/libata-core.c & ~((1 << ent->shift) - 1); shift 966 drivers/ata/libata-core.c for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) shift 968 drivers/ata/libata-core.c return ent->shift; shift 3366 drivers/ata/libata-core.c for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) shift 3367 drivers/ata/libata-core.c if (ent->shift == xfer_shift) shift 146 drivers/ata/pata_ali.c int shift = 4 * adev->devno; shift 153 drivers/ata/pata_ali.c fifo &= ~(0x0F << shift); shift 154 drivers/ata/pata_ali.c fifo |= (on << shift); shift 177 drivers/ata/pata_ali.c int shift = 4 * adev->devno; shift 194 drivers/ata/pata_ali.c udma &= ~(0x0F << shift); shift 195 drivers/ata/pata_ali.c udma |= ultra << shift; shift 202 drivers/ata/pata_cmd64x.c int shift = 2 * adev->devno; shift 210 drivers/ata/pata_cmd64x.c regU &= ~(0x30 << shift); shift 216 drivers/ata/pata_cmd64x.c regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift; shift 125 drivers/ata/pata_efar.c int shift = 4 * ap->port_no; shift 134 drivers/ata/pata_efar.c slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; shift 51 drivers/ata/pata_platform.c unsigned int shift) shift 54 drivers/ata/pata_platform.c ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << shift); shift 55 drivers/ata/pata_platform.c ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << shift); shift 56 drivers/ata/pata_platform.c ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << shift); shift 57 drivers/ata/pata_platform.c ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << shift); shift 58 drivers/ata/pata_platform.c ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << shift); shift 59 drivers/ata/pata_platform.c ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << shift); shift 60 drivers/ata/pata_platform.c ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << shift); shift 61 drivers/ata/pata_platform.c ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << shift); shift 62 drivers/ata/pata_platform.c ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << shift); shift 63 drivers/ata/pata_platform.c ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << shift); shift 280 drivers/ata/pata_via.c int shift = 2 * offset; shift 283 drivers/ata/pata_via.c setup &= ~(3 << shift); shift 284 drivers/ata/pata_via.c setup |= (clamp_val(t.setup, 1, 4) - 1) << shift; shift 89 drivers/ata/sata_highbank.c u32 shift) shift 91 drivers/ata/sata_highbank.c return 1 << (3 * pdata->port_to_sgpio[port] + shift); shift 883 drivers/ata/sata_mv.c #define MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport) \ shift 885 drivers/ata/sata_mv.c shift = mv_hc_from_port(port) * HC_SHIFT; \ shift 887 drivers/ata/sata_mv.c shift += hardport * 2; \ shift 1053 drivers/ata/sata_mv.c unsigned int shift, hardport, port = ap->port_no; shift 1056 drivers/ata/sata_mv.c MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport); shift 1058 drivers/ata/sata_mv.c disable_bits = (DONE_IRQ | ERR_IRQ) << shift; shift 1059 drivers/ata/sata_mv.c enable_bits = port_bits << shift; shift 2893 drivers/ata/sata_mv.c unsigned int p, shift, hardport, port_cause; shift 2895 drivers/ata/sata_mv.c MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport); shift 2901 drivers/ata/sata_mv.c u32 hc_cause = (main_irq_cause >> shift) & HC0_IRQ_PEND; shift 2939 drivers/ata/sata_mv.c port_cause = (main_irq_cause >> shift) & (DONE_IRQ | ERR_IRQ); shift 1561 drivers/ata/sata_nv.c int shift = ap->port_no * NV_INT_PORT_SHIFT; shift 1565 drivers/ata/sata_nv.c mask &= ~(NV_INT_ALL << shift); shift 1572 drivers/ata/sata_nv.c int shift = ap->port_no * NV_INT_PORT_SHIFT; shift 1575 drivers/ata/sata_nv.c iowrite8(NV_INT_ALL << shift, scr_addr + NV_INT_STATUS); shift 1578 drivers/ata/sata_nv.c mask |= (NV_INT_MASK << shift); shift 1585 drivers/ata/sata_nv.c int shift = ap->port_no * NV_INT_PORT_SHIFT; shift 1589 drivers/ata/sata_nv.c mask &= ~(NV_INT_ALL << shift); shift 1596 drivers/ata/sata_nv.c int shift = ap->port_no * NV_INT_PORT_SHIFT; shift 1599 drivers/ata/sata_nv.c writeb(NV_INT_ALL << shift, mmio_base + NV_INT_STATUS_CK804); shift 1602 drivers/ata/sata_nv.c mask |= (NV_INT_MASK << shift); shift 1609 drivers/ata/sata_nv.c int shift = ap->port_no * NV_INT_PORT_SHIFT_MCP55; shift 1612 drivers/ata/sata_nv.c writel(NV_INT_ALL_MCP55 << shift, mmio_base + NV_INT_STATUS_MCP55); shift 1615 drivers/ata/sata_nv.c mask &= ~(NV_INT_ALL_MCP55 << shift); shift 1622 drivers/ata/sata_nv.c int shift = ap->port_no * NV_INT_PORT_SHIFT_MCP55; shift 1625 drivers/ata/sata_nv.c writel(NV_INT_ALL_MCP55 << shift, mmio_base + NV_INT_STATUS_MCP55); shift 1628 drivers/ata/sata_nv.c mask |= (NV_INT_MASK_MCP55 << shift); shift 43 drivers/atm/suni.c #define REG_CHANGE(mask,shift,value,reg) \ shift 44 drivers/atm/suni.c PUT((GET(reg) & ~(mask)) | ((value) << (shift)),reg) shift 541 drivers/atm/zatm.c int pos,shift; shift 550 drivers/atm/zatm.c shift = (1-(vcc->vci & 1)) << 4; shift 551 drivers/atm/zatm.c zpokel(zatm_dev,(zpeekl(zatm_dev,pos) & ~(0xffff << shift)) | shift 552 drivers/atm/zatm.c ((zatm_vcc->rx_chan | uPD98401_RXLT_ENBL) << shift),pos); shift 563 drivers/atm/zatm.c int pos,shift; shift 573 drivers/atm/zatm.c shift = (1-(vcc->vci & 1)) << 4; shift 574 drivers/atm/zatm.c zpokel(zatm_dev,zpeekl(zatm_dev,pos) & ~(0xffff << shift),pos); shift 491 drivers/auxdisplay/charlcd.c int shift; shift 507 drivers/auxdisplay/charlcd.c shift = 0; shift 510 drivers/auxdisplay/charlcd.c shift ^= 4; shift 512 drivers/auxdisplay/charlcd.c value |= (*esc - '0') << shift; shift 514 drivers/auxdisplay/charlcd.c value |= (*esc - 'A' + 10) << shift; shift 516 drivers/auxdisplay/charlcd.c value |= (*esc - 'a' + 10) << shift; shift 522 drivers/auxdisplay/charlcd.c if (shift == 0) { shift 37 drivers/base/regmap/internal.h void (*format_reg)(void *buf, unsigned int reg, unsigned int shift); shift 38 drivers/base/regmap/internal.h void (*format_val)(void *buf, unsigned int val, unsigned int shift); shift 211 drivers/base/regmap/internal.h unsigned int shift; shift 243 drivers/base/regmap/regmap.c static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) shift 247 drivers/base/regmap/regmap.c b[0] = val << shift; shift 250 drivers/base/regmap/regmap.c static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) shift 254 drivers/base/regmap/regmap.c b[0] = cpu_to_be16(val << shift); shift 257 drivers/base/regmap/regmap.c static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) shift 261 drivers/base/regmap/regmap.c b[0] = cpu_to_le16(val << shift); shift 265 drivers/base/regmap/regmap.c unsigned int shift) shift 267 drivers/base/regmap/regmap.c *(u16 *)buf = val << shift; shift 270 drivers/base/regmap/regmap.c static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) shift 274 drivers/base/regmap/regmap.c val <<= shift; shift 281 drivers/base/regmap/regmap.c static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) shift 285 drivers/base/regmap/regmap.c b[0] = cpu_to_be32(val << shift); shift 288 drivers/base/regmap/regmap.c static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) shift 292 drivers/base/regmap/regmap.c b[0] = cpu_to_le32(val << shift); shift 296 drivers/base/regmap/regmap.c unsigned int shift) shift 298 drivers/base/regmap/regmap.c *(u32 *)buf = val << shift; shift 302 drivers/base/regmap/regmap.c static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift) shift 306 drivers/base/regmap/regmap.c b[0] = cpu_to_be64((u64)val << shift); shift 309 drivers/base/regmap/regmap.c static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift) shift 313 drivers/base/regmap/regmap.c b[0] = cpu_to_le64((u64)val << shift); shift 317 drivers/base/regmap/regmap.c unsigned int shift) shift 319 drivers/base/regmap/regmap.c *(u64 *)buf = (u64)val << shift; shift 1210 drivers/base/regmap/regmap.c rm_field->shift = reg_field.lsb; shift 2010 drivers/base/regmap/regmap.c mask = (mask << field->shift) & field->mask; shift 2013 drivers/base/regmap/regmap.c mask, val << field->shift, shift 2040 drivers/base/regmap/regmap.c mask = (mask << field->shift) & field->mask; shift 2044 drivers/base/regmap/regmap.c mask, val << field->shift, shift 2748 drivers/base/regmap/regmap.c reg_val >>= field->shift; shift 2781 drivers/base/regmap/regmap.c reg_val >>= field->shift; shift 204 drivers/bcma/sprom.c static s8 sprom_extract_antgain(const u16 *in, u16 offset, u16 mask, u16 shift) shift 210 drivers/bcma/sprom.c gain = (v & mask) >> shift; shift 75 drivers/block/drbd/drbd_proc.c unsigned int shift = *rs_total > UINT_MAX ? 16 : 10; shift 76 drivers/block/drbd/drbd_proc.c unsigned long left = *bits_left >> shift; shift 77 drivers/block/drbd/drbd_proc.c unsigned long total = 1UL + (*rs_total >> shift); shift 382 drivers/block/null_blk_main.c cmpxchg(&t_dev->badblocks.shift, -1, 0); shift 1230 drivers/block/null_blk_main.c if (nullb->dev->badblocks.shift != -1) { shift 1790 drivers/block/rbd.c u64 *index, u8 *shift) shift 1796 drivers/block/rbd.c *shift = (OBJS_PER_BYTE - off - 1) * BITS_PER_OBJ; shift 1802 drivers/block/rbd.c u8 shift; shift 1805 drivers/block/rbd.c __rbd_object_map_index(rbd_dev, objno, &index, &shift); shift 1806 drivers/block/rbd.c return (rbd_dev->object_map[index] >> shift) & OBJ_MASK; shift 1812 drivers/block/rbd.c u8 shift; shift 1818 drivers/block/rbd.c __rbd_object_map_index(rbd_dev, objno, &index, &shift); shift 1820 drivers/block/rbd.c *p = (*p & ~(OBJ_MASK << shift)) | (val << shift); shift 172 drivers/block/umem.c static void set_led(struct cardinfo *card, int shift, unsigned char state) shift 178 drivers/block/umem.c led ^= (1<<shift); shift 180 drivers/block/umem.c led &= ~(0x03 << shift); shift 181 drivers/block/umem.c led |= (state << shift); shift 55 drivers/bus/da8xx-mstpri.c int shift; shift 62 drivers/bus/da8xx-mstpri.c .shift = 0, shift 67 drivers/bus/da8xx-mstpri.c .shift = 4, shift 72 drivers/bus/da8xx-mstpri.c .shift = 16, shift 77 drivers/bus/da8xx-mstpri.c .shift = 20, shift 82 drivers/bus/da8xx-mstpri.c .shift = 0, shift 87 drivers/bus/da8xx-mstpri.c .shift = 4, shift 92 drivers/bus/da8xx-mstpri.c .shift = 8, shift 97 drivers/bus/da8xx-mstpri.c .shift = 12, shift 102 drivers/bus/da8xx-mstpri.c .shift = 16, shift 107 drivers/bus/da8xx-mstpri.c .shift = 24, shift 112 drivers/bus/da8xx-mstpri.c .shift = 28, shift 117 drivers/bus/da8xx-mstpri.c .shift = 0, shift 122 drivers/bus/da8xx-mstpri.c .shift = 8, shift 127 drivers/bus/da8xx-mstpri.c .shift = 12, shift 132 drivers/bus/da8xx-mstpri.c .shift = 20, shift 137 drivers/bus/da8xx-mstpri.c .shift = 24, shift 142 drivers/bus/da8xx-mstpri.c .shift = 28, shift 240 drivers/bus/da8xx-mstpri.c reg |= prio->val << prio_descr->shift; shift 29 drivers/bus/omap_l3_smx.h static const u64 shift = 1; shift 31 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_MPUIA_BRST (shift << 0) shift 32 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_MPUIA_RSP (shift << 1) shift 33 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_MPUIA_INBAND (shift << 2) shift 34 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_IVAIA_BRST (shift << 6) shift 35 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_IVAIA_RSP (shift << 7) shift 36 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_IVAIA_INBAND (shift << 8) shift 37 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_SGXIA_BRST (shift << 9) shift 38 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_SGXIA_RSP (shift << 10) shift 39 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_SGXIA_MERROR (shift << 11) shift 40 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_CAMIA_BRST (shift << 12) shift 41 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_CAMIA_RSP (shift << 13) shift 42 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_CAMIA_INBAND (shift << 14) shift 43 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_DISPIA_BRST (shift << 15) shift 44 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_DISPIA_RSP (shift << 16) shift 45 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_DMARDIA_BRST (shift << 18) shift 46 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_DMARDIA_RSP (shift << 19) shift 47 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_DMAWRIA_BRST (shift << 21) shift 48 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_DMAWRIA_RSP (shift << 22) shift 49 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_USBOTGIA_BRST (shift << 24) shift 50 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_USBOTGIA_RSP (shift << 25) shift 51 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_USBOTGIA_INBAND (shift << 26) shift 52 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_USBHOSTIA_BRST (shift << 27) shift 53 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_USBHOSTIA_INBAND (shift << 28) shift 54 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_SMSTA_REQ (shift << 48) shift 55 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_GPMCTA_REQ (shift << 49) shift 56 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_OCMRAMTA_REQ (shift << 50) shift 57 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_OCMROMTA_REQ (shift << 51) shift 58 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_IVATA_REQ (shift << 54) shift 59 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_SGXTA_REQ (shift << 55) shift 60 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_SGXTA_SERROR (shift << 56) shift 61 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_GPMCTA_SERROR (shift << 57) shift 62 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_L4CORETA_REQ (shift << 58) shift 63 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_L4PERTA_REQ (shift << 59) shift 64 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_L4EMUTA_REQ (shift << 60) shift 65 drivers/bus/omap_l3_smx.h #define L3_STATUS_0_MAD2DTA_REQ (shift << 61) shift 166 drivers/bus/qcom-ebi2.c u16 shift; shift 174 drivers/bus/qcom-ebi2.c .shift = EBI2_XMEM_RECOVERY_SHIFT, shift 180 drivers/bus/qcom-ebi2.c .shift = EBI2_XMEM_WR_HOLD_SHIFT, shift 186 drivers/bus/qcom-ebi2.c .shift = EBI2_XMEM_WR_DELTA_SHIFT, shift 192 drivers/bus/qcom-ebi2.c .shift = EBI2_XMEM_RD_DELTA_SHIFT, shift 198 drivers/bus/qcom-ebi2.c .shift = EBI2_XMEM_WR_WAIT_SHIFT, shift 204 drivers/bus/qcom-ebi2.c .shift = EBI2_XMEM_RD_WAIT_SHIFT, shift 210 drivers/bus/qcom-ebi2.c .shift = EBI2_XMEM_ADDR_HOLD_ENA_SHIFT, shift 216 drivers/bus/qcom-ebi2.c .shift = EBI2_XMEM_ADV_OE_RECOVERY_SHIFT, shift 222 drivers/bus/qcom-ebi2.c .shift = EBI2_XMEM_RD_HOLD_SHIFT, shift 262 drivers/bus/qcom-ebi2.c slowcfg |= BIT(xp->shift); shift 264 drivers/bus/qcom-ebi2.c fastcfg |= BIT(xp->shift); shift 277 drivers/bus/qcom-ebi2.c slowcfg |= (val << xp->shift); shift 279 drivers/bus/qcom-ebi2.c fastcfg |= (val << xp->shift); shift 623 drivers/char/hw_random/n2-drv.c u64 base, shift; shift 629 drivers/char/hw_random/n2-drv.c shift = RNG_v1_CTL_VCO_SHIFT; shift 634 drivers/char/hw_random/n2-drv.c shift = RNG_v2_CTL_VCO_SHIFT; shift 644 drivers/char/hw_random/n2-drv.c (esrc << shift) | shift 43 drivers/clk/actions/owl-divider.c val = reg >> div_hw->shift; shift 73 drivers/clk/actions/owl-divider.c reg &= ~GENMASK(div_hw->width + div_hw->shift - 1, div_hw->shift); shift 76 drivers/clk/actions/owl-divider.c reg | (val << div_hw->shift)); shift 18 drivers/clk/actions/owl-divider.h u8 shift; shift 32 drivers/clk/actions/owl-divider.h .shift = _shift, \ shift 157 drivers/clk/actions/owl-factor.c val = reg >> factor_hw->shift; shift 198 drivers/clk/actions/owl-factor.c reg &= ~(div_mask(factor_hw) << factor_hw->shift); shift 199 drivers/clk/actions/owl-factor.c reg |= val << factor_hw->shift; shift 24 drivers/clk/actions/owl-factor.h u8 shift; shift 38 drivers/clk/actions/owl-factor.h .shift = _shift, \ shift 23 drivers/clk/actions/owl-mux.c parent = reg >> mux_hw->shift; shift 42 drivers/clk/actions/owl-mux.c reg &= ~GENMASK(mux_hw->width + mux_hw->shift - 1, mux_hw->shift); shift 44 drivers/clk/actions/owl-mux.c reg | (index << mux_hw->shift)); shift 18 drivers/clk/actions/owl-mux.h u8 shift; shift 30 drivers/clk/actions/owl-mux.h .shift = _shift, \ shift 92 drivers/clk/actions/owl-pll.c val = val >> pll_hw->shift; shift 104 drivers/clk/actions/owl-pll.c val = val >> pll_hw->shift; shift 178 drivers/clk/actions/owl-pll.c reg |= val << pll_hw->shift; shift 28 drivers/clk/actions/owl-pll.h u8 shift; shift 47 drivers/clk/actions/owl-pll.h .shift = _shift, \ shift 136 drivers/clk/at91/clk-peripheral.c int shift = 0; shift 147 drivers/clk/at91/clk-peripheral.c for (; shift < PERIPHERAL_MAX_SHIFT; shift++) { shift 148 drivers/clk/at91/clk-peripheral.c if (parent_rate >> shift <= periph->range.max) shift 154 drivers/clk/at91/clk-peripheral.c periph->div = shift; shift 245 drivers/clk/at91/clk-peripheral.c int shift = 0; shift 256 drivers/clk/at91/clk-peripheral.c for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) { shift 257 drivers/clk/at91/clk-peripheral.c cur_rate = *parent_rate >> shift; shift 268 drivers/clk/at91/clk-peripheral.c for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) { shift 269 drivers/clk/at91/clk-peripheral.c cur_rate = *parent_rate >> shift; shift 291 drivers/clk/at91/clk-peripheral.c int shift; shift 303 drivers/clk/at91/clk-peripheral.c for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) { shift 304 drivers/clk/at91/clk-peripheral.c if (parent_rate >> shift == rate) { shift 306 drivers/clk/at91/clk-peripheral.c periph->div = shift; shift 57 drivers/clk/at91/clk-programmable.c int shift; shift 67 drivers/clk/at91/clk-programmable.c for (shift = 0; shift <= layout->pres_mask; shift++) { shift 68 drivers/clk/at91/clk-programmable.c tmp_rate = parent_rate / (shift + 1); shift 73 drivers/clk/at91/clk-programmable.c for (shift = 0; shift < layout->pres_mask; shift++) { shift 74 drivers/clk/at91/clk-programmable.c tmp_rate = parent_rate >> shift; shift 146 drivers/clk/at91/clk-programmable.c int shift = 0; shift 152 drivers/clk/at91/clk-programmable.c shift = div - 1; shift 154 drivers/clk/at91/clk-programmable.c if (shift > layout->pres_mask) shift 157 drivers/clk/at91/clk-programmable.c shift = fls(div) - 1; shift 159 drivers/clk/at91/clk-programmable.c if (div != (1 << shift)) shift 162 drivers/clk/at91/clk-programmable.c if (shift >= layout->pres_mask) shift 168 drivers/clk/at91/clk-programmable.c shift << layout->pres_shift); shift 1359 drivers/clk/bcm/clk-bcm2835.c divider->div.shift = A2W_PLL_DIV_SHIFT; shift 26 drivers/clk/bcm/clk-cygnus.c #define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, } shift 31 drivers/clk/bcm/clk-cygnus.c #define SW_CTRL_VAL(o, s) { .offset = o, .shift = s, } shift 165 drivers/clk/bcm/clk-iproc-pll.c if (val & (1 << ctrl->status.shift)) shift 296 drivers/clk/bcm/clk-iproc-pll.c if ((val & (1 << ctrl->status.shift)) == 0) shift 300 drivers/clk/bcm/clk-iproc-pll.c ndiv_int = (val >> ctrl->ndiv_int.shift) & shift 307 drivers/clk/bcm/clk-iproc-pll.c pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); shift 369 drivers/clk/bcm/clk-iproc-pll.c ctrl->ndiv_frac.shift); shift 370 drivers/clk/bcm/clk-iproc-pll.c val |= vco->ndiv_frac << ctrl->ndiv_frac.shift; shift 384 drivers/clk/bcm/clk-iproc-pll.c ctrl->macro_mode.shift); shift 385 drivers/clk/bcm/clk-iproc-pll.c val |= PLL_USER_MODE << ctrl->macro_mode.shift; shift 406 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->ndiv_int.width) << ctrl->ndiv_int.shift); shift 407 drivers/clk/bcm/clk-iproc-pll.c val |= vco->ndiv_int << ctrl->ndiv_int.shift; shift 414 drivers/clk/bcm/clk-iproc-pll.c ctrl->ndiv_frac.shift); shift 415 drivers/clk/bcm/clk-iproc-pll.c val |= vco->ndiv_frac << ctrl->ndiv_frac.shift; shift 422 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->pdiv.width) << ctrl->pdiv.shift); shift 423 drivers/clk/bcm/clk-iproc-pll.c val |= vco->pdiv << ctrl->pdiv.shift; shift 473 drivers/clk/bcm/clk-iproc-pll.c if ((val & (1 << ctrl->status.shift)) == 0) shift 482 drivers/clk/bcm/clk-iproc-pll.c ndiv_int = (val >> ctrl->ndiv_int.shift) & shift 488 drivers/clk/bcm/clk-iproc-pll.c ndiv_frac = (val >> ctrl->ndiv_frac.shift) & shift 494 drivers/clk/bcm/clk-iproc-pll.c pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); shift 634 drivers/clk/bcm/clk-iproc-pll.c mdiv = (val >> ctrl->mdiv.shift) & bit_mask(ctrl->mdiv.width); shift 689 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift); shift 691 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift); shift 692 drivers/clk/bcm/clk-iproc-pll.c val |= div << ctrl->mdiv.shift; shift 719 drivers/clk/bcm/clk-iproc-pll.c val |= BIT(ctrl->sw_ctrl.shift); shift 103 drivers/clk/bcm/clk-iproc.h unsigned int shift; shift 154 drivers/clk/bcm/clk-iproc.h unsigned int shift; shift 199 drivers/clk/bcm/clk-kona-setup.c static bool bitfield_valid(u32 shift, u32 width, const char *field_name, shift 209 drivers/clk/bcm/clk-kona-setup.c if (shift + width > limit) { shift 211 drivers/clk/bcm/clk-kona-setup.c field_name, clock_name, shift, width, limit); shift 294 drivers/clk/bcm/clk-kona-setup.c if (!bitfield_valid(sel->shift, sel->width, field_name, clock_name)) shift 347 drivers/clk/bcm/clk-kona-setup.c if (!bitfield_valid(div->u.s.shift, div->u.s.width, shift 36 drivers/clk/bcm/clk-kona.c static inline u32 bitfield_mask(u32 shift, u32 width) shift 38 drivers/clk/bcm/clk-kona.c return ((1 << width) - 1) << shift; shift 42 drivers/clk/bcm/clk-kona.c static inline u32 bitfield_extract(u32 reg_val, u32 shift, u32 width) shift 44 drivers/clk/bcm/clk-kona.c return (reg_val & bitfield_mask(shift, width)) >> shift; shift 48 drivers/clk/bcm/clk-kona.c static inline u32 bitfield_replace(u32 reg_val, u32 shift, u32 width, u32 val) shift 50 drivers/clk/bcm/clk-kona.c u32 mask = bitfield_mask(shift, width); shift 52 drivers/clk/bcm/clk-kona.c return (reg_val & ~mask) | (val << shift); shift 578 drivers/clk/bcm/clk-kona.c reg_div = bitfield_extract(reg_val, div->u.s.shift, div->u.s.width); shift 608 drivers/clk/bcm/clk-kona.c reg_div = bitfield_extract(reg_val, div->u.s.shift, shift 627 drivers/clk/bcm/clk-kona.c reg_val = bitfield_replace(reg_val, div->u.s.shift, div->u.s.width, shift 856 drivers/clk/bcm/clk-kona.c parent_sel = bitfield_extract(reg_val, sel->shift, sel->width); shift 893 drivers/clk/bcm/clk-kona.c parent_sel = bitfield_extract(reg_val, sel->shift, sel->width); shift 912 drivers/clk/bcm/clk-kona.c reg_val = bitfield_replace(reg_val, sel->shift, sel->width, parent_sel); shift 270 drivers/clk/bcm/clk-kona.h u32 shift; /* field shift */ shift 302 drivers/clk/bcm/clk-kona.h .u.s.shift = (_shift), \ shift 312 drivers/clk/bcm/clk-kona.h .u.s.shift = (_shift), \ shift 341 drivers/clk/bcm/clk-kona.h u32 shift; /* field shift */ shift 353 drivers/clk/bcm/clk-kona.h .shift = (_shift), \ shift 24 drivers/clk/bcm/clk-ns2.c #define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, } shift 24 drivers/clk/bcm/clk-nsp.c #define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, } shift 14 drivers/clk/bcm/clk-sr.c #define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, } shift 19 drivers/clk/bcm/clk-sr.c #define SW_CTRL_VAL(o, s) { .offset = o, .shift = s, } shift 78 drivers/clk/clk-axm5516.c u32 shift; shift 94 drivers/clk/clk-axm5516.c div = 1 + ((ctrl >> divclk->shift) & ((1 << divclk->width)-1)); shift 113 drivers/clk/clk-axm5516.c u32 shift; shift 128 drivers/clk/clk-axm5516.c parent = (ctrl >> mux->shift) & ((1 << mux->width) - 1); shift 216 drivers/clk/clk-axm5516.c .shift = 0, shift 230 drivers/clk/clk-axm5516.c .shift = 4, shift 244 drivers/clk/clk-axm5516.c .shift = 8, shift 258 drivers/clk/clk-axm5516.c .shift = 12, shift 272 drivers/clk/clk-axm5516.c .shift = 0, shift 286 drivers/clk/clk-axm5516.c .shift = 4, shift 300 drivers/clk/clk-axm5516.c .shift = 8, shift 314 drivers/clk/clk-axm5516.c .shift = 12, shift 328 drivers/clk/clk-axm5516.c .shift = 16, shift 349 drivers/clk/clk-axm5516.c .shift = 0, shift 366 drivers/clk/clk-axm5516.c .shift = 2, shift 383 drivers/clk/clk-axm5516.c .shift = 4, shift 400 drivers/clk/clk-axm5516.c .shift = 6, shift 417 drivers/clk/clk-axm5516.c .shift = 0, shift 434 drivers/clk/clk-axm5516.c .shift = 2, shift 451 drivers/clk/clk-axm5516.c .shift = 4, shift 466 drivers/clk/clk-axm5516.c .shift = 6, shift 481 drivers/clk/clk-axm5516.c .shift = 9, shift 154 drivers/clk/clk-divider.c val = clk_div_readl(divider) >> divider->shift; shift 389 drivers/clk/clk-divider.c val = clk_div_readl(divider) >> divider->shift; shift 437 drivers/clk/clk-divider.c val = clk_div_mask(divider->width) << (divider->shift + 16); shift 440 drivers/clk/clk-divider.c val &= ~(clk_div_mask(divider->width) << divider->shift); shift 442 drivers/clk/clk-divider.c val |= (u32)value << divider->shift; shift 468 drivers/clk/clk-divider.c void __iomem *reg, u8 shift, u8 width, shift 478 drivers/clk/clk-divider.c if (width + shift > 16) { shift 500 drivers/clk/clk-divider.c div->shift = shift; shift 532 drivers/clk/clk-divider.c void __iomem *reg, u8 shift, u8 width, shift 537 drivers/clk/clk-divider.c hw = _register_divider(dev, name, parent_name, flags, reg, shift, shift 559 drivers/clk/clk-divider.c void __iomem *reg, u8 shift, u8 width, shift 562 drivers/clk/clk-divider.c return _register_divider(dev, name, parent_name, flags, reg, shift, shift 583 drivers/clk/clk-divider.c void __iomem *reg, u8 shift, u8 width, shift 589 drivers/clk/clk-divider.c hw = _register_divider(dev, name, parent_name, flags, reg, shift, shift 613 drivers/clk/clk-divider.c void __iomem *reg, u8 shift, u8 width, shift 617 drivers/clk/clk-divider.c return _register_divider(dev, name, parent_name, flags, reg, shift, shift 73 drivers/clk/clk-milbeaut.c u8 shift; shift 93 drivers/clk/clk-milbeaut.c u8 shift; shift 285 drivers/clk/clk-milbeaut.c val = readl(mux->reg) >> mux->shift; shift 305 drivers/clk/clk-milbeaut.c reg &= ~(mux->mask << mux->shift); shift 307 drivers/clk/clk-milbeaut.c val = (val | write_en) << mux->shift; shift 328 drivers/clk/clk-milbeaut.c u8 shift, u32 mask, u8 clk_mux_flags, u32 *table, shift 347 drivers/clk/clk-milbeaut.c mux->shift = shift; shift 368 drivers/clk/clk-milbeaut.c u8 shift; shift 382 drivers/clk/clk-milbeaut.c val = readl(divider->reg) >> divider->shift; shift 398 drivers/clk/clk-milbeaut.c val = readl(divider->reg) >> divider->shift; shift 430 drivers/clk/clk-milbeaut.c val &= ~(clk_div_mask(divider->width) << divider->shift); shift 432 drivers/clk/clk-milbeaut.c val |= ((u32)value | write_en) << divider->shift; shift 459 drivers/clk/clk-milbeaut.c void __iomem *reg, u8 shift, u8 width, shift 479 drivers/clk/clk-milbeaut.c div->shift = shift; shift 518 drivers/clk/clk-milbeaut.c factors->shift, shift 552 drivers/clk/clk-milbeaut.c base + factors->offset, factors->shift, shift 47 drivers/clk/clk-multiplier.c val = clk_mult_readl(mult) >> mult->shift; shift 139 drivers/clk/clk-multiplier.c val &= ~GENMASK(mult->width + mult->shift - 1, mult->shift); shift 140 drivers/clk/clk-multiplier.c val |= factor << mult->shift; shift 92 drivers/clk/clk-mux.c val = clk_mux_readl(mux) >> mux->shift; shift 111 drivers/clk/clk-mux.c reg = mux->mask << (mux->shift + 16); shift 114 drivers/clk/clk-mux.c reg &= ~(mux->mask << mux->shift); shift 116 drivers/clk/clk-mux.c val = val << mux->shift; shift 151 drivers/clk/clk-mux.c void __iomem *reg, u8 shift, u32 mask, shift 162 drivers/clk/clk-mux.c if (width + shift > 16) { shift 184 drivers/clk/clk-mux.c mux->shift = shift; shift 205 drivers/clk/clk-mux.c void __iomem *reg, u8 shift, u32 mask, shift 211 drivers/clk/clk-mux.c flags, reg, shift, mask, clk_mux_flags, shift 222 drivers/clk/clk-mux.c void __iomem *reg, u8 shift, u8 width, shift 228 drivers/clk/clk-mux.c flags, reg, shift, mask, clk_mux_flags, shift 236 drivers/clk/clk-mux.c void __iomem *reg, u8 shift, u8 width, shift 242 drivers/clk/clk-mux.c flags, reg, shift, mask, clk_mux_flags, shift 147 drivers/clk/clk-npcm7xx.c u8 shift; shift 180 drivers/clk/clk-npcm7xx.c u8 shift; shift 609 drivers/clk/clk-npcm7xx.c mux_data->shift, mux_data->mask, 0, shift 629 drivers/clk/clk-npcm7xx.c div_data->shift, div_data->width, shift 358 drivers/clk/clk-si5341.c unsigned int shift; shift 375 drivers/clk/clk-si5341.c shift = 0; shift 378 drivers/clk/clk-si5341.c ++shift; shift 382 drivers/clk/clk-si5341.c do_div(res, (m_den >> shift)); shift 873 drivers/clk/clk-si5351.c u8 shift = (num < 4) ? (2 * num) : (2 * (num-4)); shift 874 drivers/clk/clk-si5351.c u8 mask = SI5351_CLK_DISABLE_STATE_MASK << shift; shift 897 drivers/clk/clk-si5351.c si5351_set_bits(drvdata, reg, mask, val << shift); shift 534 drivers/clk/clk-stm32f4.c u8 shift; shift 571 drivers/clk/clk-stm32f4.c u8 shift; shift 747 drivers/clk/clk-stm32f4.c void __iomem *reg, u8 shift, u8 width, shift 769 drivers/clk/clk-stm32f4.c pll_div->div.shift = shift; shift 838 drivers/clk/clk-stm32f4.c div_data[i].shift, shift 1058 drivers/clk/clk-stm32f4.c void __iomem *reg, u8 bit_idx, u8 shift, unsigned long flags, shift 1084 drivers/clk/clk-stm32f4.c mux->shift = shift; shift 1160 drivers/clk/clk-stm32f4.c u8 shift; shift 1628 drivers/clk/clk-stm32f4.c int offset_mux, u8 shift, u8 mask, shift 1661 drivers/clk/clk-stm32f4.c mux->shift = shift; shift 1773 drivers/clk/clk-stm32f4.c post_div->shift, shift 1876 drivers/clk/clk-stm32f4.c aux_clk->offset_mux, aux_clk->shift, shift 258 drivers/clk/clk-stm32h7.c u8 shift; shift 295 drivers/clk/clk-stm32h7.c static struct clk_mux *_get_cmux(void __iomem *reg, u8 shift, u8 width, shift 305 drivers/clk/clk-stm32h7.c mux->shift = shift; shift 313 drivers/clk/clk-stm32h7.c static struct clk_divider *_get_cdiv(void __iomem *reg, u8 shift, u8 width, shift 324 drivers/clk/clk-stm32h7.c div->shift = shift; shift 376 drivers/clk/clk-stm32h7.c cfg->mux->shift, shift 389 drivers/clk/clk-stm32h7.c cfg->div->shift, shift 562 drivers/clk/clk-stm32h7.c u8 shift; shift 573 drivers/clk/clk-stm32h7.c .shift = _mux_shift,\ shift 1268 drivers/clk/clk-stm32h7.c stm32_mclk[n].shift, shift 341 drivers/clk/clk-stm32mp1.c u8 shift; shift 349 drivers/clk/clk-stm32mp1.c u8 shift; shift 423 drivers/clk/clk-stm32mp1.c div_cfg->shift, shift 440 drivers/clk/clk-stm32mp1.c mux_cfg->reg_off + base, mux_cfg->shift, shift 486 drivers/clk/clk-stm32mp1.c mmux->mux.shift = cfg->mux->shift; shift 501 drivers/clk/clk-stm32mp1.c mux->shift = cfg->mux->shift; shift 524 drivers/clk/clk-stm32mp1.c div->shift = cfg->div->shift; shift 1128 drivers/clk/clk-stm32mp1.c .shift = _shift,\ shift 1149 drivers/clk/clk-stm32mp1.c .shift = _shift,\ shift 1234 drivers/clk/clk-stm32mp1.c .shift = _div_shift,\ shift 1250 drivers/clk/clk-stm32mp1.c .shift = _shift,\ shift 1601 drivers/clk/clk-stm32mp1.c .shift = _shift,\ shift 224 drivers/clk/clk-xgene.c u8 shift; shift 259 drivers/clk/clk-xgene.c scale = (val & fd->mask) >> fd->shift; shift 323 drivers/clk/clk-xgene.c val |= (scale << fd->shift); shift 343 drivers/clk/clk-xgene.c unsigned long flags, void __iomem *reg, u8 shift, shift 361 drivers/clk/clk-xgene.c fd->shift = shift; shift 362 drivers/clk/clk-xgene.c fd->mask = (BIT(width) - 1) << shift; shift 262 drivers/clk/davinci/pll.c divider->shift = DIV_RATIO_SHIFT; shift 608 drivers/clk/davinci/pll.c divider->shift = DIV_RATIO_SHIFT; shift 709 drivers/clk/davinci/pll.c divider->shift = DIV_RATIO_SHIFT; shift 23 drivers/clk/hisilicon/clk-hisi-phase.c u8 shift; shift 48 drivers/clk/hisilicon/clk-hisi-phase.c regval = (regval & phase->mask) >> phase->shift; shift 80 drivers/clk/hisilicon/clk-hisi-phase.c val |= regval << phase->shift; shift 111 drivers/clk/hisilicon/clk-hisi-phase.c phase->shift = clks->shift; shift 112 drivers/clk/hisilicon/clk-hisi-phase.c phase->mask = (BIT(clks->width) - 1) << clks->shift; shift 163 drivers/clk/hisilicon/clk.c base + clks[i].offset, clks[i].shift, shift 224 drivers/clk/hisilicon/clk.c clks[i].shift, clks[i].width, shift 328 drivers/clk/hisilicon/clk.c clks[i].shift, shift 50 drivers/clk/hisilicon/clk.h u8 shift; shift 63 drivers/clk/hisilicon/clk.h u8 shift; shift 76 drivers/clk/hisilicon/clk.h u8 shift; shift 89 drivers/clk/hisilicon/clk.h u8 shift; shift 112 drivers/clk/hisilicon/clk.h u8 shift, u8 width, u32 mask_bit, spinlock_t *lock); shift 35 drivers/clk/hisilicon/clkdivider-hi6220.c u8 shift; shift 51 drivers/clk/hisilicon/clkdivider-hi6220.c val = readl_relaxed(dclk->reg) >> dclk->shift; shift 82 drivers/clk/hisilicon/clkdivider-hi6220.c data &= ~(div_mask(dclk->width) << dclk->shift); shift 83 drivers/clk/hisilicon/clkdivider-hi6220.c data |= value << dclk->shift; shift 102 drivers/clk/hisilicon/clkdivider-hi6220.c u8 shift, u8 width, u32 mask_bit, spinlock_t *lock) shift 139 drivers/clk/hisilicon/clkdivider-hi6220.c div->shift = shift; shift 15 drivers/clk/imx/clk-busy.c static int clk_busy_wait(void __iomem *reg, u8 shift) shift 19 drivers/clk/imx/clk-busy.c while (readl_relaxed(reg) & (1 << shift)) shift 30 drivers/clk/imx/clk-busy.c u8 shift; shift 64 drivers/clk/imx/clk-busy.c ret = clk_busy_wait(busy->reg, busy->shift); shift 76 drivers/clk/imx/clk-busy.c void __iomem *reg, u8 shift, u8 width, shift 89 drivers/clk/imx/clk-busy.c busy->shift = busy_shift; shift 92 drivers/clk/imx/clk-busy.c busy->div.shift = shift; shift 120 drivers/clk/imx/clk-busy.c u8 shift; shift 144 drivers/clk/imx/clk-busy.c ret = clk_busy_wait(busy->reg, busy->shift); shift 154 drivers/clk/imx/clk-busy.c struct clk_hw *imx_clk_hw_busy_mux(const char *name, void __iomem *reg, u8 shift, shift 168 drivers/clk/imx/clk-busy.c busy->shift = busy_shift; shift 171 drivers/clk/imx/clk-busy.c busy->mux.shift = shift; shift 42 drivers/clk/imx/clk-composite-7ulp.c mux->shift = PCG_PCS_SHIFT; shift 34 drivers/clk/imx/clk-composite-8m.c prediv_value = readl(divider->reg) >> divider->shift; shift 108 drivers/clk/imx/clk-composite-8m.c val &= ~((clk_div_mask(divider->width) << divider->shift) | shift 111 drivers/clk/imx/clk-composite-8m.c val |= (u32)(prediv_value - 1) << divider->shift; shift 143 drivers/clk/imx/clk-composite-8m.c mux->shift = PCG_PCS_SHIFT; shift 153 drivers/clk/imx/clk-composite-8m.c div->shift = PCG_PREDIV_SHIFT; shift 32 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg) >> div->shift; shift 54 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg) >> div->shift; shift 91 drivers/clk/imx/clk-divider-gate.c val &= ~(clk_div_mask(div->width) << div->shift); shift 92 drivers/clk/imx/clk-divider-gate.c val |= (u32)value << div->shift; shift 118 drivers/clk/imx/clk-divider-gate.c val |= div_gate->cached_val << div->shift; shift 136 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg) >> div->shift; shift 149 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg) >> div->shift; shift 178 drivers/clk/imx/clk-divider-gate.c u8 shift, u8 width, u8 clk_divider_flags, shift 202 drivers/clk/imx/clk-divider-gate.c div_gate->divider.shift = shift; shift 209 drivers/clk/imx/clk-divider-gate.c val = readl(reg) >> shift; shift 72 drivers/clk/imx/clk-fixup-div.c val &= ~(div_mask(div) << div->shift); shift 73 drivers/clk/imx/clk-fixup-div.c val |= value << div->shift; shift 89 drivers/clk/imx/clk-fixup-div.c void __iomem *reg, u8 shift, u8 width, shift 111 drivers/clk/imx/clk-fixup-div.c fixup_div->divider.shift = shift; shift 51 drivers/clk/imx/clk-fixup-mux.c val &= ~(mux->mask << mux->shift); shift 52 drivers/clk/imx/clk-fixup-mux.c val |= index << mux->shift; shift 67 drivers/clk/imx/clk-fixup-mux.c u8 shift, u8 width, const char * const *parents, shift 89 drivers/clk/imx/clk-fixup-mux.c fixup_mux->mux.shift = shift; shift 59 drivers/clk/imx/clk-gate-exclusive.c void __iomem *reg, u8 shift, u32 exclusive_mask) shift 82 drivers/clk/imx/clk-gate-exclusive.c gate->bit_idx = shift; shift 67 drivers/clk/imx/clk.h #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \ shift 68 drivers/clk/imx/clk.h to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask)) shift 73 drivers/clk/imx/clk.h #define imx_clk_divider2(name, parent, reg, shift, width) \ shift 74 drivers/clk/imx/clk.h to_clk(imx_clk_hw_divider2(name, parent, reg, shift, width)) shift 76 drivers/clk/imx/clk.h #define imx_clk_gate_dis(name, parent, reg, shift) \ shift 77 drivers/clk/imx/clk.h to_clk(imx_clk_hw_gate_dis(name, parent, reg, shift)) shift 79 drivers/clk/imx/clk.h #define imx_clk_gate2(name, parent, reg, shift) \ shift 80 drivers/clk/imx/clk.h to_clk(imx_clk_hw_gate2(name, parent, reg, shift)) shift 82 drivers/clk/imx/clk.h #define imx_clk_gate2_flags(name, parent, reg, shift, flags) \ shift 83 drivers/clk/imx/clk.h to_clk(imx_clk_hw_gate2_flags(name, parent, reg, shift, flags)) shift 85 drivers/clk/imx/clk.h #define imx_clk_gate2_shared2(name, parent, reg, shift, share_count) \ shift 86 drivers/clk/imx/clk.h to_clk(imx_clk_hw_gate2_shared2(name, parent, reg, shift, share_count)) shift 88 drivers/clk/imx/clk.h #define imx_clk_gate3(name, parent, reg, shift) \ shift 89 drivers/clk/imx/clk.h to_clk(imx_clk_hw_gate3(name, parent, reg, shift)) shift 91 drivers/clk/imx/clk.h #define imx_clk_gate4(name, parent, reg, shift) \ shift 92 drivers/clk/imx/clk.h to_clk(imx_clk_hw_gate4(name, parent, reg, shift)) shift 94 drivers/clk/imx/clk.h #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ shift 95 drivers/clk/imx/clk.h to_clk(imx_clk_hw_mux(name, reg, shift, width, parents, num_parents)) shift 168 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, u32 exclusive_mask); shift 177 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, u8 width, shift 180 drivers/clk/imx/clk.h struct clk_hw *imx_clk_hw_busy_mux(const char *name, void __iomem *reg, u8 shift, shift 191 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, u8 width, shift 195 drivers/clk/imx/clk.h u8 shift, u8 width, const char * const *parents, shift 216 drivers/clk/imx/clk.h u8 shift, u8 width, const char * const *parents, shift 221 drivers/clk/imx/clk.h shift, width, CLK_MUX_READ_ONLY, &imx_ccm_lock); shift 232 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, u8 width) shift 235 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 240 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, shift 244 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 248 drivers/clk/imx/clk.h const char *parent, void __iomem *reg, u8 shift, u8 width, shift 252 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 257 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, shift 261 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 265 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, u8 width) shift 269 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 273 drivers/clk/imx/clk.h const char *parent, void __iomem *reg, u8 shift, u8 width, shift 278 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 282 drivers/clk/imx/clk.h void __iomem *reg, u8 shift) shift 285 drivers/clk/imx/clk.h shift, 0, &imx_ccm_lock); shift 289 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, unsigned long flags) shift 292 drivers/clk/imx/clk.h shift, 0, &imx_ccm_lock); shift 296 drivers/clk/imx/clk.h void __iomem *reg, u8 shift) shift 299 drivers/clk/imx/clk.h shift, 0, &imx_ccm_lock); shift 303 drivers/clk/imx/clk.h void __iomem *reg, u8 shift) shift 306 drivers/clk/imx/clk.h shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); shift 310 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, unsigned long flags) shift 313 drivers/clk/imx/clk.h shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); shift 317 drivers/clk/imx/clk.h void __iomem *reg, u8 shift) shift 320 drivers/clk/imx/clk.h shift, 0x3, 0, &imx_ccm_lock, NULL); shift 324 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, unsigned long flags) shift 327 drivers/clk/imx/clk.h shift, 0x3, 0, &imx_ccm_lock, NULL); shift 331 drivers/clk/imx/clk.h const char *parent, void __iomem *reg, u8 shift, shift 335 drivers/clk/imx/clk.h shift, 0x3, 0, &imx_ccm_lock, share_count); shift 339 drivers/clk/imx/clk.h const char *parent, void __iomem *reg, u8 shift, shift 343 drivers/clk/imx/clk.h CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0, shift 348 drivers/clk/imx/clk.h const char *parent, void __iomem *reg, u8 shift, u8 cgr_val) shift 351 drivers/clk/imx/clk.h shift, cgr_val, 0, &imx_ccm_lock, NULL); shift 355 drivers/clk/imx/clk.h void __iomem *reg, u8 shift) shift 359 drivers/clk/imx/clk.h reg, shift, 0, &imx_ccm_lock); shift 363 drivers/clk/imx/clk.h const char *parent, void __iomem *reg, u8 shift, shift 368 drivers/clk/imx/clk.h reg, shift, 0, &imx_ccm_lock); shift 372 drivers/clk/imx/clk.h void __iomem *reg, u8 shift) shift 376 drivers/clk/imx/clk.h reg, shift, 0x3, 0, &imx_ccm_lock, NULL); shift 380 drivers/clk/imx/clk.h const char *parent, void __iomem *reg, u8 shift, shift 385 drivers/clk/imx/clk.h reg, shift, 0x3, 0, &imx_ccm_lock, NULL); shift 389 drivers/clk/imx/clk.h u8 shift, u8 width, const char * const *parents, shift 393 drivers/clk/imx/clk.h CLK_SET_RATE_NO_REPARENT, reg, shift, shift 398 drivers/clk/imx/clk.h u8 shift, u8 width, const char * const *parents, shift 403 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 407 drivers/clk/imx/clk.h u8 shift, u8 width, shift 414 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 418 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, u8 width, shift 423 drivers/clk/imx/clk.h flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0, shift 428 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, u8 width, shift 434 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 438 drivers/clk/imx/clk.h void __iomem *reg, u8 shift, shift 446 drivers/clk/imx/clk.h reg, shift, width, 0, &imx_ccm_lock); shift 470 drivers/clk/imx/clk.h unsigned long flags, void __iomem *reg, u8 shift, u8 width, shift 298 drivers/clk/ingenic/cgu.c hw_idx = (reg >> clk_info->mux.shift) & shift 346 drivers/clk/ingenic/cgu.c mask <<= clk_info->mux.shift; shift 353 drivers/clk/ingenic/cgu.c reg |= hw_idx << clk_info->mux.shift; shift 376 drivers/clk/ingenic/cgu.c div = (div_reg >> clk_info->div.shift) & shift 488 drivers/clk/ingenic/cgu.c reg &= ~(mask << clk_info->div.shift); shift 489 drivers/clk/ingenic/cgu.c reg |= hw_div << clk_info->div.shift; shift 66 drivers/clk/ingenic/cgu.h u8 shift; shift 88 drivers/clk/ingenic/cgu.h u8 shift; shift 252 drivers/clk/keystone/pll.c u32 shift, mask; shift 270 drivers/clk/keystone/pll.c if (of_property_read_u32(node, "bit-shift", &shift)) { shift 282 drivers/clk/keystone/pll.c clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift, shift 300 drivers/clk/keystone/pll.c u32 shift, mask; shift 318 drivers/clk/keystone/pll.c if (of_property_read_u32(node, "bit-shift", &shift)) { shift 329 drivers/clk/keystone/pll.c ARRAY_SIZE(parents) , 0, reg, shift, mask, shift 26 drivers/clk/mediatek/clk-cpumux.c val >>= mux->shift; shift 37 drivers/clk/mediatek/clk-cpumux.c val = index << mux->shift; shift 38 drivers/clk/mediatek/clk-cpumux.c mask = mux->mask << mux->shift; shift 67 drivers/clk/mediatek/clk-cpumux.c cpumux->shift = mux->mux_shift; shift 15 drivers/clk/mediatek/clk-cpumux.h u8 shift; shift 52 drivers/clk/mediatek/clk-gate.h .shift = _shift, \ shift 23 drivers/clk/mediatek/clk-mt2701-aud.c .shift = _shift, \ shift 32 drivers/clk/mediatek/clk-mt2701-aud.c .shift = _shift, \ shift 41 drivers/clk/mediatek/clk-mt2701-aud.c .shift = _shift, \ shift 50 drivers/clk/mediatek/clk-mt2701-aud.c .shift = _shift, \ shift 32 drivers/clk/mediatek/clk-mt2701-bdp.c .shift = _shift, \ shift 41 drivers/clk/mediatek/clk-mt2701-bdp.c .shift = _shift, \ shift 24 drivers/clk/mediatek/clk-mt2701-eth.c .shift = _shift, \ shift 24 drivers/clk/mediatek/clk-mt2701-g3d.c .shift = _shift, \ shift 24 drivers/clk/mediatek/clk-mt2701-hif.c .shift = _shift, \ shift 26 drivers/clk/mediatek/clk-mt2701-img.c .shift = _shift, \ shift 32 drivers/clk/mediatek/clk-mt2701-mm.c .shift = _shift, \ shift 41 drivers/clk/mediatek/clk-mt2701-mm.c .shift = _shift, \ shift 32 drivers/clk/mediatek/clk-mt2701-vdec.c .shift = _shift, \ shift 41 drivers/clk/mediatek/clk-mt2701-vdec.c .shift = _shift, \ shift 643 drivers/clk/mediatek/clk-mt2701.c .shift = _shift, \ shift 708 drivers/clk/mediatek/clk-mt2701.c .shift = _shift, \ shift 809 drivers/clk/mediatek/clk-mt2701.c .shift = _shift, \ shift 818 drivers/clk/mediatek/clk-mt2701.c .shift = _shift, \ shift 26 drivers/clk/mediatek/clk-mt2712-bdp.c .shift = _shift, \ shift 26 drivers/clk/mediatek/clk-mt2712-img.c .shift = _shift, \ shift 26 drivers/clk/mediatek/clk-mt2712-jpgdec.c .shift = _shift, \ shift 26 drivers/clk/mediatek/clk-mt2712-mfg.c .shift = _shift, \ shift 38 drivers/clk/mediatek/clk-mt2712-mm.c .shift = _shift, \ shift 47 drivers/clk/mediatek/clk-mt2712-mm.c .shift = _shift, \ shift 56 drivers/clk/mediatek/clk-mt2712-mm.c .shift = _shift, \ shift 32 drivers/clk/mediatek/clk-mt2712-vdec.c .shift = _shift, \ shift 41 drivers/clk/mediatek/clk-mt2712-vdec.c .shift = _shift, \ shift 26 drivers/clk/mediatek/clk-mt2712-venc.c .shift = _shift, \ shift 965 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ shift 974 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ shift 1005 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ shift 1042 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ shift 1051 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ shift 1060 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ shift 24 drivers/clk/mediatek/clk-mt6797-img.c .shift = _shift, \ shift 31 drivers/clk/mediatek/clk-mt6797-mm.c .shift = _shift, \ shift 40 drivers/clk/mediatek/clk-mt6797-mm.c .shift = _shift, \ shift 32 drivers/clk/mediatek/clk-mt6797-vdec.c .shift = _shift, \ shift 41 drivers/clk/mediatek/clk-mt6797-vdec.c .shift = _shift, \ shift 26 drivers/clk/mediatek/clk-mt6797-venc.c .shift = _shift, \ shift 428 drivers/clk/mediatek/clk-mt6797.c .shift = _shift, \ shift 440 drivers/clk/mediatek/clk-mt6797.c .shift = _shift, \ shift 453 drivers/clk/mediatek/clk-mt6797.c .shift = _shift, \ shift 24 drivers/clk/mediatek/clk-mt7622-aud.c .shift = _shift, \ shift 33 drivers/clk/mediatek/clk-mt7622-aud.c .shift = _shift, \ shift 42 drivers/clk/mediatek/clk-mt7622-aud.c .shift = _shift, \ shift 51 drivers/clk/mediatek/clk-mt7622-aud.c .shift = _shift, \ shift 24 drivers/clk/mediatek/clk-mt7622-eth.c .shift = _shift, \ shift 53 drivers/clk/mediatek/clk-mt7622-eth.c .shift = _shift, \ shift 24 drivers/clk/mediatek/clk-mt7622-hif.c .shift = _shift, \ shift 33 drivers/clk/mediatek/clk-mt7622-hif.c .shift = _shift, \ shift 57 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ shift 66 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ shift 75 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ shift 84 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ shift 93 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ shift 102 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ shift 24 drivers/clk/mediatek/clk-mt7629-eth.c .shift = _shift, \ shift 53 drivers/clk/mediatek/clk-mt7629-eth.c .shift = _shift, \ shift 24 drivers/clk/mediatek/clk-mt7629-hif.c .shift = _shift, \ shift 33 drivers/clk/mediatek/clk-mt7629-hif.c .shift = _shift, \ shift 57 drivers/clk/mediatek/clk-mt7629.c .shift = _shift, \ shift 66 drivers/clk/mediatek/clk-mt7629.c .shift = _shift, \ shift 75 drivers/clk/mediatek/clk-mt7629.c .shift = _shift, \ shift 84 drivers/clk/mediatek/clk-mt7629.c .shift = _shift, \ shift 408 drivers/clk/mediatek/clk-mt8135.c .shift = _shift, \ shift 445 drivers/clk/mediatek/clk-mt8135.c .shift = _shift, \ shift 454 drivers/clk/mediatek/clk-mt8135.c .shift = _shift, \ shift 627 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 666 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 675 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 742 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 773 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 782 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 860 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 869 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 883 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 899 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ shift 30 drivers/clk/mediatek/clk-mt8516-aud.c .shift = _shift, \ shift 532 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ shift 541 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ shift 550 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ shift 559 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ shift 568 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ shift 577 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ shift 127 drivers/clk/mediatek/clk-mtk.c gate->shift, gate->ops, gate->flags, dev); shift 170 drivers/clk/mediatek/clk-mtk.c mux->shift = mc->mux_shift; shift 208 drivers/clk/mediatek/clk-mtk.c div->shift = mc->divider_shift; shift 163 drivers/clk/mediatek/clk-mtk.h int shift; shift 103 drivers/clk/meson/axg-aoclk.c .shift = 0, shift 108 drivers/clk/meson/axg-aoclk.c .shift = 12, shift 113 drivers/clk/meson/axg-aoclk.c .shift = 0, shift 118 drivers/clk/meson/axg-aoclk.c .shift = 12, shift 123 drivers/clk/meson/axg-aoclk.c .shift = 28, shift 142 drivers/clk/meson/axg-aoclk.c .shift = 24, shift 177 drivers/clk/meson/axg-aoclk.c .shift = 10, shift 196 drivers/clk/meson/axg-aoclk.c .shift = 8, shift 215 drivers/clk/meson/axg-aoclk.c .shift = 9, shift 231 drivers/clk/meson/axg-aoclk.c .shift = 0, shift 47 drivers/clk/meson/axg-audio.c .shift = (_shift), \ shift 63 drivers/clk/meson/axg-audio.c .shift = (_shift), \ shift 204 drivers/clk/meson/axg-audio.c .shift = (_div_shift), \ shift 209 drivers/clk/meson/axg-audio.c .shift = (_hi_shift), \ shift 251 drivers/clk/meson/axg-audio.c .shift = (_shift0), \ shift 256 drivers/clk/meson/axg-audio.c .shift = (_shift1), \ shift 261 drivers/clk/meson/axg-audio.c .shift = (_shift2), \ shift 368 drivers/clk/meson/axg-audio.c .shift = 29, \ shift 29 drivers/clk/meson/axg.c .shift = 30, shift 34 drivers/clk/meson/axg.c .shift = 0, shift 39 drivers/clk/meson/axg.c .shift = 9, shift 44 drivers/clk/meson/axg.c .shift = 0, shift 49 drivers/clk/meson/axg.c .shift = 31, shift 54 drivers/clk/meson/axg.c .shift = 29, shift 71 drivers/clk/meson/axg.c .shift = 16, shift 93 drivers/clk/meson/axg.c .shift = 30, shift 98 drivers/clk/meson/axg.c .shift = 0, shift 103 drivers/clk/meson/axg.c .shift = 9, shift 108 drivers/clk/meson/axg.c .shift = 31, shift 113 drivers/clk/meson/axg.c .shift = 29, shift 130 drivers/clk/meson/axg.c .shift = 16, shift 190 drivers/clk/meson/axg.c .shift = 30, shift 195 drivers/clk/meson/axg.c .shift = 0, shift 200 drivers/clk/meson/axg.c .shift = 9, shift 205 drivers/clk/meson/axg.c .shift = 0, shift 210 drivers/clk/meson/axg.c .shift = 31, shift 215 drivers/clk/meson/axg.c .shift = 29, shift 235 drivers/clk/meson/axg.c .shift = 16, shift 262 drivers/clk/meson/axg.c .shift = 30, shift 267 drivers/clk/meson/axg.c .shift = 0, shift 272 drivers/clk/meson/axg.c .shift = 9, shift 277 drivers/clk/meson/axg.c .shift = 0, shift 282 drivers/clk/meson/axg.c .shift = 31, shift 287 drivers/clk/meson/axg.c .shift = 29, shift 308 drivers/clk/meson/axg.c .shift = 16, shift 471 drivers/clk/meson/axg.c .shift = 12, shift 488 drivers/clk/meson/axg.c .shift = 0, shift 493 drivers/clk/meson/axg.c .shift = 15, shift 498 drivers/clk/meson/axg.c .shift = 16, shift 503 drivers/clk/meson/axg.c .shift = 0, shift 539 drivers/clk/meson/axg.c .shift = 0, shift 544 drivers/clk/meson/axg.c .shift = 15, shift 549 drivers/clk/meson/axg.c .shift = 16, shift 554 drivers/clk/meson/axg.c .shift = 1, shift 590 drivers/clk/meson/axg.c .shift = 0, shift 595 drivers/clk/meson/axg.c .shift = 15, shift 600 drivers/clk/meson/axg.c .shift = 16, shift 605 drivers/clk/meson/axg.c .shift = 25, shift 610 drivers/clk/meson/axg.c .shift = 2, shift 646 drivers/clk/meson/axg.c .shift = 12, shift 651 drivers/clk/meson/axg.c .shift = 11, shift 656 drivers/clk/meson/axg.c .shift = 2, shift 661 drivers/clk/meson/axg.c .shift = 3, shift 715 drivers/clk/meson/axg.c .shift = 30, shift 720 drivers/clk/meson/axg.c .shift = 0, shift 725 drivers/clk/meson/axg.c .shift = 9, shift 730 drivers/clk/meson/axg.c .shift = 0, shift 735 drivers/clk/meson/axg.c .shift = 31, shift 740 drivers/clk/meson/axg.c .shift = 29, shift 760 drivers/clk/meson/axg.c .shift = 16, shift 778 drivers/clk/meson/axg.c .shift = 6, shift 797 drivers/clk/meson/axg.c .shift = 2, shift 814 drivers/clk/meson/axg.c .shift = 1, shift 871 drivers/clk/meson/axg.c .shift = 12, shift 885 drivers/clk/meson/axg.c .shift = 0, shift 934 drivers/clk/meson/axg.c .shift = 25, shift 948 drivers/clk/meson/axg.c .shift = 16, shift 984 drivers/clk/meson/axg.c .shift = 9, shift 998 drivers/clk/meson/axg.c .shift = 0, shift 1049 drivers/clk/meson/axg.c .shift = 12, shift 1069 drivers/clk/meson/axg.c .shift = 0, shift 52 drivers/clk/meson/clk-cpu-dyndiv.c val = (unsigned int)ret << data->div.shift; shift 59 drivers/clk/meson/clk-cpu-dyndiv.c SETPMASK(data->div.width, data->div.shift) | shift 60 drivers/clk/meson/clk-cpu-dyndiv.c SETPMASK(data->dyn.width, data->dyn.shift), shift 72 drivers/clk/meson/clk-regmap.c val >>= div->shift; shift 93 drivers/clk/meson/clk-regmap.c val >>= div->shift; shift 117 drivers/clk/meson/clk-regmap.c val = (unsigned int)ret << div->shift; shift 119 drivers/clk/meson/clk-regmap.c clk_div_mask(div->width) << div->shift, val); shift 148 drivers/clk/meson/clk-regmap.c val >>= mux->shift; shift 160 drivers/clk/meson/clk-regmap.c mux->mask << mux->shift, shift 161 drivers/clk/meson/clk-regmap.c val << mux->shift); shift 69 drivers/clk/meson/clk-regmap.h u8 shift; shift 101 drivers/clk/meson/clk-regmap.h u8 shift; shift 122 drivers/clk/meson/g12a-aoclk.c .shift = 0, shift 127 drivers/clk/meson/g12a-aoclk.c .shift = 12, shift 132 drivers/clk/meson/g12a-aoclk.c .shift = 0, shift 137 drivers/clk/meson/g12a-aoclk.c .shift = 12, shift 142 drivers/clk/meson/g12a-aoclk.c .shift = 28, shift 161 drivers/clk/meson/g12a-aoclk.c .shift = 24, shift 213 drivers/clk/meson/g12a-aoclk.c .shift = 0, shift 218 drivers/clk/meson/g12a-aoclk.c .shift = 12, shift 223 drivers/clk/meson/g12a-aoclk.c .shift = 0, shift 228 drivers/clk/meson/g12a-aoclk.c .shift = 12, shift 233 drivers/clk/meson/g12a-aoclk.c .shift = 28, shift 252 drivers/clk/meson/g12a-aoclk.c .shift = 24, shift 287 drivers/clk/meson/g12a-aoclk.c .shift = 10, shift 306 drivers/clk/meson/g12a-aoclk.c .shift = 8, shift 325 drivers/clk/meson/g12a-aoclk.c .shift = 9, shift 341 drivers/clk/meson/g12a-aoclk.c .shift = 0, shift 33 drivers/clk/meson/g12a.c .shift = 28, shift 38 drivers/clk/meson/g12a.c .shift = 0, shift 43 drivers/clk/meson/g12a.c .shift = 10, shift 48 drivers/clk/meson/g12a.c .shift = 0, shift 53 drivers/clk/meson/g12a.c .shift = 31, shift 58 drivers/clk/meson/g12a.c .shift = 29, shift 75 drivers/clk/meson/g12a.c .shift = 16, shift 102 drivers/clk/meson/g12a.c .shift = 28, shift 107 drivers/clk/meson/g12a.c .shift = 0, shift 112 drivers/clk/meson/g12a.c .shift = 10, shift 117 drivers/clk/meson/g12a.c .shift = 31, shift 122 drivers/clk/meson/g12a.c .shift = 29, shift 142 drivers/clk/meson/g12a.c .shift = 16, shift 161 drivers/clk/meson/g12a.c .shift = 28, shift 166 drivers/clk/meson/g12a.c .shift = 0, shift 171 drivers/clk/meson/g12a.c .shift = 10, shift 176 drivers/clk/meson/g12a.c .shift = 31, shift 181 drivers/clk/meson/g12a.c .shift = 29, shift 201 drivers/clk/meson/g12a.c .shift = 16, shift 345 drivers/clk/meson/g12a.c .shift = 0, shift 366 drivers/clk/meson/g12a.c .shift = 16, shift 387 drivers/clk/meson/g12a.c .shift = 4, shift 392 drivers/clk/meson/g12a.c .shift = 26, shift 412 drivers/clk/meson/g12a.c .shift = 2, shift 431 drivers/clk/meson/g12a.c .shift = 20, shift 449 drivers/clk/meson/g12a.c .shift = 18, shift 469 drivers/clk/meson/g12a.c .shift = 10, shift 489 drivers/clk/meson/g12a.c .shift = 11, shift 509 drivers/clk/meson/g12a.c .shift = 11, shift 529 drivers/clk/meson/g12a.c .shift = 0, shift 550 drivers/clk/meson/g12a.c .shift = 4, shift 555 drivers/clk/meson/g12a.c .shift = 26, shift 575 drivers/clk/meson/g12a.c .shift = 2, shift 595 drivers/clk/meson/g12a.c .shift = 16, shift 615 drivers/clk/meson/g12a.c .shift = 20, shift 633 drivers/clk/meson/g12a.c .shift = 18, shift 653 drivers/clk/meson/g12a.c .shift = 10, shift 673 drivers/clk/meson/g12a.c .shift = 11, shift 695 drivers/clk/meson/g12a.c .shift = 0, shift 715 drivers/clk/meson/g12a.c .shift = 16, shift 734 drivers/clk/meson/g12a.c .shift = 4, shift 752 drivers/clk/meson/g12a.c .shift = 2, shift 769 drivers/clk/meson/g12a.c .shift = 20, shift 787 drivers/clk/meson/g12a.c .shift = 18, shift 805 drivers/clk/meson/g12a.c .shift = 10, shift 823 drivers/clk/meson/g12a.c .shift = 11, shift 841 drivers/clk/meson/g12a.c .shift = 24, shift 859 drivers/clk/meson/g12a.c .shift = 25, shift 877 drivers/clk/meson/g12a.c .shift = 26, shift 895 drivers/clk/meson/g12a.c .shift = 27, shift 1186 drivers/clk/meson/g12a.c .shift = 3, shift 1220 drivers/clk/meson/g12a.c .shift = 6, shift 1254 drivers/clk/meson/g12a.c .shift = 9, shift 1288 drivers/clk/meson/g12a.c .shift = 20, shift 1425 drivers/clk/meson/g12a.c .shift = 3, shift 1468 drivers/clk/meson/g12a.c .shift = 6, shift 1511 drivers/clk/meson/g12a.c .shift = 9, shift 1554 drivers/clk/meson/g12a.c .shift = 20, shift 1614 drivers/clk/meson/g12a.c .shift = 28, shift 1619 drivers/clk/meson/g12a.c .shift = 0, shift 1624 drivers/clk/meson/g12a.c .shift = 10, shift 1629 drivers/clk/meson/g12a.c .shift = 0, shift 1634 drivers/clk/meson/g12a.c .shift = 31, shift 1639 drivers/clk/meson/g12a.c .shift = 29, shift 1659 drivers/clk/meson/g12a.c .shift = 16, shift 1679 drivers/clk/meson/g12a.c .shift = 28, shift 1684 drivers/clk/meson/g12a.c .shift = 0, shift 1689 drivers/clk/meson/g12a.c .shift = 10, shift 1694 drivers/clk/meson/g12a.c .shift = 0, shift 1699 drivers/clk/meson/g12a.c .shift = 31, shift 1704 drivers/clk/meson/g12a.c .shift = 29, shift 1723 drivers/clk/meson/g12a.c .shift = 16, shift 1754 drivers/clk/meson/g12a.c .shift = 28, shift 1759 drivers/clk/meson/g12a.c .shift = 0, shift 1764 drivers/clk/meson/g12a.c .shift = 10, shift 1769 drivers/clk/meson/g12a.c .shift = 0, shift 1774 drivers/clk/meson/g12a.c .shift = 31, shift 1779 drivers/clk/meson/g12a.c .shift = 29, shift 1800 drivers/clk/meson/g12a.c .shift = 16, shift 1846 drivers/clk/meson/g12a.c .shift = 28, shift 1851 drivers/clk/meson/g12a.c .shift = 0, shift 1856 drivers/clk/meson/g12a.c .shift = 10, shift 1861 drivers/clk/meson/g12a.c .shift = 0, shift 1866 drivers/clk/meson/g12a.c .shift = 31, shift 1871 drivers/clk/meson/g12a.c .shift = 29, shift 1905 drivers/clk/meson/g12a.c .shift = 16, shift 1940 drivers/clk/meson/g12a.c .shift = 28, shift 1945 drivers/clk/meson/g12a.c .shift = 0, shift 1950 drivers/clk/meson/g12a.c .shift = 10, shift 1955 drivers/clk/meson/g12a.c .shift = 0, shift 1960 drivers/clk/meson/g12a.c .shift = 30, shift 1965 drivers/clk/meson/g12a.c .shift = 29, shift 1987 drivers/clk/meson/g12a.c .shift = 16, shift 2005 drivers/clk/meson/g12a.c .shift = 18, shift 2023 drivers/clk/meson/g12a.c .shift = 20, shift 2161 drivers/clk/meson/g12a.c .shift = 5, shift 2195 drivers/clk/meson/g12a.c .shift = 0, shift 2200 drivers/clk/meson/g12a.c .shift = 30, shift 2205 drivers/clk/meson/g12a.c .shift = 20, shift 2210 drivers/clk/meson/g12a.c .shift = 29, shift 2249 drivers/clk/meson/g12a.c .shift = 0, shift 2254 drivers/clk/meson/g12a.c .shift = 30, shift 2259 drivers/clk/meson/g12a.c .shift = 20, shift 2264 drivers/clk/meson/g12a.c .shift = 29, shift 2303 drivers/clk/meson/g12a.c .shift = 0, shift 2308 drivers/clk/meson/g12a.c .shift = 30, shift 2313 drivers/clk/meson/g12a.c .shift = 20, shift 2318 drivers/clk/meson/g12a.c .shift = 29, shift 2357 drivers/clk/meson/g12a.c .shift = 0, shift 2362 drivers/clk/meson/g12a.c .shift = 30, shift 2367 drivers/clk/meson/g12a.c .shift = 20, shift 2372 drivers/clk/meson/g12a.c .shift = 29, shift 2418 drivers/clk/meson/g12a.c .shift = 12, shift 2432 drivers/clk/meson/g12a.c .shift = 0, shift 2481 drivers/clk/meson/g12a.c .shift = 9, shift 2495 drivers/clk/meson/g12a.c .shift = 0, shift 2530 drivers/clk/meson/g12a.c .shift = 25, shift 2544 drivers/clk/meson/g12a.c .shift = 16, shift 2579 drivers/clk/meson/g12a.c .shift = 9, shift 2593 drivers/clk/meson/g12a.c .shift = 0, shift 2629 drivers/clk/meson/g12a.c .shift = 0, shift 2634 drivers/clk/meson/g12a.c .shift = 16, shift 2656 drivers/clk/meson/g12a.c .shift = 18, shift 2704 drivers/clk/meson/g12a.c .shift = 9, shift 2718 drivers/clk/meson/g12a.c .shift = 0, shift 2748 drivers/clk/meson/g12a.c .shift = 25, shift 2762 drivers/clk/meson/g12a.c .shift = 16, shift 2792 drivers/clk/meson/g12a.c .shift = 31, shift 2826 drivers/clk/meson/g12a.c .shift = 9, shift 2841 drivers/clk/meson/g12a.c .shift = 0, shift 2876 drivers/clk/meson/g12a.c .shift = 9, shift 2891 drivers/clk/meson/g12a.c .shift = 0, shift 2926 drivers/clk/meson/g12a.c .shift = 25, shift 2941 drivers/clk/meson/g12a.c .shift = 16, shift 2989 drivers/clk/meson/g12a.c .shift = 9, shift 3003 drivers/clk/meson/g12a.c .shift = 0, shift 3037 drivers/clk/meson/g12a.c .shift = 25, shift 3051 drivers/clk/meson/g12a.c .shift = 16, shift 3085 drivers/clk/meson/g12a.c .shift = 31, shift 3132 drivers/clk/meson/g12a.c .shift = 16, shift 3147 drivers/clk/meson/g12a.c .shift = 16, shift 3189 drivers/clk/meson/g12a.c .shift = 0, shift 3206 drivers/clk/meson/g12a.c .shift = 0, shift 3510 drivers/clk/meson/g12a.c .shift = 28, shift 3526 drivers/clk/meson/g12a.c .shift = 20, shift 3542 drivers/clk/meson/g12a.c .shift = 28, shift 3573 drivers/clk/meson/g12a.c .shift = 16, shift 3662 drivers/clk/meson/g12a.c .shift = 9, shift 3677 drivers/clk/meson/g12a.c .shift = 0, shift 3722 drivers/clk/meson/g12a.c .shift = 9, shift 3736 drivers/clk/meson/g12a.c .shift = 0, shift 3770 drivers/clk/meson/g12a.c .shift = 25, shift 3784 drivers/clk/meson/g12a.c .shift = 16, shift 3823 drivers/clk/meson/g12a.c .shift = 31, shift 3837 drivers/clk/meson/g12a.c .shift = 0, shift 89 drivers/clk/meson/gxbb-aoclk.c .shift = 0, shift 94 drivers/clk/meson/gxbb-aoclk.c .shift = 12, shift 99 drivers/clk/meson/gxbb-aoclk.c .shift = 0, shift 104 drivers/clk/meson/gxbb-aoclk.c .shift = 12, shift 109 drivers/clk/meson/gxbb-aoclk.c .shift = 28, shift 126 drivers/clk/meson/gxbb-aoclk.c .shift = 24, shift 159 drivers/clk/meson/gxbb-aoclk.c .shift = 10, shift 181 drivers/clk/meson/gxbb-aoclk.c .shift = 0, shift 200 drivers/clk/meson/gxbb-aoclk.c .shift = 27, shift 89 drivers/clk/meson/gxbb.c .shift = 30, shift 94 drivers/clk/meson/gxbb.c .shift = 0, shift 99 drivers/clk/meson/gxbb.c .shift = 9, shift 104 drivers/clk/meson/gxbb.c .shift = 0, shift 109 drivers/clk/meson/gxbb.c .shift = 31, shift 114 drivers/clk/meson/gxbb.c .shift = 29, shift 131 drivers/clk/meson/gxbb.c .shift = 16, shift 166 drivers/clk/meson/gxbb.c .shift = 30, shift 171 drivers/clk/meson/gxbb.c .shift = 0, shift 176 drivers/clk/meson/gxbb.c .shift = 9, shift 181 drivers/clk/meson/gxbb.c .shift = 0, shift 186 drivers/clk/meson/gxbb.c .shift = 31, shift 191 drivers/clk/meson/gxbb.c .shift = 28, shift 214 drivers/clk/meson/gxbb.c .shift = 30, shift 219 drivers/clk/meson/gxbb.c .shift = 0, shift 224 drivers/clk/meson/gxbb.c .shift = 9, shift 235 drivers/clk/meson/gxbb.c .shift = 0, shift 240 drivers/clk/meson/gxbb.c .shift = 31, shift 245 drivers/clk/meson/gxbb.c .shift = 28, shift 267 drivers/clk/meson/gxbb.c .shift = 16, shift 285 drivers/clk/meson/gxbb.c .shift = 22, shift 303 drivers/clk/meson/gxbb.c .shift = 18, shift 321 drivers/clk/meson/gxbb.c .shift = 21, shift 339 drivers/clk/meson/gxbb.c .shift = 23, shift 357 drivers/clk/meson/gxbb.c .shift = 19, shift 376 drivers/clk/meson/gxbb.c .shift = 30, shift 381 drivers/clk/meson/gxbb.c .shift = 0, shift 386 drivers/clk/meson/gxbb.c .shift = 9, shift 391 drivers/clk/meson/gxbb.c .shift = 31, shift 396 drivers/clk/meson/gxbb.c .shift = 29, shift 413 drivers/clk/meson/gxbb.c .shift = 10, shift 438 drivers/clk/meson/gxbb.c .shift = 30, shift 443 drivers/clk/meson/gxbb.c .shift = 0, shift 448 drivers/clk/meson/gxbb.c .shift = 9, shift 453 drivers/clk/meson/gxbb.c .shift = 31, shift 458 drivers/clk/meson/gxbb.c .shift = 29, shift 487 drivers/clk/meson/gxbb.c .shift = 30, shift 492 drivers/clk/meson/gxbb.c .shift = 0, shift 497 drivers/clk/meson/gxbb.c .shift = 9, shift 502 drivers/clk/meson/gxbb.c .shift = 0, shift 507 drivers/clk/meson/gxbb.c .shift = 31, shift 512 drivers/clk/meson/gxbb.c .shift = 29, shift 532 drivers/clk/meson/gxbb.c .shift = 16, shift 703 drivers/clk/meson/gxbb.c .shift = 12, shift 718 drivers/clk/meson/gxbb.c .shift = 0, shift 723 drivers/clk/meson/gxbb.c .shift = 15, shift 728 drivers/clk/meson/gxbb.c .shift = 16, shift 761 drivers/clk/meson/gxbb.c .shift = 0, shift 766 drivers/clk/meson/gxbb.c .shift = 15, shift 771 drivers/clk/meson/gxbb.c .shift = 16, shift 804 drivers/clk/meson/gxbb.c .shift = 0, shift 809 drivers/clk/meson/gxbb.c .shift = 15, shift 814 drivers/clk/meson/gxbb.c .shift = 16, shift 858 drivers/clk/meson/gxbb.c .shift = 12, shift 877 drivers/clk/meson/gxbb.c .shift = 0, shift 911 drivers/clk/meson/gxbb.c .shift = 9, shift 928 drivers/clk/meson/gxbb.c .shift = 0, shift 978 drivers/clk/meson/gxbb.c .shift = 9, shift 997 drivers/clk/meson/gxbb.c .shift = 0, shift 1031 drivers/clk/meson/gxbb.c .shift = 25, shift 1050 drivers/clk/meson/gxbb.c .shift = 16, shift 1089 drivers/clk/meson/gxbb.c .shift = 31, shift 1104 drivers/clk/meson/gxbb.c .shift = 9, shift 1123 drivers/clk/meson/gxbb.c .shift = 0, shift 1158 drivers/clk/meson/gxbb.c .shift = 25, shift 1177 drivers/clk/meson/gxbb.c .shift = 16, shift 1212 drivers/clk/meson/gxbb.c .shift = 27, shift 1246 drivers/clk/meson/gxbb.c .shift = 16, shift 1260 drivers/clk/meson/gxbb.c .shift = 0, shift 1309 drivers/clk/meson/gxbb.c .shift = 9, shift 1323 drivers/clk/meson/gxbb.c .shift = 0, shift 1359 drivers/clk/meson/gxbb.c .shift = 25, shift 1373 drivers/clk/meson/gxbb.c .shift = 16, shift 1409 drivers/clk/meson/gxbb.c .shift = 9, shift 1423 drivers/clk/meson/gxbb.c .shift = 0, shift 1467 drivers/clk/meson/gxbb.c .shift = 9, shift 1485 drivers/clk/meson/gxbb.c .shift = 0, shift 1515 drivers/clk/meson/gxbb.c .shift = 25, shift 1533 drivers/clk/meson/gxbb.c .shift = 16, shift 1563 drivers/clk/meson/gxbb.c .shift = 31, shift 1594 drivers/clk/meson/gxbb.c .shift = 9, shift 1612 drivers/clk/meson/gxbb.c .shift = 0, shift 1646 drivers/clk/meson/gxbb.c .shift = 25, shift 1664 drivers/clk/meson/gxbb.c .shift = 16, shift 1698 drivers/clk/meson/gxbb.c .shift = 31, shift 1736 drivers/clk/meson/gxbb.c .shift = 0, shift 1741 drivers/clk/meson/gxbb.c .shift = 16, shift 1780 drivers/clk/meson/gxbb.c .shift = 18, shift 1825 drivers/clk/meson/gxbb.c .shift = 16, shift 1845 drivers/clk/meson/gxbb.c .shift = 16, shift 1892 drivers/clk/meson/gxbb.c .shift = 0, shift 1909 drivers/clk/meson/gxbb.c .shift = 0, shift 2213 drivers/clk/meson/gxbb.c .shift = 28, shift 2229 drivers/clk/meson/gxbb.c .shift = 20, shift 2245 drivers/clk/meson/gxbb.c .shift = 28, shift 2276 drivers/clk/meson/gxbb.c .shift = 16, shift 2371 drivers/clk/meson/gxbb.c .shift = 9, shift 2386 drivers/clk/meson/gxbb.c .shift = 0, shift 2425 drivers/clk/meson/gxbb.c .shift = 9, shift 2440 drivers/clk/meson/gxbb.c .shift = 0, shift 2475 drivers/clk/meson/gxbb.c .shift = 25, shift 2490 drivers/clk/meson/gxbb.c .shift = 16, shift 2541 drivers/clk/meson/gxbb.c .shift = 12, shift 2561 drivers/clk/meson/gxbb.c .shift = 0, shift 68 drivers/clk/meson/meson8b.c .shift = 30, shift 73 drivers/clk/meson/meson8b.c .shift = 0, shift 78 drivers/clk/meson/meson8b.c .shift = 9, shift 83 drivers/clk/meson/meson8b.c .shift = 0, shift 88 drivers/clk/meson/meson8b.c .shift = 31, shift 93 drivers/clk/meson/meson8b.c .shift = 29, shift 110 drivers/clk/meson/meson8b.c .shift = 16, shift 132 drivers/clk/meson/meson8b.c .shift = 30, shift 137 drivers/clk/meson/meson8b.c .shift = 0, shift 142 drivers/clk/meson/meson8b.c .shift = 10, shift 147 drivers/clk/meson/meson8b.c .shift = 0, shift 152 drivers/clk/meson/meson8b.c .shift = 31, shift 157 drivers/clk/meson/meson8b.c .shift = 29, shift 175 drivers/clk/meson/meson8b.c .shift = 16, shift 193 drivers/clk/meson/meson8b.c .shift = 18, shift 212 drivers/clk/meson/meson8b.c .shift = 30, shift 217 drivers/clk/meson/meson8b.c .shift = 0, shift 222 drivers/clk/meson/meson8b.c .shift = 9, shift 227 drivers/clk/meson/meson8b.c .shift = 31, shift 232 drivers/clk/meson/meson8b.c .shift = 29, shift 250 drivers/clk/meson/meson8b.c .shift = 16, shift 415 drivers/clk/meson/meson8b.c .shift = 12, shift 432 drivers/clk/meson/meson8b.c .shift = 0, shift 437 drivers/clk/meson/meson8b.c .shift = 15, shift 442 drivers/clk/meson/meson8b.c .shift = 16, shift 447 drivers/clk/meson/meson8b.c .shift = 25, shift 482 drivers/clk/meson/meson8b.c .shift = 0, shift 487 drivers/clk/meson/meson8b.c .shift = 15, shift 492 drivers/clk/meson/meson8b.c .shift = 16, shift 527 drivers/clk/meson/meson8b.c .shift = 0, shift 532 drivers/clk/meson/meson8b.c .shift = 15, shift 537 drivers/clk/meson/meson8b.c .shift = 16, shift 573 drivers/clk/meson/meson8b.c .shift = 12, shift 596 drivers/clk/meson/meson8b.c .shift = 0, shift 629 drivers/clk/meson/meson8b.c .shift = 0, shift 687 drivers/clk/meson/meson8b.c .shift = 20, shift 708 drivers/clk/meson/meson8b.c .shift = 2, shift 734 drivers/clk/meson/meson8b.c .shift = 7, shift 754 drivers/clk/meson/meson8b.c .shift = 9, shift 776 drivers/clk/meson/meson8b.c .shift = 0, shift 903 drivers/clk/meson/meson8b.c .shift = 3, shift 943 drivers/clk/meson/meson8b.c .shift = 6, shift 983 drivers/clk/meson/meson8b.c .shift = 9, shift 1023 drivers/clk/meson/meson8b.c .shift = 12, shift 1062 drivers/clk/meson/meson8b.c .shift = 15, shift 1100 drivers/clk/meson/meson8b.c .shift = 4, shift 1117 drivers/clk/meson/meson8b.c .shift = 12, shift 1135 drivers/clk/meson/meson8b.c .shift = 8, shift 1153 drivers/clk/meson/meson8b.c .shift = 0, shift 1181 drivers/clk/meson/meson8b.c .shift = 16, shift 1348 drivers/clk/meson/meson8b.c .shift = 16, shift 1523 drivers/clk/meson/meson8b.c .shift = 20, shift 1554 drivers/clk/meson/meson8b.c .shift = 24, shift 1585 drivers/clk/meson/meson8b.c .shift = 28, shift 1616 drivers/clk/meson/meson8b.c .shift = 16, shift 1655 drivers/clk/meson/meson8b.c .shift = 12, shift 1686 drivers/clk/meson/meson8b.c .shift = 28, shift 1717 drivers/clk/meson/meson8b.c .shift = 9, shift 1735 drivers/clk/meson/meson8b.c .shift = 0, shift 1789 drivers/clk/meson/meson8b.c .shift = 9, shift 1810 drivers/clk/meson/meson8b.c .shift = 0, shift 1844 drivers/clk/meson/meson8b.c .shift = 25, shift 1865 drivers/clk/meson/meson8b.c .shift = 16, shift 1899 drivers/clk/meson/meson8b.c .shift = 31, shift 1922 drivers/clk/meson/meson8b.c .shift = 30, shift 1927 drivers/clk/meson/meson8b.c .shift = 0, shift 1932 drivers/clk/meson/meson8b.c .shift = 9, shift 1937 drivers/clk/meson/meson8b.c .shift = 31, shift 1942 drivers/clk/meson/meson8b.c .shift = 29, shift 1960 drivers/clk/meson/meson8b.c .shift = 16, shift 1993 drivers/clk/meson/meson8b.c .shift = 9, shift 2008 drivers/clk/meson/meson8b.c .shift = 9, shift 2022 drivers/clk/meson/meson8b.c .shift = 0, shift 2064 drivers/clk/meson/meson8b.c .shift = 25, shift 2079 drivers/clk/meson/meson8b.c .shift = 25, shift 2093 drivers/clk/meson/meson8b.c .shift = 16, shift 2135 drivers/clk/meson/meson8b.c .shift = 31, shift 2162 drivers/clk/meson/meson8b.c .shift = 9, shift 2177 drivers/clk/meson/meson8b.c .shift = 0, shift 2211 drivers/clk/meson/meson8b.c .shift = 0, shift 2246 drivers/clk/meson/meson8b.c .shift = 15, shift 2265 drivers/clk/meson/meson8b.c .shift = 25, shift 2280 drivers/clk/meson/meson8b.c .shift = 16, shift 2315 drivers/clk/meson/meson8b.c .shift = 9, shift 2330 drivers/clk/meson/meson8b.c .shift = 0, shift 2365 drivers/clk/meson/meson8b.c .shift = 25, shift 2380 drivers/clk/meson/meson8b.c .shift = 16, shift 2415 drivers/clk/meson/meson8b.c .shift = 31, shift 2443 drivers/clk/meson/meson8b.c .shift = 9, shift 2458 drivers/clk/meson/meson8b.c .shift = 0, shift 2502 drivers/clk/meson/meson8b.c .shift = 25, shift 2517 drivers/clk/meson/meson8b.c .shift = 16, shift 2552 drivers/clk/meson/meson8b.c .shift = 27, shift 14 drivers/clk/meson/parm.h #define SETPMASK(width, shift) GENMASK(shift + width - 1, shift) shift 15 drivers/clk/meson/parm.h #define CLRPMASK(width, shift) (~SETPMASK(width, shift)) shift 17 drivers/clk/meson/parm.h #define PARM_GET(width, shift, reg) \ shift 18 drivers/clk/meson/parm.h (((reg) & SETPMASK(width, shift)) >> (shift)) shift 19 drivers/clk/meson/parm.h #define PARM_SET(width, shift, reg, val) \ shift 20 drivers/clk/meson/parm.h (((reg) & CLRPMASK(width, shift)) | ((val) << (shift))) shift 26 drivers/clk/meson/parm.h u8 shift; shift 35 drivers/clk/meson/parm.h return PARM_GET(p->width, p->shift, val); shift 41 drivers/clk/meson/parm.h regmap_update_bits(map, p->reg_off, SETPMASK(p->width, p->shift), shift 42 drivers/clk/meson/parm.h val << p->shift); shift 138 drivers/clk/mmp/clk-mix.c u8 width, shift; shift 157 drivers/clk/mmp/clk-mix.c shift = ri->shift_div; shift 158 drivers/clk/mmp/clk-mix.c mux_div &= ~MMP_CLK_BITS_MASK(width, shift); shift 159 drivers/clk/mmp/clk-mix.c mux_div |= MMP_CLK_BITS_SET_VAL(div_val, width, shift); shift 164 drivers/clk/mmp/clk-mix.c shift = ri->shift_mux; shift 165 drivers/clk/mmp/clk-mix.c mux_div &= ~MMP_CLK_BITS_MASK(width, shift); shift 166 drivers/clk/mmp/clk-mix.c mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift); shift 295 drivers/clk/mmp/clk-mix.c u8 width, shift; shift 311 drivers/clk/mmp/clk-mix.c shift = mix->reg_info.shift_mux; shift 313 drivers/clk/mmp/clk-mix.c mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift); shift 325 drivers/clk/mmp/clk-mix.c u8 width, shift; shift 341 drivers/clk/mmp/clk-mix.c shift = mix->reg_info.shift_div; shift 343 drivers/clk/mmp/clk-mix.c div = _get_div(mix, MMP_CLK_BITS_GET_VAL(mux_div, width, shift)); shift 137 drivers/clk/mmp/clk.c clks[i].shift, shift 164 drivers/clk/mmp/clk.c clks[i].shift, shift 42 drivers/clk/mmp/clk.h #define MMP_CLK_BITS_MASK(width, shift) \ shift 43 drivers/clk/mmp/clk.h (((1 << (width)) - 1) << (shift)) shift 44 drivers/clk/mmp/clk.h #define MMP_CLK_BITS_GET_VAL(data, width, shift) \ shift 45 drivers/clk/mmp/clk.h ((data & MMP_CLK_BITS_MASK(width, shift)) >> (shift)) shift 46 drivers/clk/mmp/clk.h #define MMP_CLK_BITS_SET_VAL(val, width, shift) \ shift 47 drivers/clk/mmp/clk.h (((val) << (shift)) & MMP_CLK_BITS_MASK(width, shift)) shift 203 drivers/clk/mmp/clk.h u8 shift; shift 218 drivers/clk/mmp/clk.h u8 shift; shift 140 drivers/clk/mvebu/armada-37xx-periph.c .shift = _shift, \ shift 162 drivers/clk/mvebu/armada-37xx-periph.c .shift = _shift, \ shift 324 drivers/clk/mvebu/armada-37xx-periph.c static unsigned int get_div(void __iomem *reg, int shift) shift 328 drivers/clk/mvebu/armada-37xx-periph.c val = (readl(reg) >> shift) & 0x7; shift 249 drivers/clk/mvebu/kirkwood.c int shift; shift 282 drivers/clk/mvebu/kirkwood.c if (clkspec->args[0] == mux->shift) shift 319 drivers/clk/mvebu/kirkwood.c desc[n].flags, base, desc[n].shift, shift 71 drivers/clk/mxs/clk-div.c void __iomem *reg, u8 shift, u8 width, u8 busy) shift 91 drivers/clk/mxs/clk-div.c div->divider.shift = shift; shift 26 drivers/clk/mxs/clk-frac.c u8 shift; shift 40 drivers/clk/mxs/clk-frac.c div = readl_relaxed(frac->reg) >> frac->shift; shift 95 drivers/clk/mxs/clk-frac.c val &= ~(((1 << frac->width) - 1) << frac->shift); shift 96 drivers/clk/mxs/clk-frac.c val |= div << frac->shift; shift 111 drivers/clk/mxs/clk-frac.c void __iomem *reg, u8 shift, u8 width, u8 busy) shift 128 drivers/clk/mxs/clk-frac.c frac->shift = shift; shift 90 drivers/clk/mxs/clk-ref.c u8 frac, shift = ref->idx * 8; shift 104 drivers/clk/mxs/clk-ref.c val &= ~(0x3f << shift); shift 105 drivers/clk/mxs/clk-ref.c val |= frac << shift; shift 14 drivers/clk/mxs/clk.c int mxs_clk_wait(void __iomem *reg, u8 shift) shift 18 drivers/clk/mxs/clk.c while (readl_relaxed(reg) & (1 << shift)) shift 19 drivers/clk/mxs/clk.h int mxs_clk_wait(void __iomem *reg, u8 shift); shift 28 drivers/clk/mxs/clk.h void __iomem *reg, u8 shift, u8 width, u8 busy); shift 31 drivers/clk/mxs/clk.h void __iomem *reg, u8 shift, u8 width, u8 busy); shift 39 drivers/clk/mxs/clk.h const char *parent_name, void __iomem *reg, u8 shift) shift 42 drivers/clk/mxs/clk.h reg, shift, CLK_GATE_SET_TO_DISABLE, shift 47 drivers/clk/mxs/clk.h u8 shift, u8 width, const char *const *parent_names, int num_parents) shift 51 drivers/clk/mxs/clk.h reg, shift, width, 0, &mxs_lock); shift 220 drivers/clk/nxp/clk-lpc18xx-ccu.c div->shift = 27; shift 177 drivers/clk/nxp/clk-lpc18xx-cgu.c .shift = 2, \ shift 182 drivers/clk/nxp/clk-lpc18xx-cgu.c .shift = 24, \ shift 212 drivers/clk/nxp/clk-lpc18xx-cgu.c .shift = 24, \ shift 279 drivers/clk/nxp/clk-lpc18xx-cgu.c .shift = 24, \ shift 345 drivers/clk/nxp/clk-lpc32xx.c u8 shift; shift 353 drivers/clk/nxp/clk-lpc32xx.c u8 shift; shift 951 drivers/clk/nxp/clk-lpc32xx.c val >>= divider->shift; shift 967 drivers/clk/nxp/clk-lpc32xx.c bestdiv >>= divider->shift; shift 988 drivers/clk/nxp/clk-lpc32xx.c div_mask(divider->width) << divider->shift, shift 989 drivers/clk/nxp/clk-lpc32xx.c value << divider->shift); shift 1005 drivers/clk/nxp/clk-lpc32xx.c val >>= mux->shift; shift 1031 drivers/clk/nxp/clk-lpc32xx.c mux->mask << mux->shift, index << mux->shift); shift 1121 drivers/clk/nxp/clk-lpc32xx.c .shift = (_shift), \ shift 1139 drivers/clk/nxp/clk-lpc32xx.c .shift = (_shift), \ shift 67 drivers/clk/pistachio/clk.c p->base + gate[i].reg, gate[i].shift, shift 84 drivers/clk/pistachio/clk.c p->base + mux[i].reg, mux[i].shift, shift 14 drivers/clk/pistachio/clk.h unsigned int shift; shift 23 drivers/clk/pistachio/clk.h .shift = _shift, \ shift 31 drivers/clk/pistachio/clk.h unsigned int shift; shift 43 drivers/clk/pistachio/clk.h .shift = _shift, \ shift 28 drivers/clk/qcom/clk-krait.c regval &= ~(mux->mask << mux->shift); shift 29 drivers/clk/qcom/clk-krait.c regval |= (sel & mux->mask) << mux->shift; shift 31 drivers/clk/qcom/clk-krait.c regval &= ~(mux->mask << (mux->shift + LPL_SHIFT)); shift 32 drivers/clk/qcom/clk-krait.c regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT); shift 64 drivers/clk/qcom/clk-krait.c sel >>= mux->shift; shift 95 drivers/clk/qcom/clk-krait.c mask = mask << (d->shift + LPL_SHIFT) | mask << d->shift; shift 114 drivers/clk/qcom/clk-krait.c div >>= d->shift; shift 12 drivers/clk/qcom/clk-krait.h u32 shift; shift 30 drivers/clk/qcom/clk-krait.h u32 shift; shift 26 drivers/clk/qcom/clk-regmap-divider.c val >>= divider->shift; shift 53 drivers/clk/qcom/clk-regmap-divider.c (BIT(divider->width) - 1) << divider->shift, shift 54 drivers/clk/qcom/clk-regmap-divider.c div << divider->shift); shift 65 drivers/clk/qcom/clk-regmap-divider.c div >>= divider->shift; shift 14 drivers/clk/qcom/clk-regmap-divider.h u32 shift; shift 27 drivers/clk/qcom/clk-regmap-mux.c val >>= mux->shift; shift 40 drivers/clk/qcom/clk-regmap-mux.c unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift); shift 47 drivers/clk/qcom/clk-regmap-mux.c val <<= mux->shift; shift 15 drivers/clk/qcom/clk-regmap-mux.h u32 shift; shift 306 drivers/clk/qcom/dispcc-sdm845.c .shift = 0, shift 361 drivers/clk/qcom/dispcc-sdm845.c .shift = 0, shift 1285 drivers/clk/qcom/gcc-ipq4019.c mask = (BIT(pll->cdiv.width) - 1) << pll->cdiv.shift; shift 1288 drivers/clk/qcom/gcc-ipq4019.c f->pre_div << pll->cdiv.shift); shift 1313 drivers/clk/qcom/gcc-ipq4019.c cdiv = (cdiv >> pll->cdiv.shift) & (BIT(pll->cdiv.width) - 1); shift 1357 drivers/clk/qcom/gcc-ipq4019.c .cdiv.shift = 4, shift 1393 drivers/clk/qcom/gcc-ipq4019.c cdiv = (cdiv >> pll->cdiv.shift) & (BIT(pll->cdiv.width) - 1); shift 1496 drivers/clk/qcom/gcc-ipq4019.c .cdiv.shift = 8, shift 1514 drivers/clk/qcom/gcc-ipq4019.c .cdiv.shift = 12, shift 998 drivers/clk/qcom/gcc-ipq8074.c .shift = 8, shift 1041 drivers/clk/qcom/gcc-ipq8074.c .shift = 8, shift 1178 drivers/clk/qcom/gcc-ipq8074.c .shift = 8, shift 1236 drivers/clk/qcom/gcc-ipq8074.c .shift = 8, shift 1417 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1448 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1556 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1593 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1623 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1653 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1683 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1713 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1743 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1773 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1813 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1853 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1893 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 1933 drivers/clk/qcom/gcc-ipq8074.c .shift = 0, shift 89 drivers/clk/qcom/krait-cc.c div->shift = 6; shift 137 drivers/clk/qcom/krait-cc.c mux->shift = 2; shift 188 drivers/clk/qcom/krait-cc.c mux->shift = 0; shift 164 drivers/clk/qcom/lcc-ipq806x.c .shift = 10, shift 196 drivers/clk/qcom/lcc-ipq806x.c .shift = 14, shift 274 drivers/clk/qcom/lcc-ipq806x.c .shift = 10, shift 147 drivers/clk/qcom/lcc-mdm9615.c .shift = 10, shift 180 drivers/clk/qcom/lcc-mdm9615.c .shift = 14, shift 253 drivers/clk/qcom/lcc-mdm9615.c .shift = 10, \ shift 286 drivers/clk/qcom/lcc-mdm9615.c .shift = 18, \ shift 393 drivers/clk/qcom/lcc-mdm9615.c .shift = 10, shift 145 drivers/clk/qcom/lcc-msm8960.c .shift = 10, shift 178 drivers/clk/qcom/lcc-msm8960.c .shift = 14, shift 251 drivers/clk/qcom/lcc-msm8960.c .shift = 10, \ shift 284 drivers/clk/qcom/lcc-msm8960.c .shift = 18, \ shift 391 drivers/clk/qcom/lcc-msm8960.c .shift = 10, shift 39 drivers/clk/renesas/clk-r8a73a4.c unsigned int shift; shift 66 drivers/clk/renesas/clk-r8a73a4.c unsigned int shift, reg; shift 154 drivers/clk/renesas/clk-r8a73a4.c u32 shift = 8; shift 159 drivers/clk/renesas/clk-r8a73a4.c shift = 0; shift 162 drivers/clk/renesas/clk-r8a73a4.c mult = 0x20 - ((readl(cpg->reg + CPG_FRQCRC) >> shift) & 0x1f); shift 176 drivers/clk/renesas/clk-r8a73a4.c shift = c->shift; shift 184 drivers/clk/renesas/clk-r8a73a4.c cpg->reg + reg, shift, 4, 0, shift 35 drivers/clk/renesas/clk-r8a7740.c unsigned int shift; shift 68 drivers/clk/renesas/clk-r8a7740.c unsigned int shift, reg; shift 127 drivers/clk/renesas/clk-r8a7740.c shift = c->shift; shift 140 drivers/clk/renesas/clk-r8a7740.c cpg->reg + reg, shift, 4, 0, shift 314 drivers/clk/renesas/clk-rcar-gen2.c unsigned int shift; shift 352 drivers/clk/renesas/clk-rcar-gen2.c shift = 8; shift 356 drivers/clk/renesas/clk-rcar-gen2.c shift = 4; shift 360 drivers/clk/renesas/clk-rcar-gen2.c shift = 0; shift 376 drivers/clk/renesas/clk-rcar-gen2.c cpg->reg + CPG_SDCKCR, shift, shift 44 drivers/clk/renesas/clk-sh73a0.c unsigned int shift; shift 79 drivers/clk/renesas/clk-sh73a0.c unsigned int shift, reg, width; shift 133 drivers/clk/renesas/clk-sh73a0.c shift = 24; shift 143 drivers/clk/renesas/clk-sh73a0.c shift = c->shift; shift 157 drivers/clk/renesas/clk-sh73a0.c cpg->reg + reg, shift, width, 0, shift 229 drivers/clk/renesas/r8a77970-cpg-mssr.c unsigned int shift; shift 234 drivers/clk/renesas/r8a77970-cpg-mssr.c shift = 8; shift 238 drivers/clk/renesas/r8a77970-cpg-mssr.c shift = 4; shift 252 drivers/clk/renesas/r8a77970-cpg-mssr.c shift, 4, 0, table, &cpg_lock); shift 283 drivers/clk/renesas/rcar-gen2-cpg.c unsigned int shift; shift 334 drivers/clk/renesas/rcar-gen2-cpg.c shift = 8; shift 342 drivers/clk/renesas/rcar-gen2-cpg.c shift = 4; shift 350 drivers/clk/renesas/rcar-gen2-cpg.c shift = 0; shift 371 drivers/clk/renesas/rcar-gen2-cpg.c base + CPG_SDCKCR, shift, 4, shift 28 drivers/clk/rockchip/clk-half-divider.c val = readl(divider->reg) >> divider->shift; shift 126 drivers/clk/rockchip/clk-half-divider.c val = div_mask(divider->width) << (divider->shift + 16); shift 129 drivers/clk/rockchip/clk-half-divider.c val &= ~(div_mask(divider->width) << divider->shift); shift 131 drivers/clk/rockchip/clk-half-divider.c val |= value << divider->shift; shift 183 drivers/clk/rockchip/clk-half-divider.c mux->shift = mux_shift; shift 210 drivers/clk/rockchip/clk-half-divider.c div->shift = div_shift; shift 16 drivers/clk/rockchip/clk-inverter.c int shift; shift 30 drivers/clk/rockchip/clk-inverter.c val = readl(inv_clock->reg) >> inv_clock->shift; shift 49 drivers/clk/rockchip/clk-inverter.c writel(HIWORD_UPDATE(val, INVERTER_MASK, inv_clock->shift), shift 58 drivers/clk/rockchip/clk-inverter.c reg &= ~BIT(inv_clock->shift); shift 75 drivers/clk/rockchip/clk-inverter.c void __iomem *reg, int shift, int flags, shift 94 drivers/clk/rockchip/clk-inverter.c inv_clock->shift = shift; shift 18 drivers/clk/rockchip/clk-mmc-phase.c int shift; shift 58 drivers/clk/rockchip/clk-mmc-phase.c raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); shift 138 drivers/clk/rockchip/clk-mmc-phase.c writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), shift 143 drivers/clk/rockchip/clk-mmc-phase.c mmc_clock->reg, raw_value>>(mmc_clock->shift), shift 193 drivers/clk/rockchip/clk-mmc-phase.c void __iomem *reg, int shift) shift 212 drivers/clk/rockchip/clk-mmc-phase.c mmc_clock->shift = shift; shift 14 drivers/clk/rockchip/clk-muxgrf.c u32 shift; shift 29 drivers/clk/rockchip/clk-muxgrf.c val >>= mux->shift; shift 38 drivers/clk/rockchip/clk-muxgrf.c unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift); shift 42 drivers/clk/rockchip/clk-muxgrf.c val <<= mux->shift; shift 59 drivers/clk/rockchip/clk-muxgrf.c int shift, int width, int mux_flags) shift 83 drivers/clk/rockchip/clk-muxgrf.c muxgrf_clock->shift = shift; shift 863 drivers/clk/rockchip/clk-pll.c pll_mux->shift = mode_shift; shift 60 drivers/clk/rockchip/clk.c mux->shift = mux_shift; shift 94 drivers/clk/rockchip/clk.c div->shift = div_shift; shift 280 drivers/clk/rockchip/clk.c frac_mux->shift = child->mux_shift; shift 25 drivers/clk/rockchip/clk.h #define HIWORD_UPDATE(val, mask, shift) \ shift 26 drivers/clk/rockchip/clk.h ((val) << (shift) | (mask) << ((shift) + 16)) shift 359 drivers/clk/rockchip/clk.h void __iomem *reg, int shift); shift 379 drivers/clk/rockchip/clk.h void __iomem *reg, int shift, int flags, shift 385 drivers/clk/rockchip/clk.h int shift, int width, int mux_flags); shift 704 drivers/clk/rockchip/clk.h #define MMC(_id, cname, pname, offset, shift) \ shift 712 drivers/clk/rockchip/clk.h .div_shift = shift, \ shift 98 drivers/clk/samsung/clk-exynos-clkout.c clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT; shift 551 drivers/clk/samsung/clk-pll.c u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift; shift 563 drivers/clk/samsung/clk-pll.c shift = ((pll->type == pll_4600) || (pll->type == pll_1460x)) ? 16 : 10; shift 565 drivers/clk/samsung/clk-pll.c fvco *= (mdiv << shift) + kdiv; shift 567 drivers/clk/samsung/clk-pll.c fvco >>= shift; shift 54 drivers/clk/samsung/clk-s3c2410-dclk.c u8 shift; shift 65 drivers/clk/samsung/clk-s3c2410-dclk.c val = readl_relaxed(S3C24XX_MISCCR) >> clkout->shift; shift 66 drivers/clk/samsung/clk-s3c2410-dclk.c val >>= clkout->shift; shift 79 drivers/clk/samsung/clk-s3c2410-dclk.c s3c2410_modify_misccr((clkout->mask << clkout->shift), shift 80 drivers/clk/samsung/clk-s3c2410-dclk.c (index << clkout->shift)); shift 93 drivers/clk/samsung/clk-s3c2410-dclk.c u8 shift, u32 mask) shift 110 drivers/clk/samsung/clk-s3c2410-dclk.c clkout->shift = shift; shift 188 drivers/clk/samsung/clk.c list->shift, list->width, list->mux_flags, &ctx->lock); shift 212 drivers/clk/samsung/clk.c list->shift, list->width, list->div_flags, shift 217 drivers/clk/samsung/clk.c ctx->reg_base + list->offset, list->shift, shift 123 drivers/clk/samsung/clk.h u8 shift; shift 136 drivers/clk/samsung/clk.h .shift = s, \ shift 163 drivers/clk/samsung/clk.h u8 shift; shift 176 drivers/clk/samsung/clk.h .shift = s, \ shift 250 drivers/clk/sirf/clk-atlas7.c u8 shift; shift 264 drivers/clk/sirf/clk-atlas7.c u8 shift; shift 1646 drivers/clk/sirf/clk-atlas7.c div->shift, div->width, 0, div->lock); shift 1659 drivers/clk/sirf/clk-atlas7.c mux->shift, mux->width, shift 30 drivers/clk/socfpga/clk-gate-a10.c val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; shift 133 drivers/clk/socfpga/clk-gate-a10.c socfpga_clk->shift = div_reg[1]; shift 23 drivers/clk/socfpga/clk-gate-s10.c val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; shift 36 drivers/clk/socfpga/clk-gate-s10.c val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; shift 99 drivers/clk/socfpga/clk-gate-s10.c socfpga_clk->shift = div_offset; shift 99 drivers/clk/socfpga/clk-gate.c val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; shift 214 drivers/clk/socfpga/clk-gate.c socfpga_clk->shift = div_reg[1]; shift 29 drivers/clk/socfpga/clk-periph-a10.c div = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; shift 84 drivers/clk/socfpga/clk-periph-a10.c periph_clk->shift = div_reg[1]; shift 27 drivers/clk/socfpga/clk-periph.c val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; shift 74 drivers/clk/socfpga/clk-periph.c periph_clk->shift = div_reg[1]; shift 51 drivers/clk/socfpga/clk.h u32 shift; /* only valid if div_reg != 0 */ shift 63 drivers/clk/socfpga/clk.h u32 shift; /* only valid if div_reg != 0 */ shift 39 drivers/clk/sprd/div.c val = reg >> div->shift; shift 67 drivers/clk/sprd/div.c reg &= ~GENMASK(div->width + div->shift - 1, div->shift); shift 70 drivers/clk/sprd/div.c reg | (val << div->shift)); shift 23 drivers/clk/sprd/div.h u8 shift; shift 29 drivers/clk/sprd/div.h .shift = _shift, \ shift 23 drivers/clk/sprd/mux.c parent = reg >> mux->shift; shift 56 drivers/clk/sprd/mux.c reg &= ~GENMASK(mux->width + mux->shift - 1, mux->shift); shift 58 drivers/clk/sprd/mux.c reg | (index << mux->shift)); shift 22 drivers/clk/sprd/mux.h u8 shift; shift 34 drivers/clk/sprd/mux.h .shift = _shift, \ shift 19 drivers/clk/sprd/pll.c (pll->factors[member].shift / (8 * sizeof(pll->regs_num))) shift 22 drivers/clk/sprd/pll.c (pll->factors[member].shift % (8 * sizeof(pll->regs_num))) shift 71 drivers/clk/sprd/pll.c u32 shift, mask, index, refin_id = 3; shift 76 drivers/clk/sprd/pll.c shift = pshift(pll, PLL_REFIN); shift 78 drivers/clk/sprd/pll.c refin_id = (sprd_pll_read(pll, index) & mask) >> shift; shift 152 drivers/clk/sprd/pll.c u32 mask, shift, width, ibias_val, index; shift 193 drivers/clk/sprd/pll.c shift = pshift(pll, PLL_NINT); shift 194 drivers/clk/sprd/pll.c cfg[index].val |= (nint << shift) & mask; shift 200 drivers/clk/sprd/pll.c shift = pshift(pll, PLL_KINT); shift 202 drivers/clk/sprd/pll.c tmp = do_div(tmp, 10000) * ((mask >> shift) + 1); shift 204 drivers/clk/sprd/pll.c cfg[index].val |= (kint << shift) & mask; shift 211 drivers/clk/sprd/pll.c shift = pshift(pll, PLL_IBIAS); shift 212 drivers/clk/sprd/pll.c cfg[index].val |= ibias_val << shift & mask; shift 19 drivers/clk/sprd/pll.h u8 shift; shift 127 drivers/clk/sprd/sc9860-clk.c { .shift = 20, .width = 1 }, /* lock_done */ shift 128 drivers/clk/sprd/sc9860-clk.c { .shift = 19, .width = 1 }, /* div_s */ shift 129 drivers/clk/sprd/sc9860-clk.c { .shift = 18, .width = 1 }, /* mod_en */ shift 130 drivers/clk/sprd/sc9860-clk.c { .shift = 17, .width = 1 }, /* sdm_en */ shift 131 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* refin */ shift 132 drivers/clk/sprd/sc9860-clk.c { .shift = 11, .width = 2 }, /* ibias */ shift 133 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 7 }, /* n */ shift 134 drivers/clk/sprd/sc9860-clk.c { .shift = 57, .width = 7 }, /* nint */ shift 135 drivers/clk/sprd/sc9860-clk.c { .shift = 32, .width = 23}, /* kint */ shift 136 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* prediv */ shift 137 drivers/clk/sprd/sc9860-clk.c { .shift = 56, .width = 1 }, /* postdiv */ shift 144 drivers/clk/sprd/sc9860-clk.c { .shift = 20, .width = 1 }, /* lock_done */ shift 145 drivers/clk/sprd/sc9860-clk.c { .shift = 19, .width = 1 }, /* div_s */ shift 146 drivers/clk/sprd/sc9860-clk.c { .shift = 18, .width = 1 }, /* mod_en */ shift 147 drivers/clk/sprd/sc9860-clk.c { .shift = 17, .width = 1 }, /* sdm_en */ shift 148 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* refin */ shift 149 drivers/clk/sprd/sc9860-clk.c { .shift = 11, .width = 2 }, /* ibias */ shift 150 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 7 }, /* n */ shift 151 drivers/clk/sprd/sc9860-clk.c { .shift = 57, .width = 7 }, /* nint */ shift 152 drivers/clk/sprd/sc9860-clk.c { .shift = 32, .width = 23}, /* kint */ shift 153 drivers/clk/sprd/sc9860-clk.c { .shift = 56, .width = 1 }, /* prediv */ shift 154 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* postdiv */ shift 160 drivers/clk/sprd/sc9860-clk.c { .shift = 16, .width = 1 }, /* lock_done */ shift 161 drivers/clk/sprd/sc9860-clk.c { .shift = 15, .width = 1 }, /* div_s */ shift 162 drivers/clk/sprd/sc9860-clk.c { .shift = 14, .width = 1 }, /* mod_en */ shift 163 drivers/clk/sprd/sc9860-clk.c { .shift = 13, .width = 1 }, /* sdm_en */ shift 164 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* refin */ shift 165 drivers/clk/sprd/sc9860-clk.c { .shift = 8, .width = 2 }, /* ibias */ shift 166 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 7 }, /* n */ shift 167 drivers/clk/sprd/sc9860-clk.c { .shift = 57, .width = 7 }, /* nint */ shift 168 drivers/clk/sprd/sc9860-clk.c { .shift = 32, .width = 23}, /* kint */ shift 169 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* prediv */ shift 170 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* postdiv */ shift 179 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 1 }, /* lock_done */ shift 180 drivers/clk/sprd/sc9860-clk.c { .shift = 3, .width = 1 }, /* div_s */ shift 181 drivers/clk/sprd/sc9860-clk.c { .shift = 80, .width = 1 }, /* mod_en */ shift 182 drivers/clk/sprd/sc9860-clk.c { .shift = 81, .width = 1 }, /* sdm_en */ shift 183 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* refin */ shift 184 drivers/clk/sprd/sc9860-clk.c { .shift = 14, .width = 2 }, /* ibias */ shift 185 drivers/clk/sprd/sc9860-clk.c { .shift = 16, .width = 7 }, /* n */ shift 186 drivers/clk/sprd/sc9860-clk.c { .shift = 4, .width = 7 }, /* nint */ shift 187 drivers/clk/sprd/sc9860-clk.c { .shift = 32, .width = 23}, /* kint */ shift 188 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* prediv */ shift 189 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* postdiv */ shift 198 drivers/clk/sprd/sc9860-clk.c { .shift = 21, .width = 1 }, /* lock_done */ shift 199 drivers/clk/sprd/sc9860-clk.c { .shift = 20, .width = 1 }, /* div_s */ shift 200 drivers/clk/sprd/sc9860-clk.c { .shift = 19, .width = 1 }, /* mod_en */ shift 201 drivers/clk/sprd/sc9860-clk.c { .shift = 18, .width = 1 }, /* sdm_en */ shift 202 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* refin */ shift 203 drivers/clk/sprd/sc9860-clk.c { .shift = 13, .width = 2 }, /* ibias */ shift 204 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 7 }, /* n */ shift 205 drivers/clk/sprd/sc9860-clk.c { .shift = 57, .width = 7 }, /* nint */ shift 206 drivers/clk/sprd/sc9860-clk.c { .shift = 32, .width = 23}, /* kint */ shift 207 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* prediv */ shift 208 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* postdiv */ shift 214 drivers/clk/sprd/sc9860-clk.c { .shift = 31, .width = 1 }, /* lock_done */ shift 215 drivers/clk/sprd/sc9860-clk.c { .shift = 27, .width = 1 }, /* div_s */ shift 216 drivers/clk/sprd/sc9860-clk.c { .shift = 26, .width = 1 }, /* mod_en */ shift 217 drivers/clk/sprd/sc9860-clk.c { .shift = 25, .width = 1 }, /* sdm_en */ shift 218 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* refin */ shift 219 drivers/clk/sprd/sc9860-clk.c { .shift = 20, .width = 2 }, /* ibias */ shift 220 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 7 }, /* n */ shift 221 drivers/clk/sprd/sc9860-clk.c { .shift = 57, .width = 7 }, /* nint */ shift 222 drivers/clk/sprd/sc9860-clk.c { .shift = 32, .width = 23}, /* kint */ shift 223 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* prediv */ shift 224 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* postdiv */ shift 234 drivers/clk/sprd/sc9860-clk.c { .shift = 18, .width = 1 }, /* lock_done */ shift 235 drivers/clk/sprd/sc9860-clk.c { .shift = 15, .width = 1 }, /* div_s */ shift 236 drivers/clk/sprd/sc9860-clk.c { .shift = 14, .width = 1 }, /* mod_en */ shift 237 drivers/clk/sprd/sc9860-clk.c { .shift = 13, .width = 1 }, /* sdm_en */ shift 238 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* refin */ shift 239 drivers/clk/sprd/sc9860-clk.c { .shift = 8, .width = 2 }, /* ibias */ shift 240 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 7 }, /* n */ shift 241 drivers/clk/sprd/sc9860-clk.c { .shift = 57, .width = 7 }, /* nint */ shift 242 drivers/clk/sprd/sc9860-clk.c { .shift = 32, .width = 23}, /* kint */ shift 243 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* prediv */ shift 244 drivers/clk/sprd/sc9860-clk.c { .shift = 17, .width = 1 }, /* postdiv */ shift 251 drivers/clk/sprd/sc9860-clk.c { .shift = 17, .width = 1 }, /* lock_done */ shift 252 drivers/clk/sprd/sc9860-clk.c { .shift = 15, .width = 1 }, /* div_s */ shift 253 drivers/clk/sprd/sc9860-clk.c { .shift = 14, .width = 1 }, /* mod_en */ shift 254 drivers/clk/sprd/sc9860-clk.c { .shift = 13, .width = 1 }, /* sdm_en */ shift 255 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* refin */ shift 256 drivers/clk/sprd/sc9860-clk.c { .shift = 8, .width = 2 }, /* ibias */ shift 257 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 7 }, /* n */ shift 258 drivers/clk/sprd/sc9860-clk.c { .shift = 57, .width = 7 }, /* nint */ shift 259 drivers/clk/sprd/sc9860-clk.c { .shift = 32, .width = 23}, /* kint */ shift 260 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* prediv */ shift 261 drivers/clk/sprd/sc9860-clk.c { .shift = 0, .width = 0 }, /* postdiv */ shift 226 drivers/clk/st/clk-flexgen.c fgxbar->mux.shift = xbar_shift; shift 38 drivers/clk/st/clkgen-mux.c u8 shift; shift 47 drivers/clk/st/clkgen-mux.c .shift = 0, shift 76 drivers/clk/st/clkgen-mux.c data->shift, data->width, data->mux_flags, shift 195 drivers/clk/st/clkgen-pll.c !!((reg >> field->shift) & field->mask), 0, 10000); shift 657 drivers/clk/st/clkgen-pll.c gate->bit_idx = pll_data->odf_gate[odf].shift; shift 668 drivers/clk/st/clkgen-pll.c div->shift = pll_data->odf[odf].shift; shift 18 drivers/clk/st/clkgen.h unsigned int shift; shift 24 drivers/clk/st/clkgen.h return (readl(base + field->offset) >> field->shift) & field->mask; shift 32 drivers/clk/st/clkgen.h ~(field->mask << field->shift)) | (val << field->shift), shift 41 drivers/clk/st/clkgen.h .shift = _shift, \ shift 223 drivers/clk/sunxi-ng/ccu-sun4i-a10.c .shift = 16, shift 257 drivers/clk/sunxi-ng/ccu-sun4i-a10.c .shift = 6, shift 826 drivers/clk/sunxi-ng/ccu-sun4i-a10.c .shift = 24, shift 845 drivers/clk/sunxi-ng/ccu-sun4i-a10.c .shift = 24, shift 228 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .index = 3, .shift = 6, .width = 2 }, shift 234 drivers/clk/sunxi-ng/ccu-sun50i-a64.c .shift = 12, shift 276 drivers/clk/sunxi-ng/ccu-sun50i-a64.c .shift = 0, shift 28 drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c { .index = 3, .shift = 0, .width = 5 }, shift 35 drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c .shift = 24, shift 70 drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c .shift = 24, shift 667 drivers/clk/sunxi-ng/ccu-sun50i-h6.c .shift = 24, shift 182 drivers/clk/sunxi-ng/ccu-sun5i.c .shift = 16, shift 206 drivers/clk/sunxi-ng/ccu-sun5i.c .shift = 6, shift 204 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .index = 3, .shift = 6, .width = 2 }, shift 211 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .shift = 12, shift 666 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .shift = 24, shift 685 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .shift = 24, shift 704 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .shift = 24, shift 747 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .shift = 24, shift 768 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .shift = 24, shift 789 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .shift = 24, shift 178 drivers/clk/sunxi-ng/ccu-sun8i-a23.c { .index = 3, .shift = 6, .width = 2 }, shift 184 drivers/clk/sunxi-ng/ccu-sun8i-a23.c .shift = 12, shift 188 drivers/clk/sunxi-ng/ccu-sun8i-a33.c { .index = 3, .shift = 6, .width = 2 }, shift 194 drivers/clk/sunxi-ng/ccu-sun8i-a33.c .shift = 12, shift 243 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c { .index = 2, .shift = 6, .width = 2 }, shift 244 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c { .index = 3, .shift = 6, .width = 2 }, shift 249 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c .shift = 12, shift 281 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c .shift = 0, shift 152 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .index = 3, .shift = 6, .width = 2 }, shift 158 drivers/clk/sunxi-ng/ccu-sun8i-h3.c .shift = 12, shift 199 drivers/clk/sunxi-ng/ccu-sun8i-h3.c .shift = 0, shift 28 drivers/clk/sunxi-ng/ccu-sun8i-r.c { .index = 2, .shift = 8, .width = 5 }, shift 35 drivers/clk/sunxi-ng/ccu-sun8i-r.c .shift = 16, shift 100 drivers/clk/sunxi-ng/ccu-sun8i-r.c .shift = 24, shift 260 drivers/clk/sunxi-ng/ccu-sun8i-r40.c { .index = 3, .shift = 6, .width = 2 }, shift 266 drivers/clk/sunxi-ng/ccu-sun8i-r40.c .shift = 12, shift 755 drivers/clk/sunxi-ng/ccu-sun8i-r40.c .shift = 24, shift 774 drivers/clk/sunxi-ng/ccu-sun8i-r40.c .shift = 24, shift 137 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c { .index = 3, .shift = 6, .width = 2 }, shift 143 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c .shift = 12, shift 184 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c .shift = 0, shift 355 drivers/clk/sunxi-ng/ccu-sun9i-a80.c .shift = 24, shift 375 drivers/clk/sunxi-ng/ccu-sun9i-a80.c .shift = 24, shift 115 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c { .index = 3, .shift = 6, .width = 2 }, shift 121 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c .shift = 12, shift 64 drivers/clk/sunxi-ng/ccu_div.c val = reg >> cd->div.shift; shift 108 drivers/clk/sunxi-ng/ccu_div.c reg &= ~GENMASK(cd->div.width + cd->div.shift - 1, cd->div.shift); shift 110 drivers/clk/sunxi-ng/ccu_div.c writel(reg | (val << cd->div.shift), shift 32 drivers/clk/sunxi-ng/ccu_div.h u8 shift; shift 45 drivers/clk/sunxi-ng/ccu_div.h .shift = _shift, \ shift 56 drivers/clk/sunxi-ng/ccu_div.h .shift = _shift, \ shift 160 drivers/clk/sunxi-ng/ccu_mp.c m = reg >> cmp->m.shift; shift 166 drivers/clk/sunxi-ng/ccu_mp.c p = reg >> cmp->p.shift; shift 210 drivers/clk/sunxi-ng/ccu_mp.c reg &= ~GENMASK(cmp->m.width + cmp->m.shift - 1, cmp->m.shift); shift 211 drivers/clk/sunxi-ng/ccu_mp.c reg &= ~GENMASK(cmp->p.width + cmp->p.shift - 1, cmp->p.shift); shift 212 drivers/clk/sunxi-ng/ccu_mp.c reg |= (m - cmp->m.offset) << cmp->m.shift; shift 213 drivers/clk/sunxi-ng/ccu_mp.c reg |= ilog2(p) << cmp->p.shift; shift 85 drivers/clk/sunxi-ng/ccu_mult.c val = reg >> cm->mult.shift; shift 135 drivers/clk/sunxi-ng/ccu_mult.c reg &= ~GENMASK(cm->mult.width + cm->mult.shift - 1, cm->mult.shift); shift 136 drivers/clk/sunxi-ng/ccu_mult.c reg |= ((_cm.mult - cm->mult.offset) << cm->mult.shift); shift 11 drivers/clk/sunxi-ng/ccu_mult.h u8 shift; shift 22 drivers/clk/sunxi-ng/ccu_mult.h .shift = _shift, \ shift 32 drivers/clk/sunxi-ng/ccu_mux.c parent_index = reg >> cm->shift; shift 51 drivers/clk/sunxi-ng/ccu_mux.c div = reg >> cm->var_predivs[i].shift; shift 163 drivers/clk/sunxi-ng/ccu_mux.c parent = reg >> cm->shift; shift 191 drivers/clk/sunxi-ng/ccu_mux.c reg &= ~GENMASK(cm->width + cm->shift - 1, cm->shift); shift 192 drivers/clk/sunxi-ng/ccu_mux.c writel(reg | (index << cm->shift), common->base + common->reg); shift 16 drivers/clk/sunxi-ng/ccu_mux.h u8 shift; shift 21 drivers/clk/sunxi-ng/ccu_mux.h u8 shift; shift 34 drivers/clk/sunxi-ng/ccu_mux.h .shift = _shift, \ shift 74 drivers/clk/sunxi-ng/ccu_nk.c n = reg >> nk->n.shift; shift 80 drivers/clk/sunxi-ng/ccu_nk.c k = reg >> nk->k.shift; shift 137 drivers/clk/sunxi-ng/ccu_nk.c reg &= ~GENMASK(nk->n.width + nk->n.shift - 1, nk->n.shift); shift 138 drivers/clk/sunxi-ng/ccu_nk.c reg &= ~GENMASK(nk->k.width + nk->k.shift - 1, nk->k.shift); shift 140 drivers/clk/sunxi-ng/ccu_nk.c reg |= (_nk.k - nk->k.offset) << nk->k.shift; shift 141 drivers/clk/sunxi-ng/ccu_nk.c reg |= (_nk.n - nk->n.offset) << nk->n.shift; shift 80 drivers/clk/sunxi-ng/ccu_nkm.c n = reg >> nkm->n.shift; shift 86 drivers/clk/sunxi-ng/ccu_nkm.c k = reg >> nkm->k.shift; shift 92 drivers/clk/sunxi-ng/ccu_nkm.c m = reg >> nkm->m.shift; shift 167 drivers/clk/sunxi-ng/ccu_nkm.c reg &= ~GENMASK(nkm->n.width + nkm->n.shift - 1, nkm->n.shift); shift 168 drivers/clk/sunxi-ng/ccu_nkm.c reg &= ~GENMASK(nkm->k.width + nkm->k.shift - 1, nkm->k.shift); shift 169 drivers/clk/sunxi-ng/ccu_nkm.c reg &= ~GENMASK(nkm->m.width + nkm->m.shift - 1, nkm->m.shift); shift 171 drivers/clk/sunxi-ng/ccu_nkm.c reg |= (_nkm.n - nkm->n.offset) << nkm->n.shift; shift 172 drivers/clk/sunxi-ng/ccu_nkm.c reg |= (_nkm.k - nkm->k.offset) << nkm->k.shift; shift 173 drivers/clk/sunxi-ng/ccu_nkm.c reg |= (_nkm.m - nkm->m.offset) << nkm->m.shift; shift 100 drivers/clk/sunxi-ng/ccu_nkmp.c n = reg >> nkmp->n.shift; shift 106 drivers/clk/sunxi-ng/ccu_nkmp.c k = reg >> nkmp->k.shift; shift 112 drivers/clk/sunxi-ng/ccu_nkmp.c m = reg >> nkmp->m.shift; shift 118 drivers/clk/sunxi-ng/ccu_nkmp.c p = reg >> nkmp->p.shift; shift 193 drivers/clk/sunxi-ng/ccu_nkmp.c n_mask = GENMASK(nkmp->n.width + nkmp->n.shift - 1, shift 194 drivers/clk/sunxi-ng/ccu_nkmp.c nkmp->n.shift); shift 196 drivers/clk/sunxi-ng/ccu_nkmp.c k_mask = GENMASK(nkmp->k.width + nkmp->k.shift - 1, shift 197 drivers/clk/sunxi-ng/ccu_nkmp.c nkmp->k.shift); shift 199 drivers/clk/sunxi-ng/ccu_nkmp.c m_mask = GENMASK(nkmp->m.width + nkmp->m.shift - 1, shift 200 drivers/clk/sunxi-ng/ccu_nkmp.c nkmp->m.shift); shift 202 drivers/clk/sunxi-ng/ccu_nkmp.c p_mask = GENMASK(nkmp->p.width + nkmp->p.shift - 1, shift 203 drivers/clk/sunxi-ng/ccu_nkmp.c nkmp->p.shift); shift 210 drivers/clk/sunxi-ng/ccu_nkmp.c reg |= ((_nkmp.n - nkmp->n.offset) << nkmp->n.shift) & n_mask; shift 211 drivers/clk/sunxi-ng/ccu_nkmp.c reg |= ((_nkmp.k - nkmp->k.offset) << nkmp->k.shift) & k_mask; shift 212 drivers/clk/sunxi-ng/ccu_nkmp.c reg |= ((_nkmp.m - nkmp->m.offset) << nkmp->m.shift) & m_mask; shift 213 drivers/clk/sunxi-ng/ccu_nkmp.c reg |= (ilog2(_nkmp.p) << nkmp->p.shift) & p_mask; shift 97 drivers/clk/sunxi-ng/ccu_nm.c n = reg >> nm->n.shift; shift 103 drivers/clk/sunxi-ng/ccu_nm.c m = reg >> nm->m.shift; shift 186 drivers/clk/sunxi-ng/ccu_nm.c reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); shift 218 drivers/clk/sunxi-ng/ccu_nm.c reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift); shift 219 drivers/clk/sunxi-ng/ccu_nm.c reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); shift 221 drivers/clk/sunxi-ng/ccu_nm.c reg |= (_nm.n - nm->n.offset) << nm->n.shift; shift 222 drivers/clk/sunxi-ng/ccu_nm.c reg |= (_nm.m - nm->m.offset) << nm->m.shift; shift 23 drivers/clk/sunxi-ng/ccu_phase.c delay = (reg >> phase->shift); shift 112 drivers/clk/sunxi-ng/ccu_phase.c reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift); shift 113 drivers/clk/sunxi-ng/ccu_phase.c writel(reg | (delay << phase->shift), shift 14 drivers/clk/sunxi-ng/ccu_phase.h u8 shift; shift 22 drivers/clk/sunxi-ng/ccu_phase.h .shift = _shift, \ shift 50 drivers/clk/sunxi/clk-a10-mod1.c mux->shift = SUN4I_MOD1_MUX; shift 88 drivers/clk/sunxi/clk-a10-pll2.c mult->shift = SUN4I_PLL2_N_SHIFT; shift 116 drivers/clk/sunxi/clk-a10-ve.c div->shift = SUN4I_VE_DIVIDER_SHIFT; shift 74 drivers/clk/sunxi/clk-factors.c (reg >> factors->mux->shift) & shift 239 drivers/clk/sunxi/clk-factors.c mux->shift = data->mux; shift 134 drivers/clk/sunxi/clk-sun4i-display.c mux->shift = data->offset_mux; shift 152 drivers/clk/sunxi/clk-sun4i-display.c div->shift = data->offset_div; shift 53 drivers/clk/sunxi/clk-sun4i-pll3.c mult->shift = SUN4I_A10_PLL3_DIV_SHIFT; shift 28 drivers/clk/sunxi/clk-sun6i-ar100.c int shift; shift 37 drivers/clk/sunxi/clk-sun6i-ar100.c shift = 0; shift 39 drivers/clk/sunxi/clk-sun6i-ar100.c shift = 1; shift 41 drivers/clk/sunxi/clk-sun6i-ar100.c shift = 2; shift 43 drivers/clk/sunxi/clk-sun6i-ar100.c shift = 3; shift 45 drivers/clk/sunxi/clk-sun6i-ar100.c div >>= shift; shift 50 drivers/clk/sunxi/clk-sun6i-ar100.c req->rate = (req->parent_rate >> shift) / div; shift 52 drivers/clk/sunxi/clk-sun6i-ar100.c req->p = shift; shift 67 drivers/clk/sunxi/clk-sun8i-mbus.c div->shift = SUN8I_MBUS_DIV_SHIFT; shift 72 drivers/clk/sunxi/clk-sun8i-mbus.c mux->shift = SUN8I_MBUS_MUX_SHIFT; shift 212 drivers/clk/sunxi/clk-sun9i-cpus.c mux->shift = SUN9I_CPUS_MUX_SHIFT; shift 635 drivers/clk/sunxi/clk-sunxi.c u8 shift; shift 639 drivers/clk/sunxi/clk-sunxi.c .shift = 16, shift 643 drivers/clk/sunxi/clk-sunxi.c .shift = 12, shift 647 drivers/clk/sunxi/clk-sunxi.c .shift = 0, shift 675 drivers/clk/sunxi/clk-sunxi.c data->shift, SUNXI_MUX_GATE_WIDTH, shift 725 drivers/clk/sunxi/clk-sunxi.c u8 shift; shift 732 drivers/clk/sunxi/clk-sunxi.c .shift = 0, shift 755 drivers/clk/sunxi/clk-sunxi.c .shift = 4, shift 769 drivers/clk/sunxi/clk-sunxi.c .shift = 8, shift 798 drivers/clk/sunxi/clk-sunxi.c reg, data->shift, data->width, shift 886 drivers/clk/sunxi/clk-sunxi.c u8 shift; /* otherwise it's a normal divisor with this shift */ shift 906 drivers/clk/sunxi/clk-sunxi.c { .shift = 0, .pow = 0, .critical = true }, /* M, DDR */ shift 907 drivers/clk/sunxi/clk-sunxi.c { .shift = 16, .pow = 1, }, /* P, other */ shift 916 drivers/clk/sunxi/clk-sunxi.c { .shift = 0, .table = pll6_sata_tbl, .gate = 14 }, /* M, SATA */ shift 1066 drivers/clk/sunxi/clk-sunxi.c divider->shift = data->div[i].shift; shift 14 drivers/clk/tegra/clk-divider.c #define pll_out_override(p) (BIT((p->shift - 6))) shift 43 drivers/clk/tegra/clk-divider.c reg = readl_relaxed(divider->reg) >> divider->shift; shift 91 drivers/clk/tegra/clk-divider.c val &= ~(div_mask(divider) << divider->shift); shift 92 drivers/clk/tegra/clk-divider.c val |= div << divider->shift; shift 120 drivers/clk/tegra/clk-divider.c unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, shift 141 drivers/clk/tegra/clk-divider.c divider->shift = shift; shift 35 drivers/clk/tegra/clk-super.c u8 source, shift; shift 43 drivers/clk/tegra/clk-super.c shift = (state == super_state(SUPER_STATE_IDLE)) ? shift 47 drivers/clk/tegra/clk-super.c source = (val >> shift) & super_state_to_src_mask(mux); shift 65 drivers/clk/tegra/clk-super.c u8 parent_index, shift; shift 75 drivers/clk/tegra/clk-super.c shift = (state == super_state(SUPER_STATE_IDLE)) ? shift 100 drivers/clk/tegra/clk-super.c val &= ~((super_state_to_src_mask(mux)) << shift); shift 101 drivers/clk/tegra/clk-super.c val |= (index & (super_state_to_src_mask(mux))) << shift; shift 219 drivers/clk/tegra/clk-super.c super->frac_div.shift = 16; shift 943 drivers/clk/tegra/clk-tegra-periph.c data->periph.divider.shift, shift 61 drivers/clk/tegra/clk.h u8 shift; shift 77 drivers/clk/tegra/clk.h unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, shift 588 drivers/clk/tegra/clk.h .shift = _mux_shift, \ shift 595 drivers/clk/tegra/clk.h .shift = _div_shift, \ shift 253 drivers/clk/ti/adpll.c u8 shift, u8 width, shift 266 drivers/clk/ti/adpll.c reg, shift, width, clk_divider_flags, shift 283 drivers/clk/ti/adpll.c u8 shift) shift 295 drivers/clk/ti/adpll.c reg, shift, 1, 0, &d->lock); shift 29 drivers/clk/ti/autoidle.c u8 shift; shift 122 drivers/clk/ti/autoidle.c val &= ~(1 << clk->shift); shift 124 drivers/clk/ti/autoidle.c val |= (1 << clk->shift); shift 136 drivers/clk/ti/autoidle.c val |= (1 << clk->shift); shift 138 drivers/clk/ti/autoidle.c val &= ~(1 << clk->shift); shift 184 drivers/clk/ti/autoidle.c u32 shift; shift 189 drivers/clk/ti/autoidle.c if (of_property_read_u32(node, "ti,autoidle-shift", &shift)) shift 197 drivers/clk/ti/autoidle.c clk->shift = shift; shift 292 drivers/clk/ti/clk.c void ti_clk_latch(struct clk_omap_reg *reg, s8 shift) shift 296 drivers/clk/ti/clk.c if (shift < 0) shift 299 drivers/clk/ti/clk.c latch = 1 << shift; shift 352 drivers/clk/ti/clkctrl.c mux->shift = data->bit; shift 376 drivers/clk/ti/clkctrl.c div->shift = data->bit; shift 22 drivers/clk/ti/clock.h u8 shift; shift 37 drivers/clk/ti/clock.h u8 shift; shift 218 drivers/clk/ti/clock.h void ti_clk_latch(struct clk_omap_reg *reg, s8 shift); shift 103 drivers/clk/ti/divider.c val = ti_clk_ll_ops->clk_readl(÷r->reg) >> divider->shift; shift 258 drivers/clk/ti/divider.c val = div_mask(divider) << (divider->shift + 16); shift 261 drivers/clk/ti/divider.c val &= ~(div_mask(divider) << divider->shift); shift 263 drivers/clk/ti/divider.c val |= value << divider->shift; shift 282 drivers/clk/ti/divider.c val = ti_clk_ll_ops->clk_readl(÷r->reg) >> divider->shift; shift 300 drivers/clk/ti/divider.c val &= ~(div_mask(divider) << divider->shift); shift 301 drivers/clk/ti/divider.c val |= divider->context << divider->shift; shift 317 drivers/clk/ti/divider.c u8 shift, u8 width, s8 latch, shift 326 drivers/clk/ti/divider.c if (width + shift > 16) { shift 345 drivers/clk/ti/divider.c div->shift = shift; shift 524 drivers/clk/ti/divider.c u32 *flags, u8 *div_flags, u8 *width, u8 *shift, s8 *latch) shift 534 drivers/clk/ti/divider.c *shift = val; shift 536 drivers/clk/ti/divider.c *shift = 0; shift 580 drivers/clk/ti/divider.c u8 shift = 0; shift 588 drivers/clk/ti/divider.c &clk_divider_flags, &width, &shift, &latch)) shift 592 drivers/clk/ti/divider.c shift, width, latch, clk_divider_flags, table); shift 615 drivers/clk/ti/divider.c &div->flags, &div->width, &div->shift, shift 86 drivers/clk/ti/gate.c dummy_v ^= (1 << parent->shift); shift 42 drivers/clk/ti/mux.c val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; shift 82 drivers/clk/ti/mux.c val = mux->mask << (mux->shift + 16); shift 85 drivers/clk/ti/mux.c val &= ~(mux->mask << mux->shift); shift 87 drivers/clk/ti/mux.c val |= index << mux->shift; shift 132 drivers/clk/ti/mux.c struct clk_omap_reg *reg, u8 shift, u32 mask, shift 152 drivers/clk/ti/mux.c mux->shift = shift; shift 181 drivers/clk/ti/mux.c u32 shift = 0; shift 199 drivers/clk/ti/mux.c of_property_read_u32(node, "ti,bit-shift", &shift); shift 217 drivers/clk/ti/mux.c flags, ®, shift, mask, latch, clk_mux_flags, shift 240 drivers/clk/ti/mux.c mux->shift = setup->bit_shift; shift 271 drivers/clk/ti/mux.c mux->shift = val; shift 47 drivers/clk/versatile/clk-sp810.c u32 val, shift = SCCTRL_TIMERENnSEL_SHIFT(timerclken->channel); shift 56 drivers/clk/versatile/clk-sp810.c val &= ~(1 << shift); shift 57 drivers/clk/versatile/clk-sp810.c val |= index << shift; shift 197 drivers/clk/zte/clk-zx296702.c void __iomem *reg, u8 shift, u8 width, shift 200 drivers/clk/zte/clk-zx296702.c return clk_register_divider_table(NULL, name, parent, 0, reg, shift, shift 205 drivers/clk/zte/clk-zx296702.c void __iomem *reg, u8 shift, u8 width) shift 208 drivers/clk/zte/clk-zx296702.c reg, shift, width, 0, ®_lock); shift 212 drivers/clk/zte/clk-zx296702.c int num_parents, void __iomem *reg, u8 shift, u8 width) shift 215 drivers/clk/zte/clk-zx296702.c 0, reg, shift, width, 0, ®_lock); shift 219 drivers/clk/zte/clk-zx296702.c void __iomem *reg, u8 shift) shift 222 drivers/clk/zte/clk-zx296702.c reg, shift, CLK_SET_RATE_PARENT, ®_lock); shift 103 drivers/clk/zte/clk.h .shift = _shift, \ shift 126 drivers/clk/zte/clk.h .shift = _shift, \ shift 992 drivers/clocksource/arm_arch_timer.c cyclecounter.shift = clocksource_counter.shift; shift 302 drivers/clocksource/exynos_mct.c >> evt->shift); shift 420 drivers/clocksource/exynos_mct.c >> evt->shift); shift 27 drivers/clocksource/numachip.c .shift = 0, shift 43 drivers/clocksource/numachip.c .shift = 0, shift 178 drivers/clocksource/renesas-ostm.c ced->shift = 32; shift 85 drivers/clocksource/samsung_pwm_timer.c u8 shift = 0; shift 89 drivers/clocksource/samsung_pwm_timer.c shift = TCFG0_PRESCALER1_SHIFT; shift 94 drivers/clocksource/samsung_pwm_timer.c reg &= ~(TCFG0_PRESCALER_MASK << shift); shift 95 drivers/clocksource/samsung_pwm_timer.c reg |= (prescale - 1) << shift; shift 103 drivers/clocksource/samsung_pwm_timer.c u8 shift = TCFG1_SHIFT(channel); shift 113 drivers/clocksource/samsung_pwm_timer.c reg &= ~(TCFG1_MUX_MASK << shift); shift 114 drivers/clocksource/samsung_pwm_timer.c reg |= bits << shift; shift 804 drivers/clocksource/sh_cmt.c ced->shift = 32; shift 805 drivers/clocksource/sh_cmt.c ced->mult = div_sc(ch->cmt->rate, NSEC_PER_SEC, ced->shift); shift 187 drivers/clocksource/timer-armada-370-xp.c evt->shift = 32, shift 246 drivers/clocksource/timer-atmel-pit.c data->clkevt.shift = 32; shift 247 drivers/clocksource/timer-atmel-pit.c data->clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, data->clkevt.shift); shift 102 drivers/clocksource/timer-orion.c .shift = 32, shift 93 drivers/clocksource/timer-rda.c evt->mult) >> evt->shift; shift 162 drivers/cpufreq/powernv-cpufreq.c static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift) shift 164 drivers/cpufreq/powernv-cpufreq.c return ((pmsr_val >> shift) & 0xFF); shift 132 drivers/cpufreq/sa1110-cpufreq.c u_int shift; shift 135 drivers/cpufreq/sa1110-cpufreq.c shift = delayed + 1 + rcd; shift 138 drivers/cpufreq/sa1110-cpufreq.c mdcas[0] |= 0x55555555 << shift; shift 139 drivers/cpufreq/sa1110-cpufreq.c mdcas[1] = mdcas[2] = 0x55555555 << (shift & 1); shift 125 drivers/crypto/cavium/cpt/cptpf_main.c int ret = 0, core = 0, shift = 0; shift 151 drivers/crypto/cavium/cpt/cptpf_main.c for (; core < total_cores ; core++, shift++) { shift 152 drivers/crypto/cavium/cpt/cptpf_main.c if (mcode->core_mask & (1 << shift)) { shift 54 drivers/crypto/qat/qat_common/adf_transport.c static inline uint32_t adf_modulo(uint32_t data, uint32_t shift) shift 56 drivers/crypto/qat/qat_common/adf_transport.c uint32_t div = data >> shift; shift 57 drivers/crypto/qat/qat_common/adf_transport.c uint32_t mult = div << shift; shift 333 drivers/crypto/qat/qat_common/qat_asym_algs.c int shift = ctx->p_size - req->src_len; shift 342 drivers/crypto/qat/qat_common/qat_asym_algs.c scatterwalk_map_and_copy(qat_req->src_align + shift, shift 738 drivers/crypto/qat/qat_common/qat_asym_algs.c int shift = ctx->key_sz - req->src_len; shift 746 drivers/crypto/qat/qat_common/qat_asym_algs.c scatterwalk_map_and_copy(qat_req->src_align + shift, req->src, shift 882 drivers/crypto/qat/qat_common/qat_asym_algs.c int shift = ctx->key_sz - req->src_len; shift 890 drivers/crypto/qat/qat_common/qat_asym_algs.c scatterwalk_map_and_copy(qat_req->src_align + shift, req->src, shift 33 drivers/crypto/ux500/cryp/cryp_p.h #define CRYP_PUT_BITS(reg, val, shift, mask) \ shift 35 drivers/crypto/ux500/cryp/cryp_p.h (((u32)val << shift) & (mask))), reg) shift 104 drivers/crypto/ux500/hash/hash_alg.h #define HASH_PUT_BITS(reg, val, shift, mask) \ shift 106 drivers/crypto/ux500/hash/hash_alg.h (((u32)val << shift) & (mask))), reg) shift 171 drivers/dma/bcm-sba-raid.c static inline u64 __pure sba_cmd_enc(u64 cmd, u32 val, u32 shift, u32 mask) shift 173 drivers/dma/bcm-sba-raid.c cmd &= ~((u64)mask << shift); shift 174 drivers/dma/bcm-sba-raid.c cmd |= ((u64)(val & mask) << shift); shift 264 drivers/dma/dma-jz4780.c unsigned long val, uint32_t *shift) shift 281 drivers/dma/dma-jz4780.c *shift = ord; shift 1795 drivers/dma/imx-sdma.c u32 reg, val, shift, num_map, i; shift 1828 drivers/dma/imx-sdma.c ret = of_property_read_u32_index(np, propname, i + 1, &shift); shift 1842 drivers/dma/imx-sdma.c regmap_update_bits(gpr, reg, BIT(shift), val << shift); shift 480 drivers/dma/iop-adma.h int i, shift; shift 492 drivers/dma/iop-adma.h shift = 1; shift 494 drivers/dma/iop-adma.h edcr |= (1 << shift); shift 495 drivers/dma/iop-adma.h shift += 3; shift 506 drivers/dma/iop-adma.h shift = 1; shift 508 drivers/dma/iop-adma.h edcr |= (1 << shift); shift 509 drivers/dma/iop-adma.h shift += 3; shift 518 drivers/dma/iop-adma.h shift = 1; shift 520 drivers/dma/iop-adma.h edcr |= (1 << shift); shift 521 drivers/dma/iop-adma.h shift += 3; shift 527 drivers/dma/iop-adma.h shift = 1; shift 529 drivers/dma/iop-adma.h u_desc_ctrl.value |= (1 << shift); shift 530 drivers/dma/iop-adma.h shift += 3; shift 120 drivers/dma/owl-dma.c #define BIT_FIELD(val, width, shift, newshift) \ shift 121 drivers/dma/owl-dma.c ((((val) >> (shift)) & ((BIT(width)) - 1)) << (newshift)) shift 263 drivers/dma/sh/shdmac.c unsigned int shift = chan_pdata->dmars_bit; shift 276 drivers/dma/sh/shdmac.c __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift), shift 70 drivers/dma/tegra210-adma.c #define ADMA_CH_REG_FIELD_VAL(val, mask, shift) (((val) & mask) << shift) shift 2061 drivers/dma/ti/edma.c u32 shift, offset, mux; shift 2087 drivers/dma/ti/edma.c shift = (xbar_chans[i][1] & 0x03) << 3; shift 2090 drivers/dma/ti/edma.c mux &= ~(0xff << shift); shift 2091 drivers/dma/ti/edma.c mux |= xbar_chans[i][0] << shift; shift 1334 drivers/edac/amd64_edac.c unsigned shift = 0; shift 1337 drivers/edac/amd64_edac.c shift = i; shift 1339 drivers/edac/amd64_edac.c shift = i >> 1; shift 1341 drivers/edac/amd64_edac.c shift = (i + 1) >> 1; shift 1343 drivers/edac/amd64_edac.c return 128 << (shift + !!dct_width); shift 1458 drivers/edac/amd64_edac.c unsigned shift = 0; shift 1464 drivers/edac/amd64_edac.c shift = i; shift 1466 drivers/edac/amd64_edac.c shift = 7; shift 1468 drivers/edac/amd64_edac.c shift = i >> 1; shift 1470 drivers/edac/amd64_edac.c shift = (i + 1) >> 1; shift 1473 drivers/edac/amd64_edac.c cs_size = (128 * (1 << !!dct_width)) << shift; shift 1480 drivers/edac/amd64_edac.c unsigned shift = 0; shift 1486 drivers/edac/amd64_edac.c shift = 7; shift 1488 drivers/edac/amd64_edac.c shift = i >> 1; shift 1490 drivers/edac/amd64_edac.c shift = (i + 1) >> 1; shift 1493 drivers/edac/amd64_edac.c cs_size = rank_multiply * (128 << shift); shift 1727 drivers/edac/amd64_edac.c u8 shift = intlv_addr & 0x1 ? 9 : 6; shift 1730 drivers/edac/amd64_edac.c return ((sys_addr >> shift) & 1) ^ temp; shift 1734 drivers/edac/amd64_edac.c u8 shift = intlv_addr & 0x1 ? 9 : 8; shift 1736 drivers/edac/amd64_edac.c return (sys_addr >> shift) & 1; shift 219 drivers/edac/skx_base.c int i, idx, tgt, lchan, shift; shift 284 drivers/edac/skx_base.c shift = 6; shift 287 drivers/edac/skx_base.c shift = 8; shift 290 drivers/edac/skx_base.c shift = 12; shift 298 drivers/edac/skx_base.c lchan = (addr >> shift) % 3; shift 301 drivers/edac/skx_base.c lchan = (addr >> shift) % 2; shift 304 drivers/edac/skx_base.c lchan = (addr >> shift) % 2; shift 308 drivers/edac/skx_base.c lchan = ((addr >> shift) % 2) << 1; shift 344 drivers/edac/skx_base.c static u64 skx_do_interleave(u64 addr, int shift, int ways, u64 lowbits) shift 346 drivers/edac/skx_base.c addr >>= shift; shift 348 drivers/edac/skx_base.c addr <<= shift; shift 350 drivers/edac/skx_base.c return addr | (lowbits & ((1ull << shift) - 1)); shift 417 drivers/edac/skx_base.c int shift; shift 422 drivers/edac/skx_base.c shift = 6; shift 424 drivers/edac/skx_base.c shift = 13; shift 440 drivers/edac/skx_base.c rank_addr = res->chan_addr >> shift; shift 442 drivers/edac/skx_base.c rank_addr <<= shift; shift 443 drivers/edac/skx_base.c rank_addr |= res->chan_addr & GENMASK_ULL(shift - 1, 0); shift 446 drivers/edac/skx_base.c idx = (res->chan_addr >> shift) % SKX_RIR_WAYS(rirway); shift 43 drivers/firewire/core-topology.c int port_type, shift, seq; shift 48 drivers/firewire/core-topology.c shift = 6; shift 53 drivers/firewire/core-topology.c port_type = (q >> shift) & 0x03; shift 65 drivers/firewire/core-topology.c shift -= 2; shift 66 drivers/firewire/core-topology.c if (shift == 0) { shift 70 drivers/firewire/core-topology.c shift = 16; shift 92 drivers/firewire/core-topology.c int index, shift; shift 95 drivers/firewire/core-topology.c shift = 16 - ((port_index + 5) & 7) * 2; shift 96 drivers/firewire/core-topology.c return (sid[index] >> shift) & 0x03; shift 410 drivers/firewire/ohci.c static char _p(u32 *s, int shift) shift 412 drivers/firewire/ohci.c return port[*s >> shift & 3]; shift 75 drivers/gpio/gpio-74x164.c unsigned int i, idx, shift; shift 82 drivers/gpio/gpio-74x164.c shift = i % sizeof(*mask) * BITS_PER_BYTE; shift 83 drivers/gpio/gpio-74x164.c bankmask = mask[idx] >> shift; shift 88 drivers/gpio/gpio-74x164.c chip->buffer[bank] |= bankmask & (bits[idx] >> shift); shift 17 drivers/gpio/gpio-creg-snps.c u8 shift[MAX_GPIO]; shift 40 drivers/gpio/gpio-creg-snps.c reg_shift = layout->shift[offset]; shift 42 drivers/gpio/gpio-creg-snps.c reg_shift += layout->bit_per_gpio[i] + layout->shift[i]; shift 99 drivers/gpio/gpio-creg-snps.c reg_len += hcg->layout->shift[i] + hcg->layout->bit_per_gpio[i]; shift 111 drivers/gpio/gpio-creg-snps.c .shift = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, shift 119 drivers/gpio/gpio-creg-snps.c .shift = { 0 }, shift 168 drivers/gpio/gpio-cs5535.c uint32_t shift = (offset % 8) * 4; shift 185 drivers/gpio/gpio-cs5535.c val &= ~(0xF << shift); shift 188 drivers/gpio/gpio-cs5535.c val |= ((pair & 7) << shift); shift 192 drivers/gpio/gpio-cs5535.c val |= (1 << (shift + 3)); shift 126 drivers/gpio/gpio-em.c unsigned int reg, offset, shift; shift 139 drivers/gpio/gpio-em.c shift = (offset & 0x07) << 4; shift 150 drivers/gpio/gpio-em.c tmp &= ~(0xf << shift); shift 151 drivers/gpio/gpio-em.c tmp |= value << shift; shift 200 drivers/gpio/gpio-em.c unsigned shift, int value) shift 204 drivers/gpio/gpio-em.c (BIT(shift + 16)) | (value << shift)); shift 180 drivers/gpio/gpio-htc-egpio.c int shift; shift 189 drivers/gpio/gpio-htc-egpio.c shift = pos << ei->reg_shift; shift 192 drivers/gpio/gpio-htc-egpio.c reg, (egpio->cached_values >> shift) & ei->reg_mask); shift 199 drivers/gpio/gpio-htc-egpio.c egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg); shift 230 drivers/gpio/gpio-htc-egpio.c int shift; shift 237 drivers/gpio/gpio-htc-egpio.c for (shift = 0; shift < egpio->chip.ngpio; shift 238 drivers/gpio/gpio-htc-egpio.c shift += (1<<ei->reg_shift)) { shift 240 drivers/gpio/gpio-htc-egpio.c int reg = egpio->reg_start + egpio_pos(ei, shift); shift 242 drivers/gpio/gpio-htc-egpio.c if (!((egpio->is_out >> shift) & ei->reg_mask)) shift 246 drivers/gpio/gpio-htc-egpio.c (egpio->cached_values >> shift) & ei->reg_mask, shift 249 drivers/gpio/gpio-htc-egpio.c egpio_writew((egpio->cached_values >> shift) shift 91 drivers/gpio/gpio-intel-mid.c int shift = (offset % 16) << 1, af = (value >> shift) & 3; shift 94 drivers/gpio/gpio-intel-mid.c value &= ~(3 << shift); shift 72 drivers/gpio/gpio-lp3943.c val << mux[offset].shift); shift 121 drivers/gpio/gpio-lp3943.c read = (read & mux[offset].mask) >> mux[offset].shift; shift 244 drivers/gpio/gpio-max3191x.c unsigned long in, shift, index; shift 252 drivers/gpio/gpio-max3191x.c shift = round_down(bit % BITS_PER_LONG, MAX3191X_NGPIO); shift 254 drivers/gpio/gpio-max3191x.c bits[index] &= ~(mask[index] & (0xff << shift)); shift 255 drivers/gpio/gpio-max3191x.c bits[index] |= mask[index] & (in << shift); /* copy bits */ shift 221 drivers/gpio/gpio-mpc8xxx.c unsigned int shift; shift 226 drivers/gpio/gpio-mpc8xxx.c shift = (15 - gpio) * 2; shift 229 drivers/gpio/gpio-mpc8xxx.c shift = (15 - (gpio % 16)) * 2; shift 236 drivers/gpio/gpio-mpc8xxx.c gc->write_reg(reg, (gc->read_reg(reg) & ~(3 << shift)) shift 237 drivers/gpio/gpio-mpc8xxx.c | (2 << shift)); shift 244 drivers/gpio/gpio-mpc8xxx.c gc->write_reg(reg, (gc->read_reg(reg) & ~(3 << shift)) shift 245 drivers/gpio/gpio-mpc8xxx.c | (1 << shift)); shift 251 drivers/gpio/gpio-mpc8xxx.c gc->write_reg(reg, (gc->read_reg(reg) & ~(3 << shift))); shift 71 drivers/gpio/gpio-pmic-eic-sprd.c u32 shift = SPRD_PMIC_EIC_BIT(offset); shift 74 drivers/gpio/gpio-pmic-eic-sprd.c BIT(shift), val << shift); shift 150 drivers/gpio/gpio-uniphier.c unsigned int bank, shift, bank_mask, bank_bits; shift 155 drivers/gpio/gpio-uniphier.c shift = i % BITS_PER_LONG; shift 156 drivers/gpio/gpio-uniphier.c bank_mask = (mask[BIT_WORD(i)] >> shift) & shift 158 drivers/gpio/gpio-uniphier.c bank_bits = bits[BIT_WORD(i)] >> shift; shift 185 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c gpio.shift = pin->ucGpioPinBitShift; shift 483 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h u32 shift; shift 1560 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c uint32_t shift = (pos & 3) * 8; shift 1561 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c uint32_t mask = 0xffffffff << shift; shift 1575 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c value |= (*(uint32_t *)buf << shift) & mask; shift 1580 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c value = (value & mask) >> shift; shift 97 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned shift = 0xff; shift 103 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = 9 * (AMDGPU_VM_PDB0 - level) + shift 107 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = 0; shift 113 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c return shift; shift 128 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned shift = amdgpu_vm_level_shift(adev, shift 133 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c return round_up(adev->vm_manager.max_pfn, 1ULL << shift) >> shift; shift 152 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned shift; shift 154 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = amdgpu_vm_level_shift(adev, adev->vm_manager.root_level); shift 155 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c return AMDGPU_GMC_HOLE_START >> (shift + AMDGPU_GPU_PAGE_SHIFT); shift 387 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned mask, shift, idx; shift 394 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = amdgpu_vm_level_shift(adev, cursor->level); shift 397 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c idx = (cursor->pfn >> shift) & mask; shift 416 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned shift, num_entries; shift 423 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = amdgpu_vm_level_shift(adev, cursor->level - 1); shift 429 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c cursor->pfn += 1ULL << shift; shift 430 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c cursor->pfn &= ~((1ULL << shift) - 1); shift 1396 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned shift, parent_shift, mask; shift 1413 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = amdgpu_vm_level_shift(adev, cursor.level); shift 1423 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c } else if (frag < shift) { shift 1443 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c incr = (uint64_t)AMDGPU_GPU_PAGE_SIZE << shift; shift 1445 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c pe_start = ((cursor.pfn >> shift) & mask) * 8; shift 1446 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c entry_end = (uint64_t)(mask + 1) << shift; shift 1452 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned nptes = (upd_end - frag_start) >> shift; shift 1459 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c dst += (uint64_t)nptes * AMDGPU_GPU_PAGE_SIZE << shift; shift 1466 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (frag < shift) shift 1478 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c } else if (frag >= shift) { shift 241 drivers/gpu/drm/amd/amdgpu/atom.c val = gctx->shift; shift 244 drivers/gpu/drm/amd/amdgpu/atom.c val = 1 << gctx->shift; shift 247 drivers/gpu/drm/amd/amdgpu/atom.c val = ~(1 << gctx->shift); shift 511 drivers/gpu/drm/amd/amdgpu/atom.c gctx->shift = val; shift 919 drivers/gpu/drm/amd/amdgpu/atom.c uint8_t attr = U8((*ptr)++), shift; shift 926 drivers/gpu/drm/amd/amdgpu/atom.c shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); shift 927 drivers/gpu/drm/amd/amdgpu/atom.c SDEBUG(" shift: %d\n", shift); shift 928 drivers/gpu/drm/amd/amdgpu/atom.c dst <<= shift; shift 935 drivers/gpu/drm/amd/amdgpu/atom.c uint8_t attr = U8((*ptr)++), shift; shift 942 drivers/gpu/drm/amd/amdgpu/atom.c shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); shift 943 drivers/gpu/drm/amd/amdgpu/atom.c SDEBUG(" shift: %d\n", shift); shift 944 drivers/gpu/drm/amd/amdgpu/atom.c dst >>= shift; shift 951 drivers/gpu/drm/amd/amdgpu/atom.c uint8_t attr = U8((*ptr)++), shift; shift 959 drivers/gpu/drm/amd/amdgpu/atom.c shift = atom_get_src(ctx, attr, ptr); shift 960 drivers/gpu/drm/amd/amdgpu/atom.c SDEBUG(" shift: %d\n", shift); shift 961 drivers/gpu/drm/amd/amdgpu/atom.c dst <<= shift; shift 970 drivers/gpu/drm/amd/amdgpu/atom.c uint8_t attr = U8((*ptr)++), shift; shift 978 drivers/gpu/drm/amd/amdgpu/atom.c shift = atom_get_src(ctx, attr, ptr); shift 979 drivers/gpu/drm/amd/amdgpu/atom.c SDEBUG(" shift: %d\n", shift); shift 980 drivers/gpu/drm/amd/amdgpu/atom.c dst >>= shift; shift 139 drivers/gpu/drm/amd/amdgpu/atom.h uint8_t shift; shift 422 drivers/gpu/drm/amd/amdgpu/kv_dpm.c cache |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 437 drivers/gpu/drm/amd/amdgpu/kv_dpm.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 73 drivers/gpu/drm/amd/amdgpu/kv_dpm.h u32 shift; shift 2859 drivers/gpu/drm/amd/amdgpu/si_dpm.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 856 drivers/gpu/drm/amd/amdgpu/si_dpm.h u32 shift; shift 49 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift) shift 53 drivers/gpu/drm/amd/display/dc/dc_helper.c field_value_mask->value = (field_value_mask->value & ~mask) | (mask & (value << shift)); shift 62 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t shift, mask, field_value; shift 70 drivers/gpu/drm/amd/display/dc/dc_helper.c shift = va_arg(ap, uint32_t); shift 75 drivers/gpu/drm/amd/display/dc/dc_helper.c field_value, mask, shift); shift 144 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift, uint32_t mask, uint32_t *field_value) shift 147 drivers/gpu/drm/amd/display/dc/dc_helper.c *field_value = get_reg_field_value_ex(reg_val, mask, shift); shift 294 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t addr, uint32_t shift, uint32_t mask, uint32_t condition_value, shift 315 drivers/gpu/drm/amd/display/dc/dc_helper.c field_value = get_reg_field_value_ex(reg_val, mask, shift); shift 362 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t shift, mask, field_value; shift 372 drivers/gpu/drm/amd/display/dc/dc_helper.c shift = va_arg(ap, uint32_t); shift 376 drivers/gpu/drm/amd/display/dc/dc_helper.c reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift); shift 128 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c int32_t shift = 7; shift 136 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c write_bit_to_ddc(ddc_handle, SDA, (byte >> shift) & 1); shift 147 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c --shift; shift 148 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c } while (shift >= 0); shift 186 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c int32_t shift = 7; shift 201 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c data |= (1 << shift); shift 207 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c --shift; shift 208 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c } while (shift >= 0); shift 106 drivers/gpu/drm/amd/display/dc/dm_services.h uint8_t shift) shift 108 drivers/gpu/drm/amd/display/dc/dm_services.h return (mask & reg_value) >> shift; shift 121 drivers/gpu/drm/amd/display/dc/dm_services.h uint8_t shift) shift 124 drivers/gpu/drm/amd/display/dc/dm_services.h return (reg_value & ~mask) | (mask & (value << shift)); shift 150 drivers/gpu/drm/amd/display/dc/dm_services.h uint32_t addr, uint32_t mask, uint32_t shift, uint32_t condition_value, shift 392 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h uint8_t shift, uint32_t mask, uint32_t *field_value); shift 216 drivers/gpu/drm/amd/display/include/fixed31_32.h static inline struct fixed31_32 dc_fixpt_shl(struct fixed31_32 arg, unsigned char shift) shift 218 drivers/gpu/drm/amd/display/include/fixed31_32.h ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) || shift 219 drivers/gpu/drm/amd/display/include/fixed31_32.h ((arg.value < 0) && (arg.value >= ~(LLONG_MAX >> shift)))); shift 221 drivers/gpu/drm/amd/display/include/fixed31_32.h arg.value = arg.value << shift; shift 230 drivers/gpu/drm/amd/display/include/fixed31_32.h static inline struct fixed31_32 dc_fixpt_shr(struct fixed31_32 arg, unsigned char shift) shift 236 drivers/gpu/drm/amd/display/include/fixed31_32.h arg.value = arg.value >> shift; shift 45 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.c u32 shift, u32 value, u32 timeout) shift 53 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.c WREG32(reg, value << shift); shift 57 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.c data = (data & (~mask)) | (value << shift); shift 96 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.c entry[i].shift, entry[i].val, entry[i].timeout)) shift 43 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.h uint32_t shift; shift 49 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h uint32_t shift; shift 906 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c cache |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 927 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 92 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c u32 shift = 0; shift 94 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c shift = (offset % 4) << 3; shift 96 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c mask = 0xFF << shift; shift 98 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c mask = 0xFFFF << shift; shift 101 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c original_data |= (field << shift); shift 810 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 816 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 822 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 842 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 48 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.h uint32_t shift; shift 56 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.h uint32_t shift; shift 328 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c int shift = (lane & 1) * 4; shift 331 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c return (link_value >> shift) & 0xf; shift 369 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c int shift = (lane & 1) * 4; shift 372 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c return (link_value >> shift) & 0x3; shift 379 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c int shift = (lane & 1) * 4; shift 382 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c return ((link_value >> shift) & 0xc) >> 2; shift 225 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c u8 shift, u8 mask) shift 227 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c hdmi_modb(hdmi, data << shift, mask, reg); shift 92 drivers/gpu/drm/drm_bufs.c int use_hashed_handle, shift; shift 111 drivers/gpu/drm/drm_bufs.c shift = 0; shift 128 drivers/gpu/drm/drm_bufs.c shift = bits; shift 134 drivers/gpu/drm/drm_bufs.c shift, add); shift 1445 drivers/gpu/drm/drm_dp_mst_topology.c int shift = 4; shift 1449 drivers/gpu/drm/drm_dp_mst_topology.c shift = (parent_lct % 2) ? 4 : 0; shift 1453 drivers/gpu/drm/drm_dp_mst_topology.c rad[idx] |= port->port_num << shift; shift 1571 drivers/gpu/drm/drm_dp_mst_topology.c int shift = (i % 2) ? 0 : 4; shift 1572 drivers/gpu/drm/drm_dp_mst_topology.c int port_num = (mstb->rad[i / 2] >> shift) & 0xf; shift 1778 drivers/gpu/drm/drm_dp_mst_topology.c int shift = (i % 2) ? 0 : 4; shift 1779 drivers/gpu/drm/drm_dp_mst_topology.c int port_num = (rad[i / 2] >> shift) & 0xf; shift 145 drivers/gpu/drm/drm_hashtab.c unsigned long seed, int bits, int shift, shift 155 drivers/gpu/drm/drm_hashtab.c item->key = (unshifted_key << shift) + add; shift 122 drivers/gpu/drm/i915/display/intel_psr.c int shift = edp_psr_shift(cpu_transcoder); shift 124 drivers/gpu/drm/i915/display/intel_psr.c mask |= EDP_PSR_ERROR(shift); shift 125 drivers/gpu/drm/i915/display/intel_psr.c debug_mask |= EDP_PSR_POST_EXIT(shift) | shift 126 drivers/gpu/drm/i915/display/intel_psr.c EDP_PSR_PRE_ENTRY(shift); shift 185 drivers/gpu/drm/i915/display/intel_psr.c int shift = edp_psr_shift(cpu_transcoder); shift 187 drivers/gpu/drm/i915/display/intel_psr.c if (psr_iir & EDP_PSR_ERROR(shift)) { shift 201 drivers/gpu/drm/i915/display/intel_psr.c mask |= EDP_PSR_ERROR(shift); shift 204 drivers/gpu/drm/i915/display/intel_psr.c if (psr_iir & EDP_PSR_PRE_ENTRY(shift)) { shift 210 drivers/gpu/drm/i915/display/intel_psr.c if (psr_iir & EDP_PSR_POST_EXIT(shift)) { shift 3061 drivers/gpu/drm/i915/gt/intel_lrc.c unsigned int shift = 0; shift 3072 drivers/gpu/drm/i915/gt/intel_lrc.c shift = irq_shifts[engine->id]; shift 3075 drivers/gpu/drm/i915/gt/intel_lrc.c engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT << shift; shift 3076 drivers/gpu/drm/i915/gt/intel_lrc.c engine->irq_keep_mask = GT_CONTEXT_SWITCH_INTERRUPT << shift; shift 881 drivers/gpu/drm/i915/i915_gem_gtt.c const int shift = gen8_pd_shift(lvl); shift 887 drivers/gpu/drm/i915/i915_gem_gtt.c *idx = i915_pde_index(start, shift); shift 891 drivers/gpu/drm/i915/i915_gem_gtt.c return i915_pde_index(end, shift) - *idx; shift 913 drivers/gpu/drm/i915/i915_gem_gtt.c unsigned int shift = __gen8_pte_shift(vm->top); shift 914 drivers/gpu/drm/i915/i915_gem_gtt.c return (vm->total + (1ull << shift) - 1) >> shift; shift 496 drivers/gpu/drm/i915/i915_gem_gtt.h static inline u32 i915_pde_index(u64 addr, u32 shift) shift 498 drivers/gpu/drm/i915/i915_gem_gtt.h return (addr >> shift) & I915_PDE_MASK; shift 4233 drivers/gpu/drm/i915/i915_reg.h #define EDP_PSR_ERROR(shift) (1 << ((shift) + 2)) shift 4234 drivers/gpu/drm/i915/i915_reg.h #define EDP_PSR_POST_EXIT(shift) (1 << ((shift) + 1)) shift 4235 drivers/gpu/drm/i915/i915_reg.h #define EDP_PSR_PRE_ENTRY(shift) (1 << (shift)) shift 82 drivers/gpu/drm/imx/imx-ldb.c int shift; shift 236 drivers/gpu/drm/imx/imx-ldb.c mux << lvds_mux->shift); shift 331 drivers/gpu/drm/imx/imx-ldb.c mux >>= lvds_mux->shift; shift 522 drivers/gpu/drm/imx/imx-ldb.c .shift = 6, shift 526 drivers/gpu/drm/imx/imx-ldb.c .shift = 8, shift 81 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c unsigned int mask, unsigned int shift, shift 88 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c tmp |= (val << shift) & mask; shift 94 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c unsigned int shift) shift 96 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c return (readl(ddc->regs + offset) & mask) >> shift; shift 162 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c int shift; shift 167 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c shift = (i - 5) * 8; shift 170 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c shift = (i - 1) * 8; shift 174 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c 0xff << shift, shift 175 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c shift); shift 161 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c u8 shift; shift 683 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c u8 shift = postdiv->shift; shift 689 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c val = pll_read(base + REG_DSI_14nm_PHY_CMN_CLK_CFG0) >> shift; shift 717 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c u8 shift = postdiv->shift; shift 732 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c val &= ~(div_mask(width) << shift); shift 734 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c val |= value << shift; shift 910 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c u8 shift) shift 928 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c pll_postdiv->shift = shift; shift 541 drivers/gpu/drm/msm/edp/edp_ctrl.c u32 shift = train - 1; shift 545 drivers/gpu/drm/msm/edp/edp_ctrl.c edp_state_ctrl(ctrl, EDP_STATE_CTRL_TRAIN_PATTERN_1 << shift); shift 548 drivers/gpu/drm/msm/edp/edp_ctrl.c if (data & (EDP_MAINLINK_READY_TRAIN_PATTERN_1_READY << shift)) shift 367 drivers/gpu/drm/msm/msm_gem_submit.c if (submit_reloc.shift < 0) shift 368 drivers/gpu/drm/msm/msm_gem_submit.c iova >>= -submit_reloc.shift; shift 370 drivers/gpu/drm/msm/msm_gem_submit.c iova <<= submit_reloc.shift; shift 237 drivers/gpu/drm/nouveau/dispnv04/dfp.c int shift = (nv04_display(dev)->saved_reg.sel_clk & 0x50) ? 0 : 1; shift 240 drivers/gpu/drm/nouveau/dispnv04/dfp.c state->sel_clk |= (head ? 0x40 : 0x10) << shift; shift 92 drivers/gpu/drm/nouveau/dispnv04/overlay.c verify_scaling(const struct drm_framebuffer *fb, uint8_t shift, shift 96 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift)) { shift 129 drivers/gpu/drm/nouveau/dispnv04/overlay.c unsigned shift = drm->client.device.info.chipset >= 0x30 ? 1 : 3; shift 139 drivers/gpu/drm/nouveau/dispnv04/overlay.c ret = verify_scaling(fb, shift, 0, 0, src_w, src_h, crtc_w, crtc_h); shift 25 drivers/gpu/drm/nouveau/include/nvif/if000c.h __u8 shift; shift 24 drivers/gpu/drm/nouveau/include/nvif/vmm.h u8 shift; shift 264 drivers/gpu/drm/nouveau/nouveau_bo.c (!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT)) shift 275 drivers/gpu/drm/nouveau/nouveau_bo.c if (*size >= 1ULL << vmm->page[i].shift) shift 288 drivers/gpu/drm/nouveau/nouveau_bo.c nvbo->page = vmm->page[pi].shift; shift 157 drivers/gpu/drm/nouveau/nvif/vmm.c vmm->page[i].shift = args.shift; shift 71 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c const u32 shift = normal ? 0 : 16; shift 75 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c 0x00000001 * ! hsync) << shift; shift 76 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c const u32 field = 0xc0000000 | (0x00000055 << shift); shift 63 drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c const u32 shift = normal ? 0 : 16; shift 64 drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c const u32 state = 0x80000000 | (0x00000001 * !!pu) << shift; shift 65 drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c const u32 field = 0x80000000 | (0x00000101 << shift); shift 62 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c const u32 shift = sor->func->dp.lanes[ln] * 8; shift 65 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); shift 66 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); shift 70 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift)); shift 71 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift)); shift 75 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c const u32 shift = sor->func->dp.lanes[ln] * 8; shift 78 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); shift 79 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); shift 83 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift)); shift 84 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift)); shift 86 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift); shift 87 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c nvkm_wr32(device, 0x61c13c + loff, data[3] | (pc << shift)); shift 31 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c const u32 shift = sor->func->dp.lanes[ln] * 8; shift 36 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); shift 37 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); shift 41 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift)); shift 42 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift)); shift 44 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift); shift 45 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c nvkm_wr32(device, 0x61c13c + loff, data[3] | (pc << shift)); shift 52 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c const u32 shift = normal ? 0 : 16; shift 53 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c const u32 state = 0x80000000 | (0x00000001 * !!pu) << shift; shift 54 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c const u32 field = 0x80000000 | (0x00000001 << shift); shift 1010 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c int shift, int buffer) shift 1014 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c if (shift >= 0) { shift 1017 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c info->mmio->shift = shift; shift 1020 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c data |= info->buffer[buffer] >> shift; shift 1119 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c u8 shift, ntpcv; shift 1127 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c shift = 0; shift 1131 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c shift++; shift 1135 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c data2[0] |= (shift << 21); shift 202 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c u8 shift, ntpcv; shift 210 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c shift = 0; shift 214 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c shift++; shift 218 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c data2[0] |= (shift << 21); shift 447 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c data |= info >> mmio->shift; shift 54 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h u32 shift; shift 154 drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c mask |= (src->mask << src->shift); shift 155 drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c value |= ((ctr->source[i][j] >> 32) << src->shift); shift 193 drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c mask |= (src->mask << src->shift); shift 726 drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c src->shift == smux->shift) { shift 740 drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c src->shift = smux->shift; shift 26 drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h u8 shift; shift 42 drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h u8 shift; shift 520 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c u8 shift = nvbios_rd08(bios, table + (cond * 9) + 4); shift 524 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c u8 ioval = (init_rdvgai(init, port, index) & mask) >> shift; shift 531 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c init_shift(u32 data, u8 shift) shift 533 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c if (shift < 0x80) shift 534 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c return data >> shift; shift 535 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c return data << (0x100 - shift); shift 627 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c u8 shift = nvbios_rd08(bios, init->offset + 5); shift 634 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c reg, port, index, mask, shift); shift 637 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c conf = (init_rdvgai(init, port, index) & mask) >> shift; shift 690 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c u8 shift = nvbios_rd08(bios, init->offset + 5); shift 698 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c reg, port, index, mask, shift, iofc); shift 701 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c conf = (init_rdvgai(init, port, index) & mask) >> shift; shift 744 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c u8 shift = nvbios_rd08(bios, init->offset + 5); shift 753 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c port, index, mask, reg, (shift & 0x80) ? "<<" : ">>", shift 754 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c (shift & 0x80) ? (0x100 - shift) : shift, smask); shift 758 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c data |= init_shift(init_rd32(init, reg), shift) & smask; shift 956 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c u8 shift = nvbios_rd08(bios, init->offset + 5); shift 963 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c reg, port, index, mask, shift); shift 966 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c conf = (init_rdvgai(init, port, index) & mask) >> shift; shift 1419 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c u8 shift = nvbios_rd08(bios, init->offset + 5); shift 1428 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c dreg, dmask, sreg, (shift & 0x80) ? "<<" : ">>", shift 1429 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c (shift & 0x80) ? (0x100 - shift) : shift, smask, sxor); shift 1432 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c data = init_shift(init_rd32(init, sreg), shift); shift 2066 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c u8 shift = nvbios_rd08(bios, init->offset + 16); shift 2072 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c (sshift & 0x80) ? (0x100 - sshift) : sshift, smask, shift); shift 2076 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c data = init_xlat_(init, index, data) << shift; shift 169 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c u8 shift = 0, usec = nsec / 1000; shift 172 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c shift++; shift 176 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c hwsq_cmd(hwsq, 1, (u8[]){ 0x00 | (shift << 2) | usec }); shift 115 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c int shift = -4; shift 118 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c return shift; shift 122 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c shift += 4; /* fall through */ shift 124 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c shift += 4; /* fall through */ shift 126 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c shift += 4; /* fall through */ shift 128 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c shift += 4; shift 135 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c if (shift > 4 && (chip_version < 0x32 || chip_version == 0x35 || shift 137 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c shift = -4; shift 139 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c return shift; shift 58 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c nv50_gpio_location(int line, u32 *reg, u32 *shift) shift 66 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c *shift = (line & 7) << 2; shift 74 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c u32 reg, shift; shift 76 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c if (nv50_gpio_location(line, ®, &shift)) shift 79 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c nvkm_mask(device, reg, 3 << shift, (((dir ^ 1) << 1) | out) << shift); shift 87 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c u32 reg, shift; shift 89 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c if (nv50_gpio_location(line, ®, &shift)) shift 92 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c return !!(nvkm_rd32(device, reg) & (4 << shift)); shift 36 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c u8 shift; shift 44 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c const int slot = pt->base >> pt->ptp->shift; shift 89 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c ptp->shift = order_base_2(size); shift 90 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c slot = nvkm_memory_size(ptp->pt->memory) >> ptp->shift; shift 107 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c pt->base = slot << ptp->shift; shift 315 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c for (nr = 0; page[nr].shift; nr++); shift 321 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c args->v0.shift = page[index].shift; shift 414 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c while (page && (page++)->shift) shift 58 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c pgt->page = page ? page->shift : 0; shift 509 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c u64 bits = addr >> page->shift; shift 514 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c it.cnt = size >> page->shift; shift 527 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c addr, size, page->shift, it.cnt); shift 598 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c return addr << page->shift; shift 639 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c while (size < (1ULL << page[m].shift)) shift 644 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c while (!IS_ALIGNED(addr, 1ULL << page[i].shift)) shift 650 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c u64 next = 1ULL << page[i - 1].shift; shift 653 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c block = (part >> page[i].shift) << page[i].shift; shift 655 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c block = (size >> page[i].shift) << page[i].shift; shift 657 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c block = (size >> page[i].shift) << page[i].shift; shift 995 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c while (page[1].shift) shift 1056 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c while (page[1].shift) shift 1065 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c bits += page->shift; shift 1211 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c nvkm_vmm_pfn_map(struct nvkm_vmm *vmm, u8 shift, u64 addr, u64 size, u64 *pfn) shift 1217 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c int pm = size >> shift; shift 1223 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c while (page->shift && page->shift != shift && shift 1227 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c if (!page->shift || !IS_ALIGNED(addr, 1ULL << shift) || shift 1228 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c !IS_ALIGNED(size, 1ULL << shift) || shift 1231 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c shift, page->shift, addr, size); shift 1252 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c size = min_t(u64, size, pn << page->shift); shift 1323 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c size -= 1 << page->shift; shift 1326 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c pi += size >> page->shift; shift 1382 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c VMM_DEBUG(vmm, "%d !VRAM", map->page->shift); shift 1389 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c VMM_DEBUG(vmm, "%d !HOST", map->page->shift); shift 1398 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c if (!IS_ALIGNED( vma->addr, 1ULL << map->page->shift) || shift 1399 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c !IS_ALIGNED((u64)vma->size, 1ULL << map->page->shift) || shift 1400 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c !IS_ALIGNED( map->offset, 1ULL << map->page->shift) || shift 1401 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c nvkm_memory_page(map->memory) < map->page->shift) { shift 1403 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c vma->addr, (u64)vma->size, map->offset, map->page->shift, shift 1415 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c for (map->page = vmm->func->page; map->page->shift; map->page++) { shift 1416 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c VMM_DEBUG(vmm, "trying %d", map->page->shift); shift 1637 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c u8 shift, u8 align, u64 size, struct nvkm_vma **pvma) shift 1647 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c getref, mapref, sparse, shift, align, size); shift 1662 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c if (unlikely((getref || vmm->func->page_block) && !shift)) { shift 1671 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c if (shift) { shift 1672 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c for (page = vmm->func->page; page->shift; page++) { shift 1673 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c if (shift == page->shift) shift 1677 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c if (!page->shift || !IS_ALIGNED(size, 1ULL << page->shift)) { shift 1678 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c VMM_DEBUG(vmm, "page %d %016llx", shift, size); shift 1681 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c align = max_t(u8, align, shift); shift 1821 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c while (page[1].shift) shift 119 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h u8 shift; shift 291 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h u64 _ptes = ((SIZE) - MAP->off) >> MAP->page->shift; \ shift 295 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h MAP->off += PTEN << MAP->page->shift; \ shift 68 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c if (map->page->shift == PAGE_SHIFT) { shift 254 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c map->next = (1 << page->shift) >> 8; shift 284 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c u32 comp = (page->shift == 16 && !gm20x) ? 16 : 17; shift 301 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c if (page->shift == 17 || !gm20x) { shift 98 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.c if (vmm->func->page[1].shift == 16) shift 133 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c if (map->page->shift == PAGE_SHIFT) { shift 327 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c map->next = (1ULL << page->shift) >> 4; shift 373 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c map->ctag |= ((1ULL << page->shift) >> 16) << 36; shift 68 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.c if (map->page->shift == PAGE_SHIFT) { shift 243 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.c map->next = 1 << page->shift; shift 1038 drivers/gpu/drm/omapdrm/dss/dispc.c int shift; shift 1043 drivers/gpu/drm/omapdrm/dss/dispc.c shift = shifts[plane]; shift 1044 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_GLOBAL_ALPHA, global_alpha, shift + 7, shift); shift 1149 drivers/gpu/drm/omapdrm/dss/dispc.c int shift; shift 1155 drivers/gpu/drm/omapdrm/dss/dispc.c shift = 8; shift 1160 drivers/gpu/drm/omapdrm/dss/dispc.c shift = 16; shift 1200 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_MOD(val, chan, shift, shift); shift 1203 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_MOD(val, channel, shift, shift); shift 1211 drivers/gpu/drm/omapdrm/dss/dispc.c int shift; shift 1216 drivers/gpu/drm/omapdrm/dss/dispc.c shift = 8; shift 1221 drivers/gpu/drm/omapdrm/dss/dispc.c shift = 16; shift 1230 drivers/gpu/drm/omapdrm/dss/dispc.c if (FLD_GET(val, shift, shift) == 1) shift 1254 drivers/gpu/drm/omapdrm/dss/dispc.c int shift; shift 1256 drivers/gpu/drm/omapdrm/dss/dispc.c shift = shifts[plane]; shift 1258 drivers/gpu/drm/omapdrm/dss/dispc.c shift + 1, shift); shift 1350 drivers/gpu/drm/omapdrm/dss/dispc.c int shift; shift 1355 drivers/gpu/drm/omapdrm/dss/dispc.c shift = shifts[plane]; shift 1356 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift); shift 148 drivers/gpu/drm/omapdrm/dss/dss.c unsigned int shift; shift 158 drivers/gpu/drm/omapdrm/dss/dss.c shift = 0; shift 161 drivers/gpu/drm/omapdrm/dss/dss.c shift = 1; shift 164 drivers/gpu/drm/omapdrm/dss/dss.c shift = 2; shift 173 drivers/gpu/drm/omapdrm/dss/dss.c 1 << shift, val << shift); shift 180 drivers/gpu/drm/omapdrm/dss/dss.c unsigned int shift, val; shift 187 drivers/gpu/drm/omapdrm/dss/dss.c shift = 3; shift 201 drivers/gpu/drm/omapdrm/dss/dss.c shift = 5; shift 217 drivers/gpu/drm/omapdrm/dss/dss.c shift = 7; shift 238 drivers/gpu/drm/omapdrm/dss/dss.c 0x3 << shift, val << shift); shift 205 drivers/gpu/drm/omapdrm/dss/hdmi.h u8 shift; shift 591 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c r = FLD_MOD(r, cfg->i2s_cfg.shift, 0, 0); shift 711 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c acore.i2s_cfg.shift = HDMI_AUDIO_I2S_FIRST_BIT_SHIFT; shift 247 drivers/gpu/drm/radeon/atom.c val = gctx->shift; shift 250 drivers/gpu/drm/radeon/atom.c val = 1 << gctx->shift; shift 253 drivers/gpu/drm/radeon/atom.c val = ~(1 << gctx->shift); shift 517 drivers/gpu/drm/radeon/atom.c gctx->shift = val; shift 890 drivers/gpu/drm/radeon/atom.c uint8_t attr = U8((*ptr)++), shift; shift 897 drivers/gpu/drm/radeon/atom.c shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); shift 898 drivers/gpu/drm/radeon/atom.c SDEBUG(" shift: %d\n", shift); shift 899 drivers/gpu/drm/radeon/atom.c dst <<= shift; shift 906 drivers/gpu/drm/radeon/atom.c uint8_t attr = U8((*ptr)++), shift; shift 913 drivers/gpu/drm/radeon/atom.c shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); shift 914 drivers/gpu/drm/radeon/atom.c SDEBUG(" shift: %d\n", shift); shift 915 drivers/gpu/drm/radeon/atom.c dst >>= shift; shift 922 drivers/gpu/drm/radeon/atom.c uint8_t attr = U8((*ptr)++), shift; shift 930 drivers/gpu/drm/radeon/atom.c shift = atom_get_src(ctx, attr, ptr); shift 931 drivers/gpu/drm/radeon/atom.c SDEBUG(" shift: %d\n", shift); shift 932 drivers/gpu/drm/radeon/atom.c dst <<= shift; shift 941 drivers/gpu/drm/radeon/atom.c uint8_t attr = U8((*ptr)++), shift; shift 949 drivers/gpu/drm/radeon/atom.c shift = atom_get_src(ctx, attr, ptr); shift 950 drivers/gpu/drm/radeon/atom.c SDEBUG(" shift: %d\n", shift); shift 951 drivers/gpu/drm/radeon/atom.c dst >>= shift; shift 137 drivers/gpu/drm/radeon/atom.h uint8_t shift; shift 580 drivers/gpu/drm/radeon/ci_dpm.c cache |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 595 drivers/gpu/drm/radeon/ci_dpm.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 5831 drivers/gpu/drm/radeon/ci_dpm.c dpm_table->VRHotGpio = gpio.shift; shift 5840 drivers/gpu/drm/radeon/ci_dpm.c dpm_table->AcDcGpio = gpio.shift; shift 5851 drivers/gpu/drm/radeon/ci_dpm.c switch (gpio.shift) { shift 5870 drivers/gpu/drm/radeon/ci_dpm.c DRM_DEBUG("Invalid PCC GPIO: %u!\n", gpio.shift); shift 171 drivers/gpu/drm/radeon/ci_dpm.h u32 shift; shift 296 drivers/gpu/drm/radeon/kv_dpm.c cache |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 311 drivers/gpu/drm/radeon/kv_dpm.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 47 drivers/gpu/drm/radeon/kv_dpm.h u32 shift; shift 228 drivers/gpu/drm/radeon/radeon_atombios.c gpio.shift = pin->ucGpioPinBitShift; shift 3102 drivers/gpu/drm/radeon/radeon_combios.c uint32_t val, shift, tmp; shift 3113 drivers/gpu/drm/radeon/radeon_combios.c shift = RBIOS8(offset) * 8; shift 3115 drivers/gpu/drm/radeon/radeon_combios.c and_mask = RBIOS8(offset) << shift; shift 3116 drivers/gpu/drm/radeon/radeon_combios.c and_mask |= ~(0xff << shift); shift 3118 drivers/gpu/drm/radeon/radeon_combios.c or_mask = RBIOS8(offset) << shift; shift 503 drivers/gpu/drm/radeon/radeon_mode.h u32 shift; shift 2760 drivers/gpu/drm/radeon/si_dpm.c data |= ((config_regs->value << config_regs->shift) & config_regs->mask); shift 40 drivers/gpu/drm/radeon/si_dpm.h u32 shift; shift 168 drivers/gpu/drm/radeon/sumo_smc.c u32 shift = 0; shift 175 drivers/gpu/drm/radeon/sumo_smc.c shift = 16; shift 179 drivers/gpu/drm/radeon/sumo_smc.c shift = 0; shift 183 drivers/gpu/drm/radeon/sumo_smc.c shift = 16; shift 187 drivers/gpu/drm/radeon/sumo_smc.c shift = 0; shift 191 drivers/gpu/drm/radeon/sumo_smc.c shift = 16; shift 195 drivers/gpu/drm/radeon/sumo_smc.c shift = 0; shift 202 drivers/gpu/drm/radeon/sumo_smc.c sclk_dpm_tdp_limit &= ~(mask << shift); shift 203 drivers/gpu/drm/radeon/sumo_smc.c sclk_dpm_tdp_limit |= (tdp_limit << shift); shift 185 drivers/gpu/drm/rockchip/rockchip_drm_vop.c return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask; shift 192 drivers/gpu/drm/rockchip/rockchip_drm_vop.c int offset, mask, shift; shift 201 drivers/gpu/drm/rockchip/rockchip_drm_vop.c shift = reg->shift; shift 204 drivers/gpu/drm/rockchip/rockchip_drm_vop.c v = ((v << shift) & 0xffff) | (mask << (shift + 16)); shift 208 drivers/gpu/drm/rockchip/rockchip_drm_vop.c v = (cached_val & ~(mask << shift)) | ((v & mask) << shift); shift 32 drivers/gpu/drm/rockchip/rockchip_drm_vop.h uint8_t shift; shift 306 drivers/gpu/drm/rockchip/rockchip_drm_vop.h static inline uint16_t scl_cal_scale(int src, int dst, int shift) shift 308 drivers/gpu/drm/rockchip/rockchip_drm_vop.h return ((src * 2 - 3) << (shift - 1)) / (dst - 1); shift 24 drivers/gpu/drm/rockchip/rockchip_vop_reg.c .shift = _shift, \ shift 1323 drivers/gpu/drm/sun4i/sun4i_tcon.c u32 shift; shift 1331 drivers/gpu/drm/sun4i/sun4i_tcon.c shift = 8; shift 1338 drivers/gpu/drm/sun4i/sun4i_tcon.c 0x3 << shift, tcon->id << shift); shift 1363 drivers/gpu/drm/sun4i/sun4i_tcon.c u32 shift; shift 1371 drivers/gpu/drm/sun4i/sun4i_tcon.c shift = 8; shift 1379 drivers/gpu/drm/sun4i/sun4i_tcon.c 0x3 << shift, tcon->id << shift); shift 160 drivers/gpu/drm/tegra/drm.c tegra->carveout.shift = iova_shift(&tegra->carveout.domain); shift 161 drivers/gpu/drm/tegra/drm.c tegra->carveout.limit = carveout_end >> tegra->carveout.shift; shift 310 drivers/gpu/drm/tegra/drm.c err = get_user(dest->shift, &src->shift); shift 1162 drivers/gpu/drm/tegra/drm.c size >> tegra->carveout.shift, shift 45 drivers/gpu/drm/tegra/drm.h unsigned long shift; shift 302 drivers/gpu/drm/zte/zx_vou.c u32 reg, shift; shift 307 drivers/gpu/drm/zte/zx_vou.c shift = bits->div_vga_shift; shift 311 drivers/gpu/drm/zte/zx_vou.c shift = bits->div_pic_shift; shift 315 drivers/gpu/drm/zte/zx_vou.c shift = bits->div_tvenc_shift; shift 319 drivers/gpu/drm/zte/zx_vou.c shift = bits->div_hdmi_pnx_shift; shift 323 drivers/gpu/drm/zte/zx_vou.c shift = bits->div_hdmi_shift; shift 327 drivers/gpu/drm/zte/zx_vou.c shift = bits->div_inf_shift; shift 331 drivers/gpu/drm/zte/zx_vou.c shift = bits->div_layer_shift; shift 338 drivers/gpu/drm/zte/zx_vou.c zx_writel_mask(vou->vouctl + reg, 0x7 << shift, shift 339 drivers/gpu/drm/zte/zx_vou.c cfg->val << shift); shift 385 drivers/gpu/drm/zte/zx_vou.c u32 shift = bits->sec_vactive_shift; shift 390 drivers/gpu/drm/zte/zx_vou.c val |= ((vm.vactive / 2 - 1) << shift) & mask; shift 89 drivers/gpu/host1x/cdma.c unsigned long shift; shift 98 drivers/gpu/host1x/cdma.c shift = iova_shift(&host1x->iova); shift 99 drivers/gpu/host1x/cdma.c alloc = alloc_iova(&host1x->iova, size >> shift, shift 100 drivers/gpu/host1x/cdma.c host1x->iova_end >> shift, true); shift 132 drivers/gpu/host1x/job.c unsigned long shift; shift 149 drivers/gpu/host1x/job.c shift = iova_shift(&host->iova); shift 150 drivers/gpu/host1x/job.c alloc = alloc_iova(&host->iova, gather_size >> shift, shift 151 drivers/gpu/host1x/job.c host->iova_end >> shift, true); shift 198 drivers/gpu/host1x/job.c reloc->target.offset) >> reloc->shift; shift 247 drivers/gpu/host1x/job.c if (reloc->shift) shift 361 drivers/gpu/ipu-v3/ipu-common.c int shift; shift 363 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 5, .reg = IDMAC_CH_LOCK_EN_1, .shift = 0, }, shift 364 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 11, .reg = IDMAC_CH_LOCK_EN_1, .shift = 2, }, shift 365 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 12, .reg = IDMAC_CH_LOCK_EN_1, .shift = 4, }, shift 366 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 14, .reg = IDMAC_CH_LOCK_EN_1, .shift = 6, }, shift 367 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 15, .reg = IDMAC_CH_LOCK_EN_1, .shift = 8, }, shift 368 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 20, .reg = IDMAC_CH_LOCK_EN_1, .shift = 10, }, shift 369 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 21, .reg = IDMAC_CH_LOCK_EN_1, .shift = 12, }, shift 370 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 22, .reg = IDMAC_CH_LOCK_EN_1, .shift = 14, }, shift 371 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 23, .reg = IDMAC_CH_LOCK_EN_1, .shift = 16, }, shift 372 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 27, .reg = IDMAC_CH_LOCK_EN_1, .shift = 18, }, shift 373 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 28, .reg = IDMAC_CH_LOCK_EN_1, .shift = 20, }, shift 374 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 45, .reg = IDMAC_CH_LOCK_EN_2, .shift = 0, }, shift 375 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 46, .reg = IDMAC_CH_LOCK_EN_2, .shift = 2, }, shift 376 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 47, .reg = IDMAC_CH_LOCK_EN_2, .shift = 4, }, shift 377 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 48, .reg = IDMAC_CH_LOCK_EN_2, .shift = 6, }, shift 378 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 49, .reg = IDMAC_CH_LOCK_EN_2, .shift = 8, }, shift 379 drivers/gpu/ipu-v3/ipu-common.c { .chnum = 50, .reg = IDMAC_CH_LOCK_EN_2, .shift = 10, }, shift 425 drivers/gpu/ipu-v3/ipu-common.c regval &= ~(0x03 << idmac_lock_en_info[i].shift); shift 426 drivers/gpu/ipu-v3/ipu-common.c regval |= (bursts << idmac_lock_en_info[i].shift); shift 42 drivers/gpu/ipu-v3/ipu-dmfc.c unsigned long shift; shift 51 drivers/gpu/ipu-v3/ipu-dmfc.c .shift = DMFC_DP_CHAN_5B_23, shift 57 drivers/gpu/ipu-v3/ipu-dmfc.c .shift = DMFC_DP_CHAN_6B_24, shift 63 drivers/gpu/ipu-v3/ipu-dmfc.c .shift = DMFC_DP_CHAN_5F_27, shift 69 drivers/gpu/ipu-v3/ipu-dmfc.c .shift = DMFC_WR_CHAN_1_28, shift 75 drivers/gpu/ipu-v3/ipu-dmfc.c .shift = DMFC_DP_CHAN_6F_29, shift 206 drivers/gpu/ipu-v3/ipu-prg.c int shift; shift 211 drivers/gpu/ipu-v3/ipu-prg.c shift = (i == 1) ? 12 : 14; shift 214 drivers/gpu/ipu-v3/ipu-prg.c 0x3 << shift, mux << shift); shift 217 drivers/gpu/ipu-v3/ipu-prg.c shift = (i == 1) ? 14 : 12; shift 219 drivers/gpu/ipu-v3/ipu-prg.c if (((val >> shift) & 0x3) == mux) { shift 221 drivers/gpu/ipu-v3/ipu-prg.c 0x3 << shift, shift 222 drivers/gpu/ipu-v3/ipu-prg.c (mux ^ 0x1) << shift); shift 40 drivers/gpu/ipu-v3/ipu-smfc.c u32 val, shift; shift 44 drivers/gpu/ipu-v3/ipu-smfc.c shift = smfc->chno * 4; shift 46 drivers/gpu/ipu-v3/ipu-smfc.c val &= ~(0xf << shift); shift 47 drivers/gpu/ipu-v3/ipu-smfc.c val |= burstsize << shift; shift 60 drivers/gpu/ipu-v3/ipu-smfc.c u32 val, shift; shift 64 drivers/gpu/ipu-v3/ipu-smfc.c shift = smfc->chno * 3; shift 66 drivers/gpu/ipu-v3/ipu-smfc.c val &= ~(0x7 << shift); shift 67 drivers/gpu/ipu-v3/ipu-smfc.c val |= ((csi_id << 2) | mipi_id) << shift; shift 80 drivers/gpu/ipu-v3/ipu-smfc.c u32 val, shift; shift 84 drivers/gpu/ipu-v3/ipu-smfc.c shift = smfc->chno * 6 + (smfc->chno > 1 ? 4 : 0); shift 86 drivers/gpu/ipu-v3/ipu-smfc.c val &= ~(0x3f << shift); shift 87 drivers/gpu/ipu-v3/ipu-smfc.c val |= ((clr_level << 3) | set_level) << shift; shift 149 drivers/hwmon/adm9240.c u8 reg, old, shift = (nr + 2) * 2; shift 152 drivers/hwmon/adm9240.c old = (reg >> shift) & 3; shift 153 drivers/hwmon/adm9240.c reg &= ~(3 << shift); shift 154 drivers/hwmon/adm9240.c reg |= (fan_div << shift); shift 577 drivers/hwmon/adt7475.c int shift, idx; shift 586 drivers/hwmon/adt7475.c shift = 0; shift 591 drivers/hwmon/adt7475.c shift = 0; shift 597 drivers/hwmon/adt7475.c shift = 4; shift 610 drivers/hwmon/adt7475.c data->enh_acoustics[idx] &= ~(0xf << shift); shift 611 drivers/hwmon/adt7475.c data->enh_acoustics[idx] |= (val << shift); shift 110 drivers/hwmon/asc7621.c u8 shift[3]; shift 200 drivers/hwmon/asc7621.c shift[0]) & param->mask[0]); shift 216 drivers/hwmon/asc7621.c reqval = (reqval & param->mask[0]) << param->shift[0]; shift 220 drivers/hwmon/asc7621.c reqval |= (currval & ~(param->mask[0] << param->shift[0])); shift 457 drivers/hwmon/asc7621.c ((data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]); shift 488 drivers/hwmon/asc7621.c newval = (newval & param->mask[0]) << param->shift[0]; shift 490 drivers/hwmon/asc7621.c newval |= (currval & ~(param->mask[0] << param->shift[0])); shift 508 drivers/hwmon/asc7621.c config = (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]; shift 509 drivers/hwmon/asc7621.c altbit = (data->reg[param->msb[1]] >> param->shift[1]) & param->mask[1]; shift 543 drivers/hwmon/asc7621.c config = (config & param->mask[0]) << param->shift[0]; shift 544 drivers/hwmon/asc7621.c altbit = (altbit & param->mask[1]) << param->shift[1]; shift 548 drivers/hwmon/asc7621.c newval = config | (currval & ~(param->mask[0] << param->shift[0])); shift 549 drivers/hwmon/asc7621.c newval = altbit | (newval & ~(param->mask[1] << param->shift[1])); shift 563 drivers/hwmon/asc7621.c config = (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]; shift 564 drivers/hwmon/asc7621.c altbit = (data->reg[param->msb[1]] >> param->shift[1]) & param->mask[1]; shift 565 drivers/hwmon/asc7621.c minoff = (data->reg[param->msb[2]] >> param->shift[2]) & param->mask[2]; shift 621 drivers/hwmon/asc7621.c config = (config & param->mask[0]) << param->shift[0]; shift 622 drivers/hwmon/asc7621.c altbit = (altbit & param->mask[1]) << param->shift[1]; shift 624 drivers/hwmon/asc7621.c newval = config | (currval & ~(param->mask[0] << param->shift[0])); shift 625 drivers/hwmon/asc7621.c newval = altbit | (newval & ~(param->mask[1] << param->shift[1])); shift 629 drivers/hwmon/asc7621.c minoff = (minoff & param->mask[2]) << param->shift[2]; shift 632 drivers/hwmon/asc7621.c minoff | (currval & ~(param->mask[2] << param->shift[2])); shift 650 drivers/hwmon/asc7621.c (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]; shift 678 drivers/hwmon/asc7621.c newval = (newval & param->mask[0]) << param->shift[0]; shift 682 drivers/hwmon/asc7621.c newval |= (currval & ~(param->mask[0] << param->shift[0])); shift 698 drivers/hwmon/asc7621.c (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]; shift 727 drivers/hwmon/asc7621.c newval = (newval & param->mask[0]) << param->shift[0]; shift 731 drivers/hwmon/asc7621.c newval |= (currval & ~(param->mask[0] << param->shift[0])); shift 747 drivers/hwmon/asc7621.c (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]; shift 775 drivers/hwmon/asc7621.c newval = (newval & param->mask[0]) << param->shift[0]; shift 779 drivers/hwmon/asc7621.c newval |= (currval & ~(param->mask[0] << param->shift[0])); shift 802 drivers/hwmon/asc7621.c .shift[0] = s,} shift 807 drivers/hwmon/asc7621.c .shift[0] = s,} shift 815 drivers/hwmon/asc7621.c .priority = pri, .msb = rm, .lsb = rl, .mask = m, .shift = s,} shift 299 drivers/hwmon/gl518sm.c #define set_bits(type, suffix, value, reg, mask, shift) \ shift 315 drivers/hwmon/gl518sm.c regvalue = (regvalue & ~mask) | (data->value << shift); \ shift 301 drivers/hwmon/nct7802.c int shift = 8 - REG_VOLTAGE_LIMIT_MSB_SHIFT[index - 1][nr]; shift 311 drivers/hwmon/nct7802.c ret = (v1 | ((v2 << shift) & 0x300)) * nct7802_vmul[nr]; shift 321 drivers/hwmon/nct7802.c int shift = 8 - REG_VOLTAGE_LIMIT_MSB_SHIFT[index - 1][nr]; shift 335 drivers/hwmon/nct7802.c 0x0300 >> shift, (voltage & 0x0300) >> shift); shift 176 drivers/hwmon/pmbus/adm1275.c int shift, ret; shift 187 drivers/hwmon/pmbus/adm1275.c shift = is_power ? ADM1278_PWR_AVG_SHIFT : ADM1278_VI_AVG_SHIFT; shift 191 drivers/hwmon/pmbus/adm1275.c shift = ADM1275_VI_AVG_SHIFT; shift 196 drivers/hwmon/pmbus/adm1275.c return (ret & mask) >> shift; shift 203 drivers/hwmon/pmbus/adm1275.c int shift, ret; shift 209 drivers/hwmon/pmbus/adm1275.c shift = is_power ? ADM1278_PWR_AVG_SHIFT : ADM1278_VI_AVG_SHIFT; shift 213 drivers/hwmon/pmbus/adm1275.c shift = ADM1275_VI_AVG_SHIFT; shift 218 drivers/hwmon/pmbus/adm1275.c word = (ret & ~mask) | ((word << shift) & mask); shift 381 drivers/hwmon/w83793.c int shift = sensor_attr->index & 0x07; shift 382 drivers/hwmon/w83793.c u8 beep_bit = 1 << shift; shift 396 drivers/hwmon/w83793.c data->beeps[index] |= val << shift; shift 630 drivers/hwmon/w83793.c u8 shift = (index < 4) ? (2 * index) : (index - 4); shift 634 drivers/hwmon/w83793.c tmp = (data->temp_mode[index] >> shift) & mask; shift 655 drivers/hwmon/w83793.c u8 shift = (index < 4) ? (2 * index) : (index - 4); shift 678 drivers/hwmon/w83793.c data->temp_mode[index] &= ~(mask << shift); shift 679 drivers/hwmon/w83793.c data->temp_mode[index] |= val << shift; shift 858 drivers/hwmon/w83793.c u8 shift = (index & 0x01) ? 4 : 0; shift 862 drivers/hwmon/w83793.c data->tolerance[i] &= ~(0x0f << shift); shift 863 drivers/hwmon/w83793.c data->tolerance[i] |= TEMP_TO_REG(val, 0, 0x0f) << shift; shift 728 drivers/hwmon/w83795.c int shift = sensor_attr->index & 0x07; shift 729 drivers/hwmon/w83795.c u8 beep_bit = 1 << shift; shift 740 drivers/hwmon/w83795.c data->beeps[index] |= val << shift; shift 832 drivers/hwtracing/coresight/coresight-etm4x.c int shift; shift 845 drivers/hwtracing/coresight/coresight-etm4x.c shift = (type == ETM_ADDR_TYPE_START ? 0 : 16); shift 846 drivers/hwtracing/coresight/coresight-etm4x.c config->vissctlr |= BIT(shift + comparator); shift 66 drivers/hwtracing/intel_th/gth.c int shift = (port & 3) * 8; shift 69 drivers/hwtracing/intel_th/gth.c val &= ~(0xff << shift); shift 70 drivers/hwtracing/intel_th/gth.c val |= config << shift; shift 78 drivers/hwtracing/intel_th/gth.c int shift = (port & 3) * 8; shift 81 drivers/hwtracing/intel_th/gth.c val &= 0xff << shift; shift 82 drivers/hwtracing/intel_th/gth.c val >>= shift; shift 91 drivers/hwtracing/intel_th/gth.c int shift = (port & 1) * 16; shift 95 drivers/hwtracing/intel_th/gth.c val &= ~(0xffff << shift); shift 96 drivers/hwtracing/intel_th/gth.c val |= freq << shift; shift 103 drivers/hwtracing/intel_th/gth.c int shift = (port & 1) * 16; shift 107 drivers/hwtracing/intel_th/gth.c val &= 0xffff << shift; shift 108 drivers/hwtracing/intel_th/gth.c val >>= shift; shift 127 drivers/hwtracing/intel_th/gth.c unsigned int shift = (master & 0x7) * 4; shift 132 drivers/hwtracing/intel_th/gth.c shift = 0; shift 136 drivers/hwtracing/intel_th/gth.c val &= ~(0xf << shift); shift 138 drivers/hwtracing/intel_th/gth.c val |= (0x8 | port) << shift; shift 256 drivers/hwtracing/intel_th/gth.c unsigned int shift = __ffs(mask); shift 259 drivers/hwtracing/intel_th/gth.c config |= (val << shift) & mask; shift 268 drivers/hwtracing/intel_th/gth.c unsigned int shift = __ffs(mask); shift 271 drivers/hwtracing/intel_th/gth.c config >>= shift; shift 56 drivers/ide/alim15x3.c int shift = 4 * (drive->dn & 1); shift 59 drivers/ide/alim15x3.c fifo &= ~(0x0F << shift); shift 60 drivers/ide/alim15x3.c fifo |= (on << shift); shift 71 drivers/ide/alim15x3.c int shift = 4 * unit; shift 75 drivers/ide/alim15x3.c udma &= ~(0x0F << shift); shift 76 drivers/ide/alim15x3.c udma |= ultra << shift; shift 239 drivers/iio/accel/adxl372.c .shift = 4, \ shift 661 drivers/iio/accel/adxl372.c *val = sign_extend32(ret >> chan->scan_type.shift, shift 481 drivers/iio/accel/bma180.c *val = sign_extend32(ret >> chan->scan_type.shift, shift 597 drivers/iio/accel/bma180.c .shift = 16 - _bits, \ shift 47 drivers/iio/accel/bma220_spi.c .shift = BMA220_DATA_SHIFT, \ shift 562 drivers/iio/accel/bmc150-accel-core.c *val = sign_extend32(le16_to_cpu(raw_val) >> chan->scan_type.shift, shift 985 drivers/iio/accel/bmc150-accel-core.c .shift = 16 - (bits), \ shift 998 drivers/iio/accel/kxcjk-1013.c .shift = 4, \ shift 289 drivers/iio/accel/kxsd9.c .shift = 4, \ shift 308 drivers/iio/accel/kxsd9.c .shift = 4, shift 504 drivers/iio/accel/mma8452.c buffer[chan->scan_index]) >> chan->scan_type.shift, shift 1222 drivers/iio/accel/mma8452.c .shift = 16 - (bits), \ shift 1243 drivers/iio/accel/mma8452.c .shift = 16 - (bits), \ shift 222 drivers/iio/accel/mxc4005.c *val = sign_extend32(ret >> chan->scan_type.shift, shift 281 drivers/iio/accel/mxc4005.c .shift = 4, \ shift 498 drivers/iio/accel/sca3000.c .shift = 3, \ shift 115 drivers/iio/accel/stk8ba50.c .shift = STK8BA50_DATA_SHIFT, \ shift 145 drivers/iio/adc/ad7124.c .shift = 8, shift 201 drivers/iio/adc/ad7266.c .shift = 2, \ shift 249 drivers/iio/adc/ad7266.c .shift = 2, \ shift 123 drivers/iio/adc/ad7476.c *val = (ret >> st->chip_info->channel[0].scan_type.shift) & shift 151 drivers/iio/adc/ad7476.c .shift = (_shift), \ shift 148 drivers/iio/adc/ad7768-1.c .shift = 8, shift 177 drivers/iio/adc/ad7768-1.c unsigned int shift; shift 180 drivers/iio/adc/ad7768-1.c shift = 32 - (8 * len); shift 188 drivers/iio/adc/ad7768-1.c return (be32_to_cpu(st->data.d32) >> shift); shift 448 drivers/iio/adc/ad7793.c unsigned int shift; shift 450 drivers/iio/adc/ad7793.c shift = chan->scan_type.realbits - (unipolar ? 0 : 1); shift 451 drivers/iio/adc/ad7793.c offset = 273ULL << shift; shift 166 drivers/iio/adc/ad7887.c *val = ret >> chan->scan_type.shift; shift 204 drivers/iio/adc/ad7887.c .shift = 0, shift 220 drivers/iio/adc/ad7887.c .shift = 0, shift 65 drivers/iio/adc/ad7949.c int shift = bits_per_word - AD7949_CFG_REG_SIZE_BITS; shift 76 drivers/iio/adc/ad7949.c ad7949_adc->buffer = ad7949_adc->cfg << shift; shift 289 drivers/iio/adc/ad799x.c *val = (ret >> chan->scan_type.shift) & shift 447 drivers/iio/adc/ad799x.c val << chan->scan_type.shift); shift 469 drivers/iio/adc/ad799x.c *val = (ret >> chan->scan_type.shift) & shift 572 drivers/iio/adc/ad799x.c .shift = 12 - (_realbits), \ shift 315 drivers/iio/adc/ad_sigma_delta.c DIV_ROUND_UP(chan->scan_type.realbits + chan->scan_type.shift, 8), shift 333 drivers/iio/adc/ad_sigma_delta.c sample = raw_sample >> chan->scan_type.shift; shift 413 drivers/iio/adc/ad_sigma_delta.c indio_dev->channels[0].scan_type.shift; shift 80 drivers/iio/adc/ep93xx_adc.c int *shift, long mask) shift 142 drivers/iio/adc/ep93xx_adc.c *shift = 32; shift 662 drivers/iio/adc/ina2xx-adc.c .shift = _shift, \ shift 98 drivers/iio/adc/max1027.c .shift = 2, \ shift 670 drivers/iio/adc/meson_saradc.c priv->clk_div.shift = MESON_SAR_ADC_REG3_ADC_CLK_DIV_SHIFT; shift 22 drivers/iio/adc/sd_adc_modulator.c .shift = 0, shift 113 drivers/iio/adc/stm32-adc.c int shift; shift 515 drivers/iio/adc/stm32-adc.c val = (val & ~res->mask) | (adc->res << res->shift); shift 979 drivers/iio/adc/stm32-adc.c val |= chan->channel << sqr[i].shift; shift 989 drivers/iio/adc/stm32-adc.c val |= ((i - 1) << sqr[0].shift); shift 1053 drivers/iio/adc/stm32-adc.c val |= exten << adc->cfg->regs->exten.shift; shift 1054 drivers/iio/adc/stm32-adc.c val |= extsel << adc->cfg->regs->extsel.shift; shift 1131 drivers/iio/adc/stm32-adc.c val |= chan->channel << regs->sqr[1].shift; shift 1604 drivers/iio/adc/stm32-adc.c u32 period_ns, shift = smpr->shift, mask = smpr->mask; shift 1616 drivers/iio/adc/stm32-adc.c adc->smpr_val[r] = (adc->smpr_val[r] & ~mask) | (smp << shift); shift 196 drivers/iio/adc/stm32-dfsdm-adc.c int bits, shift; shift 269 drivers/iio/adc/stm32-dfsdm-adc.c shift = DFSDM_DATA_RES - bits; shift 276 drivers/iio/adc/stm32-dfsdm-adc.c if (shift > 0) { shift 279 drivers/iio/adc/stm32-dfsdm-adc.c flo->lshift = shift; shift 291 drivers/iio/adc/stm32-dfsdm-adc.c flo->rshift = 1 - shift; shift 1413 drivers/iio/adc/stm32-dfsdm-adc.c ch->scan_type.shift = 8; shift 42 drivers/iio/adc/ti-adc081c.c int *shift, long mask) shift 62 drivers/iio/adc/ti-adc081c.c *shift = adc->bits; shift 81 drivers/iio/adc/ti-adc081c.c .shift = 12 - (_bits), \ shift 164 drivers/iio/adc/ti-adc0832.c int *shift, long mask) shift 185 drivers/iio/adc/ti-adc0832.c *shift = 8; shift 46 drivers/iio/adc/ti-adc084s021.c .shift = 4, \ shift 111 drivers/iio/adc/ti-adc084s021.c *val = (*val >> channel->scan_type.shift) & 0xff; shift 68 drivers/iio/adc/ti-adc12138.c .shift = 3, \ shift 88 drivers/iio/adc/ti-adc12138.c .shift = 3, \ shift 222 drivers/iio/adc/ti-adc12138.c int *shift, long mask) shift 254 drivers/iio/adc/ti-adc12138.c *shift = channel->scan_type.realbits - 1; shift 71 drivers/iio/adc/ti-adc161s626.c u8 shift; shift 106 drivers/iio/adc/ti-adc161s626.c *val = sign_extend32(*val >> data->shift, chan->scan_type.realbits - 1); shift 195 drivers/iio/adc/ti-adc161s626.c data->shift = 0; shift 201 drivers/iio/adc/ti-adc161s626.c data->shift = 6; shift 149 drivers/iio/adc/ti-ads1015.c .shift = 4, \ shift 172 drivers/iio/adc/ti-ads1015.c .shift = 4, \ shift 449 drivers/iio/adc/ti-ads1015.c int shift = chan->scan_type.shift; shift 471 drivers/iio/adc/ti-ads1015.c *val = sign_extend32(*val >> shift, 15 - shift); shift 660 drivers/iio/adc/ti-ads1015.c low_thresh << chan->scan_type.shift); shift 665 drivers/iio/adc/ti-ads1015.c high_thresh << chan->scan_type.shift); shift 150 drivers/iio/adc/ti-ads7950.c .shift = 12 - (bits), \ shift 383 drivers/iio/adc/ti-ads7950.c *val = TI_ADS7950_EXTRACT(ret, chan->scan_type.shift, shift 103 drivers/iio/adc/ti-ads8344.c int *shift, long mask) shift 124 drivers/iio/adc/ti-ads8344.c *shift = 16; shift 65 drivers/iio/adc/ti-tlc4541.c .shift = (bitshift), \ shift 141 drivers/iio/adc/ti-tlc4541.c *val = *val >> chan->scan_type.shift; shift 1022 drivers/iio/adc/xilinx-xadc-core.c .shift = 4, \ shift 1042 drivers/iio/adc/xilinx-xadc-core.c .shift = 4, \ shift 166 drivers/iio/chemical/sps30.c int fraction, shift; shift 179 drivers/iio/chemical/sps30.c shift = 23 - exp; shift 180 drivers/iio/chemical/sps30.c val = (1 << exp) + (mantissa >> shift); shift 184 drivers/iio/chemical/sps30.c fraction = mantissa & GENMASK(shift - 1, 0); shift 186 drivers/iio/chemical/sps30.c return val * 100 + ((fraction * 100) >> shift); shift 16 drivers/iio/common/ssp_sensors/ssp_iio_sensor.h .shift = 0,\ shift 35 drivers/iio/common/st_sensors/st_sensors_buffer.c channel->scan_type.shift, 8); shift 544 drivers/iio/common/st_sensors/st_sensors_core.c ch->scan_type.shift, 8); shift 587 drivers/iio/common/st_sensors/st_sensors_core.c *val = *val >> ch->scan_type.shift; shift 193 drivers/iio/dac/ad5064.c unsigned int addr, unsigned int val, unsigned int shift) shift 195 drivers/iio/dac/ad5064.c val <<= shift; shift 204 drivers/iio/dac/ad5064.c unsigned int shift; shift 212 drivers/iio/dac/ad5064.c shift = 4; shift 214 drivers/iio/dac/ad5064.c shift = 8; shift 220 drivers/iio/dac/ad5064.c val |= st->pwr_down_mode[chan->channel] << shift; shift 355 drivers/iio/dac/ad5064.c chan->address, val, chan->scan_type.shift); shift 408 drivers/iio/dac/ad5064.c .shift = (_shift), \ shift 413 drivers/iio/dac/ad5064.c #define DECLARE_AD5064_CHANNELS(name, bits, shift, ext_info) \ shift 415 drivers/iio/dac/ad5064.c AD5064_CHANNEL(0, 0, bits, shift, ext_info), \ shift 416 drivers/iio/dac/ad5064.c AD5064_CHANNEL(1, 1, bits, shift, ext_info), \ shift 417 drivers/iio/dac/ad5064.c AD5064_CHANNEL(2, 2, bits, shift, ext_info), \ shift 418 drivers/iio/dac/ad5064.c AD5064_CHANNEL(3, 3, bits, shift, ext_info), \ shift 419 drivers/iio/dac/ad5064.c AD5064_CHANNEL(4, 4, bits, shift, ext_info), \ shift 420 drivers/iio/dac/ad5064.c AD5064_CHANNEL(5, 5, bits, shift, ext_info), \ shift 421 drivers/iio/dac/ad5064.c AD5064_CHANNEL(6, 6, bits, shift, ext_info), \ shift 422 drivers/iio/dac/ad5064.c AD5064_CHANNEL(7, 7, bits, shift, ext_info), \ shift 425 drivers/iio/dac/ad5064.c #define DECLARE_AD5065_CHANNELS(name, bits, shift, ext_info) \ shift 427 drivers/iio/dac/ad5064.c AD5064_CHANNEL(0, 0, bits, shift, ext_info), \ shift 428 drivers/iio/dac/ad5064.c AD5064_CHANNEL(1, 3, bits, shift, ext_info), \ shift 113 drivers/iio/dac/ad5360.c .shift = 16 - (bits), \ shift 193 drivers/iio/dac/ad5360.c unsigned int shift) shift 197 drivers/iio/dac/ad5360.c val <<= shift; shift 205 drivers/iio/dac/ad5360.c unsigned int addr, unsigned int val, unsigned int shift) shift 210 drivers/iio/dac/ad5360.c ret = ad5360_write_unlocked(indio_dev, cmd, addr, val, shift); shift 326 drivers/iio/dac/ad5360.c chan->address, val, chan->scan_type.shift); shift 333 drivers/iio/dac/ad5360.c chan->address, val, chan->scan_type.shift); shift 340 drivers/iio/dac/ad5360.c chan->address, val, chan->scan_type.shift); shift 383 drivers/iio/dac/ad5360.c *val = ret >> chan->scan_type.shift; shift 187 drivers/iio/dac/ad5380.c val << chan->scan_type.shift); shift 195 drivers/iio/dac/ad5380.c val << chan->scan_type.shift); shift 215 drivers/iio/dac/ad5380.c *val >>= chan->scan_type.shift; shift 222 drivers/iio/dac/ad5380.c *val >>= chan->scan_type.shift; shift 266 drivers/iio/dac/ad5380.c .shift = 14 - (_bits), \ shift 104 drivers/iio/dac/ad5446.c unsigned int shift; shift 117 drivers/iio/dac/ad5446.c shift = chan->scan_type.realbits + chan->scan_type.shift; shift 118 drivers/iio/dac/ad5446.c val = st->pwr_down_mode << shift; shift 152 drivers/iio/dac/ad5446.c .shift = (_shift), \ shift 157 drivers/iio/dac/ad5446.c #define AD5446_CHANNEL(bits, storage, shift) \ shift 158 drivers/iio/dac/ad5446.c _AD5446_CHANNEL(bits, storage, shift, NULL) shift 160 drivers/iio/dac/ad5446.c #define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \ shift 161 drivers/iio/dac/ad5446.c _AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown) shift 197 drivers/iio/dac/ad5446.c val <<= chan->scan_type.shift; shift 181 drivers/iio/dac/ad5449.c val << chan->scan_type.shift); shift 209 drivers/iio/dac/ad5449.c .shift = 12 - (bits), \ shift 24 drivers/iio/dac/ad5624r_spi.c u8 cmd, u8 addr, u16 val, u8 shift) shift 37 drivers/iio/dac/ad5624r_spi.c data = (0 << 22) | (cmd << 19) | (addr << 16) | (val << shift); shift 78 drivers/iio/dac/ad5624r_spi.c chan->scan_type.shift); shift 178 drivers/iio/dac/ad5624r_spi.c .shift = 16 - (_bits), \ shift 74 drivers/iio/dac/ad5686.c u8 shift, address = 0; shift 87 drivers/iio/dac/ad5686.c shift = 9; shift 91 drivers/iio/dac/ad5686.c shift = 13; shift 95 drivers/iio/dac/ad5686.c shift = 0; shift 102 drivers/iio/dac/ad5686.c shift = 13; shift 109 drivers/iio/dac/ad5686.c val = ((st->pwr_down_mask & st->pwr_down_mode) << shift); shift 135 drivers/iio/dac/ad5686.c *val = (ret >> chan->scan_type.shift) & shift 164 drivers/iio/dac/ad5686.c val << chan->scan_type.shift); shift 203 drivers/iio/dac/ad5686.c .shift = (_shift), \ shift 303 drivers/iio/dac/ad5755.c unsigned int *reg, unsigned int *shift, unsigned int *offset) shift 311 drivers/iio/dac/ad5755.c *shift = chan->scan_type.shift; shift 319 drivers/iio/dac/ad5755.c *shift = st->chip_info->calib_shift; shift 327 drivers/iio/dac/ad5755.c *shift = st->chip_info->calib_shift; shift 341 drivers/iio/dac/ad5755.c unsigned int reg, shift, offset; shift 356 drivers/iio/dac/ad5755.c ®, &shift, &offset); shift 364 drivers/iio/dac/ad5755.c *val = (ret - offset) >> shift; shift 376 drivers/iio/dac/ad5755.c unsigned int shift, reg, offset; shift 380 drivers/iio/dac/ad5755.c ®, &shift, &offset); shift 384 drivers/iio/dac/ad5755.c val <<= shift; shift 443 drivers/iio/dac/ad5755.c .shift = 16 - (_bits), \ shift 212 drivers/iio/dac/ad5761.c *val = aux >> chan->scan_type.shift; shift 242 drivers/iio/dac/ad5761.c if (val2 || (val << chan->scan_type.shift) > 0xffff || val < 0) shift 245 drivers/iio/dac/ad5761.c aux = val << chan->scan_type.shift; shift 265 drivers/iio/dac/ad5761.c .shift = 16 - (_bits), \ shift 89 drivers/iio/dac/ad5764.c .shift = 16 - (_bits), \ shift 193 drivers/iio/dac/ad5764.c val <<= chan->scan_type.shift; shift 234 drivers/iio/dac/ad5764.c *val >>= chan->scan_type.shift; shift 264 drivers/iio/dac/ad5791.c *val >>= chan->scan_type.shift; shift 307 drivers/iio/dac/ad5791.c .shift = (_shift), \ shift 330 drivers/iio/dac/ad5791.c val <<= chan->scan_type.shift; shift 187 drivers/iio/dac/ad7303.c .shift = 0, \ shift 94 drivers/iio/dac/ltc1660.c (val << chan->scan_type.shift)); shift 115 drivers/iio/dac/ltc1660.c .shift = 12 - (bits), \ shift 63 drivers/iio/dac/ltc2632.c u8 cmd, u8 addr, u16 val, u8 shift) shift 75 drivers/iio/dac/ltc2632.c data = (cmd << 20) | (addr << 16) | (val << shift); shift 116 drivers/iio/dac/ltc2632.c chan->scan_type.shift); shift 184 drivers/iio/dac/ltc2632.c .shift = 16 - (_bits), \ shift 46 drivers/iio/dac/mcp4922.c .shift = 12 - (bits), \ shift 96 drivers/iio/dac/mcp4922.c val <<= chan->scan_type.shift; shift 67 drivers/iio/dac/ti-dac082s085.c u8 shift = 12 - ti_dac->resolution; shift 69 drivers/iio/dac/ti-dac082s085.c ti_dac->buf[0] = cmd | (val >> (8 - shift)); shift 70 drivers/iio/dac/ti-dac082s085.c ti_dac->buf[1] = (val << shift) & 0xff; shift 67 drivers/iio/dac/ti-dac5571.c unsigned int shift; shift 69 drivers/iio/dac/ti-dac5571.c shift = 12 - data->spec->resolution; shift 70 drivers/iio/dac/ti-dac5571.c data->buf[1] = val << shift; shift 71 drivers/iio/dac/ti-dac5571.c data->buf[0] = val >> (8 - shift); shift 81 drivers/iio/dac/ti-dac5571.c unsigned int shift; shift 83 drivers/iio/dac/ti-dac5571.c shift = 16 - data->spec->resolution; shift 84 drivers/iio/dac/ti-dac5571.c data->buf[2] = val << shift; shift 85 drivers/iio/dac/ti-dac5571.c data->buf[1] = (val >> (8 - shift)); shift 68 drivers/iio/dac/ti-dac7311.c u8 shift = 14 - ti_dac->resolution; shift 70 drivers/iio/dac/ti-dac7311.c ti_dac->buf[0] = (val << shift) & 0xFF; shift 71 drivers/iio/dac/ti-dac7311.c ti_dac->buf[1] = (power << 6) | (val >> (8 - shift)); shift 134 drivers/iio/dummy/iio_simple_dummy.c .shift = 0, /* zero shift */ shift 173 drivers/iio/dummy/iio_simple_dummy.c .shift = 0, /* zero shift */ shift 191 drivers/iio/dummy/iio_simple_dummy.c .shift = 0, shift 218 drivers/iio/dummy/iio_simple_dummy.c .shift = 0, /* zero shift */ shift 140 drivers/iio/health/max30102.c .shift = 8, \ shift 51 drivers/iio/humidity/hdc100x.c int shift; shift 55 drivers/iio/humidity/hdc100x.c .shift = 10, shift 59 drivers/iio/humidity/hdc100x.c .shift = 8, shift 141 drivers/iio/humidity/hdc100x.c int shift = hdc100x_resolution_shift[chan].shift; shift 148 drivers/iio/humidity/hdc100x.c hdc100x_resolution_shift[chan].mask << shift, shift 149 drivers/iio/humidity/hdc100x.c i << shift); shift 703 drivers/iio/imu/adis16400.c .shift = 0, \ shift 729 drivers/iio/imu/adis16400.c .shift = 0, \ shift 749 drivers/iio/imu/adis16400.c .shift = 0, \ shift 768 drivers/iio/imu/adis16400.c .shift = 0, \ shift 794 drivers/iio/imu/adis16400.c .shift = 0, \ shift 813 drivers/iio/imu/adis16400.c .shift = 0, \ shift 831 drivers/iio/imu/adis16400.c .shift = 0, \ shift 830 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c .shift = 0, \ shift 889 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c .shift = 0, shift 242 drivers/iio/imu/kmx61.c .shift = 4, \ shift 262 drivers/iio/imu/kmx61.c .shift = 2, \ shift 817 drivers/iio/imu/kmx61.c *val = sign_extend32(ret >> chan->scan_type.shift, shift 249 drivers/iio/industrialio-buffer.c this_attr->c->scan_type.shift); shift 256 drivers/iio/industrialio-buffer.c this_attr->c->scan_type.shift); shift 205 drivers/iio/light/cros_ec_light_prox.c channel->scan_type.shift = 0; shift 1335 drivers/iio/light/gp2ap020a00f.c .shift = 0, shift 1352 drivers/iio/light/gp2ap020a00f.c .shift = 0, shift 1366 drivers/iio/light/gp2ap020a00f.c .shift = 0, shift 126 drivers/iio/light/rpr0521.c u8 shift; shift 133 drivers/iio/light/rpr0521.c .shift = RPR0521_PXS_GAIN_SHIFT, shift 140 drivers/iio/light/rpr0521.c .shift = RPR0521_ALS_DATA0_GAIN_SHIFT, shift 147 drivers/iio/light/rpr0521.c .shift = RPR0521_ALS_DATA1_GAIN_SHIFT, shift 587 drivers/iio/light/rpr0521.c idx = (rpr0521_gain[chan].mask & reg) >> rpr0521_gain[chan].shift; shift 612 drivers/iio/light/rpr0521.c idx << rpr0521_gain[chan].shift); shift 241 drivers/iio/light/si1133.c s8 shift) shift 243 drivers/iio/light/si1133.c return ((input << fraction) / mag) << shift; shift 250 drivers/iio/light/si1133.c s8 shift; shift 256 drivers/iio/light/si1133.c shift = ((u16)coeffs->info & 0xFF00) >> 8; shift 257 drivers/iio/light/si1133.c shift ^= 0xFF; shift 258 drivers/iio/light/si1133.c shift += 1; shift 259 drivers/iio/light/si1133.c shift = -shift; shift 263 drivers/iio/light/si1133.c coeffs->mag, shift); shift 270 drivers/iio/light/si1133.c coeffs->mag, shift); shift 573 drivers/iio/light/si1133.c u8 mask, u8 shift, u8 value) shift 584 drivers/iio/light/si1133.c adc_config |= (value << shift); shift 691 drivers/iio/light/si1133.c u8 shift, u8 value) shift 702 drivers/iio/light/si1133.c adc_sens |= (value << shift); shift 724 drivers/iio/light/si1145.c u8 reg1, reg2, shift; shift 774 drivers/iio/light/si1145.c shift = SI1145_PS_LED_SHIFT(chan->channel); shift 786 drivers/iio/light/si1145.c (ret & ~(0x0f << shift)) | shift 787 drivers/iio/light/si1145.c ((val & 0x0f) << shift)); shift 232 drivers/iio/light/tsl2563.c int shift = 0; shift 236 drivers/iio/light/tsl2563.c shift += 5; shift 239 drivers/iio/light/tsl2563.c shift += 2; shift 247 drivers/iio/light/tsl2563.c shift += 4; shift 249 drivers/iio/light/tsl2563.c return shift; shift 249 drivers/iio/magnetometer/rm3100-core.c .shift = 8, \ shift 29 drivers/iio/potentiometer/ad5272.c int shift; shift 44 drivers/iio/potentiometer/ad5272.c [AD5274_020] = { .max_pos = 256, .kohms = 20, .shift = 2 }, shift 45 drivers/iio/potentiometer/ad5272.c [AD5274_100] = { .max_pos = 256, .kohms = 100, .shift = 2 }, shift 108 drivers/iio/potentiometer/ad5272.c *val = *val >> data->cfg->shift; shift 132 drivers/iio/potentiometer/ad5272.c return ad5272_write(data, AD5272_RDAC_WR, val << data->cfg->shift); shift 157 drivers/iio/pressure/cros_ec_baro.c channel->scan_type.shift = 0; shift 196 drivers/iio/pressure/mpl3115.c .shift = 12, shift 209 drivers/iio/pressure/mpl3115.c .shift = 4, shift 122 drivers/iio/proximity/sx9500.c .shift = 0, \ shift 39 drivers/iio/temperature/maxim_thermocouple.c .shift = 3, shift 57 drivers/iio/temperature/maxim_thermocouple.c .shift = 2, shift 73 drivers/iio/temperature/maxim_thermocouple.c .shift = 4, shift 119 drivers/iio/temperature/maxim_thermocouple.c unsigned int shift = chan->scan_type.shift + (chan->address * 8); shift 144 drivers/iio/temperature/maxim_thermocouple.c *val = sign_extend32(*val >> shift, chan->scan_type.realbits - 1); shift 289 drivers/iio/trigger/stm32-timer-trigger.c u32 mask, shift, master_mode_max; shift 294 drivers/iio/trigger/stm32-timer-trigger.c shift = TIM_CR2_MMS2_SHIFT; shift 298 drivers/iio/trigger/stm32-timer-trigger.c shift = TIM_CR2_MMS_SHIFT; shift 306 drivers/iio/trigger/stm32-timer-trigger.c i << shift); shift 71 drivers/infiniband/core/packer.c int shift; shift 76 drivers/infiniband/core/packer.c shift = 32 - desc[i].offset_bits - desc[i].size_bits; shift 80 drivers/infiniband/core/packer.c structure) << shift; shift 84 drivers/infiniband/core/packer.c mask = cpu_to_be32(((1ull << desc[i].size_bits) - 1) << shift); shift 88 drivers/infiniband/core/packer.c int shift; shift 93 drivers/infiniband/core/packer.c shift = 64 - desc[i].offset_bits - desc[i].size_bits; shift 97 drivers/infiniband/core/packer.c structure) << shift; shift 101 drivers/infiniband/core/packer.c mask = cpu_to_be64((~0ull >> (64 - desc[i].size_bits)) << shift); shift 160 drivers/infiniband/core/packer.c int shift; shift 165 drivers/infiniband/core/packer.c shift = 32 - desc[i].offset_bits - desc[i].size_bits; shift 166 drivers/infiniband/core/packer.c mask = ((1ull << desc[i].size_bits) - 1) << shift; shift 168 drivers/infiniband/core/packer.c val = (be32_to_cpup(addr) & mask) >> shift; shift 174 drivers/infiniband/core/packer.c int shift; shift 179 drivers/infiniband/core/packer.c shift = 64 - desc[i].offset_bits - desc[i].size_bits; shift 180 drivers/infiniband/core/packer.c mask = (~0ull >> (64 - desc[i].size_bits)) << shift; shift 182 drivers/infiniband/core/packer.c val = (be64_to_cpup(addr) & mask) >> shift; shift 56 drivers/infiniband/hw/cxgb3/iwch_mem.c struct iwch_mr *mhp, int shift) shift 67 drivers/infiniband/hw/cxgb3/iwch_mem.c shift - 12, shift 363 drivers/infiniband/hw/cxgb3/iwch_provider.c int shift = 26, npages, ret, i; shift 381 drivers/infiniband/hw/cxgb3/iwch_provider.c npages = (total_size + (1ULL << shift) - 1) >> shift; shift 394 drivers/infiniband/hw/cxgb3/iwch_provider.c page_list[i] = cpu_to_be64((u64)i << shift); shift 397 drivers/infiniband/hw/cxgb3/iwch_provider.c __func__, mask, shift, total_size, npages); shift 415 drivers/infiniband/hw/cxgb3/iwch_provider.c mhp->attr.page_size = shift - 12; shift 419 drivers/infiniband/hw/cxgb3/iwch_provider.c ret = iwch_register_mem(rhp, php, mhp, shift); shift 437 drivers/infiniband/hw/cxgb3/iwch_provider.c int shift, n, i; shift 461 drivers/infiniband/hw/cxgb3/iwch_provider.c shift = PAGE_SHIFT; shift 500 drivers/infiniband/hw/cxgb3/iwch_provider.c mhp->attr.page_size = shift - 12; shift 503 drivers/infiniband/hw/cxgb3/iwch_provider.c err = iwch_register_mem(rhp, php, mhp, shift); shift 340 drivers/infiniband/hw/cxgb3/iwch_provider.h struct iwch_mr *mhp, int shift); shift 3826 drivers/infiniband/hw/cxgb4/cm.c u32 shift = 32; shift 3828 drivers/infiniband/hw/cxgb4/cm.c t = (thi << shift) | (tlo >> shift); shift 3833 drivers/infiniband/hw/cxgb4/cm.c static inline u32 t4_tcb_get_field32(__be64 *tcb, u16 word, u32 mask, u32 shift) shift 3839 drivers/infiniband/hw/cxgb4/cm.c shift += 32; shift 3840 drivers/infiniband/hw/cxgb4/cm.c v = (t >> shift) & mask; shift 409 drivers/infiniband/hw/cxgb4/mem.c struct c4iw_mr *mhp, int shift) shift 419 drivers/infiniband/hw/cxgb4/mem.c mhp->attr.len : -1, shift - 12, shift 512 drivers/infiniband/hw/cxgb4/mem.c int shift, n, i; shift 550 drivers/infiniband/hw/cxgb4/mem.c shift = PAGE_SHIFT; shift 592 drivers/infiniband/hw/cxgb4/mem.c mhp->attr.page_size = shift - 12; shift 595 drivers/infiniband/hw/cxgb4/mem.c err = register_mem(rhp, php, mhp, shift); shift 5845 drivers/infiniband/hw/hfi1/chip.c int shift = posn - 1; shift 5846 drivers/infiniband/hw/hfi1/chip.c u64 mask = 1ULL << shift; shift 5848 drivers/infiniband/hw/hfi1/chip.c if (port_inactive_err(shift)) { shift 5851 drivers/infiniband/hw/hfi1/chip.c } else if (disallowed_pkt_err(shift)) { shift 5852 drivers/infiniband/hw/hfi1/chip.c int vl = engine_to_vl(dd, disallowed_pkt_engine(shift)); shift 543 drivers/infiniband/hw/hfi1/init.c u16 shift, mult; shift 574 drivers/infiniband/hw/hfi1/init.c shift = (cce & 0xc000) >> 14; shift 581 drivers/infiniband/hw/hfi1/init.c src = (max_pkt_time >> shift) * mult; shift 3237 drivers/infiniband/hw/hfi1/sdma.c u32 i, shift = 0, desc = 0; shift 3273 drivers/infiniband/hw/hfi1/sdma.c if (!shift && !(i & 2)) shift 3277 drivers/infiniband/hw/hfi1/sdma.c << shift); shift 3278 drivers/infiniband/hw/hfi1/sdma.c shift = (shift + 32) & 63; shift 292 drivers/infiniband/hw/hfi1/trace_tx.h u16 comp_idx, u32 tidoffset, u32 units, u8 shift), shift 293 drivers/infiniband/hw/hfi1/trace_tx.h TP_ARGS(dd, ctxt, subctxt, comp_idx, tidoffset, units, shift), shift 300 drivers/infiniband/hw/hfi1/trace_tx.h __field(u8, shift) shift 308 drivers/infiniband/hw/hfi1/trace_tx.h __entry->shift = shift; shift 317 drivers/infiniband/hw/hfi1/trace_tx.h __entry->shift shift 45 drivers/infiniband/hw/hns/hns_roce_common.h #define roce_get_field(origin, mask, shift) \ shift 46 drivers/infiniband/hw/hns/hns_roce_common.h (((le32_to_cpu(origin)) & (mask)) >> (shift)) shift 48 drivers/infiniband/hw/hns/hns_roce_common.h #define roce_get_bit(origin, shift) \ shift 49 drivers/infiniband/hw/hns/hns_roce_common.h roce_get_field((origin), (1ul << (shift)), (shift)) shift 51 drivers/infiniband/hw/hns/hns_roce_common.h #define roce_set_field(origin, mask, shift, val) \ shift 54 drivers/infiniband/hw/hns/hns_roce_common.h (origin) |= cpu_to_le32(((u32)(val) << (shift)) & (mask)); \ shift 57 drivers/infiniband/hw/hns/hns_roce_common.h #define roce_set_bit(origin, shift, val) \ shift 58 drivers/infiniband/hw/hns/hns_roce_common.h roce_set_field((origin), (1ul << (shift)), (shift), (val)) shift 783 drivers/infiniband/hw/hns/hns_roce_device.h int shift; shift 121 drivers/infiniband/hw/hns/hns_roce_hw_v2.c int shift; shift 128 drivers/infiniband/hw/hns/hns_roce_hw_v2.c shift = qp->hr_buf.page_shift; shift 136 drivers/infiniband/hw/hns/hns_roce_hw_v2.c fi_sge_num = (round_up((uintptr_t)dseg, 1 << shift) - shift 5413 drivers/infiniband/hw/hns/hns_roce_hw_v2.c eq->shift = ilog2((unsigned int)eq->entries); shift 5504 drivers/infiniband/hw/hns/hns_roce_hw_v2.c HNS_ROCE_EQC_SHIFT_S, eq->shift); shift 907 drivers/infiniband/hw/i40iw/i40iw_uk.c void i40iw_get_wqe_shift(u32 sge, u32 inline_data, u8 *shift) shift 909 drivers/infiniband/hw/i40iw/i40iw_uk.c *shift = 0; shift 911 drivers/infiniband/hw/i40iw/i40iw_uk.c *shift = (sge < 4 && inline_data <= 48) ? 1 : 2; shift 921 drivers/infiniband/hw/i40iw/i40iw_uk.c enum i40iw_status_code i40iw_get_sqdepth(u32 sq_size, u8 shift, u32 *sqdepth) shift 923 drivers/infiniband/hw/i40iw/i40iw_uk.c *sqdepth = roundup_pow_of_two((sq_size << shift) + I40IW_SQ_RSVD); shift 925 drivers/infiniband/hw/i40iw/i40iw_uk.c if (*sqdepth < (I40IW_QP_SW_MIN_WQSIZE << shift)) shift 926 drivers/infiniband/hw/i40iw/i40iw_uk.c *sqdepth = I40IW_QP_SW_MIN_WQSIZE << shift; shift 940 drivers/infiniband/hw/i40iw/i40iw_uk.c enum i40iw_status_code i40iw_get_rqdepth(u32 rq_size, u8 shift, u32 *rqdepth) shift 942 drivers/infiniband/hw/i40iw/i40iw_uk.c *rqdepth = roundup_pow_of_two((rq_size << shift) + I40IW_RQ_RSVD); shift 944 drivers/infiniband/hw/i40iw/i40iw_uk.c if (*rqdepth < (I40IW_QP_SW_MIN_WQSIZE << shift)) shift 945 drivers/infiniband/hw/i40iw/i40iw_uk.c *rqdepth = I40IW_QP_SW_MIN_WQSIZE << shift; shift 427 drivers/infiniband/hw/i40iw/i40iw_user.h void i40iw_get_wqe_shift(u32 sge, u32 inline_data, u8 *shift); shift 428 drivers/infiniband/hw/i40iw/i40iw_user.h enum i40iw_status_code i40iw_get_sqdepth(u32 sq_size, u8 shift, u32 *sqdepth); shift 429 drivers/infiniband/hw/i40iw/i40iw_user.h enum i40iw_status_code i40iw_get_rqdepth(u32 rq_size, u8 shift, u32 *rqdepth); shift 144 drivers/infiniband/hw/mlx4/cq.c int shift; shift 153 drivers/infiniband/hw/mlx4/cq.c shift = mlx4_ib_umem_calc_optimal_mtt_size(*umem, 0, &n); shift 154 drivers/infiniband/hw/mlx4/cq.c err = mlx4_mtt_init(dev->dev, n, shift, &buf->mtt); shift 67 drivers/infiniband/hw/mlx4/mlx4_ib.h #define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1) shift 410 drivers/infiniband/hw/mlx4/mr.c int shift; shift 425 drivers/infiniband/hw/mlx4/mr.c shift = mlx4_ib_umem_calc_optimal_mtt_size(mr->umem, start, &n); shift 428 drivers/infiniband/hw/mlx4/mr.c convert_access(access_flags), n, shift, &mr->mmr); shift 443 drivers/infiniband/hw/mlx4/mr.c mr->ibmr.page_size = 1U << shift; shift 502 drivers/infiniband/hw/mlx4/mr.c int shift; shift 516 drivers/infiniband/hw/mlx4/mr.c shift = PAGE_SHIFT; shift 519 drivers/infiniband/hw/mlx4/mr.c virt_addr, length, n, shift, shift 871 drivers/infiniband/hw/mlx4/qp.c int shift; shift 926 drivers/infiniband/hw/mlx4/qp.c shift = mlx4_ib_umem_calc_optimal_mtt_size(qp->umem, 0, &n); shift 927 drivers/infiniband/hw/mlx4/qp.c err = mlx4_mtt_init(dev->dev, n, shift, &qp->mtt); shift 1079 drivers/infiniband/hw/mlx4/qp.c int shift; shift 1121 drivers/infiniband/hw/mlx4/qp.c shift = mlx4_ib_umem_calc_optimal_mtt_size(qp->umem, 0, &n); shift 1122 drivers/infiniband/hw/mlx4/qp.c err = mlx4_mtt_init(dev->dev, n, shift, &qp->mtt); shift 48 drivers/infiniband/hw/mlx5/mem.c int *count, int *shift, shift 99 drivers/infiniband/hw/mlx5/mem.c *shift = PAGE_SHIFT + m; shift 132 drivers/infiniband/hw/mlx5/mem.c int shift = page_shift - PAGE_SHIFT; shift 133 drivers/infiniband/hw/mlx5/mem.c int mask = (1 << shift) - 1; shift 142 drivers/infiniband/hw/mlx5/mem.c WARN_ON(shift != 0); shift 160 drivers/infiniband/hw/mlx5/mem.c if (i + len < offset << shift) { shift 166 drivers/infiniband/hw/mlx5/mem.c if (i < offset << shift) { shift 167 drivers/infiniband/hw/mlx5/mem.c k = (offset << shift) - i; shift 168 drivers/infiniband/hw/mlx5/mem.c i = offset << shift; shift 177 drivers/infiniband/hw/mlx5/mem.c idx = (i >> shift) - offset; shift 181 drivers/infiniband/hw/mlx5/mem.c i >> shift, be64_to_cpu(pas[idx])); shift 186 drivers/infiniband/hw/mlx5/mem.c if (i >> shift >= offset + num_pages) shift 1213 drivers/infiniband/hw/mlx5/mlx5_ib.h int *count, int *shift, shift 200 drivers/infiniband/hw/mthca/mthca_allocator.c int npages, shift; shift 208 drivers/infiniband/hw/mthca/mthca_allocator.c shift = get_order(size) + PAGE_SHIFT; shift 217 drivers/infiniband/hw/mthca/mthca_allocator.c while (t & ((1 << shift) - 1)) { shift 218 drivers/infiniband/hw/mthca/mthca_allocator.c --shift; shift 228 drivers/infiniband/hw/mthca/mthca_allocator.c dma_list[i] = t + i * (1 << shift); shift 232 drivers/infiniband/hw/mthca/mthca_allocator.c shift = PAGE_SHIFT; shift 263 drivers/infiniband/hw/mthca/mthca_allocator.c dma_list, shift, npages, shift 394 drivers/infiniband/hw/qib/qib_verbs.c static inline u32 get_upper_bits(u32 data, u32 shift) shift 396 drivers/infiniband/hw/qib/qib_verbs.c return data >> shift; shift 399 drivers/infiniband/hw/qib/qib_verbs.c static inline u32 set_upper_bits(u32 data, u32 shift) shift 401 drivers/infiniband/hw/qib/qib_verbs.c return data << shift; shift 411 drivers/infiniband/hw/qib/qib_verbs.c static inline u32 get_upper_bits(u32 data, u32 shift) shift 413 drivers/infiniband/hw/qib/qib_verbs.c return data << shift; shift 416 drivers/infiniband/hw/qib/qib_verbs.c static inline u32 set_upper_bits(u32 data, u32 shift) shift 418 drivers/infiniband/hw/qib/qib_verbs.c return data >> shift; shift 475 drivers/infiniband/hw/qib/qib_verbs.c int shift = extra * BITS_PER_BYTE; shift 476 drivers/infiniband/hw/qib/qib_verbs.c int ushift = 32 - shift; shift 482 drivers/infiniband/hw/qib/qib_verbs.c data |= set_upper_bits(v, shift); shift 496 drivers/infiniband/hw/qib/qib_verbs.c data |= set_upper_bits(v, shift); shift 88 drivers/infiniband/sw/rdmavt/mr.c rdi->lkey_table.shift = 32 - lkey_table_size; shift 951 drivers/infiniband/sw/rdmavt/mr.c mr = rcu_dereference(rkt->table[sge->lkey >> rkt->shift]); shift 1059 drivers/infiniband/sw/rdmavt/mr.c mr = rcu_dereference(rkt->table[rkey >> rkt->shift]); shift 2569 drivers/infiniband/sw/rdmavt/qp.c void rvt_add_retry_timer_ext(struct rvt_qp *qp, u8 shift) shift 2578 drivers/infiniband/sw/rdmavt/qp.c (qp->timeout_jiffies << shift); shift 144 drivers/input/joystick/gf2k.c static int gf2k_get_bits(unsigned char *buf, int pos, int num, int shift) shift 153 drivers/input/joystick/gf2k.c data <<= shift; shift 68 drivers/input/joystick/grip.c static int grip_gpp_read_packet(struct gameport *gameport, int shift, unsigned int *data) shift 83 drivers/input/joystick/grip.c v = gameport_read(gameport) >> shift; shift 87 drivers/input/joystick/grip.c u = v; v = (gameport_read(gameport) >> shift) & 3; shift 108 drivers/input/joystick/grip.c static int grip_xt_read_packet(struct gameport *gameport, int shift, unsigned int *data) shift 124 drivers/input/joystick/grip.c v = w = (gameport_read(gameport) >> shift) & 3; shift 128 drivers/input/joystick/grip.c u = (gameport_read(gameport) >> shift) & 3; shift 169 drivers/input/misc/bma150.c int val, int shift, u8 mask, u8 reg) shift 177 drivers/input/misc/bma150.c data = (data & ~mask) | ((val << shift) & mask); shift 78 drivers/input/misc/kxtj9.c u8 shift; shift 118 drivers/input/misc/kxtj9.c x >>= tj9->shift; shift 119 drivers/input/misc/kxtj9.c y >>= tj9->shift; shift 120 drivers/input/misc/kxtj9.c z >>= tj9->shift; shift 148 drivers/input/misc/kxtj9.c tj9->shift = 4; shift 151 drivers/input/misc/kxtj9.c tj9->shift = 3; shift 154 drivers/input/misc/kxtj9.c tj9->shift = 2; shift 53 drivers/input/touchscreen/egalax_ts_serial.c u8 shift; shift 56 drivers/input/touchscreen/egalax_ts_serial.c shift = 3 - ((data[0] & EGALAX_FORMAT_RESOLUTION_MASK) >> 1); shift 57 drivers/input/touchscreen/egalax_ts_serial.c mask = 0xff >> (shift + 1); shift 59 drivers/input/touchscreen/egalax_ts_serial.c x = (((u16)(data[1] & mask) << 7) | (data[2] & 0x7f)) << shift; shift 60 drivers/input/touchscreen/egalax_ts_serial.c y = (((u16)(data[3] & mask) << 7) | (data[4] & 0x7f)) << shift; shift 72 drivers/input/touchscreen/s3c2410_ts.c int shift; shift 104 drivers/input/touchscreen/s3c2410_ts.c if (ts.count == (1 << ts.shift)) { shift 105 drivers/input/touchscreen/s3c2410_ts.c ts.xp >>= ts.shift; shift 106 drivers/input/touchscreen/s3c2410_ts.c ts.yp >>= ts.shift; shift 122 drivers/input/touchscreen/s3c2410_ts.c s3c_adc_start(ts.client, 0, 1 << ts.shift); shift 160 drivers/input/touchscreen/s3c2410_ts.c s3c_adc_start(ts.client, 0, 1 << ts.shift); shift 318 drivers/input/touchscreen/s3c2410_ts.c ts.shift = info->oversampling_shift; shift 621 drivers/input/touchscreen/usbtouchscreen.c unsigned int shift; shift 627 drivers/input/touchscreen/usbtouchscreen.c shift = (6 - (pkt[0] & 0x03)); shift 628 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[3] << 7) | pkt[4]) >> shift; shift 629 drivers/input/touchscreen/usbtouchscreen.c dev->y = ((pkt[1] << 7) | pkt[2]) >> shift; shift 287 drivers/iommu/amd_iommu_init.c unsigned shift = PAGE_SHIFT + shift 290 drivers/iommu/amd_iommu_init.c return 1UL << shift; shift 389 drivers/iommu/dma-iommu.c unsigned long shift, iova_len, iova = 0; shift 396 drivers/iommu/dma-iommu.c shift = iova_shift(iovad); shift 397 drivers/iommu/dma-iommu.c iova_len = size >> shift; shift 416 drivers/iommu/dma-iommu.c DMA_BIT_MASK(32) >> shift, false); shift 419 drivers/iommu/dma-iommu.c iova = alloc_iova_fast(iovad, iova_len, dma_limit >> shift, shift 422 drivers/iommu/dma-iommu.c return (dma_addr_t)iova << shift; shift 1162 drivers/iommu/dmar.c int shift = qi_shift(iommu); shift 1176 drivers/iommu/dmar.c if ((head >> shift) == index) { shift 1187 drivers/iommu/dmar.c memcpy(desc, qi->desc + (wait_index << shift), shift 1188 drivers/iommu/dmar.c 1 << shift); shift 1200 drivers/iommu/dmar.c head = ((head >> shift) - 1 + QI_LENGTH) % QI_LENGTH; shift 1203 drivers/iommu/dmar.c tail = ((tail >> shift) - 1 + QI_LENGTH) % QI_LENGTH; shift 1231 drivers/iommu/dmar.c int offset, shift, length; shift 1251 drivers/iommu/dmar.c shift = qi_shift(iommu); shift 1252 drivers/iommu/dmar.c length = 1 << shift; shift 1256 drivers/iommu/dmar.c offset = index << shift; shift 1264 drivers/iommu/dmar.c offset = wait_index << shift; shift 1274 drivers/iommu/dmar.c writel(qi->free_head << shift, iommu->reg + DMAR_IQT_REG); shift 525 drivers/iommu/intel-svm.c int shift = 64 - (__VIRTUAL_MASK_SHIFT + 1); shift 528 drivers/iommu/intel-svm.c return (((saddr << shift) >> shift) == saddr); shift 33 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_FIELD(addr, mask, shift) ((readl(addr) >> (shift)) & (mask)) shift 35 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FIELD(addr, mask, shift, v) \ shift 38 drivers/iommu/msm_iommu_hw-8xxx.h writel((t & ~((mask) << (shift))) + (((v) & (mask)) << (shift)), addr);\ shift 82 drivers/irqchip/irq-davinci-aintc.c unsigned int irq_off, reg_off, prio, shift; shift 127 drivers/irqchip/irq-davinci-aintc.c for (shift = 0, prio = 0; shift < 32; shift += 4, prios++) shift 128 drivers/irqchip/irq-davinci-aintc.c prio |= (*prios & 0x07) << shift; shift 333 drivers/irqchip/irq-gic.c unsigned int cpu, shift = (gic_irq(d) % 4) * 8; shift 346 drivers/irqchip/irq-gic.c mask = 0xff << shift; shift 347 drivers/irqchip/irq-gic.c bit = gic_cpu_map[cpu] << shift; shift 151 drivers/irqchip/irq-hip04.c unsigned int cpu, shift = (hip04_irq(d) % 2) * 16; shift 164 drivers/irqchip/irq-hip04.c mask = 0xffff << shift; shift 165 drivers/irqchip/irq-hip04.c bit = hip04_cpu_map[cpu] << shift; shift 108 drivers/irqchip/irq-pic32-evic.c u32 reg, shift; shift 111 drivers/irqchip/irq-pic32-evic.c shift = (irq % 4) * 8; shift 113 drivers/irqchip/irq-pic32-evic.c writel(PRIORITY_MASK << shift, shift 115 drivers/irqchip/irq-pic32-evic.c writel(priority << shift, shift 129 drivers/irqchip/irq-renesas-intc-irqpin.c int reg, int shift, shift 138 drivers/irqchip/irq-renesas-intc-irqpin.c tmp &= ~(((1 << width) - 1) << shift); shift 139 drivers/irqchip/irq-renesas-intc-irqpin.c tmp |= value << shift; shift 150 drivers/irqchip/irq-renesas-intc-irqpin.c int shift = 32 - (irq + 1) * bitfield_width; shift 153 drivers/irqchip/irq-renesas-intc-irqpin.c shift, bitfield_width, shift 161 drivers/irqchip/irq-renesas-intc-irqpin.c int shift = 32 - (irq + 1) * bitfield_width; shift 168 drivers/irqchip/irq-renesas-intc-irqpin.c intc_irqpin_read_modify_write(p, INTC_IRQPIN_REG_SENSE, shift, shift 61 drivers/irqchip/spear-shirq.c u32 val, shift = d->irq - shirq->virq_base + shirq->offset; shift 65 drivers/irqchip/spear-shirq.c val = readl(reg) & ~(0x1 << shift); shift 73 drivers/irqchip/spear-shirq.c u32 val, shift = d->irq - shirq->virq_base + shirq->offset; shift 77 drivers/irqchip/spear-shirq.c val = readl(reg) | (0x1 << shift); shift 396 drivers/isdn/mISDN/dsp_audio.c int shift; shift 403 drivers/isdn/mISDN/dsp_audio.c shift = volume + 8; shift 404 drivers/isdn/mISDN/dsp_audio.c if (shift < 0) shift 405 drivers/isdn/mISDN/dsp_audio.c shift = 0; shift 407 drivers/isdn/mISDN/dsp_audio.c shift = volume + 7; shift 408 drivers/isdn/mISDN/dsp_audio.c if (shift > 15) shift 409 drivers/isdn/mISDN/dsp_audio.c shift = 15; shift 411 drivers/isdn/mISDN/dsp_audio.c volume_change = dsp_audio_volume_change[shift]; shift 108 drivers/leds/leds-bcm6328.c unsigned long val, shift; shift 110 drivers/leds/leds-bcm6328.c shift = bcm6328_pin2shift(led->pin); shift 111 drivers/leds/leds-bcm6328.c if (shift / 16) shift 117 drivers/leds/leds-bcm6328.c val &= ~(BCM6328_LED_MODE_MASK << BCM6328_LED_SHIFT(shift % 16)); shift 118 drivers/leds/leds-bcm6328.c val |= (value << BCM6328_LED_SHIFT(shift % 16)); shift 307 drivers/leds/leds-bcm6328.c unsigned long val, shift; shift 309 drivers/leds/leds-bcm6328.c shift = bcm6328_pin2shift(led->pin); shift 310 drivers/leds/leds-bcm6328.c if (shift / 16) shift 316 drivers/leds/leds-bcm6328.c BCM6328_LED_SHIFT(shift % 16); shift 47 drivers/leds/leds-lm355x.c u8 shift; shift 220 drivers/leds/leds-lm355x.c << preg[REG_TORCH_CTRL].shift); shift 230 drivers/leds/leds-lm355x.c preg[REG_TORCH_CFG].shift); shift 245 drivers/leds/leds-lm355x.c << preg[REG_FLASH_CTRL].shift); shift 259 drivers/leds/leds-lm355x.c preg[REG_STROBE_CFG].shift); shift 273 drivers/leds/leds-lm355x.c << preg[REG_INDI_CTRL].shift); shift 283 drivers/leds/leds-lm355x.c preg[REG_INDI_CFG].shift); shift 297 drivers/leds/leds-lm355x.c opmode << preg[REG_OPMODE].shift); shift 58 drivers/leds/leds-mc13783.c unsigned int reg, bank, off, shift; shift 65 drivers/leds/leds-mc13783.c shift = 9 + (led->id - MC13783_LED_MD) * 4; shift 79 drivers/leds/leds-mc13783.c shift = (off - bank * 3) * 5 + 6; shift 86 drivers/leds/leds-mc13783.c shift = 3 + (off - reg * 2) * 12; shift 94 drivers/leds/leds-mc13783.c shift = (off - bank * 2) * 12 + 3; shift 99 drivers/leds/leds-mc13783.c shift = 3 + (led->id - MC34708_LED_R) * 12; shift 106 drivers/leds/leds-mc13783.c mc13xxx_max_brightness(led->id) << shift, shift 107 drivers/leds/leds-mc13783.c value << shift); shift 124 drivers/leds/leds-pca963x.c int shift = 2 * (pca963x->led_num % 4); shift 125 drivers/leds/leds-pca963x.c u8 mask = 0x3 << shift; shift 133 drivers/leds/leds-pca963x.c (ledout & ~mask) | (PCA963X_LED_ON << shift)); shift 147 drivers/leds/leds-pca963x.c (ledout & ~mask) | (PCA963X_LED_PWM << shift)); shift 161 drivers/leds/leds-pca963x.c int shift = 2 * (pca963x->led_num % 4); shift 162 drivers/leds/leds-pca963x.c u8 mask = 0x3 << shift; shift 176 drivers/leds/leds-pca963x.c if ((ledout & mask) != (PCA963X_LED_GRP_PWM << shift)) shift 178 drivers/leds/leds-pca963x.c (ledout & ~mask) | (PCA963X_LED_GRP_PWM << shift)); shift 129 drivers/lightnvm/pblk-rl.c int shift = rl->high_pw - rl->rb_windows_pw; shift 130 drivers/lightnvm/pblk-rl.c int user_windows = free_blocks >> shift; shift 148 drivers/macintosh/windfarm_fcu_controls.c int rc, shift = pv->rpm_shift; shift 158 drivers/macintosh/windfarm_fcu_controls.c buf[0] = value >> (8 - shift); shift 159 drivers/macintosh/windfarm_fcu_controls.c buf[1] = value << shift; shift 170 drivers/macintosh/windfarm_fcu_controls.c int rc, reg_base, shift = pv->rpm_shift; shift 196 drivers/macintosh/windfarm_fcu_controls.c *value = (buf[0] << (8 - shift)) | buf[1] >> shift; shift 44 drivers/macintosh/windfarm_smu_sat.c int shift; shift 153 drivers/macintosh/windfarm_smu_sat.c val = ((sat->cache[i] << 8) + sat->cache[i+1]) << sens->shift; shift 202 drivers/macintosh/windfarm_smu_sat.c int shift, cpu, index; shift 252 drivers/macintosh/windfarm_smu_sat.c shift = 4; shift 256 drivers/macintosh/windfarm_smu_sat.c shift = 8; shift 260 drivers/macintosh/windfarm_smu_sat.c shift = 10; shift 273 drivers/macintosh/windfarm_smu_sat.c sens->shift = shift; shift 300 drivers/macintosh/windfarm_smu_sat.c sens->shift = 0; shift 421 drivers/md/bcache/bset.c unsigned int shift = fls(size - 1) - b; shift 426 drivers/md/bcache/bset.c j <<= shift; shift 447 drivers/md/bcache/bset.c unsigned int shift; shift 452 drivers/md/bcache/bset.c shift = ffs(j); shift 454 drivers/md/bcache/bset.c j >>= shift; shift 455 drivers/md/bcache/bset.c j |= roundup_pow_of_two(size) >> shift; shift 564 drivers/md/bcache/bset.c static inline uint64_t shrd128(uint64_t high, uint64_t low, uint8_t shift) shift 566 drivers/md/bcache/bset.c low >>= shift; shift 567 drivers/md/bcache/bset.c low |= (high << 1) << (63U - shift); shift 789 drivers/md/bcache/bset.c unsigned int shift = bkey_u64s(k); shift 810 drivers/md/bcache/bset.c t->prev[j] += shift; shift 102 drivers/md/dm-crypt.c int shift; shift 356 drivers/md/dm-crypt.c cc->iv_gen_private.benbi.shift = 9 - log; shift 372 drivers/md/dm-crypt.c val = cpu_to_be64(((u64)dmreq->iv_sector << cc->iv_gen_private.benbi.shift) + 1); shift 150 drivers/md/dm-kcopyd.c int shift = fls(t->total_period >> ACCOUNT_INTERVAL_SHIFT); shift 151 drivers/md/dm-kcopyd.c t->total_period >>= shift; shift 152 drivers/md/dm-kcopyd.c t->io_period >>= shift; shift 69 drivers/md/dm-region-hash.c unsigned shift; shift 203 drivers/md/dm-region-hash.c rh->shift = RH_HASH_SHIFT; shift 268 drivers/md/dm-region-hash.c return (unsigned) ((region * rh->prime) >> rh->shift) & rh->mask; shift 1152 drivers/md/md.c rdev->badblocks.shift = -1; shift 1656 drivers/md/md.c rdev->badblocks.shift = sb->bblog_shift; shift 1669 drivers/md/md.c rdev->badblocks.shift = 0; shift 2996 drivers/md/md.c rdev->badblocks.shift = 0; shift 5439 drivers/md/md.c int shift; shift 5447 drivers/md/md.c shift = partitioned ? MdpMinorShift : 0; shift 5448 drivers/md/md.c unit = MINOR(mddev->unit) >> shift; shift 5489 drivers/md/md.c disk = alloc_disk(1 << shift); shift 5496 drivers/md/md.c disk->first_minor = unit << shift; shift 56 drivers/md/persistent-data/dm-btree-remove.c static void node_shift(struct btree_node *n, int shift) shift 61 drivers/md/persistent-data/dm-btree-remove.c if (shift < 0) { shift 62 drivers/md/persistent-data/dm-btree-remove.c shift = -shift; shift 63 drivers/md/persistent-data/dm-btree-remove.c BUG_ON(shift > nr_entries); shift 64 drivers/md/persistent-data/dm-btree-remove.c BUG_ON((void *) key_ptr(n, shift) >= value_ptr(n, shift)); shift 66 drivers/md/persistent-data/dm-btree-remove.c key_ptr(n, shift), shift 67 drivers/md/persistent-data/dm-btree-remove.c (nr_entries - shift) * sizeof(__le64)); shift 69 drivers/md/persistent-data/dm-btree-remove.c value_ptr(n, shift), shift 70 drivers/md/persistent-data/dm-btree-remove.c (nr_entries - shift) * value_size); shift 72 drivers/md/persistent-data/dm-btree-remove.c BUG_ON(nr_entries + shift > le32_to_cpu(n->header.max_entries)); shift 73 drivers/md/persistent-data/dm-btree-remove.c memmove(key_ptr(n, shift), shift 76 drivers/md/persistent-data/dm-btree-remove.c memmove(value_ptr(n, shift), shift 82 drivers/md/persistent-data/dm-btree-remove.c static void node_copy(struct btree_node *left, struct btree_node *right, int shift) shift 88 drivers/md/persistent-data/dm-btree-remove.c if (shift < 0) { shift 89 drivers/md/persistent-data/dm-btree-remove.c shift = -shift; shift 90 drivers/md/persistent-data/dm-btree-remove.c BUG_ON(nr_left + shift > le32_to_cpu(left->header.max_entries)); shift 93 drivers/md/persistent-data/dm-btree-remove.c shift * sizeof(__le64)); shift 96 drivers/md/persistent-data/dm-btree-remove.c shift * value_size); shift 98 drivers/md/persistent-data/dm-btree-remove.c BUG_ON(shift > le32_to_cpu(right->header.max_entries)); shift 100 drivers/md/persistent-data/dm-btree-remove.c key_ptr(left, nr_left - shift), shift 101 drivers/md/persistent-data/dm-btree-remove.c shift * sizeof(__le64)); shift 103 drivers/md/persistent-data/dm-btree-remove.c value_ptr(left, nr_left - shift), shift 104 drivers/md/persistent-data/dm-btree-remove.c shift * value_size); shift 232 drivers/md/persistent-data/dm-btree-remove.c shift(left, right, nr_left - target_left); shift 275 drivers/md/persistent-data/dm-btree-remove.c unsigned shift = min(max_entries - nr_left, nr_center); shift 277 drivers/md/persistent-data/dm-btree-remove.c BUG_ON(nr_left + shift > max_entries); shift 278 drivers/md/persistent-data/dm-btree-remove.c node_copy(left, center, -shift); shift 279 drivers/md/persistent-data/dm-btree-remove.c left->header.nr_entries = cpu_to_le32(nr_left + shift); shift 281 drivers/md/persistent-data/dm-btree-remove.c if (shift != nr_center) { shift 282 drivers/md/persistent-data/dm-btree-remove.c shift = nr_center - shift; shift 283 drivers/md/persistent-data/dm-btree-remove.c BUG_ON((nr_right + shift) > max_entries); shift 284 drivers/md/persistent-data/dm-btree-remove.c node_shift(right, shift); shift 285 drivers/md/persistent-data/dm-btree-remove.c node_copy(center, right, shift); shift 286 drivers/md/persistent-data/dm-btree-remove.c right->header.nr_entries = cpu_to_le32(nr_right + shift); shift 320 drivers/md/persistent-data/dm-btree-remove.c shift(left, center, -nr_center); shift 322 drivers/md/persistent-data/dm-btree-remove.c shift(left, right, s); shift 325 drivers/md/persistent-data/dm-btree-remove.c shift(left, center, s); shift 327 drivers/md/persistent-data/dm-btree-remove.c shift(center, right, target_right - nr_right); shift 333 drivers/md/persistent-data/dm-btree-remove.c shift(center, right, nr_center); shift 335 drivers/md/persistent-data/dm-btree-remove.c shift(left, right, s); shift 338 drivers/md/persistent-data/dm-btree-remove.c shift(center, right, s); shift 340 drivers/md/persistent-data/dm-btree-remove.c shift(left, center, nr_left - target_left); shift 2363 drivers/md/raid1.c if (rdev->badblocks.shift < 0) shift 2366 drivers/md/raid1.c block_sectors = roundup(1 << rdev->badblocks.shift, shift 2538 drivers/md/raid10.c if (rdev->badblocks.shift < 0) shift 2541 drivers/md/raid10.c block_sectors = roundup(1 << rdev->badblocks.shift, shift 1579 drivers/media/dvb-frontends/drx39xyj/drx_driver.h s32 shift; /* DC level of incoming signal (A) */ shift 15 drivers/media/dvb-frontends/stv0900_reg.h extern s32 shiftx(s32 x, int demod, s32 shift); shift 16 drivers/media/dvb-frontends/stv0900_sw.c s32 shiftx(s32 x, int demod, s32 shift) shift 19 drivers/media/dvb-frontends/stv0900_sw.c return x - shift; shift 201 drivers/media/dvb-frontends/stv0910.c u8 shift, mask, old, new; shift 207 drivers/media/dvb-frontends/stv0910.c shift = (field >> 12) & 0xf; shift 208 drivers/media/dvb-frontends/stv0910.c new = ((val << shift) & mask) | (old & ~mask); shift 1349 drivers/media/firewire/firedtv-avc.c static inline u32 get_opcr(__be32 opcr, u32 mask, u32 shift) shift 1351 drivers/media/firewire/firedtv-avc.c return (be32_to_cpu(opcr) >> shift) & mask; shift 1354 drivers/media/firewire/firedtv-avc.c static inline void set_opcr(__be32 *opcr, u32 value, u32 mask, u32 shift) shift 1356 drivers/media/firewire/firedtv-avc.c *opcr &= ~cpu_to_be32(mask << shift); shift 1357 drivers/media/firewire/firedtv-avc.c *opcr |= cpu_to_be32((value & mask) << shift); shift 152 drivers/media/i2c/adv748x/adv748x-hdmi.c static void adv748x_hdmi_set_de_timings(struct adv748x_state *state, int shift) shift 158 drivers/media/i2c/adv748x/adv748x-hdmi.c high |= (shift & 0x300) >> 8; shift 159 drivers/media/i2c/adv748x/adv748x-hdmi.c low = shift & 0xff; shift 165 drivers/media/i2c/adv748x/adv748x-hdmi.c high |= (shift & 0x300) >> 6; shift 275 drivers/media/i2c/m5mols/m5mols_reg.h #define REG_FD(shift) (1 << shift) shift 19 drivers/media/pci/cx18/cx18-av-core.c int shift = (addr & 3) * 8; shift 22 drivers/media/pci/cx18/cx18-av-core.c x = (x & ~(mask << shift)) | ((u32)value << shift); shift 30 drivers/media/pci/cx18/cx18-av-core.c int shift = (addr & 3) * 8; shift 33 drivers/media/pci/cx18/cx18-av-core.c x = (x & ~((u32)0xff << shift)) | ((u32)value << shift); shift 35 drivers/media/pci/cx18/cx18-av-core.c ((u32)eval << shift), ((u32)mask << shift)); shift 61 drivers/media/pci/cx18/cx18-av-core.c int shift = (addr & 3) * 8; shift 63 drivers/media/pci/cx18/cx18-av-core.c return (x >> shift) & 0xff; shift 150 drivers/media/pci/cx88/cx88-video.c u32 shift; shift 164 drivers/media/pci/cx88/cx88-video.c .shift = 0, shift 174 drivers/media/pci/cx88/cx88-video.c .shift = 8, shift 184 drivers/media/pci/cx88/cx88-video.c .shift = 0, shift 197 drivers/media/pci/cx88/cx88-video.c .shift = 0, shift 211 drivers/media/pci/cx88/cx88-video.c .shift = 7, shift 219 drivers/media/pci/cx88/cx88-video.c .shift = 10, shift 227 drivers/media/pci/cx88/cx88-video.c .shift = 9, shift 237 drivers/media/pci/cx88/cx88-video.c .shift = 11, shift 251 drivers/media/pci/cx88/cx88-video.c .shift = 6, shift 261 drivers/media/pci/cx88/cx88-video.c .shift = 0, shift 271 drivers/media/pci/cx88/cx88-video.c .shift = 0, shift 619 drivers/media/pci/cx88/cx88-video.c value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; shift 637 drivers/media/pci/cx88/cx88-video.c value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; shift 640 drivers/media/pci/cx88/cx88-video.c value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; shift 689 drivers/media/pci/cx88/cx88-video.c value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; shift 2595 drivers/media/pci/ddbridge/ddbridge-core.c u32 data, shift; shift 2619 drivers/media/pci/ddbridge/ddbridge-core.c shift = ((4 - wlen) * 8); shift 2626 drivers/media/pci/ddbridge/ddbridge-core.c if (shift) shift 2627 drivers/media/pci/ddbridge/ddbridge-core.c data <<= shift; shift 57 drivers/media/pci/netup_unidvb/netup_unidvb_ci.c u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0; shift 64 drivers/media/pci/netup_unidvb/netup_unidvb_ci.c writew(BIT_CAM_BYPASS << shift, dev->bmmio0 + CAM_CTRLSTAT_CLR); shift 86 drivers/media/pci/netup_unidvb/netup_unidvb_ci.c u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0; shift 95 drivers/media/pci/netup_unidvb/netup_unidvb_ci.c writew(BIT_CAM_RESET << shift, dev->bmmio0 + CAM_CTRLSTAT_READ_SET); shift 100 drivers/media/pci/netup_unidvb/netup_unidvb_ci.c if (ci_stat & (BIT_CAM_READY << shift)) shift 104 drivers/media/pci/netup_unidvb/netup_unidvb_ci.c if (!(ci_stat & (BIT_CAM_READY << shift)) && reset_counter > 0) { shift 119 drivers/media/pci/netup_unidvb/netup_unidvb_ci.c u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0; shift 125 drivers/media/pci/netup_unidvb/netup_unidvb_ci.c if (ci_stat & (BIT_CAM_READY << shift)) { shift 128 drivers/media/pci/netup_unidvb/netup_unidvb_ci.c } else if (ci_stat & (BIT_CAM_PRESENT << shift)) { shift 696 drivers/media/pci/tw5864/tw5864-video.c int shift = 0; shift 699 drivers/media/pci/tw5864/tw5864-video.c for (shift = 0; shift < std_max_fps; shift += input->frame_interval) shift 700 drivers/media/pci/tw5864/tw5864-video.c unary_framerate |= 0x00000001 << shift; shift 169 drivers/media/pci/tw5864/tw5864.h #define tw_mask_shift_readl(reg, mask, shift) \ shift 170 drivers/media/pci/tw5864/tw5864.h (tw_mask_readl((reg), ((mask) << (shift))) >> (shift)) shift 175 drivers/media/pci/tw5864/tw5864.h #define tw_mask_shift_writel(reg, mask, shift, value) \ shift 176 drivers/media/pci/tw5864/tw5864.h tw_mask_writel((reg), ((mask) << (shift)), ((value) << (shift))) shift 123 drivers/media/platform/coda/coda-h264.c int shift = 7 - (rbsp->pos % 8); shift 129 drivers/media/platform/coda/coda-h264.c return (rbsp->buf[ofs] >> shift) & 1; shift 134 drivers/media/platform/coda/coda-h264.c int shift = 7 - (rbsp->pos % 8); shift 140 drivers/media/platform/coda/coda-h264.c rbsp->buf[ofs] &= ~(1 << shift); shift 141 drivers/media/platform/coda/coda-h264.c rbsp->buf[ofs] |= bit << shift; shift 229 drivers/media/platform/davinci/vpss.c u32 utemp, mask = 0x1, shift = 0; shift 236 drivers/media/platform/davinci/vpss.c shift = 2; shift 239 drivers/media/platform/davinci/vpss.c shift = 3; shift 242 drivers/media/platform/davinci/vpss.c shift = 4; shift 245 drivers/media/platform/davinci/vpss.c shift = 5; shift 248 drivers/media/platform/davinci/vpss.c shift = 6; shift 259 drivers/media/platform/davinci/vpss.c utemp &= ~(mask << shift); shift 261 drivers/media/platform/davinci/vpss.c utemp |= (mask << shift); shift 271 drivers/media/platform/davinci/vpss.c u32 utemp, mask = 0x1, shift = 0, offset = DM365_ISP5_PCCR; shift 279 drivers/media/platform/davinci/vpss.c shift = 1; shift 282 drivers/media/platform/davinci/vpss.c shift = 2; shift 285 drivers/media/platform/davinci/vpss.c shift = 3; shift 288 drivers/media/platform/davinci/vpss.c shift = 4; shift 291 drivers/media/platform/davinci/vpss.c shift = 5; shift 294 drivers/media/platform/davinci/vpss.c shift = 6; shift 297 drivers/media/platform/davinci/vpss.c shift = 7; shift 305 drivers/media/platform/davinci/vpss.c shift = 2; shift 311 drivers/media/platform/davinci/vpss.c shift = 3; shift 317 drivers/media/platform/davinci/vpss.c shift = 4; shift 323 drivers/media/platform/davinci/vpss.c shift = 6; shift 329 drivers/media/platform/davinci/vpss.c shift = 7; shift 344 drivers/media/platform/davinci/vpss.c utemp &= (mask << shift); shift 346 drivers/media/platform/davinci/vpss.c utemp |= (mask << shift); shift 494 drivers/media/platform/exynos-gsc/gsc-core.h void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable); shift 495 drivers/media/platform/exynos-gsc/gsc-core.h void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable); shift 58 drivers/media/platform/exynos-gsc/gsc-regs.c void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, shift 62 drivers/media/platform/exynos-gsc/gsc-regs.c u32 mask = 1 << shift; shift 65 drivers/media/platform/exynos-gsc/gsc-regs.c cfg |= enable << shift; shift 72 drivers/media/platform/exynos-gsc/gsc-regs.c void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, shift 76 drivers/media/platform/exynos-gsc/gsc-regs.c u32 mask = 1 << shift; shift 79 drivers/media/platform/exynos-gsc/gsc-regs.c cfg |= enable << shift; shift 207 drivers/media/platform/exynos4-is/fimc-core.c static int fimc_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift) shift 217 drivers/media/platform/exynos4-is/fimc-core.c *shift = sh, *ratio = tmp; shift 221 drivers/media/platform/exynos4-is/fimc-core.c *shift = 0, *ratio = 1; shift 431 drivers/media/platform/omap3isp/isp.c unsigned int shift, unsigned int bridge) shift 446 drivers/media/platform/omap3isp/isp.c shift += parcfg->data_lane_shift; shift 465 drivers/media/platform/omap3isp/isp.c ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK; shift 249 drivers/media/platform/omap3isp/isp.h unsigned int shift, unsigned int bridge); shift 1127 drivers/media/platform/omap3isp/ispccdc.c unsigned int shift; shift 1161 drivers/media/platform/omap3isp/ispccdc.c shift = depth_in - depth_out; shift 1172 drivers/media/platform/omap3isp/ispccdc.c omap3isp_configure_bridge(isp, ccdc->input, parcfg, shift, bridge); shift 55 drivers/media/platform/omap3isp/ispccp2.c #define BIT_SET(var, shift, mask, val) \ shift 57 drivers/media/platform/omap3isp/ispccp2.c var = ((var) & ~((mask) << (shift))) \ shift 58 drivers/media/platform/omap3isp/ispccp2.c | ((val) << (shift)); \ shift 28 drivers/media/platform/omap3isp/ispcsiphy.c u32 shift, mode; shift 37 drivers/media/platform/omap3isp/ispcsiphy.c shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY1_SHIFT; shift 40 drivers/media/platform/omap3isp/ispcsiphy.c shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY1_SHIFT; shift 45 drivers/media/platform/omap3isp/ispcsiphy.c shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY2_SHIFT; shift 48 drivers/media/platform/omap3isp/ispcsiphy.c shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY2_SHIFT; shift 62 drivers/media/platform/omap3isp/ispcsiphy.c reg &= ~(OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_MASK << shift); shift 63 drivers/media/platform/omap3isp/ispcsiphy.c reg |= mode << shift; shift 124 drivers/media/platform/s3c-camif/camif-core.c static int camif_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift) shift 134 drivers/media/platform/s3c-camif/camif-core.c *shift = sh, *ratio = tmp; shift 138 drivers/media/platform/s3c-camif/camif-core.c *shift = 0, *ratio = 1; shift 286 drivers/media/platform/ti-vpe/vpdma.c u32 mask, int shift) shift 288 drivers/media/platform/ti-vpe/vpdma.c return (read_reg(vpdma, offset) & (mask << shift)) >> shift; shift 292 drivers/media/platform/ti-vpe/vpdma.c u32 mask, int shift) shift 296 drivers/media/platform/ti-vpe/vpdma.c val &= ~(mask << shift); shift 297 drivers/media/platform/ti-vpe/vpdma.c val |= (field & mask) << shift; shift 449 drivers/media/platform/ti-vpe/vpe.c static int get_field(u32 value, u32 mask, int shift) shift 451 drivers/media/platform/ti-vpe/vpe.c return (value & (mask << shift)) >> shift; shift 454 drivers/media/platform/ti-vpe/vpe.c static int read_field_reg(struct vpe_dev *dev, int offset, u32 mask, int shift) shift 456 drivers/media/platform/ti-vpe/vpe.c return get_field(read_reg(dev, offset), mask, shift); shift 459 drivers/media/platform/ti-vpe/vpe.c static void write_field(u32 *valp, u32 field, u32 mask, int shift) shift 463 drivers/media/platform/ti-vpe/vpe.c val &= ~(mask << shift); shift 464 drivers/media/platform/ti-vpe/vpe.c val |= (field & mask) << shift; shift 469 drivers/media/platform/ti-vpe/vpe.c u32 mask, int shift) shift 473 drivers/media/platform/ti-vpe/vpe.c write_field(&val, field, mask, shift); shift 178 drivers/media/rc/img-ir/img-ir-hw.c unsigned int shift) shift 189 drivers/media/rc/img-ir/img-ir-hw.c out->min = min >> shift; shift 190 drivers/media/rc/img-ir/img-ir-hw.c out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */ shift 287 drivers/media/usb/pwc/pwc-dec23.c int flags, version, shift, i; shift 324 drivers/media/usb/pwc/pwc-dec23.c shift = 8 - pdec->nbits; shift 325 drivers/media/usb/pwc/pwc-dec23.c pdec->scalebits = SCALEBITS - shift; shift 326 drivers/media/usb/pwc/pwc-dec23.c pdec->nbitsmask = 0xFF >> shift; shift 541 drivers/media/usb/pwc/pwc-dec23.c unsigned int mask, shift; shift 557 drivers/media/usb/pwc/pwc-dec23.c shift = ptable8004[offset1 * 2 + 1]; shift 558 drivers/media/usb/pwc/pwc-dec23.c rows = ((mask << shift) + 0x80) & 0xFF; shift 568 drivers/media/usb/pwc/pwc-dec23.c unsigned int shift; shift 578 drivers/media/usb/pwc/pwc-dec23.c shift = hash_table_ops[htable_idx * 4 + 1]; shift 579 drivers/media/usb/pwc/pwc-dec23.c skip_nbits(pdec, shift); shift 67 drivers/memory/atmel-ebi.c unsigned int shift, unsigned int nycles); shift 68 drivers/memory/atmel-ebi.c unsigned int shift; shift 72 drivers/memory/atmel-ebi.c { .name = nm, .converter = atmel_smc_cs_conf_set_setup, .shift = pos} shift 75 drivers/memory/atmel-ebi.c { .name = nm, .converter = atmel_smc_cs_conf_set_pulse, .shift = pos} shift 78 drivers/memory/atmel-ebi.c { .name = nm, .converter = atmel_smc_cs_conf_set_cycle, .shift = pos} shift 156 drivers/memory/atmel-ebi.c ret = xlate->converter(smcconf, xlate->shift, ncycles); shift 33 drivers/memory/da8xx-ddrctl.c u32 shift; shift 41 drivers/memory/da8xx-ddrctl.c .shift = 0, shift 144 drivers/memory/da8xx-ddrctl.c reg |= setting->val << knob->shift; shift 753 drivers/memory/emif.c u8 shift; shift 782 drivers/memory/emif.c shift = CS_TIM_SHIFT; shift 790 drivers/memory/emif.c shift = SR_TIM_SHIFT; shift 794 drivers/memory/emif.c shift = PD_TIM_SHIFT; shift 800 drivers/memory/emif.c shift = 0; shift 804 drivers/memory/emif.c if (lpmode != EMIF_LP_MODE_DISABLE && timeout > mask >> shift) { shift 811 drivers/memory/emif.c timeout, mask >> shift); shift 812 drivers/memory/emif.c timeout = mask >> shift; shift 816 drivers/memory/emif.c pwr_mgmt_ctrl = (timeout << shift) & mask; shift 433 drivers/memory/omap-gpmc.c int shift, shift 449 drivers/memory/omap-gpmc.c if (shift) shift 450 drivers/memory/omap-gpmc.c l = (shift << l); shift 482 drivers/memory/omap-gpmc.c #define GPMC_GET_RAW_SHIFT_MAX(reg, st, end, shift, max, field) \ shift 483 drivers/memory/omap-gpmc.c get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, (shift), 1, 1) shift 299 drivers/memory/tegra/mc.c value &= ~(la->mask << la->shift); shift 300 drivers/memory/tegra/mc.c value |= (la->def & la->mask) << la->shift; shift 28 drivers/memory/tegra/tegra114.c .shift = 0, shift 42 drivers/memory/tegra/tegra114.c .shift = 0, shift 56 drivers/memory/tegra/tegra114.c .shift = 16, shift 70 drivers/memory/tegra/tegra114.c .shift = 16, shift 84 drivers/memory/tegra/tegra114.c .shift = 0, shift 98 drivers/memory/tegra/tegra114.c .shift = 0, shift 112 drivers/memory/tegra/tegra114.c .shift = 0, shift 126 drivers/memory/tegra/tegra114.c .shift = 0, shift 140 drivers/memory/tegra/tegra114.c .shift = 16, shift 154 drivers/memory/tegra/tegra114.c .shift = 0, shift 168 drivers/memory/tegra/tegra114.c .shift = 0, shift 182 drivers/memory/tegra/tegra114.c .shift = 0, shift 196 drivers/memory/tegra/tegra114.c .shift = 0, shift 210 drivers/memory/tegra/tegra114.c .shift = 0, shift 224 drivers/memory/tegra/tegra114.c .shift = 0, shift 238 drivers/memory/tegra/tegra114.c .shift = 0, shift 252 drivers/memory/tegra/tegra114.c .shift = 0, shift 266 drivers/memory/tegra/tegra114.c .shift = 16, shift 280 drivers/memory/tegra/tegra114.c .shift = 16, shift 294 drivers/memory/tegra/tegra114.c .shift = 0, shift 308 drivers/memory/tegra/tegra114.c .shift = 0, shift 322 drivers/memory/tegra/tegra114.c .shift = 16, shift 336 drivers/memory/tegra/tegra114.c .shift = 0, shift 350 drivers/memory/tegra/tegra114.c .shift = 0, shift 364 drivers/memory/tegra/tegra114.c .shift = 16, shift 378 drivers/memory/tegra/tegra114.c .shift = 0, shift 392 drivers/memory/tegra/tegra114.c .shift = 16, shift 402 drivers/memory/tegra/tegra114.c .shift = 0, shift 412 drivers/memory/tegra/tegra114.c .shift = 0, shift 426 drivers/memory/tegra/tegra114.c .shift = 16, shift 440 drivers/memory/tegra/tegra114.c .shift = 0, shift 454 drivers/memory/tegra/tegra114.c .shift = 16, shift 468 drivers/memory/tegra/tegra114.c .shift = 16, shift 482 drivers/memory/tegra/tegra114.c .shift = 0, shift 496 drivers/memory/tegra/tegra114.c .shift = 0, shift 510 drivers/memory/tegra/tegra114.c .shift = 16, shift 524 drivers/memory/tegra/tegra114.c .shift = 0, shift 538 drivers/memory/tegra/tegra114.c .shift = 16, shift 552 drivers/memory/tegra/tegra114.c .shift = 16, shift 566 drivers/memory/tegra/tegra114.c .shift = 16, shift 580 drivers/memory/tegra/tegra114.c .shift = 0, shift 594 drivers/memory/tegra/tegra114.c .shift = 16, shift 608 drivers/memory/tegra/tegra114.c .shift = 0, shift 622 drivers/memory/tegra/tegra114.c .shift = 0, shift 632 drivers/memory/tegra/tegra114.c .shift = 16, shift 642 drivers/memory/tegra/tegra114.c .shift = 16, shift 656 drivers/memory/tegra/tegra114.c .shift = 0, shift 670 drivers/memory/tegra/tegra114.c .shift = 16, shift 684 drivers/memory/tegra/tegra114.c .shift = 0, shift 698 drivers/memory/tegra/tegra114.c .shift = 16, shift 712 drivers/memory/tegra/tegra114.c .shift = 0, shift 726 drivers/memory/tegra/tegra114.c .shift = 16, shift 740 drivers/memory/tegra/tegra114.c .shift = 0, shift 754 drivers/memory/tegra/tegra114.c .shift = 16, shift 768 drivers/memory/tegra/tegra114.c .shift = 0, shift 782 drivers/memory/tegra/tegra114.c .shift = 16, shift 796 drivers/memory/tegra/tegra114.c .shift = 0, shift 810 drivers/memory/tegra/tegra114.c .shift = 0, shift 824 drivers/memory/tegra/tegra114.c .shift = 16, shift 838 drivers/memory/tegra/tegra114.c .shift = 16, shift 848 drivers/memory/tegra/tegra114.c .shift = 0, shift 858 drivers/memory/tegra/tegra114.c .shift = 16, shift 872 drivers/memory/tegra/tegra114.c .shift = 0, shift 886 drivers/memory/tegra/tegra114.c .shift = 16, shift 48 drivers/memory/tegra/tegra124.c .shift = 0, shift 62 drivers/memory/tegra/tegra124.c .shift = 0, shift 76 drivers/memory/tegra/tegra124.c .shift = 16, shift 90 drivers/memory/tegra/tegra124.c .shift = 16, shift 104 drivers/memory/tegra/tegra124.c .shift = 0, shift 118 drivers/memory/tegra/tegra124.c .shift = 0, shift 132 drivers/memory/tegra/tegra124.c .shift = 0, shift 146 drivers/memory/tegra/tegra124.c .shift = 0, shift 160 drivers/memory/tegra/tegra124.c .shift = 0, shift 174 drivers/memory/tegra/tegra124.c .shift = 0, shift 188 drivers/memory/tegra/tegra124.c .shift = 0, shift 202 drivers/memory/tegra/tegra124.c .shift = 0, shift 216 drivers/memory/tegra/tegra124.c .shift = 16, shift 230 drivers/memory/tegra/tegra124.c .shift = 0, shift 244 drivers/memory/tegra/tegra124.c .shift = 0, shift 258 drivers/memory/tegra/tegra124.c .shift = 16, shift 272 drivers/memory/tegra/tegra124.c .shift = 0, shift 286 drivers/memory/tegra/tegra124.c .shift = 0, shift 300 drivers/memory/tegra/tegra124.c .shift = 16, shift 314 drivers/memory/tegra/tegra124.c .shift = 0, shift 328 drivers/memory/tegra/tegra124.c .shift = 16, shift 338 drivers/memory/tegra/tegra124.c .shift = 0, shift 348 drivers/memory/tegra/tegra124.c .shift = 0, shift 362 drivers/memory/tegra/tegra124.c .shift = 16, shift 376 drivers/memory/tegra/tegra124.c .shift = 16, shift 390 drivers/memory/tegra/tegra124.c .shift = 16, shift 404 drivers/memory/tegra/tegra124.c .shift = 16, shift 418 drivers/memory/tegra/tegra124.c .shift = 0, shift 428 drivers/memory/tegra/tegra124.c .shift = 16, shift 438 drivers/memory/tegra/tegra124.c .shift = 16, shift 452 drivers/memory/tegra/tegra124.c .shift = 0, shift 466 drivers/memory/tegra/tegra124.c .shift = 16, shift 480 drivers/memory/tegra/tegra124.c .shift = 16, shift 494 drivers/memory/tegra/tegra124.c .shift = 0, shift 508 drivers/memory/tegra/tegra124.c .shift = 16, shift 522 drivers/memory/tegra/tegra124.c .shift = 0, shift 536 drivers/memory/tegra/tegra124.c .shift = 16, shift 550 drivers/memory/tegra/tegra124.c .shift = 0, shift 564 drivers/memory/tegra/tegra124.c .shift = 0, shift 578 drivers/memory/tegra/tegra124.c .shift = 16, shift 592 drivers/memory/tegra/tegra124.c .shift = 0, shift 606 drivers/memory/tegra/tegra124.c .shift = 16, shift 620 drivers/memory/tegra/tegra124.c .shift = 0, shift 634 drivers/memory/tegra/tegra124.c .shift = 16, shift 648 drivers/memory/tegra/tegra124.c .shift = 0, shift 662 drivers/memory/tegra/tegra124.c .shift = 0, shift 676 drivers/memory/tegra/tegra124.c .shift = 16, shift 690 drivers/memory/tegra/tegra124.c .shift = 0, shift 704 drivers/memory/tegra/tegra124.c .shift = 16, shift 718 drivers/memory/tegra/tegra124.c .shift = 0, shift 732 drivers/memory/tegra/tegra124.c .shift = 16, shift 747 drivers/memory/tegra/tegra124.c .shift = 0, shift 762 drivers/memory/tegra/tegra124.c .shift = 16, shift 776 drivers/memory/tegra/tegra124.c .shift = 16, shift 790 drivers/memory/tegra/tegra124.c .shift = 0, shift 804 drivers/memory/tegra/tegra124.c .shift = 0, shift 818 drivers/memory/tegra/tegra124.c .shift = 0, shift 832 drivers/memory/tegra/tegra124.c .shift = 0, shift 846 drivers/memory/tegra/tegra124.c .shift = 16, shift 860 drivers/memory/tegra/tegra124.c .shift = 16, shift 874 drivers/memory/tegra/tegra124.c .shift = 16, shift 888 drivers/memory/tegra/tegra124.c .shift = 16, shift 902 drivers/memory/tegra/tegra124.c .shift = 0, shift 916 drivers/memory/tegra/tegra124.c .shift = 16, shift 930 drivers/memory/tegra/tegra124.c .shift = 0, shift 944 drivers/memory/tegra/tegra124.c .shift = 0, shift 25 drivers/memory/tegra/tegra210.c .shift = 0, shift 39 drivers/memory/tegra/tegra210.c .shift = 0, shift 53 drivers/memory/tegra/tegra210.c .shift = 16, shift 67 drivers/memory/tegra/tegra210.c .shift = 16, shift 81 drivers/memory/tegra/tegra210.c .shift = 0, shift 95 drivers/memory/tegra/tegra210.c .shift = 0, shift 109 drivers/memory/tegra/tegra210.c .shift = 0, shift 123 drivers/memory/tegra/tegra210.c .shift = 0, shift 137 drivers/memory/tegra/tegra210.c .shift = 0, shift 151 drivers/memory/tegra/tegra210.c .shift = 0, shift 165 drivers/memory/tegra/tegra210.c .shift = 0, shift 179 drivers/memory/tegra/tegra210.c .shift = 0, shift 193 drivers/memory/tegra/tegra210.c .shift = 16, shift 207 drivers/memory/tegra/tegra210.c .shift = 0, shift 221 drivers/memory/tegra/tegra210.c .shift = 0, shift 235 drivers/memory/tegra/tegra210.c .shift = 16, shift 249 drivers/memory/tegra/tegra210.c .shift = 0, shift 259 drivers/memory/tegra/tegra210.c .shift = 0, shift 273 drivers/memory/tegra/tegra210.c .shift = 16, shift 287 drivers/memory/tegra/tegra210.c .shift = 16, shift 301 drivers/memory/tegra/tegra210.c .shift = 16, shift 315 drivers/memory/tegra/tegra210.c .shift = 16, shift 329 drivers/memory/tegra/tegra210.c .shift = 0, shift 339 drivers/memory/tegra/tegra210.c .shift = 16, shift 353 drivers/memory/tegra/tegra210.c .shift = 0, shift 367 drivers/memory/tegra/tegra210.c .shift = 16, shift 381 drivers/memory/tegra/tegra210.c .shift = 16, shift 395 drivers/memory/tegra/tegra210.c .shift = 0, shift 409 drivers/memory/tegra/tegra210.c .shift = 0, shift 423 drivers/memory/tegra/tegra210.c .shift = 16, shift 437 drivers/memory/tegra/tegra210.c .shift = 0, shift 451 drivers/memory/tegra/tegra210.c .shift = 16, shift 465 drivers/memory/tegra/tegra210.c .shift = 0, shift 479 drivers/memory/tegra/tegra210.c .shift = 16, shift 493 drivers/memory/tegra/tegra210.c .shift = 0, shift 507 drivers/memory/tegra/tegra210.c .shift = 0, shift 521 drivers/memory/tegra/tegra210.c .shift = 16, shift 535 drivers/memory/tegra/tegra210.c .shift = 0, shift 549 drivers/memory/tegra/tegra210.c .shift = 16, shift 563 drivers/memory/tegra/tegra210.c .shift = 0, shift 577 drivers/memory/tegra/tegra210.c .shift = 16, shift 592 drivers/memory/tegra/tegra210.c .shift = 0, shift 607 drivers/memory/tegra/tegra210.c .shift = 16, shift 621 drivers/memory/tegra/tegra210.c .shift = 16, shift 635 drivers/memory/tegra/tegra210.c .shift = 0, shift 649 drivers/memory/tegra/tegra210.c .shift = 0, shift 663 drivers/memory/tegra/tegra210.c .shift = 0, shift 677 drivers/memory/tegra/tegra210.c .shift = 0, shift 691 drivers/memory/tegra/tegra210.c .shift = 16, shift 705 drivers/memory/tegra/tegra210.c .shift = 16, shift 719 drivers/memory/tegra/tegra210.c .shift = 16, shift 733 drivers/memory/tegra/tegra210.c .shift = 16, shift 747 drivers/memory/tegra/tegra210.c .shift = 0, shift 761 drivers/memory/tegra/tegra210.c .shift = 16, shift 775 drivers/memory/tegra/tegra210.c .shift = 0, shift 789 drivers/memory/tegra/tegra210.c .shift = 0, shift 803 drivers/memory/tegra/tegra210.c .shift = 0, shift 817 drivers/memory/tegra/tegra210.c .shift = 16, shift 831 drivers/memory/tegra/tegra210.c .shift = 0, shift 845 drivers/memory/tegra/tegra210.c .shift = 0, shift 859 drivers/memory/tegra/tegra210.c .shift = 0, shift 873 drivers/memory/tegra/tegra210.c .shift = 16, shift 887 drivers/memory/tegra/tegra210.c .shift = 0, shift 901 drivers/memory/tegra/tegra210.c .shift = 16, shift 915 drivers/memory/tegra/tegra210.c .shift = 0, shift 929 drivers/memory/tegra/tegra210.c .shift = 16, shift 943 drivers/memory/tegra/tegra210.c .shift = 0, shift 957 drivers/memory/tegra/tegra210.c .shift = 16, shift 971 drivers/memory/tegra/tegra210.c .shift = 0, shift 985 drivers/memory/tegra/tegra210.c .shift = 16, shift 1000 drivers/memory/tegra/tegra210.c .shift = 0, shift 1015 drivers/memory/tegra/tegra210.c .shift = 16, shift 28 drivers/memory/tegra/tegra30.c .shift = 0, shift 42 drivers/memory/tegra/tegra30.c .shift = 0, shift 56 drivers/memory/tegra/tegra30.c .shift = 16, shift 70 drivers/memory/tegra/tegra30.c .shift = 16, shift 84 drivers/memory/tegra/tegra30.c .shift = 0, shift 98 drivers/memory/tegra/tegra30.c .shift = 0, shift 112 drivers/memory/tegra/tegra30.c .shift = 16, shift 126 drivers/memory/tegra/tegra30.c .shift = 16, shift 140 drivers/memory/tegra/tegra30.c .shift = 0, shift 154 drivers/memory/tegra/tegra30.c .shift = 0, shift 168 drivers/memory/tegra/tegra30.c .shift = 16, shift 182 drivers/memory/tegra/tegra30.c .shift = 0, shift 196 drivers/memory/tegra/tegra30.c .shift = 0, shift 210 drivers/memory/tegra/tegra30.c .shift = 0, shift 224 drivers/memory/tegra/tegra30.c .shift = 0, shift 238 drivers/memory/tegra/tegra30.c .shift = 0, shift 252 drivers/memory/tegra/tegra30.c .shift = 0, shift 266 drivers/memory/tegra/tegra30.c .shift = 0, shift 280 drivers/memory/tegra/tegra30.c .shift = 0, shift 294 drivers/memory/tegra/tegra30.c .shift = 0, shift 308 drivers/memory/tegra/tegra30.c .shift = 0, shift 322 drivers/memory/tegra/tegra30.c .shift = 0, shift 336 drivers/memory/tegra/tegra30.c .shift = 16, shift 350 drivers/memory/tegra/tegra30.c .shift = 16, shift 364 drivers/memory/tegra/tegra30.c .shift = 16, shift 378 drivers/memory/tegra/tegra30.c .shift = 16, shift 392 drivers/memory/tegra/tegra30.c .shift = 0, shift 406 drivers/memory/tegra/tegra30.c .shift = 16, shift 420 drivers/memory/tegra/tegra30.c .shift = 0, shift 434 drivers/memory/tegra/tegra30.c .shift = 16, shift 448 drivers/memory/tegra/tegra30.c .shift = 0, shift 462 drivers/memory/tegra/tegra30.c .shift = 0, shift 476 drivers/memory/tegra/tegra30.c .shift = 0, shift 490 drivers/memory/tegra/tegra30.c .shift = 0, shift 504 drivers/memory/tegra/tegra30.c .shift = 16, shift 518 drivers/memory/tegra/tegra30.c .shift = 0, shift 532 drivers/memory/tegra/tegra30.c .shift = 16, shift 542 drivers/memory/tegra/tegra30.c .shift = 0, shift 552 drivers/memory/tegra/tegra30.c .shift = 0, shift 566 drivers/memory/tegra/tegra30.c .shift = 16, shift 580 drivers/memory/tegra/tegra30.c .shift = 0, shift 594 drivers/memory/tegra/tegra30.c .shift = 16, shift 608 drivers/memory/tegra/tegra30.c .shift = 0, shift 622 drivers/memory/tegra/tegra30.c .shift = 16, shift 636 drivers/memory/tegra/tegra30.c .shift = 0, shift 650 drivers/memory/tegra/tegra30.c .shift = 16, shift 664 drivers/memory/tegra/tegra30.c .shift = 0, shift 678 drivers/memory/tegra/tegra30.c .shift = 16, shift 692 drivers/memory/tegra/tegra30.c .shift = 16, shift 706 drivers/memory/tegra/tegra30.c .shift = 16, shift 720 drivers/memory/tegra/tegra30.c .shift = 16, shift 734 drivers/memory/tegra/tegra30.c .shift = 16, shift 748 drivers/memory/tegra/tegra30.c .shift = 16, shift 762 drivers/memory/tegra/tegra30.c .shift = 0, shift 776 drivers/memory/tegra/tegra30.c .shift = 0, shift 786 drivers/memory/tegra/tegra30.c .shift = 16, shift 796 drivers/memory/tegra/tegra30.c .shift = 16, shift 810 drivers/memory/tegra/tegra30.c .shift = 16, shift 824 drivers/memory/tegra/tegra30.c .shift = 0, shift 838 drivers/memory/tegra/tegra30.c .shift = 16, shift 852 drivers/memory/tegra/tegra30.c .shift = 16, shift 866 drivers/memory/tegra/tegra30.c .shift = 0, shift 880 drivers/memory/tegra/tegra30.c .shift = 16, shift 894 drivers/memory/tegra/tegra30.c .shift = 0, shift 908 drivers/memory/tegra/tegra30.c .shift = 16, shift 141 drivers/mfd/ab8500-debugfs.c long shift; /* bit shift (read:right shift, write:left shift */ shift 151 drivers/mfd/ab8500-debugfs.c .shift = 0, /* default: no bit shift */ shift 1567 drivers/mfd/ab8500-debugfs.c if (hwreg_cfg.shift >= 0) shift 1568 drivers/mfd/ab8500-debugfs.c regvalue >>= hwreg_cfg.shift; shift 1570 drivers/mfd/ab8500-debugfs.c regvalue <<= -hwreg_cfg.shift; shift 2319 drivers/mfd/ab8500-debugfs.c .shift = 0, /* default: no bit shift */ shift 2359 drivers/mfd/ab8500-debugfs.c ret = kstrtol(b, 0, &loc.shift); shift 2397 drivers/mfd/ab8500-debugfs.c cfg->addr, cfg->mask, cfg->shift, val); shift 2411 drivers/mfd/ab8500-debugfs.c if (cfg->shift >= 0) { shift 2412 drivers/mfd/ab8500-debugfs.c regvalue &= ~(cfg->mask << (cfg->shift)); shift 2413 drivers/mfd/ab8500-debugfs.c val = (val & cfg->mask) << (cfg->shift); shift 2415 drivers/mfd/ab8500-debugfs.c regvalue &= ~(cfg->mask >> (-cfg->shift)); shift 2416 drivers/mfd/ab8500-debugfs.c val = (val & cfg->mask) >> (-cfg->shift); shift 94 drivers/mfd/atmel-smc.c unsigned int shift, unsigned int ncycles) shift 99 drivers/mfd/atmel-smc.c if (shift != ATMEL_HSMC_TIMINGS_TCLR_SHIFT && shift 100 drivers/mfd/atmel-smc.c shift != ATMEL_HSMC_TIMINGS_TADL_SHIFT && shift 101 drivers/mfd/atmel-smc.c shift != ATMEL_HSMC_TIMINGS_TAR_SHIFT && shift 102 drivers/mfd/atmel-smc.c shift != ATMEL_HSMC_TIMINGS_TRR_SHIFT && shift 103 drivers/mfd/atmel-smc.c shift != ATMEL_HSMC_TIMINGS_TWB_SHIFT) shift 113 drivers/mfd/atmel-smc.c conf->timings &= ~GENMASK(shift + 3, shift); shift 114 drivers/mfd/atmel-smc.c conf->timings |= val << shift; shift 136 drivers/mfd/atmel-smc.c unsigned int shift, unsigned int ncycles) shift 141 drivers/mfd/atmel-smc.c if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT && shift 142 drivers/mfd/atmel-smc.c shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT) shift 152 drivers/mfd/atmel-smc.c conf->setup &= ~GENMASK(shift + 7, shift); shift 153 drivers/mfd/atmel-smc.c conf->setup |= val << shift; shift 175 drivers/mfd/atmel-smc.c unsigned int shift, unsigned int ncycles) shift 180 drivers/mfd/atmel-smc.c if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT && shift 181 drivers/mfd/atmel-smc.c shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT) shift 191 drivers/mfd/atmel-smc.c conf->pulse &= ~GENMASK(shift + 7, shift); shift 192 drivers/mfd/atmel-smc.c conf->pulse |= val << shift; shift 214 drivers/mfd/atmel-smc.c unsigned int shift, unsigned int ncycles) shift 219 drivers/mfd/atmel-smc.c if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NRD_SHIFT) shift 229 drivers/mfd/atmel-smc.c conf->cycle &= ~GENMASK(shift + 15, shift); shift 230 drivers/mfd/atmel-smc.c conf->cycle |= val << shift; shift 171 drivers/mfd/lm3533-core.c int shift; shift 180 drivers/mfd/lm3533-core.c shift = hvled - 1; shift 181 drivers/mfd/lm3533-core.c mask = LM3533_BL_ID_MASK << shift; shift 182 drivers/mfd/lm3533-core.c val = bl << shift; shift 199 drivers/mfd/lm3533-core.c int shift; shift 210 drivers/mfd/lm3533-core.c shift = 2 * lvled; shift 213 drivers/mfd/lm3533-core.c shift = 2 * (lvled - 4); shift 216 drivers/mfd/lm3533-core.c mask = LM3533_LED_ID_MASK << shift; shift 217 drivers/mfd/lm3533-core.c val = led << shift; shift 265 drivers/mfd/lm3533-core.c int shift; shift 270 drivers/mfd/lm3533-core.c shift = id - 1; shift 271 drivers/mfd/lm3533-core.c mask = LM3533_BL_ID_MASK << shift; shift 275 drivers/mfd/lm3533-core.c shift = 2 * id; shift 278 drivers/mfd/lm3533-core.c shift = 2 * (id - 4); shift 280 drivers/mfd/lm3533-core.c mask = LM3533_LED_ID_MASK << shift; shift 287 drivers/mfd/lm3533-core.c val = (val & mask) >> shift; shift 39 drivers/mfd/mt6397-irq.c int shift = data->hwirq & 0xf; shift 42 drivers/mfd/mt6397-irq.c mt6397->irq_masks_cur[reg] &= ~BIT(shift); shift 48 drivers/mfd/mt6397-irq.c int shift = data->hwirq & 0xf; shift 51 drivers/mfd/mt6397-irq.c mt6397->irq_masks_cur[reg] |= BIT(shift); shift 58 drivers/mfd/mt6397-irq.c int shift = irq_data->hwirq & 0xf; shift 62 drivers/mfd/mt6397-irq.c mt6397->wake_mask[reg] |= BIT(shift); shift 64 drivers/mfd/mt6397-irq.c mt6397->wake_mask[reg] &= ~BIT(shift); shift 393 drivers/mfd/sm501.c int shift; shift 412 drivers/mfd/sm501.c int shift; shift 420 drivers/mfd/sm501.c for (shift = 0; shift < 8; shift++) { shift 422 drivers/mfd/sm501.c diff = DIV_ROUND_CLOSEST(mclk, divider << shift) - freq; shift 432 drivers/mfd/sm501.c clock->shift = shift; shift 476 drivers/mfd/sm501.c return clock->mclk / (clock->divider << clock->shift); shift 499 drivers/mfd/sm501.c return clock->mclk / (clock->divider << clock->shift); shift 536 drivers/mfd/sm501.c reg = to.shift & 0x07;/* bottom 3 bits are shift */ shift 546 drivers/mfd/sm501.c reg = to.shift & 0x07;/* bottom 3 bits are shift */ shift 561 drivers/mfd/sm501.c reg=to.shift & 0x07; /* bottom 3 bits are shift */ shift 573 drivers/mfd/sm501.c reg=to.shift & 0x07; /* bottom 3 bits are shift */ shift 29 drivers/mfd/tmio_core.c int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base) shift 32 drivers/mfd/tmio_core.c sd_config_write16(cnf, shift, CNF_CMD, SDCREN); shift 33 drivers/mfd/tmio_core.c sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe); shift 36 drivers/mfd/tmio_core.c sd_config_write8(cnf, shift, CNF_PWR_CTL_3, 0x01); shift 39 drivers/mfd/tmio_core.c sd_config_write8(cnf, shift, CNF_STOP_CLK_CTL, 0x1f); shift 42 drivers/mfd/tmio_core.c sd_config_write8(cnf, shift, CNF_PWR_CTL_2, 0x00); shift 48 drivers/mfd/tmio_core.c int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base) shift 52 drivers/mfd/tmio_core.c sd_config_write16(cnf, shift, CNF_CMD, SDCREN); shift 53 drivers/mfd/tmio_core.c sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe); shift 59 drivers/mfd/tmio_core.c void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state) shift 61 drivers/mfd/tmio_core.c sd_config_write8(cnf, shift, CNF_PWR_CTL_2, state ? 0x02 : 0x00); shift 65 drivers/mfd/tmio_core.c void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state) shift 67 drivers/mfd/tmio_core.c sd_config_write8(cnf, shift, CNF_SD_CLK_MODE, state ? 1 : 0); shift 43 drivers/misc/altera-stapl/altera-comp.c u32 shift = 0; shift 49 drivers/misc/altera-stapl/altera-comp.c & (0xff >> (CHAR_BITS - *bits_avail))) << shift); shift 52 drivers/misc/altera-stapl/altera-comp.c result &= (0xffff >> (SHORT_BITS - (bits + shift))); shift 57 drivers/misc/altera-stapl/altera-comp.c shift += *bits_avail; shift 48 drivers/misc/cs5535-mfgpt.c int shift = (cmp == MFGPT_CMP1) ? 0 : 8; shift 72 drivers/misc/cs5535-mfgpt.c mask = 1 << (timer->nr + shift); shift 77 drivers/misc/cs5535-mfgpt.c mask = 1 << (timer->nr + shift); shift 100 drivers/misc/cs5535-mfgpt.c int shift; shift 116 drivers/misc/cs5535-mfgpt.c shift = ((cmp == MFGPT_CMP1 ? 0 : 4) + timer->nr % 4) * 4; shift 117 drivers/misc/cs5535-mfgpt.c if (((zsel >> shift) & 0xF) == 2) shift 122 drivers/misc/cs5535-mfgpt.c *irq = (zsel >> shift) & 0xF; shift 137 drivers/misc/cs5535-mfgpt.c zsel = (zsel & ~(0xF << shift)) | (*irq << shift); shift 1533 drivers/misc/cxl/native.c u32 val32, mask, shift; shift 1539 drivers/misc/cxl/native.c shift = (off & 0x3) * 8; shift 1540 drivers/misc/cxl/native.c WARN_ON(shift == 24); shift 1541 drivers/misc/cxl/native.c mask = 0xffff << shift; shift 1542 drivers/misc/cxl/native.c val32 = (val32 & ~mask) | (in << shift); shift 1551 drivers/misc/cxl/native.c u32 val32, mask, shift; shift 1557 drivers/misc/cxl/native.c shift = (off & 0x3) * 8; shift 1558 drivers/misc/cxl/native.c mask = 0xff << shift; shift 1559 drivers/misc/cxl/native.c val32 = (val32 & ~mask) | (in << shift); shift 106 drivers/misc/echo/echo.c static inline void lms_adapt_bg(struct oslec_state *ec, int clean, int shift) shift 115 drivers/misc/echo/echo.c if (shift > 0) shift 116 drivers/misc/echo/echo.c factor = clean << shift; shift 118 drivers/misc/echo/echo.c factor = clean >> -shift; shift 371 drivers/misc/echo/echo.c ec->shift = 0; shift 373 drivers/misc/echo/echo.c int p, logp, shift; shift 410 drivers/misc/echo/echo.c shift = 30 - 2 - logp; shift 411 drivers/misc/echo/echo.c ec->shift = shift; shift 413 drivers/misc/echo/echo.c lms_adapt_bg(ec, clean_bg, shift); shift 133 drivers/misc/echo/echo.h int16_t shift; shift 168 drivers/misc/habanalabs/mmu.c u64 virt_addr, u64 mask, u64 shift) shift 171 drivers/misc/habanalabs/mmu.c ((virt_addr & mask) >> shift); shift 65 drivers/misc/isl29003.c u32 reg, u8 mask, u8 shift) shift 69 drivers/misc/isl29003.c return (data->reg_cache[reg] & mask) >> shift; shift 73 drivers/misc/isl29003.c u32 reg, u8 mask, u8 shift, u8 val) shift 86 drivers/misc/isl29003.c tmp |= val << shift; shift 214 drivers/misc/lis3lv02d/lis3lv02d.c int shift; shift 218 drivers/misc/lis3lv02d/lis3lv02d.c shift = ffs(lis3->odr_mask) - 1; shift 219 drivers/misc/lis3lv02d/lis3lv02d.c return lis3->odrs[(ctrl >> shift)]; shift 237 drivers/misc/lis3lv02d/lis3lv02d.c int i, len, shift; shift 245 drivers/misc/lis3lv02d/lis3lv02d.c shift = ffs(lis3->odr_mask) - 1; shift 250 drivers/misc/lis3lv02d/lis3lv02d.c ctrl | (i << shift)); shift 297 drivers/misc/sgi-gru/grutlbpurge.c int cpus, shift = 0, n; shift 311 drivers/misc/sgi-gru/grutlbpurge.c shift = max(0, fls(n - 1) - fls(MAX_LOCAL_TGH - 1)); shift 313 drivers/misc/sgi-gru/grutlbpurge.c gru->gs_tgh_local_shift = shift; shift 316 drivers/misc/sgi-gru/grutlbpurge.c gru->gs_tgh_first_remote = (cpus + (1 << shift) - 1) >> shift; shift 742 drivers/mmc/host/atmel-mci.c unsigned shift = dtomul_to_shift[dtomul]; shift 743 drivers/mmc/host/atmel-mci.c dtocyc = (timeout + (1 << shift) - 1) >> shift; shift 303 drivers/mmc/host/cavium.c int bytes_xfered, shift = -1; shift 316 drivers/mmc/host/cavium.c if (shift < 0) { shift 318 drivers/mmc/host/cavium.c shift = 56; shift 321 drivers/mmc/host/cavium.c while (smi->consumed < smi->length && shift >= 0) { shift 322 drivers/mmc/host/cavium.c ((u8 *)smi->addr)[smi->consumed] = (dat >> shift) & 0xff; shift 325 drivers/mmc/host/cavium.c shift -= 8; shift 720 drivers/mmc/host/cavium.c int shift = 56; shift 736 drivers/mmc/host/cavium.c while (smi->consumed < smi->length && shift >= 0) { shift 737 drivers/mmc/host/cavium.c dat |= (u64)((u8 *)smi->addr)[smi->consumed] << shift; shift 740 drivers/mmc/host/cavium.c shift -= 8; shift 743 drivers/mmc/host/cavium.c if (shift < 0) { shift 745 drivers/mmc/host/cavium.c shift = 56; shift 2489 drivers/mmc/host/dw_mmc.c int shift = host->data_shift; shift 2505 drivers/mmc/host/dw_mmc.c << shift) + host->part_buf_count; shift 2543 drivers/mmc/host/dw_mmc.c int shift = host->data_shift; shift 2561 drivers/mmc/host/dw_mmc.c << shift) - host->part_buf_count; shift 452 drivers/mmc/host/meson-gx-mmc.c mux->shift = __ffs(CLK_SRC_MASK); shift 453 drivers/mmc/host/meson-gx-mmc.c mux->mask = CLK_SRC_MASK >> mux->shift; shift 474 drivers/mmc/host/meson-gx-mmc.c div->shift = __ffs(CLK_DIV_MASK); shift 614 drivers/mmc/host/meson-mx-sdio.c host->cfg_div.shift = MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT; shift 300 drivers/mmc/host/sdhci-esdhc-imx.c u32 shift = (reg & 0x3) * 8; shift 302 drivers/mmc/host/sdhci-esdhc-imx.c writel(((readl(base) & ~(mask << shift)) | (val << shift)), base); shift 41 drivers/mmc/host/sdhci-of-arasan.c #define HIWORD_UPDATE(val, mask, shift) \ shift 42 drivers/mmc/host/sdhci-of-arasan.c ((val) << (shift) | (mask) << ((shift) + 16)) shift 54 drivers/mmc/host/sdhci-of-arasan.c s16 shift; shift 112 drivers/mmc/host/sdhci-of-arasan.c .baseclkfreq = { .reg = 0xf000, .width = 8, .shift = 8 }, shift 113 drivers/mmc/host/sdhci-of-arasan.c .clockmultiplier = { .reg = 0xf02c, .width = 8, .shift = 0}, shift 118 drivers/mmc/host/sdhci-of-arasan.c .baseclkfreq = { .reg = 0xa0, .width = 8, .shift = 2 }, shift 119 drivers/mmc/host/sdhci-of-arasan.c .clockmultiplier = { .reg = 0, .width = -1, .shift = -1 }, shift 144 drivers/mmc/host/sdhci-of-arasan.c s16 shift = fld->shift; shift 153 drivers/mmc/host/sdhci-of-arasan.c if (shift < 0) shift 159 drivers/mmc/host/sdhci-of-arasan.c shift)); shift 162 drivers/mmc/host/sdhci-of-arasan.c GENMASK(shift + width, shift), shift 163 drivers/mmc/host/sdhci-of-arasan.c val << shift); shift 174 drivers/mmc/host/sdhci-of-esdhc.c int shift = (spec_reg & 0x2) * 8; shift 179 drivers/mmc/host/sdhci-of-esdhc.c ret = (value >> shift) & 0xffff; shift 194 drivers/mmc/host/sdhci-of-esdhc.c int shift = (spec_reg & 0x3) * 8; shift 196 drivers/mmc/host/sdhci-of-esdhc.c ret = (value >> shift) & 0xff; shift 250 drivers/mmc/host/sdhci-of-esdhc.c int shift = (spec_reg & 0x2) * 8; shift 266 drivers/mmc/host/sdhci-of-esdhc.c ret = old_value & (~(0xffff << shift)); shift 267 drivers/mmc/host/sdhci-of-esdhc.c ret |= (value << shift); shift 286 drivers/mmc/host/sdhci-of-esdhc.c int shift = (spec_reg & 0x3) * 8; shift 318 drivers/mmc/host/sdhci-of-esdhc.c ret = (old_value & (~(0xff << shift))) | (value << shift); shift 62 drivers/mmc/host/sdhci-pltfm.h int shift = (reg & 0x2) * 8; shift 78 drivers/mmc/host/sdhci-pltfm.h clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift); shift 84 drivers/mmc/host/sdhci-pltfm.h int shift = (reg & 0x3) * 8; shift 86 drivers/mmc/host/sdhci-pltfm.h clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift); shift 180 drivers/mmc/host/sdhci-s3c.c int shift; shift 196 drivers/mmc/host/sdhci-s3c.c for (shift = 0; shift <= 8; ++shift) { shift 197 drivers/mmc/host/sdhci-s3c.c if ((rate >> shift) <= wanted) shift 201 drivers/mmc/host/sdhci-s3c.c if (shift > 8) { shift 209 drivers/mmc/host/sdhci-s3c.c src, rate, wanted, rate >> shift); shift 211 drivers/mmc/host/sdhci-s3c.c return wanted - (rate >> shift); shift 141 drivers/mtd/devices/phram.c int shift = 0; shift 150 drivers/mtd/devices/phram.c shift += 10; shift 153 drivers/mtd/devices/phram.c shift += 10; shift 156 drivers/mtd/devices/phram.c shift += 10; shift 166 drivers/mtd/devices/phram.c *num64 <<= shift; shift 626 drivers/mtd/nand/raw/brcmnand/brcmnand.c int shift, u32 val) shift 631 drivers/mtd/nand/raw/brcmnand/brcmnand.c tmp |= val << shift; shift 722 drivers/mtd/nand/raw/brcmnand/brcmnand.c unsigned int shift = 0, bits; shift 738 drivers/mtd/nand/raw/brcmnand/brcmnand.c shift = (cs % 4) * bits; shift 742 drivers/mtd/nand/raw/brcmnand/brcmnand.c shift = (cs % 5) * bits; shift 744 drivers/mtd/nand/raw/brcmnand/brcmnand.c brcmnand_rmw_reg(ctrl, reg, (bits - 1) << shift, shift, val); shift 838 drivers/mtd/nand/raw/brcmnand/brcmnand.c int shift = brcmnand_sector_1k_shift(ctrl); shift 842 drivers/mtd/nand/raw/brcmnand/brcmnand.c if (shift < 0) shift 845 drivers/mtd/nand/raw/brcmnand/brcmnand.c return (nand_readreg(ctrl, acc_control_offs) >> shift) & 0x1; shift 851 drivers/mtd/nand/raw/brcmnand/brcmnand.c int shift = brcmnand_sector_1k_shift(ctrl); shift 856 drivers/mtd/nand/raw/brcmnand/brcmnand.c if (shift < 0) shift 860 drivers/mtd/nand/raw/brcmnand/brcmnand.c tmp &= ~(1 << shift); shift 861 drivers/mtd/nand/raw/brcmnand/brcmnand.c tmp |= (!!val) << shift; shift 104 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V3_CONFIG2_PPB(x, shift) (((x) & 0x3) << shift) shift 88 drivers/mtd/nand/raw/txx9ndfmc.c return drvdata->base + (reg << plat->shift); shift 194 drivers/mtd/nand/raw/vf610_nfc.c u32 mask, u32 shift, u32 val) shift 197 drivers/mtd/nand/raw/vf610_nfc.c (vf610_nfc_read(nfc, reg) & (~mask)) | val << shift); shift 1349 drivers/mtd/spi-nor/spi-nor.c int shift = ffs(mask) - 1; shift 1357 drivers/mtd/spi-nor/spi-nor.c pow = ((sr & mask) ^ mask) >> shift; shift 1438 drivers/mtd/spi-nor/spi-nor.c u8 shift = ffs(mask) - 1, pow, val; shift 1482 drivers/mtd/spi-nor/spi-nor.c val = mask - (pow << shift); shift 1518 drivers/mtd/spi-nor/spi-nor.c u8 shift = ffs(mask) - 1, pow, val; shift 1565 drivers/mtd/spi-nor/spi-nor.c val = mask - (pow << shift); shift 3163 drivers/mtd/spi-nor/spi-nor.c u32 shift; shift 3446 drivers/mtd/spi-nor/spi-nor.c half = bfpt.dwords[er->dword] >> er->shift; shift 939 drivers/net/can/grcan.c size_t shift; shift 965 drivers/net/can/grcan.c shift = large->handle - dma->base_handle; shift 967 drivers/net/can/grcan.c large->buf = dma->base_buf + shift; shift 1173 drivers/net/can/grcan.c u32 i, rtr, eff, j, shift; shift 1211 drivers/net/can/grcan.c shift = GRCAN_MSG_DATA_SHIFT(i); shift 1212 drivers/net/can/grcan.c cf->data[i] = (u8)(slot[j] >> shift); shift 1359 drivers/net/can/grcan.c int j, shift; shift 1414 drivers/net/can/grcan.c shift = GRCAN_MSG_DATA_SHIFT(i); shift 1415 drivers/net/can/grcan.c slot[j] |= cf->data[i] << shift; shift 291 drivers/net/dsa/mv88e6xxx/global1_atu.c int shift; shift 297 drivers/net/dsa/mv88e6xxx/global1_atu.c shift = bitmap_weight(&mask, 16); shift 301 drivers/net/dsa/mv88e6xxx/global1_atu.c entry.portvec |= (to_port & mask) << shift; shift 1352 drivers/net/dsa/mv88e6xxx/port.c int shift; shift 1357 drivers/net/dsa/mv88e6xxx/port.c shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_DA_MASK); shift 1361 drivers/net/dsa/mv88e6xxx/port.c shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_SA_MASK); shift 1365 drivers/net/dsa/mv88e6xxx/port.c shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_VTU_MASK); shift 1369 drivers/net/dsa/mv88e6xxx/port.c shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_ETYPE_MASK); shift 1373 drivers/net/dsa/mv88e6xxx/port.c shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_PPPOE_MASK); shift 1377 drivers/net/dsa/mv88e6xxx/port.c shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_VBAS_MASK); shift 1381 drivers/net/dsa/mv88e6xxx/port.c shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_OPT82_MASK); shift 1385 drivers/net/dsa/mv88e6xxx/port.c shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_UDP_MASK); shift 1414 drivers/net/dsa/mv88e6xxx/port.c reg |= (val << shift) & mask; shift 458 drivers/net/dsa/mv88e6xxx/ptp.c chip->tstamp_cc.shift = ptp_ops->cc_shift; shift 717 drivers/net/dsa/qca8k.c int shift = 16 * (i % 2); shift 731 drivers/net/dsa/qca8k.c 0xffff << shift, 1 << shift); shift 368 drivers/net/dsa/sja1105/sja1105_ptp.c .shift = SJA1105_CC_SHIFT, shift 264 drivers/net/ethernet/amd/xgbe/xgbe-ptp.c cc->shift = 0; shift 16 drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c u32 shift, u32 val) shift 22 drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c reg_new = (reg_old & (~msk)) | (val << shift); shift 31 drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift) shift 33 drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c return ((aq_hw_read_reg(aq_hw, addr) & msk) >> shift); shift 31 drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h u32 shift, u32 val); shift 32 drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift); shift 811 drivers/net/ethernet/atheros/alx/main.c int i, vector, idx, shift; shift 817 drivers/net/ethernet/atheros/alx/main.c shift = txq_vec_mapping_shift[i * 2 + 1]; shift 818 drivers/net/ethernet/atheros/alx/main.c tbl[idx] |= vector << shift; shift 5351 drivers/net/ethernet/broadcom/bnx2.c int shift = (i % 8) << 2; shift 5353 drivers/net/ethernet/broadcom/bnx2.c tbl_32 |= (i % (bp->num_rx_rings - 1)) << shift; shift 2096 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c static u32 bnx2x_adv_to_eee(u32 modes, u32 shift) shift 2106 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c return eee_adv << shift; shift 4486 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c u32 shift = BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_SHIFT : shift 4495 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c val1 = (val & mask) >> shift; shift 4504 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c val |= ((val1 << shift) & mask); shift 4524 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c u32 shift = BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_SHIFT : shift 4532 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c val1 = (val & mask) >> shift; shift 4541 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c val |= ((val1 << shift) & mask); shift 4557 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c u32 shift = (engine ? BNX2X_PATH1_LOAD_CNT_SHIFT : shift 4563 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c val = (val & mask) >> shift; shift 15324 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c bp->cyclecounter.shift = 0; shift 2798 drivers/net/ethernet/broadcom/tg3.c u32 status, shift; shift 2806 drivers/net/ethernet/broadcom/tg3.c shift = TG3_APE_GPIO_MSG_SHIFT + 4 * tp->pci_fn; shift 2807 drivers/net/ethernet/broadcom/tg3.c status &= ~(TG3_GPIO_MSG_MASK << shift); shift 2808 drivers/net/ethernet/broadcom/tg3.c status |= (newstat << shift); shift 251 drivers/net/ethernet/cavium/common/cavium_ptp.c cc->shift = 0; shift 148 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c static const int shift[] = { 0, 0, 16, 24 }; shift 183 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c val >>= shift[mc7->width]; shift 234 drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c next[i].shift != cls->knode.sel->offshift || shift 247 drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32_parse.h u32 shift; shift 261 drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32_parse.h { .offset = 0, .offoff = 0, .shift = 6, .mask = 0xF, shift 264 drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32_parse.h { .offset = 0, .offoff = 0, .shift = 6, .mask = 0xF, shift 274 drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32_parse.h { .offset = 0x28, .offoff = 0, .shift = 0, .mask = 0, shift 277 drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32_parse.h { .offset = 0x28, .offoff = 0, .shift = 0, .mask = 0, shift 223 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h unsigned int shift = tformat->idx_bits + tformat->color_bits; shift 225 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h u32 upper = (sw_tag >> shift) << (shift + 1); shift 236 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h unsigned int shift = tformat->idx_bits + tformat->color_bits; shift 238 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h u32 upper = (tag >> tformat->rsvd_bits) << shift; shift 268 drivers/net/ethernet/freescale/fec_ptp.c fep->cc.shift = 31; shift 699 drivers/net/ethernet/hisilicon/hns/hnae.h #define hnae_set_field(origin, mask, shift, val) \ shift 702 drivers/net/ethernet/hisilicon/hns/hnae.h (origin) |= ((val) << (shift)) & (mask); \ shift 705 drivers/net/ethernet/hisilicon/hns/hnae.h #define hnae_set_bit(origin, shift, val) \ shift 706 drivers/net/ethernet/hisilicon/hns/hnae.h hnae_set_field((origin), (0x1 << (shift)), (shift), (val)) shift 708 drivers/net/ethernet/hisilicon/hns/hnae.h #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) shift 710 drivers/net/ethernet/hisilicon/hns/hnae.h #define hnae_get_bit(origin, shift) \ shift 711 drivers/net/ethernet/hisilicon/hns/hnae.h hnae_get_field((origin), (0x1 << (shift)), (shift)) shift 1043 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h #define dsaf_set_field(origin, mask, shift, val) \ shift 1046 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h (origin) |= (((val) << (shift)) & (mask)); \ shift 1049 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h #define dsaf_set_bit(origin, shift, val) \ shift 1050 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h dsaf_set_field((origin), (1ull << (shift)), (shift), (val)) shift 1053 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h u32 shift, u32 val) shift 1057 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h dsaf_set_field(origin, mask, shift, val); shift 1061 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h #define dsaf_set_dev_field(dev, reg, mask, shift, val) \ shift 1062 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h dsaf_set_reg_field((dev)->io_base, (reg), (mask), (shift), (val)) shift 1067 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h #define dsaf_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) shift 1069 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h #define dsaf_get_bit(origin, shift) \ shift 1070 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h dsaf_get_field((origin), (1ull << (shift)), (shift)) shift 1073 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h u32 shift) shift 1078 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h return dsaf_get_field(origin, mask, shift); shift 1081 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h #define dsaf_get_dev_field(dev, reg, mask, shift) \ shift 1082 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h dsaf_get_reg_field((dev)->io_base, (reg), (mask), (shift)) shift 653 drivers/net/ethernet/hisilicon/hns3/hnae3.h #define hnae3_set_field(origin, mask, shift, val) \ shift 656 drivers/net/ethernet/hisilicon/hns3/hnae3.h (origin) |= ((val) << (shift)) & (mask); \ shift 658 drivers/net/ethernet/hisilicon/hns3/hnae3.h #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) shift 660 drivers/net/ethernet/hisilicon/hns3/hnae3.h #define hnae3_set_bit(origin, shift, val) \ shift 661 drivers/net/ethernet/hisilicon/hns3/hnae3.h hnae3_set_field((origin), (0x1 << (shift)), (shift), (val)) shift 662 drivers/net/ethernet/hisilicon/hns3/hnae3.h #define hnae3_get_bit(origin, shift) \ shift 663 drivers/net/ethernet/hisilicon/hns3/hnae3.h hnae3_get_field((origin), (0x1 << (shift)), (shift)) shift 28 drivers/net/ethernet/hisilicon/hns3/hns3_enet.c #define hns3_set_field(origin, shift, val) ((origin) |= ((val) << (shift))) shift 108 drivers/net/ethernet/hisilicon/hns_mdio.c #define mdio_set_field(origin, mask, shift, val) \ shift 110 drivers/net/ethernet/hisilicon/hns_mdio.c (origin) &= (~((mask) << (shift))); \ shift 111 drivers/net/ethernet/hisilicon/hns_mdio.c (origin) |= (((val) & (mask)) << (shift)); \ shift 114 drivers/net/ethernet/hisilicon/hns_mdio.c #define mdio_get_field(origin, mask, shift) (((origin) >> (shift)) & (mask)) shift 116 drivers/net/ethernet/hisilicon/hns_mdio.c static void mdio_set_reg_field(u8 __iomem *base, u32 reg, u32 mask, u32 shift, shift 121 drivers/net/ethernet/hisilicon/hns_mdio.c mdio_set_field(origin, mask, shift, val); shift 125 drivers/net/ethernet/hisilicon/hns_mdio.c #define MDIO_SET_REG_FIELD(dev, reg, mask, shift, val) \ shift 126 drivers/net/ethernet/hisilicon/hns_mdio.c mdio_set_reg_field((dev)->vbase, (reg), (mask), (shift), (val)) shift 128 drivers/net/ethernet/hisilicon/hns_mdio.c static u32 mdio_get_reg_field(u8 __iomem *base, u32 reg, u32 mask, u32 shift) shift 133 drivers/net/ethernet/hisilicon/hns_mdio.c return mdio_get_field(origin, mask, shift); shift 136 drivers/net/ethernet/hisilicon/hns_mdio.c #define MDIO_GET_REG_FIELD(dev, reg, mask, shift) \ shift 137 drivers/net/ethernet/hisilicon/hns_mdio.c mdio_get_reg_field((dev)->vbase, (reg), (mask), (shift)) shift 255 drivers/net/ethernet/ibm/ibmvnic.c int shift = 0; shift 305 drivers/net/ethernet/ibm/ibmvnic.c shift = 8; shift 307 drivers/net/ethernet/ibm/ibmvnic.c sub_crq.rx_add.len = cpu_to_be32(pool->buff_size << shift); shift 4553 drivers/net/ethernet/intel/e1000e/ich8lan.c u16 data, i, temp, shift; shift 4566 drivers/net/ethernet/intel/e1000e/ich8lan.c shift = (i * 5); shift 4571 drivers/net/ethernet/intel/e1000e/ich8lan.c mac->ledctl_mode1 &= ~(E1000_PHY_LED0_MASK << shift); shift 4572 drivers/net/ethernet/intel/e1000e/ich8lan.c mac->ledctl_mode1 |= (ledctl_on << shift); shift 4577 drivers/net/ethernet/intel/e1000e/ich8lan.c mac->ledctl_mode1 &= ~(E1000_PHY_LED0_MASK << shift); shift 4578 drivers/net/ethernet/intel/e1000e/ich8lan.c mac->ledctl_mode1 |= (ledctl_off << shift); shift 4588 drivers/net/ethernet/intel/e1000e/ich8lan.c mac->ledctl_mode2 &= ~(E1000_PHY_LED0_MASK << shift); shift 4589 drivers/net/ethernet/intel/e1000e/ich8lan.c mac->ledctl_mode2 |= (ledctl_on << shift); shift 4594 drivers/net/ethernet/intel/e1000e/ich8lan.c mac->ledctl_mode2 &= ~(E1000_PHY_LED0_MASK << shift); shift 4595 drivers/net/ethernet/intel/e1000e/ich8lan.c mac->ledctl_mode2 |= (ledctl_off << shift); shift 3491 drivers/net/ethernet/intel/e1000e/netdev.c u32 incvalue, incperiod, shift; shift 3512 drivers/net/ethernet/intel/e1000e/netdev.c shift = INCVALUE_SHIFT_96MHZ; shift 3513 drivers/net/ethernet/intel/e1000e/netdev.c adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ; shift 3520 drivers/net/ethernet/intel/e1000e/netdev.c shift = INCVALUE_SHIFT_96MHZ; shift 3521 drivers/net/ethernet/intel/e1000e/netdev.c adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ; shift 3526 drivers/net/ethernet/intel/e1000e/netdev.c shift = INCVALUE_SHIFT_25MHZ; shift 3527 drivers/net/ethernet/intel/e1000e/netdev.c adapter->cc.shift = shift; shift 3534 drivers/net/ethernet/intel/e1000e/netdev.c shift = INCVALUE_SHIFT_24MHZ; shift 3535 drivers/net/ethernet/intel/e1000e/netdev.c adapter->cc.shift = shift; shift 3542 drivers/net/ethernet/intel/e1000e/netdev.c shift = INCVALUE_SHIFT_24MHZ; shift 3543 drivers/net/ethernet/intel/e1000e/netdev.c adapter->cc.shift = shift; shift 3548 drivers/net/ethernet/intel/e1000e/netdev.c shift = INCVALUE_SHIFT_38400KHZ; shift 3549 drivers/net/ethernet/intel/e1000e/netdev.c adapter->cc.shift = shift; shift 3557 drivers/net/ethernet/intel/e1000e/netdev.c shift = INCVALUE_SHIFT_25MHZ; shift 3558 drivers/net/ethernet/intel/e1000e/netdev.c adapter->cc.shift = shift; shift 3565 drivers/net/ethernet/intel/e1000e/netdev.c ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK)); shift 16 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_MASK(mask, shift) ((u32)(mask) << (shift)) shift 16 drivers/net/ethernet/intel/iavf/iavf_type.h #define IAVF_MASK(mask, shift) ((u32)(mask) << (shift)) shift 3313 drivers/net/ethernet/intel/igb/igb_ethtool.c u32 shift = 0; shift 3318 drivers/net/ethernet/intel/igb/igb_ethtool.c shift = 6; shift 3323 drivers/net/ethernet/intel/igb/igb_ethtool.c shift = 3; shift 3338 drivers/net/ethernet/intel/igb/igb_ethtool.c wr32(reg, val << shift); shift 1197 drivers/net/ethernet/intel/igb/igb_ptp.c adapter->cc.shift = IGB_82576_TSYNC_SHIFT; shift 1216 drivers/net/ethernet/intel/igb/igb_ptp.c adapter->cc.shift = 0; shift 1480 drivers/net/ethernet/intel/igc/igc_ethtool.c u32 shift = 0; shift 1492 drivers/net/ethernet/intel/igc/igc_ethtool.c wr32(reg, val << shift); shift 190 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c clock_period = div_u64((NS_PER_HALF_SEC << cc->shift), cc->mult); shift 209 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c clock_edge += div_u64(((u64)rem << cc->shift), cc->mult); shift 275 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c freqout = div_u64(NS_PER_HALF_SEC << cc->shift, cc->mult); shift 292 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c clock_edge += div_u64(((u64)rem << cc->shift), cc->mult); shift 1165 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c u32 *shift, u32 *incval) shift 1183 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c *shift = IXGBE_INCVAL_SHIFT_100; shift 1187 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c *shift = IXGBE_INCVAL_SHIFT_1GB; shift 1192 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c *shift = IXGBE_INCVAL_SHIFT_10GB; shift 1230 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c cc.shift = 0; shift 1243 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c cc.shift = 2; shift 1265 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c ixgbe_ptp_link_speed_adjust(adapter, &cc.shift, &incval); shift 1271 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c ixgbe_ptp_link_speed_adjust(adapter, &cc.shift, &incval); shift 1273 drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c cc.shift -= IXGBE_INCVAL_SHIFT_82599; shift 303 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c static void mvpp2_prs_sram_shift_set(struct mvpp2_prs_entry *pe, int shift, shift 307 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c if (shift < 0) { shift 309 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift = 0 - shift; shift 316 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift & MVPP2_PRS_SRAM_SHIFT_MASK; shift 501 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c int tid, shift; shift 505 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift = 8; shift 508 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift = 4; shift 544 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_sram_shift_set(&pe, shift, shift 568 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c int tid, shift, port_mask; shift 574 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift = 8; shift 579 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift = 4; shift 598 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_sram_shift_set(&pe, 2 + MVPP2_ETH_TYPE_LEN + shift, shift 1945 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c unsigned int mask = 0xfff, reg_val, shift; shift 1957 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift = MVPP2_VLAN_TAG_EDSA_LEN; shift 1959 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift = MVPP2_VLAN_TAG_LEN; shift 1989 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_sram_shift_set(&pe, shift, MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD); shift 2053 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c unsigned int reg_val, shift; shift 2065 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift = MVPP2_VLAN_TAG_EDSA_LEN; shift 2067 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c shift = MVPP2_VLAN_TAG_LEN; shift 2081 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_sram_shift_set(&pe, shift, MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD); shift 532 drivers/net/ethernet/marvell/octeontx2/af/mbox.h #define TXSCHQ_IDX(reg, shift) (((reg) >> (shift)) & TXSCHQ_IDX_MASK) shift 133 drivers/net/ethernet/marvell/octeontx2/af/npc.h u8 shift; shift 872 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c action0.var_len_shift = kpuaction->shift; shift 145 drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h u64 shift : 6; shift 169 drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h u64 shift : 6; shift 297 drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h u64 shift : 6; shift 303 drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h u64 shift : 6; shift 280 drivers/net/ethernet/mellanox/mlx4/en_clock.c mdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock); shift 282 drivers/net/ethernet/mellanox/mlx4/en_clock.c clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift); shift 335 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c cycles_delta = div64_u64(nsec_delta << clock->cycles.shift, shift 501 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c cycles_delta = div64_u64(nsec_delta << clock->cycles.shift, shift 530 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.shift = MLX5_CYCLES_SHIFT; shift 532 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.shift); shift 562 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mdev->clock_info->shift = clock->cycles.shift; shift 58 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h .shift = _shift, \ shift 123 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h .shift = _shift, \ shift 209 drivers/net/ethernet/mellanox/mlxsw/core_thermal.c unsigned int score, delta, i, shift = 1; shift 219 drivers/net/ethernet/mellanox/mlxsw/core_thermal.c score = delta * shift; shift 222 drivers/net/ethernet/mellanox/mlxsw/core_thermal.c shift *= 256; shift 15 drivers/net/ethernet/mellanox/mlxsw/item.h unsigned char shift; /* shift in bits */ shift 52 drivers/net/ethernet/mellanox/mlxsw/item.h tmp >>= item->shift; shift 55 drivers/net/ethernet/mellanox/mlxsw/item.h tmp <<= item->shift; shift 65 drivers/net/ethernet/mellanox/mlxsw/item.h u8 mask = GENMASK(item->size.bits - 1, 0) << item->shift; shift 69 drivers/net/ethernet/mellanox/mlxsw/item.h val <<= item->shift; shift 86 drivers/net/ethernet/mellanox/mlxsw/item.h tmp >>= item->shift; shift 89 drivers/net/ethernet/mellanox/mlxsw/item.h tmp <<= item->shift; shift 99 drivers/net/ethernet/mellanox/mlxsw/item.h u16 mask = GENMASK(item->size.bits - 1, 0) << item->shift; shift 103 drivers/net/ethernet/mellanox/mlxsw/item.h val <<= item->shift; shift 120 drivers/net/ethernet/mellanox/mlxsw/item.h tmp >>= item->shift; shift 123 drivers/net/ethernet/mellanox/mlxsw/item.h tmp <<= item->shift; shift 133 drivers/net/ethernet/mellanox/mlxsw/item.h u32 mask = GENMASK(item->size.bits - 1, 0) << item->shift; shift 137 drivers/net/ethernet/mellanox/mlxsw/item.h val <<= item->shift; shift 154 drivers/net/ethernet/mellanox/mlxsw/item.h tmp >>= item->shift; shift 157 drivers/net/ethernet/mellanox/mlxsw/item.h tmp <<= item->shift; shift 166 drivers/net/ethernet/mellanox/mlxsw/item.h u64 mask = GENMASK_ULL(item->size.bits - 1, 0) << item->shift; shift 170 drivers/net/ethernet/mellanox/mlxsw/item.h val <<= item->shift; shift 206 drivers/net/ethernet/mellanox/mlxsw/item.h u16 index, u8 *shift) shift 224 drivers/net/ethernet/mellanox/mlxsw/item.h *shift = in_byte_index * item->element_size; shift 233 drivers/net/ethernet/mellanox/mlxsw/item.h u8 shift, tmp; shift 234 drivers/net/ethernet/mellanox/mlxsw/item.h u16 offset = __mlxsw_item_bit_array_offset(item, index, &shift); shift 237 drivers/net/ethernet/mellanox/mlxsw/item.h tmp >>= shift; shift 246 drivers/net/ethernet/mellanox/mlxsw/item.h u8 shift, tmp; shift 247 drivers/net/ethernet/mellanox/mlxsw/item.h u16 offset = __mlxsw_item_bit_array_offset(item, index, &shift); shift 248 drivers/net/ethernet/mellanox/mlxsw/item.h u8 mask = GENMASK(item->element_size - 1, 0) << shift; shift 250 drivers/net/ethernet/mellanox/mlxsw/item.h val <<= shift; shift 269 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ shift 288 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ shift 310 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ shift 329 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ shift 351 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ shift 370 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ shift 392 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ shift 411 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ shift 260 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c .shift = _shift, \ shift 118 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c cycles <<= tc->cc->shift; shift 263 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->cycles.shift = MLXSW_SP1_PTP_CLOCK_CYCLES_SHIFT; shift 265 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->cycles.shift); shift 1983 drivers/net/ethernet/micrel/ksz884x.c static int port_chk_shift(struct ksz_hw *hw, int port, u32 addr, int shift) shift 1989 drivers/net/ethernet/micrel/ksz884x.c data >>= shift; shift 2003 drivers/net/ethernet/micrel/ksz884x.c static void port_cfg_shift(struct ksz_hw *hw, int port, u32 addr, int shift, shift 2010 drivers/net/ethernet/micrel/ksz884x.c bits <<= shift; shift 3805 drivers/net/ethernet/micrel/ksz884x.c int shift; shift 3807 drivers/net/ethernet/micrel/ksz884x.c shift = 0; shift 3809 drivers/net/ethernet/micrel/ksz884x.c shift++; shift 3812 drivers/net/ethernet/micrel/ksz884x.c if (alloc != 1 || shift < MIN_DESC_SHIFT) { shift 3815 drivers/net/ethernet/micrel/ksz884x.c shift++; shift 3818 drivers/net/ethernet/micrel/ksz884x.c if (shift < MIN_DESC_SHIFT) shift 3819 drivers/net/ethernet/micrel/ksz884x.c shift = MIN_DESC_SHIFT; shift 3820 drivers/net/ethernet/micrel/ksz884x.c alloc = 1 << shift; shift 274 drivers/net/ethernet/netronome/nfp/bpf/jit.c enum immed_shift shift, bool wr_both, shift 285 drivers/net/ethernet/netronome/nfp/bpf/jit.c FIELD_PREP(OP_IMMED_SHIFT, shift) | shift 295 drivers/net/ethernet/netronome/nfp/bpf/jit.c enum immed_width width, bool invert, enum immed_shift shift) shift 314 drivers/net/ethernet/netronome/nfp/bpf/jit.c reg.breg, imm >> 8, width, invert, shift, shift 320 drivers/net/ethernet/netronome/nfp/bpf/jit.c enum shf_sc sc, u8 shift, shift 326 drivers/net/ethernet/netronome/nfp/bpf/jit.c if (!FIELD_FIT(OP_SHF_SHIFT, shift)) { shift 342 drivers/net/ethernet/netronome/nfp/bpf/jit.c if (sc == SHF_SC_L_SHF && shift) shift 343 drivers/net/ethernet/netronome/nfp/bpf/jit.c shift = 32 - shift; shift 352 drivers/net/ethernet/netronome/nfp/bpf/jit.c FIELD_PREP(OP_SHF_SHIFT, shift) | shift 364 drivers/net/ethernet/netronome/nfp/bpf/jit.c swreg lreg, enum shf_op op, swreg rreg, enum shf_sc sc, u8 shift) shift 375 drivers/net/ethernet/netronome/nfp/bpf/jit.c __emit_shf(nfp_prog, reg.dst, reg.dst_ab, sc, shift, shift 488 drivers/net/ethernet/netronome/nfp/bpf/jit.c u8 areg, u8 bmask, u8 breg, u8 shift, bool imm8, shift 502 drivers/net/ethernet/netronome/nfp/bpf/jit.c FIELD_PREP(OP_LDF_SHF, shift) | shift 512 drivers/net/ethernet/netronome/nfp/bpf/jit.c enum shf_sc sc, u8 shift, bool zero) shift 524 drivers/net/ethernet/netronome/nfp/bpf/jit.c __emit_ld_field(nfp_prog, sc, reg.areg, bmask, reg.breg, shift, shift 531 drivers/net/ethernet/netronome/nfp/bpf/jit.c enum shf_sc sc, u8 shift) shift 533 drivers/net/ethernet/netronome/nfp/bpf/jit.c emit_ld_field_any(nfp_prog, dst, bmask, src, sc, shift, false); shift 590 drivers/net/ethernet/netronome/nfp/bpf/jit.c static bool pack_immed(u32 imm, u16 *val, enum immed_shift *shift) shift 594 drivers/net/ethernet/netronome/nfp/bpf/jit.c *shift = IMMED_SHIFT_0B; shift 597 drivers/net/ethernet/netronome/nfp/bpf/jit.c *shift = IMMED_SHIFT_1B; shift 600 drivers/net/ethernet/netronome/nfp/bpf/jit.c *shift = IMMED_SHIFT_2B; shift 610 drivers/net/ethernet/netronome/nfp/bpf/jit.c enum immed_shift shift; shift 613 drivers/net/ethernet/netronome/nfp/bpf/jit.c if (pack_immed(imm, &val, &shift)) { shift 614 drivers/net/ethernet/netronome/nfp/bpf/jit.c emit_immed(nfp_prog, dst, val, IMMED_WIDTH_ALL, false, shift); shift 615 drivers/net/ethernet/netronome/nfp/bpf/jit.c } else if (pack_immed(~imm, &val, &shift)) { shift 616 drivers/net/ethernet/netronome/nfp/bpf/jit.c emit_immed(nfp_prog, dst, val, IMMED_WIDTH_ALL, true, shift); shift 872 drivers/net/ethernet/netronome/nfp/bpf/jit.c u16 shift, sz; shift 878 drivers/net/ethernet/netronome/nfp/bpf/jit.c shift = size < 4 ? 4 - size : 0; shift 884 drivers/net/ethernet/netronome/nfp/bpf/jit.c if (shift) shift 886 drivers/net/ethernet/netronome/nfp/bpf/jit.c reg_xfer(0), SHF_SC_R_SHF, shift * 8); shift 463 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c const u64 mask, const unsigned int shift, shift 481 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c if (val == (reg & mask) >> shift) shift 485 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c reg |= (val << shift) & mask; shift 259 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c int change, shift, err; shift 265 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c shift = NXRD32(adapter, CRB_DMA_SHIFT); shift 266 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c if (shift > 32) shift 269 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c if (NX_IS_REVISION_P3(adapter->ahw.revision_id) && (shift > 9)) shift 271 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c else if ((adapter->ahw.revision_id == NX_P2_C1) && (shift <= 4)) shift 278 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c mask = DMA_BIT_MASK(32+shift); shift 290 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dev_info(&pdev->dev, "using %d-bit dma mask\n", 32+shift); shift 1044 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c u8 shift; shift 1048 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c shift = PRS_REG_ENCAPSULATION_TYPE_EN_VXLAN_ENABLE_SHIFT; shift 1049 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, vxlan_enable); shift 1063 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c shift = NIG_REG_ENC_TYPE_ENABLE_VXLAN_ENABLE_SHIFT; shift 1064 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, vxlan_enable); shift 1077 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c u8 shift; shift 1081 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c shift = PRS_REG_ENCAPSULATION_TYPE_EN_ETH_OVER_GRE_ENABLE_SHIFT; shift 1082 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, eth_gre_enable); shift 1083 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c shift = PRS_REG_ENCAPSULATION_TYPE_EN_IP_OVER_GRE_ENABLE_SHIFT; shift 1084 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, ip_gre_enable); shift 1098 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c shift = NIG_REG_ENC_TYPE_ENABLE_ETH_OVER_GRE_ENABLE_SHIFT; shift 1099 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, eth_gre_enable); shift 1100 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c shift = NIG_REG_ENC_TYPE_ENABLE_IP_OVER_GRE_ENABLE_SHIFT; shift 1101 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, ip_gre_enable); shift 1130 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c u8 shift; shift 1134 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c shift = PRS_REG_ENCAPSULATION_TYPE_EN_ETH_OVER_GENEVE_ENABLE_SHIFT; shift 1135 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, eth_geneve_enable); shift 1136 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c shift = PRS_REG_ENCAPSULATION_TYPE_EN_IP_OVER_GENEVE_ENABLE_SHIFT; shift 1137 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, ip_geneve_enable); shift 454 drivers/net/ethernet/qlogic/qede/qede_ptp.c ptp->cc.shift = 0; shift 146 drivers/net/ethernet/smsc/smsc911x.c #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift)) shift 2392 drivers/net/ethernet/smsc/smsc911x.c device_property_read_u32(dev, "reg-shift", &config->shift); shift 2497 drivers/net/ethernet/smsc/smsc911x.c if (pdata->config.shift) shift 146 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c clk_configs->m250_mux.shift = PRG_ETH0_CLK_M250_SEL_SHIFT; shift 156 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c clk_configs->m250_div.shift = PRG_ETH0_CLK_M250_DIV_SHIFT; shift 68 drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c #define HIWORD_UPDATE(val, mask, shift) \ shift 69 drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ((val) << (shift) | (mask) << ((shift) + 16)) shift 340 drivers/net/ethernet/sun/sunbmac.c int shift = 4; shift 343 drivers/net/ethernet/sun/sunbmac.c write_tcvr_bit(bp, tregs, ((byte >> shift) & 1)); shift 344 drivers/net/ethernet/sun/sunbmac.c shift -= 1; shift 345 drivers/net/ethernet/sun/sunbmac.c } while (shift >= 0); shift 351 drivers/net/ethernet/sun/sunbmac.c int shift; shift 380 drivers/net/ethernet/sun/sunbmac.c shift = 15; shift 382 drivers/net/ethernet/sun/sunbmac.c write_tcvr_bit(bp, tregs, (val >> shift) & 1); shift 383 drivers/net/ethernet/sun/sunbmac.c shift -= 1; shift 384 drivers/net/ethernet/sun/sunbmac.c } while (shift >= 0); shift 417 drivers/net/ethernet/sun/sunbmac.c int shift = 15; shift 426 drivers/net/ethernet/sun/sunbmac.c retval |= ((tmp & 1) << shift); shift 427 drivers/net/ethernet/sun/sunbmac.c shift -= 1; shift 428 drivers/net/ethernet/sun/sunbmac.c } while (shift >= 0); shift 434 drivers/net/ethernet/sun/sunbmac.c int shift = 15; shift 443 drivers/net/ethernet/sun/sunbmac.c retval |= ((tmp & 1) << shift); shift 444 drivers/net/ethernet/sun/sunbmac.c shift -= 1; shift 445 drivers/net/ethernet/sun/sunbmac.c } while (shift >= 0); shift 1028 drivers/net/ethernet/ti/cpsw.c u32 shift, mask, val; shift 1033 drivers/net/ethernet/ti/cpsw.c shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num; shift 1034 drivers/net/ethernet/ti/cpsw.c mask = 7 << shift; shift 1044 drivers/net/ethernet/ti/cpsw.c u32 shift, mask, val; shift 1049 drivers/net/ethernet/ti/cpsw.c shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num; shift 1050 drivers/net/ethernet/ti/cpsw.c mask = (1 << --fifo) << shift; shift 1424 drivers/net/ethernet/ti/cpsw.c u32 val = 0, send_pct, shift; shift 1450 drivers/net/ethernet/ti/cpsw.c shift = (i - 1) * 8; shift 1452 drivers/net/ethernet/ti/cpsw.c send_pct &= ~(CPSW_PCT_MASK << shift); shift 1457 drivers/net/ethernet/ti/cpsw.c send_pct |= val << shift; shift 1463 drivers/net/ethernet/ti/cpsw.c pct += (send_pct >> shift) & CPSW_PCT_MASK; shift 510 drivers/net/ethernet/ti/cpsw_ale.c int shift, port_shift; shift 519 drivers/net/ethernet/ti/cpsw_ale.c .shift = 31, shift 527 drivers/net/ethernet/ti/cpsw_ale.c .shift = 30, shift 535 drivers/net/ethernet/ti/cpsw_ale.c .shift = 29, shift 543 drivers/net/ethernet/ti/cpsw_ale.c .shift = 8, shift 551 drivers/net/ethernet/ti/cpsw_ale.c .shift = 7, shift 559 drivers/net/ethernet/ti/cpsw_ale.c .shift = 6, shift 567 drivers/net/ethernet/ti/cpsw_ale.c .shift = 5, shift 575 drivers/net/ethernet/ti/cpsw_ale.c .shift = 4, shift 583 drivers/net/ethernet/ti/cpsw_ale.c .shift = 3, shift 591 drivers/net/ethernet/ti/cpsw_ale.c .shift = 2, shift 599 drivers/net/ethernet/ti/cpsw_ale.c .shift = 1, shift 607 drivers/net/ethernet/ti/cpsw_ale.c .shift = 0, shift 615 drivers/net/ethernet/ti/cpsw_ale.c .shift = 0, shift 623 drivers/net/ethernet/ti/cpsw_ale.c .shift = 2, shift 631 drivers/net/ethernet/ti/cpsw_ale.c .shift = 3, shift 639 drivers/net/ethernet/ti/cpsw_ale.c .shift = 4, shift 647 drivers/net/ethernet/ti/cpsw_ale.c .shift = 5, shift 655 drivers/net/ethernet/ti/cpsw_ale.c .shift = 16, shift 663 drivers/net/ethernet/ti/cpsw_ale.c .shift = 24, shift 671 drivers/net/ethernet/ti/cpsw_ale.c .shift = 0, shift 679 drivers/net/ethernet/ti/cpsw_ale.c .shift = 8, shift 687 drivers/net/ethernet/ti/cpsw_ale.c .shift = 16, shift 695 drivers/net/ethernet/ti/cpsw_ale.c .shift = 24, shift 705 drivers/net/ethernet/ti/cpsw_ale.c int offset, shift; shift 723 drivers/net/ethernet/ti/cpsw_ale.c shift = info->shift + (port * info->port_shift); shift 726 drivers/net/ethernet/ti/cpsw_ale.c tmp = (tmp & ~(mask << shift)) | (value << shift); shift 735 drivers/net/ethernet/ti/cpsw_ale.c int offset, shift; shift 749 drivers/net/ethernet/ti/cpsw_ale.c shift = info->shift + (port * info->port_shift); shift 751 drivers/net/ethernet/ti/cpsw_ale.c tmp = readl_relaxed(ale->params.ale_regs + offset) >> shift; shift 851 drivers/net/ethernet/ti/cpsw_ale.c ale_controls[ALE_PORT_UNKNOWN_MCAST_FLOOD].shift = 0; shift 856 drivers/net/ethernet/ti/cpsw_ale.c ale_controls[ALE_PORT_UNKNOWN_REG_MCAST_FLOOD].shift = 0; shift 861 drivers/net/ethernet/ti/cpsw_ale.c ale_controls[ALE_PORT_UNTAGGED_EGRESS].shift = 0; shift 522 drivers/net/ethernet/ti/cpts.c if (cpts->cc.mult || cpts->cc.shift) shift 525 drivers/net/ethernet/ti/cpts.c clocks_calc_mult_shift(&cpts->cc.mult, &cpts->cc.shift, shift 533 drivers/net/ethernet/ti/cpts.c freq, cpts->cc.mult, cpts->cc.shift, (ns - NSEC_PER_SEC)); shift 621 drivers/net/ethernet/ti/cpts.c cpts->cc.shift = prop; shift 623 drivers/net/ethernet/ti/cpts.c if ((cpts->cc.mult && !cpts->cc.shift) || shift 624 drivers/net/ethernet/ti/cpts.c (!cpts->cc.mult && cpts->cc.shift)) shift 130 drivers/net/ethernet/ti/davinci_cpdma.c u32 shift, mask; shift 324 drivers/net/ethernet/ti/davinci_cpdma.c val &= ~(info->mask << info->shift); shift 325 drivers/net/ethernet/ti/davinci_cpdma.c val |= (value & info->mask) << info->shift; shift 348 drivers/net/ethernet/ti/davinci_cpdma.c ret = (dma_reg_read(ctlr, info->reg) >> info->shift) & info->mask; shift 3500 drivers/net/ethernet/via/via-velocity.c u8 shift = 0; shift 3504 drivers/net/ethernet/via/via-velocity.c shift = 2; shift 3508 drivers/net/ethernet/via/via-velocity.c shift = 4; shift 3512 drivers/net/ethernet/via/via-velocity.c shift = 6; shift 3515 drivers/net/ethernet/via/via-velocity.c *val = (mult << 6) | ((us >> shift) & 0x3f); shift 182 drivers/net/ieee802154/at86rf230.c unsigned int shift, unsigned int *data) shift 188 drivers/net/ieee802154/at86rf230.c *data = (*data & mask) >> shift; shift 196 drivers/net/ieee802154/at86rf230.c unsigned int shift, unsigned int data) shift 205 drivers/net/ieee802154/at86rf230.c ret = regmap_update_bits(lp->regmap, addr, mask, data << shift); shift 151 drivers/net/ieee802154/atusb.c u8 shift, u8 value) shift 165 drivers/net/ieee802154/atusb.c tmp |= (value << shift) & mask; shift 175 drivers/net/ieee802154/atusb.c unsigned int shift) shift 180 drivers/net/ieee802154/atusb.c rc = (rc & mask) >> shift; shift 312 drivers/net/phy/bcm-phy-lib.c u8 shift; shift 355 drivers/net/phy/bcm-phy-lib.c val >>= stat.shift; shift 259 drivers/net/phy/mdio-mux-meson-g12a.c mux->shift = __ffs(PLL_CTL0_SEL); shift 260 drivers/net/phy/mdio-mux-meson-g12a.c mux->mask = PLL_CTL0_SEL >> mux->shift; shift 202 drivers/net/phy/micrel.c int rc, temp, shift; shift 206 drivers/net/phy/micrel.c shift = 14; shift 209 drivers/net/phy/micrel.c shift = 4; shift 221 drivers/net/phy/micrel.c temp &= ~(3 << shift); shift 222 drivers/net/phy/micrel.c temp |= val << shift; shift 1043 drivers/net/usb/r8152.c u8 shift = index & 2; shift 1046 drivers/net/usb/r8152.c byen <<= shift; shift 1051 drivers/net/usb/r8152.c data >>= (shift * 8); shift 1062 drivers/net/usb/r8152.c u8 shift = index & 2; shift 1067 drivers/net/usb/r8152.c byen <<= shift; shift 1068 drivers/net/usb/r8152.c mask <<= (shift * 8); shift 1069 drivers/net/usb/r8152.c data <<= (shift * 8); shift 1082 drivers/net/usb/r8152.c u8 shift = index & 3; shift 1089 drivers/net/usb/r8152.c data >>= (shift * 8); shift 1100 drivers/net/usb/r8152.c u8 shift = index & 3; shift 1105 drivers/net/usb/r8152.c byen <<= shift; shift 1106 drivers/net/usb/r8152.c mask <<= (shift * 8); shift 1107 drivers/net/usb/r8152.c data <<= (shift * 8); shift 304 drivers/net/wireless/ath/ath10k/hw.c .shift = 19, shift 342 drivers/net/wireless/ath/ath10k/hw.h u32 shift; shift 1661 drivers/net/wireless/ath/ath10k/pci.c u32 count, shift; shift 1698 drivers/net/wireless/ath/ath10k/pci.c shift = current_region->start >> 20; shift 1700 drivers/net/wireless/ath/ath10k/pci.c ret = ath10k_pci_set_ram_config(ar, shift); shift 29 drivers/net/wireless/ath/ath9k/eeprom.c u32 shift, u32 val) shift 31 drivers/net/wireless/ath/ath9k/eeprom.c REG_RMW(ah, reg, ((val << shift) & mask), mask); shift 673 drivers/net/wireless/ath/ath9k/eeprom.h u32 shift, u32 val); shift 305 drivers/net/wireless/broadcom/b43/phy_n.c (value << rf_ctrl->shift)); shift 27 drivers/net/wireless/broadcom/b43/tables_nphy.h u8 shift; shift 4388 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c s16 temp, temp1, temp2, qQ, qQ1, qQ2, shift; shift 4417 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c shift = qQ - 4; shift 4419 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c shift = 4 - qQ; shift 4421 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c val = (((index << shift) + (5 * temp) + shift 4422 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c (1 << (scale_factor + shift - 3))) >> (scale_factor + shift 4423 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c shift - 2)); shift 17173 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c u8 shift = 0, val_shift = 0; shift 17339 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 3; shift 17343 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 2; shift 17347 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 8; shift 17351 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 9; shift 17355 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 12; shift 17359 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 0; shift 17363 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 1; shift 17367 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 2; shift 17371 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 4; shift 17375 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 6; shift 17379 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 8; shift 17383 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 9; shift 17387 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 0x0; shift 17391 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 0x0; shift 17395 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c shift = 0x0; shift 17400 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c mod_phy_reg(pi, addr, mask, (value << shift)); shift 98 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s32 qm_shl32(s32 op, int shift) shift 103 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c if (shift > 31) shift 104 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c shift = 31; shift 105 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c else if (shift < -31) shift 106 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c shift = -31; shift 107 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c if (shift >= 0) { shift 108 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c for (i = 0; i < shift; i++) shift 111 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c result = result >> (-shift); shift 123 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s16 qm_shl16(s16 op, int shift) shift 128 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c if (shift > 15) shift 129 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c shift = 15; shift 130 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c else if (shift < -15) shift 131 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c shift = -15; shift 132 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c if (shift > 0) { shift 133 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c for (i = 0; i < shift; i++) shift 136 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c result = result >> (-shift); shift 147 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s16 qm_shr16(s16 op, int shift) shift 149 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c return qm_shl16(op, -shift); shift 21 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s32 qm_shl32(s32 op, int shift); shift 23 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s16 qm_shl16(s16 op, int shift); shift 25 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s16 qm_shr16(s16 op, int shift); shift 172 drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h static inline void brcmu_maskset32(u32 *var, u32 mask, u8 shift, u32 value) shift 174 drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h value = (value << shift) & mask; shift 177 drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h static inline u32 brcmu_maskget32(u32 var, u32 mask, u8 shift) shift 179 drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h return (var & mask) >> shift; shift 181 drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h static inline void brcmu_maskset16(u16 *var, u16 mask, u8 shift, u16 value) shift 183 drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h value = (value << shift) & mask; shift 186 drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h static inline u16 brcmu_maskget16(u16 var, u16 mask, u8 shift) shift 188 drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h return (var & mask) >> shift; shift 1608 drivers/net/wireless/cisco/airo.c u32 shift; shift 1612 drivers/net/wireless/cisco/airo.c shift = (micSeq - context->window) >> 1; shift 1615 drivers/net/wireless/cisco/airo.c if (shift < 32) shift 1616 drivers/net/wireless/cisco/airo.c context->rx >>= shift; shift 702 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c u8 i, shift; shift 707 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c shift = MT_DFS_NUM_ENGINES; shift 710 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c shift = 2 * MT_DFS_NUM_ENGINES; shift 713 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c shift = 0; shift 719 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c radar_specs = &fcc_radar_specs[shift]; shift 722 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c radar_specs = &etsi_radar_specs[shift]; shift 727 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c radar_specs = &jp_w53_radar_specs[shift]; shift 729 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c radar_specs = &jp_w56_radar_specs[shift]; shift 189 drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c int shift = unit ? 8 : 0; shift 192 drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c mt76_set(dev, 0x10130, BIT(0) << shift); shift 196 drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c mt76_set(dev, 0x10130, (BIT(1) | BIT(3) | BIT(4) | BIT(5)) << shift); shift 200 drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c mt76_clear(dev, 0x10130, BIT(2) << shift); shift 50 drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c int shift = unit ? 8 : 0; shift 51 drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c u32 val = (BIT(1) | BIT(3) | BIT(4) | BIT(5)) << shift; shift 54 drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(0) << shift); shift 62 drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c mt76_clear(dev, MT_VEND_ADDR(CFG, 0x130), BIT(2) << shift); shift 111 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h u32 shift:2; shift 175 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h u32 shift:2; shift 249 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h u32 shift:2; shift 311 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h u32 shift:2; shift 5232 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c desc_shift = rx_desc->shift; shift 5314 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c desc_shift = rx_desc->shift; shift 731 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/trx.h u32 shift:2; shift 461 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/trx.h u32 shift:2; shift 75 drivers/net/wireless/realtek/rtlwifi/rtl8192cu/mac.h u32 shift:2; shift 653 drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.h u32 shift:2; shift 1169 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c u8 shift = 0, sec, tx_num; shift 1190 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c shift = 0; shift 1199 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c shift = 8; shift 1208 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c shift = 16; shift 1217 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c shift = 24; shift 1225 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c shift) & 0xff; shift 667 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h u32 shift:2; shift 463 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/trx.h u32 shift:2; shift 883 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c u8 shift = 0, rate_section, tx_num; shift 904 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c shift = 0; shift 914 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c shift = 8; shift 923 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c shift = 16; shift 932 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c shift = 24; shift 939 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c [rate_section] >> shift) & 0xff; shift 576 drivers/net/wireless/realtek/rtlwifi/rtl8723be/trx.h u32 shift:2; shift 2517 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c u8 shift = 0, rate_section, tx_num; shift 2545 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c shift = 0; shift 2559 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c shift = 8; shift 2573 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c shift = 16; shift 2587 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c shift = 24; shift 2595 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c [tx_num][rate_section] >> shift) & 0xff; shift 582 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/trx.h u32 shift:2; shift 2108 drivers/net/wireless/realtek/rtlwifi/wifi.h bool shift; shift 739 drivers/net/wireless/realtek/rtw88/coex.c u32 shift = __ffs(mask); shift 743 drivers/net/wireless/realtek/rtw88/coex.c tmp = (tmp & (~mask)) | ((val << shift) & mask); shift 168 drivers/net/wireless/realtek/rtw88/hci.h u32 shift = __ffs(mask); shift 173 drivers/net/wireless/realtek/rtw88/hci.h ret = (orig & mask) >> shift; shift 181 drivers/net/wireless/realtek/rtw88/hci.h u32 shift = __ffs(mask); shift 188 drivers/net/wireless/realtek/rtw88/hci.h set = (orig & ~mask) | ((data << shift) & mask); shift 195 drivers/net/wireless/realtek/rtw88/hci.h u32 shift; shift 199 drivers/net/wireless/realtek/rtw88/hci.h shift = __ffs(mask); shift 202 drivers/net/wireless/realtek/rtw88/hci.h set = (orig & ~mask) | ((data << shift) & mask); shift 496 drivers/net/wireless/realtek/rtw88/main.h u8 shift; shift 849 drivers/net/wireless/realtek/rtw88/pci.c pkt_stat.shift; shift 698 drivers/net/wireless/realtek/rtw88/phy.c u32 shift; shift 716 drivers/net/wireless/realtek/rtw88/phy.c shift = __ffs(mask); shift 717 drivers/net/wireless/realtek/rtw88/phy.c data = ((old_data) & (~mask)) | (data << shift); shift 843 drivers/net/wireless/realtek/rtw88/rtw8822b.c pkt_stat->shift = GET_RX_DESC_SHIFT(rx_desc); shift 856 drivers/net/wireless/realtek/rtw88/rtw8822b.c hdr = (struct ieee80211_hdr *)(rx_desc + desc_sz + pkt_stat->shift + shift 859 drivers/net/wireless/realtek/rtw88/rtw8822b.c phy_status = rx_desc + desc_sz + pkt_stat->shift; shift 872 drivers/net/wireless/realtek/rtw88/rtw8822b.c u8 rate, rate_idx, pwr_index, shift; shift 878 drivers/net/wireless/realtek/rtw88/rtw8822b.c shift = rate & 0x3; shift 879 drivers/net/wireless/realtek/rtw88/rtw8822b.c phy_pwr_idx |= ((u32)pwr_index << (shift * 8)); shift 880 drivers/net/wireless/realtek/rtw88/rtw8822b.c if (shift == 0x3) { shift 1711 drivers/net/wireless/realtek/rtw88/rtw8822c.c pkt_stat->shift = GET_RX_DESC_SHIFT(rx_desc); shift 1724 drivers/net/wireless/realtek/rtw88/rtw8822c.c hdr = (struct ieee80211_hdr *)(rx_desc + desc_sz + pkt_stat->shift + shift 1727 drivers/net/wireless/realtek/rtw88/rtw8822c.c phy_status = rx_desc + desc_sz + pkt_stat->shift; shift 173 drivers/net/wireless/st/cw1200/txrx.c register unsigned rateid, off, shift, retries; shift 177 drivers/net/wireless/st/cw1200/txrx.c shift = (rateid & 0x07) << 2; /* eq. (rateid % 8) * 4 */ shift 184 drivers/net/wireless/st/cw1200/txrx.c policy->tbl[off] |= __cpu_to_le32(retries << shift); shift 268 drivers/ntb/hw/intel/ntb_hw_gen1.c u64 shift, mask; shift 270 drivers/ntb/hw/intel/ntb_hw_gen1.c shift = ndev->db_vec_shift; shift 271 drivers/ntb/hw/intel/ntb_hw_gen1.c mask = BIT_ULL(shift) - 1; shift 273 drivers/ntb/hw/intel/ntb_hw_gen1.c return mask << (shift * db_vector); shift 342 drivers/parisc/sba_iommu.c unsigned long shift; shift 350 drivers/parisc/sba_iommu.c shift = ioc->ibase >> IOVP_SHIFT; shift 352 drivers/parisc/sba_iommu.c shift = 0; shift 360 drivers/parisc/sba_iommu.c shift, shift 395 drivers/parisc/sba_iommu.c shift, shift 18 drivers/pci/controller/pci-thunder-ecam.c int shift = (where & 3) * 8; shift 21 drivers/pci/controller/pci-thunder-ecam.c v >>= shift; shift 480 drivers/pci/controller/pcie-altera.c u32 shift = 8 * (where & 3); shift 489 drivers/pci/controller/pcie-altera.c data32 = (value & 0xff) << shift; shift 493 drivers/pci/controller/pcie-altera.c data32 = (value & 0xffff) << shift; shift 178 drivers/pci/controller/pcie-rcar.c unsigned int shift = BITS_PER_BYTE * (where & 3); shift 181 drivers/pci/controller/pcie-rcar.c val &= ~(mask << shift); shift 182 drivers/pci/controller/pcie-rcar.c val |= data << shift; shift 188 drivers/pci/controller/pcie-rcar.c unsigned int shift = BITS_PER_BYTE * (where & 3); shift 191 drivers/pci/controller/pcie-rcar.c return val >> shift; shift 303 drivers/pci/controller/pcie-rcar.c unsigned int shift; shift 316 drivers/pci/controller/pcie-rcar.c shift = BITS_PER_BYTE * (where & 3); shift 317 drivers/pci/controller/pcie-rcar.c data &= ~(0xff << shift); shift 318 drivers/pci/controller/pcie-rcar.c data |= ((val & 0xff) << shift); shift 320 drivers/pci/controller/pcie-rcar.c shift = BITS_PER_BYTE * (where & 2); shift 321 drivers/pci/controller/pcie-rcar.c data &= ~(0xffff << shift); shift 322 drivers/pci/controller/pcie-rcar.c data |= ((val & 0xffff) << shift); shift 387 drivers/pci/pci-bridge-emul.c int mask, ret, old, new, shift; shift 399 drivers/pci/pci-bridge-emul.c shift = (where & 0x3) * 8; shift 404 drivers/pci/pci-bridge-emul.c mask = 0xffff << shift; shift 406 drivers/pci/pci-bridge-emul.c mask = 0xff << shift; shift 429 drivers/pci/pci-bridge-emul.c new |= (value << shift) & (behavior[reg / 4].rw & mask); shift 432 drivers/pci/pci-bridge-emul.c new &= ~((value << shift) & (behavior[reg / 4].w1c & mask)); shift 69 drivers/pcmcia/sa11xx_base.h #define MECR_SET(mecr, sock, shift, mask, bs) \ shift 70 drivers/pcmcia/sa11xx_base.h ((mecr)=((mecr)&~(((mask)<<(shift))<<\ shift 72 drivers/pcmcia/sa11xx_base.h (((bs)<<(shift))<<((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT))) shift 74 drivers/pcmcia/sa11xx_base.h #define MECR_GET(mecr, sock, shift, mask) \ shift 76 drivers/pcmcia/sa11xx_base.h (shift))&(mask)) shift 232 drivers/pcmcia/ti113x.h int shift = 0; shift 241 drivers/pcmcia/ti113x.h shift = 1; shift 246 drivers/pcmcia/ti113x.h reg |= shift<<6; /* Favour our socket */ shift 247 drivers/pcmcia/ti113x.h reg |= 1<<shift; /* Socket zoom video on */ shift 252 drivers/pcmcia/ti113x.h reg |= (1^shift)<<6; /* Favour other socket */ shift 253 drivers/pcmcia/ti113x.h reg &= ~(1<<shift); /* Socket zoon video off */ shift 81 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c u32 reg, reg_idx, shift, val; shift 92 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c shift = 8 * reg_idx; shift 96 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c val &= ~(HHA_EVTYPE_NONE << shift); shift 97 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c val |= (type << shift); shift 80 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c u32 reg, reg_idx, shift, val; shift 91 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c shift = 8 * reg_idx; shift 95 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c val &= ~(L3C_EVTYPE_NONE << shift); shift 96 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c val |= (type << shift); shift 290 drivers/perf/qcom_l2_pmu.c u32 shift; shift 293 drivers/perf/qcom_l2_pmu.c shift = L2PMRESR_GROUP_BITS * event_group; shift 294 drivers/perf/qcom_l2_pmu.c field = ((u64)(event_cc & L2PMRESR_GROUP_MASK) << shift); shift 299 drivers/perf/qcom_l2_pmu.c resr_val &= ~(L2PMRESR_GROUP_MASK << shift); shift 62 drivers/phy/broadcom/phy-bcm-cygnus-pcie.c unsigned shift; shift 69 drivers/phy/broadcom/phy-bcm-cygnus-pcie.c shift = PCIE0_PHY_IDDQ_SHIFT; shift 73 drivers/phy/broadcom/phy-bcm-cygnus-pcie.c shift = PCIE1_PHY_IDDQ_SHIFT; shift 84 drivers/phy/broadcom/phy-bcm-cygnus-pcie.c val &= ~BIT(shift); shift 93 drivers/phy/broadcom/phy-bcm-cygnus-pcie.c val |= BIT(shift); shift 39 drivers/phy/hisilicon/phy-histb-combphy.c u32 shift; shift 102 drivers/phy/hisilicon/phy-histb-combphy.c hw_sel << mode->shift); shift 235 drivers/phy/hisilicon/phy-histb-combphy.c mode->shift = vals[1]; shift 23 drivers/phy/rockchip/phy-rockchip-emmc.c #define HIWORD_UPDATE(val, mask, shift) \ shift 24 drivers/phy/rockchip/phy-rockchip-emmc.c ((val) << (shift) | (mask) << ((shift) + 16)) shift 26 drivers/phy/rockchip/phy-rockchip-pcie.c #define HIWORD_UPDATE(val, mask, shift) \ shift 27 drivers/phy/rockchip/phy-rockchip-pcie.c ((val) << (shift) | (mask) << ((shift) + 16)) shift 408 drivers/phy/tegra/xusb-tegra124.c .shift = _shift, \ shift 116 drivers/phy/tegra/xusb-tegra186.c .shift = _shift, \ shift 843 drivers/phy/tegra/xusb-tegra210.c .shift = _shift, \ shift 320 drivers/phy/tegra/xusb.c value &= ~(soc->mask << soc->shift); shift 321 drivers/phy/tegra/xusb.c value |= lane->function << soc->shift; shift 32 drivers/phy/tegra/xusb.h unsigned int shift; shift 232 drivers/pinctrl/actions/pinctrl-owl.c *bit = info->pullctl->shift; shift 239 drivers/pinctrl/actions/pinctrl-owl.c *bit = info->st->shift; shift 18 drivers/pinctrl/actions/pinctrl-owl.h #define MUX_PG(group_name, reg, shift, width) \ shift 26 drivers/pinctrl/actions/pinctrl-owl.h .mfpctl_shift = shift, \ shift 36 drivers/pinctrl/actions/pinctrl-owl.h #define DRV_PG(group_name, reg, shift, width) \ shift 45 drivers/pinctrl/actions/pinctrl-owl.h .drv_shift = shift, \ shift 52 drivers/pinctrl/actions/pinctrl-owl.h #define SR_PG(group_name, reg, shift, width) \ shift 64 drivers/pinctrl/actions/pinctrl-owl.h .sr_shift = shift, \ shift 79 drivers/pinctrl/actions/pinctrl-owl.h .shift = pull_sft, \ shift 90 drivers/pinctrl/actions/pinctrl-owl.h .shift = st_sft, \ shift 175 drivers/pinctrl/actions/pinctrl-owl.h unsigned int shift; shift 187 drivers/pinctrl/actions/pinctrl-owl.h unsigned int shift; shift 49 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c unsigned int shift; shift 134 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c unsigned int shift; shift 157 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c .shift = s, \ shift 491 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c .shift = sh, \ shift 787 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c mux->shift != mux_log[i].mux.shift) shift 821 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c val &= ~(mask << grp->mux.shift); shift 822 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c val |= grp->mux.alt << grp->mux.shift; shift 842 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c grp->mux.offset, grp->mux.shift, grp->mux.alt); shift 863 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c val |= 0x3 << mux->shift; shift 870 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c pin, mux->offset, mux->shift); shift 890 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c val &= ~(0x3 << mux->shift); shift 897 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c pin, mux->offset, mux->shift); shift 931 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c log->mux.shift = j * 4; shift 143 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c unsigned int shift = IPROC_GPIO_SHIFT(gpio); shift 148 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val |= BIT(shift); shift 150 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val &= ~BIT(shift); shift 158 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c unsigned int shift = IPROC_GPIO_SHIFT(gpio); shift 160 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c return !!(readl(chip->base + offset) & BIT(shift)); shift 203 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c unsigned int shift = IPROC_GPIO_SHIFT(gpio); shift 204 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c u32 val = BIT(shift); shift 358 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c unsigned int shift = IPROC_GPIO_SHIFT(gpio); shift 360 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c return !(readl(chip->base + offset) & BIT(shift)); shift 380 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c unsigned int shift = IPROC_GPIO_SHIFT(gpio); shift 382 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c return !!(readl(chip->base + offset) & BIT(shift)); shift 471 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c unsigned int shift; shift 477 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c shift = IPROC_GPIO_SHIFT(gpio); shift 483 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val_1 &= ~BIT(shift); shift 484 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val_2 &= ~BIT(shift); shift 486 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val_1 |= BIT(shift); shift 487 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val_2 &= ~BIT(shift); shift 489 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val_1 &= ~BIT(shift); shift 490 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val_2 |= BIT(shift); shift 517 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c unsigned int shift; shift 523 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c shift = IPROC_GPIO_SHIFT(gpio); shift 525 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val_1 = readl(base + IPROC_GPIO_PULL_UP_OFFSET) & BIT(shift); shift 526 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val_2 = readl(base + IPROC_GPIO_PULL_DN_OFFSET) & BIT(shift); shift 548 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c unsigned int i, offset, shift; shift 562 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c shift = IPROC_GPIO_SHIFT(gpio); shift 572 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val &= ~BIT(shift); shift 573 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val |= ((strength >> i) & 0x1) << shift; shift 585 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c unsigned int i, offset, shift; shift 595 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c shift = IPROC_GPIO_SHIFT(gpio); shift 601 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val = readl(base + offset) & BIT(shift); shift 602 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c val >>= shift; shift 59 drivers/pinctrl/bcm/pinctrl-ns2-mux.c unsigned int shift; shift 380 drivers/pinctrl/bcm/pinctrl-ns2-mux.c .shift = sh, \ shift 583 drivers/pinctrl/bcm/pinctrl-ns2-mux.c if ((mux->shift != mux_log[i].mux.shift) || shift 628 drivers/pinctrl/bcm/pinctrl-ns2-mux.c val &= ~(mask << grp->mux.shift); shift 629 drivers/pinctrl/bcm/pinctrl-ns2-mux.c val |= grp->mux.alt << grp->mux.shift; shift 654 drivers/pinctrl/bcm/pinctrl-ns2-mux.c grp->mux.offset, grp->mux.shift, grp->mux.alt); shift 999 drivers/pinctrl/bcm/pinctrl-ns2-mux.c log->mux.shift = 31; shift 1011 drivers/pinctrl/bcm/pinctrl-ns2-mux.c log->mux.shift = 32 - (i * 2); shift 1023 drivers/pinctrl/bcm/pinctrl-ns2-mux.c log->mux.shift = i; shift 393 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c u32 offset, shift, i; shift 401 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c shift = gpio; shift 409 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c val &= ~BIT(shift); shift 410 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c val |= ((strength >> (i-1)) & 0x1) << shift; shift 422 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c unsigned int offset, shift; shift 428 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c shift = gpio; shift 433 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c val = readl(chip->io_ctrl + offset) & BIT(shift); shift 434 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c val >>= shift; shift 54 drivers/pinctrl/bcm/pinctrl-nsp-mux.c unsigned int shift; shift 234 drivers/pinctrl/bcm/pinctrl-nsp-mux.c .shift = sh, \ shift 400 drivers/pinctrl/bcm/pinctrl-nsp-mux.c if ((mux->shift != mux_log[i].mux.shift) || shift 448 drivers/pinctrl/bcm/pinctrl-nsp-mux.c val &= ~(mask << grp->mux.shift); shift 449 drivers/pinctrl/bcm/pinctrl-nsp-mux.c val |= grp->mux.alt << grp->mux.shift; shift 473 drivers/pinctrl/bcm/pinctrl-nsp-mux.c dev_dbg(pctrl_dev->dev, "shift:%u alt:%u\n", grp->mux.shift, shift 551 drivers/pinctrl/bcm/pinctrl-nsp-mux.c log->mux.shift = nsp_pin_groups[i].mux.shift; shift 53 drivers/pinctrl/cirrus/pinctrl-lochnagar.c .shift = LOCHNAGAR##REV##_##SHIFT##_SHIFT, .invert = INVERT, \ shift 196 drivers/pinctrl/cirrus/pinctrl-lochnagar.c int shift; shift 1082 drivers/pinctrl/cirrus/pinctrl-lochnagar.c BIT(pin->shift), value << pin->shift); shift 211 drivers/pinctrl/freescale/pinctrl-imx.c u8 shift = (val >> 16) & 0xff; shift 212 drivers/pinctrl/freescale/pinctrl-imx.c u32 mask = ((1 << width) - 1) << shift; shift 219 drivers/pinctrl/freescale/pinctrl-imx.c val |= select << shift; shift 314 drivers/pinctrl/freescale/pinctrl-imx.c raw_config |= (param_val << decode->shift) shift 74 drivers/pinctrl/freescale/pinctrl-imx.h u8 shift; shift 119 drivers/pinctrl/freescale/pinctrl-imx.h { .param = p, .mask = m, .shift = o, .invert = false, } shift 122 drivers/pinctrl/freescale/pinctrl-imx.h { .param = p, .mask = m, .shift = o, .invert = true, } shift 190 drivers/pinctrl/freescale/pinctrl-mxs.c static void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, void __iomem *reg) shift 195 drivers/pinctrl/freescale/pinctrl-mxs.c tmp &= ~(mask << shift); shift 196 drivers/pinctrl/freescale/pinctrl-mxs.c tmp |= value << shift; shift 206 drivers/pinctrl/freescale/pinctrl-mxs.c u8 bank, shift; shift 215 drivers/pinctrl/freescale/pinctrl-mxs.c shift = pin % 16 * 2; shift 217 drivers/pinctrl/freescale/pinctrl-mxs.c mxs_pinctrl_rmwl(g->muxsel[i], 0x3, shift, reg); shift 260 drivers/pinctrl/freescale/pinctrl-mxs.c u8 ma, vol, pull, bank, shift; shift 283 drivers/pinctrl/freescale/pinctrl-mxs.c shift = pin % 8 * 4; shift 284 drivers/pinctrl/freescale/pinctrl-mxs.c mxs_pinctrl_rmwl(ma, 0x3, shift, reg); shift 289 drivers/pinctrl/freescale/pinctrl-mxs.c shift = pin % 8 * 4 + 2; shift 291 drivers/pinctrl/freescale/pinctrl-mxs.c writel(1 << shift, reg + SET); shift 293 drivers/pinctrl/freescale/pinctrl-mxs.c writel(1 << shift, reg + CLR); shift 300 drivers/pinctrl/freescale/pinctrl-mxs.c shift = pin; shift 302 drivers/pinctrl/freescale/pinctrl-mxs.c writel(1 << shift, reg + SET); shift 304 drivers/pinctrl/freescale/pinctrl-mxs.c writel(1 << shift, reg + CLR); shift 200 drivers/pinctrl/mediatek/mtk-eint.c int shift = d->hwirq & 0x1f; shift 204 drivers/pinctrl/mediatek/mtk-eint.c eint->wake_mask[reg] |= BIT(shift); shift 206 drivers/pinctrl/mediatek/mtk-eint.c eint->wake_mask[reg] &= ~BIT(shift); shift 199 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int bits, mask, shift; shift 215 drivers/pinctrl/mediatek/pinctrl-mtk-common.c shift = pin_drv->bit + drv_grp->low_bit; shift 216 drivers/pinctrl/mediatek/pinctrl-mtk-common.c mask <<= shift; shift 217 drivers/pinctrl/mediatek/pinctrl-mtk-common.c val <<= shift; shift 50 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c int shift; shift 52 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c shift = pin - bank->first; shift 54 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c *reg = bank->reg + (bank->offset + (shift << 2)) / 32; shift 55 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c *offset = (bank->offset + (shift << 2)) % 32; shift 67 drivers/pinctrl/mvebu/pinctrl-dove.c unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; shift 75 drivers/pinctrl/mvebu/pinctrl-dove.c *config = (func >> shift) & MVEBU_MPP_MASK; shift 85 drivers/pinctrl/mvebu/pinctrl-dove.c unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; shift 96 drivers/pinctrl/mvebu/pinctrl-dove.c func &= ~(MVEBU_MPP_MASK << shift); shift 97 drivers/pinctrl/mvebu/pinctrl-dove.c func |= (config & MVEBU_MPP_MASK) << shift; shift 62 drivers/pinctrl/mvebu/pinctrl-mvebu.c unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; shift 64 drivers/pinctrl/mvebu/pinctrl-mvebu.c *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; shift 73 drivers/pinctrl/mvebu/pinctrl-mvebu.c unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; shift 76 drivers/pinctrl/mvebu/pinctrl-mvebu.c reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); shift 77 drivers/pinctrl/mvebu/pinctrl-mvebu.c writel(reg | (config << shift), data->base + off); shift 788 drivers/pinctrl/mvebu/pinctrl-mvebu.c unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; shift 796 drivers/pinctrl/mvebu/pinctrl-mvebu.c *config = (val >> shift) & MVEBU_MPP_MASK; shift 805 drivers/pinctrl/mvebu/pinctrl-mvebu.c unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; shift 808 drivers/pinctrl/mvebu/pinctrl-mvebu.c MVEBU_MPP_MASK << shift, config << shift); shift 33 drivers/pinctrl/mvebu/pinctrl-orion.c unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; shift 37 drivers/pinctrl/mvebu/pinctrl-orion.c *config = (readl(mpp_base + off) >> shift) & MVEBU_MPP_MASK; shift 40 drivers/pinctrl/mvebu/pinctrl-orion.c *config = (readl(high_mpp_base) >> shift) & MVEBU_MPP_MASK; shift 49 drivers/pinctrl/mvebu/pinctrl-orion.c unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; shift 53 drivers/pinctrl/mvebu/pinctrl-orion.c u32 reg = readl(mpp_base + off) & ~(MVEBU_MPP_MASK << shift); shift 54 drivers/pinctrl/mvebu/pinctrl-orion.c writel(reg | (config << shift), mpp_base + off); shift 57 drivers/pinctrl/mvebu/pinctrl-orion.c u32 reg = readl(high_mpp_base) & ~(MVEBU_MPP_MASK << shift); shift 58 drivers/pinctrl/mvebu/pinctrl-orion.c writel(reg | (config << shift), high_mpp_base); shift 612 drivers/pinctrl/pinctrl-at91.c unsigned shift = two_bit_pin_value_shift_amount(pin); shift 614 drivers/pinctrl/pinctrl-at91.c tmp &= ~(DRIVE_STRENGTH_MASK << shift); shift 615 drivers/pinctrl/pinctrl-at91.c tmp |= strength << shift; shift 678 drivers/pinctrl/pinctrl-lpc18xx.c u8 shift; shift 681 drivers/pinctrl/pinctrl-lpc18xx.c shift = LPC18XX_SCU_I2C0_SCL_SHIFT; shift 683 drivers/pinctrl/pinctrl-lpc18xx.c shift = LPC18XX_SCU_I2C0_SDA_SHIFT; shift 687 drivers/pinctrl/pinctrl-lpc18xx.c if (reg & (LPC18XX_SCU_I2C0_EZI << shift)) shift 694 drivers/pinctrl/pinctrl-lpc18xx.c if (reg & (LPC18XX_SCU_I2C0_EHD << shift)) shift 701 drivers/pinctrl/pinctrl-lpc18xx.c if (reg & (LPC18XX_SCU_I2C0_EFP << shift)) shift 708 drivers/pinctrl/pinctrl-lpc18xx.c if (reg & (LPC18XX_SCU_I2C0_ZIF << shift)) shift 935 drivers/pinctrl/pinctrl-lpc18xx.c u8 shift; shift 938 drivers/pinctrl/pinctrl-lpc18xx.c shift = LPC18XX_SCU_I2C0_SCL_SHIFT; shift 940 drivers/pinctrl/pinctrl-lpc18xx.c shift = LPC18XX_SCU_I2C0_SDA_SHIFT; shift 945 drivers/pinctrl/pinctrl-lpc18xx.c *reg |= (LPC18XX_SCU_I2C0_EZI << shift); shift 947 drivers/pinctrl/pinctrl-lpc18xx.c *reg &= ~(LPC18XX_SCU_I2C0_EZI << shift); shift 952 drivers/pinctrl/pinctrl-lpc18xx.c *reg |= (LPC18XX_SCU_I2C0_EHD << shift); shift 954 drivers/pinctrl/pinctrl-lpc18xx.c *reg &= ~(LPC18XX_SCU_I2C0_EHD << shift); shift 959 drivers/pinctrl/pinctrl-lpc18xx.c *reg |= (LPC18XX_SCU_I2C0_EFP << shift); shift 961 drivers/pinctrl/pinctrl-lpc18xx.c *reg &= ~(LPC18XX_SCU_I2C0_EFP << shift); shift 968 drivers/pinctrl/pinctrl-lpc18xx.c *reg &= ~(LPC18XX_SCU_I2C0_ZIF << shift); shift 970 drivers/pinctrl/pinctrl-lpc18xx.c *reg |= (LPC18XX_SCU_I2C0_ZIF << shift); shift 342 drivers/pinctrl/pinctrl-max77620.c int mask, shift; shift 352 drivers/pinctrl/pinctrl-max77620.c shift = MAX77620_FPS_SRC_SHIFT; shift 361 drivers/pinctrl/pinctrl-max77620.c shift = MAX77620_FPS_PU_PERIOD_SHIFT; shift 370 drivers/pinctrl/pinctrl-max77620.c shift = MAX77620_FPS_PD_PERIOD_SHIFT; shift 385 drivers/pinctrl/pinctrl-max77620.c ret = regmap_update_bits(mpci->rmap, addr, mask, param_val << shift); shift 528 drivers/pinctrl/pinctrl-single.c unsigned offset = 0, shift = 0, i, data, ret; shift 551 drivers/pinctrl/pinctrl-single.c shift = ffs(func->conf[i].mask) - 1; shift 553 drivers/pinctrl/pinctrl-single.c data |= (arg << shift) & func->conf[i].mask; shift 855 drivers/pinctrl/pinctrl-single.c unsigned value[2], shift; shift 863 drivers/pinctrl/pinctrl-single.c shift = ffs(value[1]) - 1; shift 866 drivers/pinctrl/pinctrl-single.c add_setting(settings, param, value[0] >> shift); shift 763 drivers/pinctrl/pinctrl-zynq.c #define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, offset, mask, shift)\ shift 771 drivers/pinctrl/pinctrl-zynq.c .mux_shift = shift, \ shift 143 drivers/pinctrl/pxa/pinctrl-pxa2xx.c int pin, shift; shift 157 drivers/pinctrl/pxa/pinctrl-pxa2xx.c shift = (pin % 16) << 1; shift 164 drivers/pinctrl/pxa/pinctrl-pxa2xx.c val = (val & ~(0x3 << shift)) | ((df->muxval >> 1) << shift); shift 112 drivers/pinctrl/samsung/pinctrl-exynos.c unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq; shift 143 drivers/pinctrl/samsung/pinctrl-exynos.c con &= ~(EXYNOS_EINT_CON_MASK << shift); shift 144 drivers/pinctrl/samsung/pinctrl-exynos.c con |= trig_type << shift; shift 155 drivers/pinctrl/samsung/pinctrl-exynos.c unsigned int shift, mask, con; shift 167 drivers/pinctrl/samsung/pinctrl-exynos.c shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC]; shift 173 drivers/pinctrl/samsung/pinctrl-exynos.c con &= ~(mask << shift); shift 174 drivers/pinctrl/samsung/pinctrl-exynos.c con |= EXYNOS_PIN_FUNC_EINT << shift; shift 187 drivers/pinctrl/samsung/pinctrl-exynos.c unsigned int shift, mask, con; shift 190 drivers/pinctrl/samsung/pinctrl-exynos.c shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC]; shift 196 drivers/pinctrl/samsung/pinctrl-exynos.c con &= ~(mask << shift); shift 197 drivers/pinctrl/samsung/pinctrl-exynos.c con |= EXYNOS_PIN_FUNC_INPUT << shift; shift 144 drivers/pinctrl/samsung/pinctrl-s3c24xx.c u8 shift; shift 150 drivers/pinctrl/samsung/pinctrl-s3c24xx.c shift = pin * bank_type->fld_width[PINCFG_TYPE_FUNC]; shift 156 drivers/pinctrl/samsung/pinctrl-s3c24xx.c val &= ~(mask << shift); shift 157 drivers/pinctrl/samsung/pinctrl-s3c24xx.c val |= bank->eint_func << shift; shift 170 drivers/pinctrl/samsung/pinctrl-s3c24xx.c u8 shift; shift 183 drivers/pinctrl/samsung/pinctrl-s3c24xx.c shift = EINT_OFFS(index); shift 186 drivers/pinctrl/samsung/pinctrl-s3c24xx.c val &= ~(EINT_MASK << shift); shift 187 drivers/pinctrl/samsung/pinctrl-s3c24xx.c val |= trigger << shift; shift 273 drivers/pinctrl/samsung/pinctrl-s3c64xx.c u8 shift; shift 279 drivers/pinctrl/samsung/pinctrl-s3c64xx.c shift = pin; shift 280 drivers/pinctrl/samsung/pinctrl-s3c64xx.c if (bank_type->fld_width[PINCFG_TYPE_FUNC] * shift >= 32) { shift 283 drivers/pinctrl/samsung/pinctrl-s3c64xx.c shift -= 8; shift 286 drivers/pinctrl/samsung/pinctrl-s3c64xx.c shift = shift * bank_type->fld_width[PINCFG_TYPE_FUNC]; shift 292 drivers/pinctrl/samsung/pinctrl-s3c64xx.c val &= ~(mask << shift); shift 293 drivers/pinctrl/samsung/pinctrl-s3c64xx.c val |= bank->eint_func << shift; shift 345 drivers/pinctrl/samsung/pinctrl-s3c64xx.c u8 shift; shift 358 drivers/pinctrl/samsung/pinctrl-s3c64xx.c shift = EINT_OFFS(bank->eint_offset) + irqd->hwirq; shift 359 drivers/pinctrl/samsung/pinctrl-s3c64xx.c shift = 4 * (shift / 4); /* 4 EINTs per trigger selector */ shift 362 drivers/pinctrl/samsung/pinctrl-s3c64xx.c val &= ~(EINT_CON_MASK << shift); shift 363 drivers/pinctrl/samsung/pinctrl-s3c64xx.c val |= trigger << shift; shift 553 drivers/pinctrl/samsung/pinctrl-s3c64xx.c u8 shift; shift 566 drivers/pinctrl/samsung/pinctrl-s3c64xx.c shift = ddata->eints[irqd->hwirq]; shift 567 drivers/pinctrl/samsung/pinctrl-s3c64xx.c if (shift >= EINT_MAX_PER_REG) { shift 569 drivers/pinctrl/samsung/pinctrl-s3c64xx.c shift -= EINT_MAX_PER_REG; shift 571 drivers/pinctrl/samsung/pinctrl-s3c64xx.c shift = EINT_CON_LEN * (shift / 2); shift 574 drivers/pinctrl/samsung/pinctrl-s3c64xx.c val &= ~(EINT_CON_MASK << shift); shift 575 drivers/pinctrl/samsung/pinctrl-s3c64xx.c val |= trigger << shift; shift 383 drivers/pinctrl/samsung/pinctrl-samsung.c u32 mask, shift, data, pin_offset; shift 396 drivers/pinctrl/samsung/pinctrl-samsung.c shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; shift 397 drivers/pinctrl/samsung/pinctrl-samsung.c if (shift >= 32) { shift 399 drivers/pinctrl/samsung/pinctrl-samsung.c shift -= 32; shift 406 drivers/pinctrl/samsung/pinctrl-samsung.c data &= ~(mask << shift); shift 407 drivers/pinctrl/samsung/pinctrl-samsung.c data |= func->val << shift; shift 439 drivers/pinctrl/samsung/pinctrl-samsung.c u32 data, width, pin_offset, mask, shift; shift 457 drivers/pinctrl/samsung/pinctrl-samsung.c shift = pin_offset * width; shift 462 drivers/pinctrl/samsung/pinctrl-samsung.c data &= ~(mask << shift); shift 463 drivers/pinctrl/samsung/pinctrl-samsung.c data |= (cfg_value << shift); shift 466 drivers/pinctrl/samsung/pinctrl-samsung.c data >>= shift; shift 597 drivers/pinctrl/samsung/pinctrl-samsung.c u32 data, mask, shift; shift 606 drivers/pinctrl/samsung/pinctrl-samsung.c shift = offset * type->fld_width[PINCFG_TYPE_FUNC]; shift 607 drivers/pinctrl/samsung/pinctrl-samsung.c if (shift >= 32) { shift 609 drivers/pinctrl/samsung/pinctrl-samsung.c shift -= 32; shift 614 drivers/pinctrl/samsung/pinctrl-samsung.c data &= ~(mask << shift); shift 616 drivers/pinctrl/samsung/pinctrl-samsung.c data |= EXYNOS_PIN_FUNC_OUTPUT << shift; shift 590 drivers/pinctrl/sprd/pinctrl-sprd.c unsigned int param, arg, shift, mask, val; shift 596 drivers/pinctrl/sprd/pinctrl-sprd.c shift = 0; shift 614 drivers/pinctrl/sprd/pinctrl-sprd.c shift = SLEEP_MODE_SHIFT; shift 624 drivers/pinctrl/sprd/pinctrl-sprd.c shift = SLEEP_INPUT_SHIFT; shift 631 drivers/pinctrl/sprd/pinctrl-sprd.c shift = SLEEP_OUTPUT_SHIFT; shift 640 drivers/pinctrl/sprd/pinctrl-sprd.c shift = DRIVE_STRENGTH_SHIFT; shift 646 drivers/pinctrl/sprd/pinctrl-sprd.c shift = SLEEP_PULL_DOWN_SHIFT; shift 650 drivers/pinctrl/sprd/pinctrl-sprd.c shift = PULL_DOWN_SHIFT; shift 660 drivers/pinctrl/sprd/pinctrl-sprd.c shift = INPUT_SCHMITT_SHIFT; shift 666 drivers/pinctrl/sprd/pinctrl-sprd.c shift = SLEEP_PULL_UP_SHIFT; shift 674 drivers/pinctrl/sprd/pinctrl-sprd.c shift = PULL_UP_SHIFT; shift 695 drivers/pinctrl/sprd/pinctrl-sprd.c reg &= ~(mask << shift); shift 447 drivers/pinctrl/sunxi/pinctrl-sunxi.c u32 *offset, u32 *shift, u32 *mask) shift 452 drivers/pinctrl/sunxi/pinctrl-sunxi.c *shift = sunxi_dlevel_offset(pin); shift 460 drivers/pinctrl/sunxi/pinctrl-sunxi.c *shift = sunxi_pull_offset(pin); shift 476 drivers/pinctrl/sunxi/pinctrl-sunxi.c u32 offset, shift, mask, val; shift 482 drivers/pinctrl/sunxi/pinctrl-sunxi.c ret = sunxi_pconf_reg(pin, param, &offset, &shift, &mask); shift 486 drivers/pinctrl/sunxi/pinctrl-sunxi.c val = (readl(pctl->membase + offset) >> shift) & mask; shift 542 drivers/pinctrl/sunxi/pinctrl-sunxi.c u32 offset, shift, mask, reg; shift 549 drivers/pinctrl/sunxi/pinctrl-sunxi.c ret = sunxi_pconf_reg(pin, param, &offset, &shift, &mask); shift 587 drivers/pinctrl/sunxi/pinctrl-sunxi.c reg &= ~(mask << shift); shift 588 drivers/pinctrl/sunxi/pinctrl-sunxi.c writel(reg | val << shift, pctl->membase + offset); shift 69 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c unsigned int shift; shift 313 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c value &= ~(lane->mask << lane->shift); shift 314 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c value |= i << lane->shift; shift 831 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c .shift = _shift, \ shift 149 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c unsigned int *shift, shift 198 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c *shift = drvctrl % 32; shift 212 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c unsigned int pupdctrl, reg, shift, val; shift 244 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c shift = pupdctrl % 32; shift 250 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c val = (val >> shift) & 1; shift 259 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c unsigned int reg, shift, mask, val; shift 263 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c ret = uniphier_conf_get_drvctrl_data(pctldev, pin, ®, &shift, shift 276 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c *strength = strengths[(val >> shift) & mask]; shift 349 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c unsigned int pupdctrl, reg, shift; shift 411 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c shift = pupdctrl % 32; shift 413 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift); shift 421 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c unsigned int reg, shift, mask, val; shift 425 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c ret = uniphier_conf_get_drvctrl_data(pctldev, pin, ®, &shift, shift 451 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c mask << shift, val << shift); shift 582 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c unsigned int mux_bits, reg_stride, reg, reg_end, shift, mask; shift 616 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c shift = pin * mux_bits % 32; shift 625 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c mask << shift, muxval << shift); shift 2041 drivers/platform/x86/mlx-platform.c int shift, i; shift 2066 drivers/platform/x86/mlx-platform.c shift = *nr - mlxplat_mux_data[i].parent; shift 2068 drivers/platform/x86/mlx-platform.c mlxplat_mux_data[i].base_nr += shift; shift 2069 drivers/platform/x86/mlx-platform.c if (shift > 0) shift 2070 drivers/platform/x86/mlx-platform.c mlxplat_hotplug->shift_nr = shift; shift 218 drivers/power/supply/bq2415x_charger.c u8 mask, u8 shift) shift 222 drivers/power/supply/bq2415x_charger.c if (shift > 8) shift 228 drivers/power/supply/bq2415x_charger.c return (ret & mask) >> shift; shift 272 drivers/power/supply/bq2415x_charger.c u8 mask, u8 shift) shift 276 drivers/power/supply/bq2415x_charger.c if (shift > 8) shift 284 drivers/power/supply/bq2415x_charger.c ret |= val << shift; shift 260 drivers/power/supply/bq24190_charger.c u8 mask, u8 shift, u8 *data) shift 270 drivers/power/supply/bq24190_charger.c v >>= shift; shift 277 drivers/power/supply/bq24190_charger.c u8 mask, u8 shift, u8 data) shift 287 drivers/power/supply/bq24190_charger.c v |= ((data << shift) & mask); shift 293 drivers/power/supply/bq24190_charger.c u8 reg, u8 mask, u8 shift, shift 300 drivers/power/supply/bq24190_charger.c ret = bq24190_read_mask(bdi, reg, mask, shift, &v); shift 311 drivers/power/supply/bq24190_charger.c u8 reg, u8 mask, u8 shift, shift 319 drivers/power/supply/bq24190_charger.c return bq24190_write_mask(bdi, reg, mask, shift, idx); shift 336 drivers/power/supply/bq24190_charger.c .shift = BQ24190_REG_##r##_##f##_SHIFT, \ shift 355 drivers/power/supply/bq24190_charger.c u8 shift; shift 454 drivers/power/supply/bq24190_charger.c ret = bq24190_read_mask(bdi, info->reg, info->mask, info->shift, &v); shift 487 drivers/power/supply/bq24190_charger.c ret = bq24190_write_mask(bdi, info->reg, info->mask, info->shift, v); shift 115 drivers/powercap/intel_rapl_common.c int shift; shift 124 drivers/powercap/intel_rapl_common.c .shift = s, \ shift 658 drivers/powercap/intel_rapl_common.c rp->shift = 63; shift 673 drivers/powercap/intel_rapl_common.c value = ra.value >> rp->shift; shift 696 drivers/powercap/intel_rapl_common.c bits <<= rp->shift; shift 187 drivers/pwm/pwm-brcmstb.c unsigned int shift = channel * CTRL_CHAN_OFFS; shift 194 drivers/pwm/pwm-brcmstb.c value &= ~(CTRL_OEB << shift); shift 195 drivers/pwm/pwm-brcmstb.c value |= (CTRL_START | CTRL_OPENDRAIN) << shift; shift 197 drivers/pwm/pwm-brcmstb.c value &= ~((CTRL_START | CTRL_OPENDRAIN) << shift); shift 198 drivers/pwm/pwm-brcmstb.c value |= CTRL_OEB << shift; shift 29 drivers/pwm/pwm-clps711x.c u32 shift = (n + 1) * 4; shift 36 drivers/pwm/pwm-clps711x.c tmp &= ~(0xf << shift); shift 37 drivers/pwm/pwm-clps711x.c tmp |= v << shift; shift 145 drivers/pwm/pwm-lp3943.c val << mux[index].shift); shift 512 drivers/pwm/pwm-meson.c channel->mux.shift = shift 123 drivers/pwm/pwm-samsung.c u8 shift = TCFG1_SHIFT(channel); shift 133 drivers/pwm/pwm-samsung.c reg &= ~(TCFG1_MUX_MASK << shift); shift 134 drivers/pwm/pwm-samsung.c reg |= bits << shift; shift 324 drivers/pwm/pwm-stm32.c u32 ccmr, mask, shift; shift 368 drivers/pwm/pwm-stm32.c shift = (ch & 0x1) * CCMR_CHANNEL_SHIFT; shift 369 drivers/pwm/pwm-stm32.c ccmr = (TIM_CCMR_PE | TIM_CCMR_M1) << shift; shift 370 drivers/pwm/pwm-stm32.c mask = CCMR_CHANNEL_MASK << shift; shift 494 drivers/pwm/pwm-stm32.c int shift = (index == 0) ? TIM_BDTR_BKF_SHIFT : TIM_BDTR_BK2F_SHIFT; shift 506 drivers/pwm/pwm-stm32.c bdtr |= (filter & TIM_BDTR_BKF_MASK) << shift; shift 270 drivers/regulator/88pm8607.c #define PM8607_LDO(_id, vreg, shift, ereg, ebit) \ shift 283 drivers/regulator/88pm8607.c .vsel_mask = (ARRAY_SIZE(LDO##_id##_table) - 1) << (shift), \ shift 309 drivers/regulator/da903x.c #define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \ shift 323 drivers/regulator/da903x.c .vol_shift = (shift), \ shift 351 drivers/regulator/da903x.c #define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ shift 352 drivers/regulator/da903x.c DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit) shift 354 drivers/regulator/da903x.c #define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ shift 355 drivers/regulator/da903x.c DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit) shift 65 drivers/regulator/da9055-regulator.c int shift; shift 92 drivers/regulator/da9055-regulator.c switch ((ret & info->mode.mask) >> info->mode.shift) { shift 116 drivers/regulator/da9055-regulator.c val = DA9055_BUCK_MODE_SYNC << info->mode.shift; shift 119 drivers/regulator/da9055-regulator.c val = DA9055_BUCK_MODE_AUTO << info->mode.shift; shift 122 drivers/regulator/da9055-regulator.c val = DA9055_BUCK_MODE_SLEEP << info->mode.shift; shift 396 drivers/regulator/da9055-regulator.c .shift = (sbits),\ shift 116 drivers/regulator/lochnagar-regulator.c int shift = (desc->id - LOCHNAGAR_MIC1VDD) * shift 118 drivers/regulator/lochnagar-regulator.c int mask = LOCHNAGAR2_P1_MICBIAS_SRC_MASK << shift; shift 127 drivers/regulator/lochnagar-regulator.c mask, val << shift); shift 270 drivers/regulator/lp3972.c int shift, ret; shift 272 drivers/regulator/lp3972.c shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo); shift 274 drivers/regulator/lp3972.c LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift); shift 289 drivers/regulator/lp3972.c shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo); shift 291 drivers/regulator/lp3972.c LP3972_VOL_CHANGE_FLAG_MASK << shift, shift 292 drivers/regulator/lp3972.c LP3972_VOL_CHANGE_FLAG_GO << shift); shift 297 drivers/regulator/lp3972.c LP3972_VOL_CHANGE_FLAG_MASK << shift, 0); shift 185 drivers/regulator/lp872x.c u8 val, mask, shift; shift 193 drivers/regulator/lp872x.c shift = LP8720_TIMESTEP_S; shift 199 drivers/regulator/lp872x.c shift = LP8725_TIMESTEP_S; shift 211 drivers/regulator/lp872x.c val = (val & mask) >> shift; shift 356 drivers/regulator/lp872x.c u8 addr, mask, shift, val; shift 362 drivers/regulator/lp872x.c shift = LP8720_BUCK_FPWM_S; shift 367 drivers/regulator/lp872x.c shift = LP8725_BUCK1_FPWM_S; shift 372 drivers/regulator/lp872x.c shift = LP8725_BUCK2_FPWM_S; shift 379 drivers/regulator/lp872x.c val = LP872X_FORCE_PWM << shift; shift 381 drivers/regulator/lp872x.c val = LP872X_AUTO_PWM << shift; shift 94 drivers/regulator/ltc3589.c int sel, shift; shift 100 drivers/regulator/ltc3589.c shift = ffs(rdev->desc->apply_bit) - 1; shift 107 drivers/regulator/ltc3589.c 0x3 << shift, sel << shift); shift 212 drivers/regulator/max77620-regulator.c u8 shift = rinfo->power_mode_shift; shift 225 drivers/regulator/max77620-regulator.c ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift); shift 242 drivers/regulator/max77620-regulator.c u8 shift = rinfo->power_mode_shift; shift 261 drivers/regulator/max77620-regulator.c return (val & mask) >> shift; shift 122 drivers/regulator/max77686-regulator.c unsigned int val, shift; shift 126 drivers/regulator/max77686-regulator.c shift = max77686_get_opmode_shift(id); shift 130 drivers/regulator/max77686-regulator.c rdev->desc->enable_mask, val << shift); shift 210 drivers/regulator/max77686-regulator.c unsigned int shift; shift 213 drivers/regulator/max77686-regulator.c shift = max77686_get_opmode_shift(id); shift 220 drivers/regulator/max77686-regulator.c max77686->opmode[id] << shift); shift 99 drivers/regulator/max77802-regulator.c int shift = max77802_get_opmode_shift(id); shift 103 drivers/regulator/max77802-regulator.c rdev->desc->enable_mask, val << shift); shift 116 drivers/regulator/max77802-regulator.c int shift = max77802_get_opmode_shift(id); shift 133 drivers/regulator/max77802-regulator.c rdev->desc->enable_mask, val << shift); shift 166 drivers/regulator/max77802-regulator.c int shift = max77802_get_opmode_shift(id); shift 207 drivers/regulator/max77802-regulator.c rdev->desc->enable_mask, val << shift); shift 214 drivers/regulator/max77802-regulator.c int shift = max77802_get_opmode_shift(id); shift 221 drivers/regulator/max77802-regulator.c max77802->opmode[id] << shift); shift 545 drivers/regulator/max77802-regulator.c int shift = max77802_get_opmode_shift(id); shift 554 drivers/regulator/max77802-regulator.c val = val >> shift & MAX77802_OPMODE_MASK; shift 224 drivers/regulator/max8660.c u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4; shift 225 drivers/regulator/max8660.c u8 selector = (max8660->shadow_regs[MAX8660_L12VCR] >> shift) & 0xf; shift 291 drivers/regulator/max8997-regulator.c int reg, shift = 0, mask = 0x3f; shift 323 drivers/regulator/max8997-regulator.c shift = (rid == MAX8997_ESAFEOUT2) ? 2 : 0; shift 328 drivers/regulator/max8997-regulator.c shift = 0; shift 333 drivers/regulator/max8997-regulator.c shift = 0; shift 338 drivers/regulator/max8997-regulator.c shift = 0; shift 346 drivers/regulator/max8997-regulator.c *_shift = shift; shift 356 drivers/regulator/max8997-regulator.c int reg, shift, mask, ret; shift 359 drivers/regulator/max8997-regulator.c ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); shift 367 drivers/regulator/max8997-regulator.c val >>= shift; shift 403 drivers/regulator/max8997-regulator.c int reg, shift = 0, mask, ret = 0; shift 409 drivers/regulator/max8997-regulator.c ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); shift 439 drivers/regulator/max8997-regulator.c ret = max8997_update_reg(i2c, reg, val << shift, mask); shift 455 drivers/regulator/max8997-regulator.c int i, reg, shift, mask, ret; shift 480 drivers/regulator/max8997-regulator.c ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); shift 484 drivers/regulator/max8997-regulator.c ret = max8997_update_reg(i2c, reg, i << shift, mask << shift); shift 696 drivers/regulator/max8997-regulator.c int reg, shift = 0, mask, ret; shift 701 drivers/regulator/max8997-regulator.c ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); shift 705 drivers/regulator/max8997-regulator.c return max8997_update_reg(i2c, reg, selector << shift, mask << shift); shift 37 drivers/regulator/max8998.c int *reg, int *shift) shift 44 drivers/regulator/max8998.c *shift = 3 - (ldo - MAX8998_LDO2); shift 48 drivers/regulator/max8998.c *shift = 7 - (ldo - MAX8998_LDO6); shift 52 drivers/regulator/max8998.c *shift = 7 - (ldo - MAX8998_LDO14); shift 56 drivers/regulator/max8998.c *shift = 7 - (ldo - MAX8998_BUCK1); shift 60 drivers/regulator/max8998.c *shift = 7 - (ldo - MAX8998_EN32KHZ_AP); shift 64 drivers/regulator/max8998.c *shift = 7 - (ldo - MAX8998_ESAFEOUT1); shift 77 drivers/regulator/max8998.c int ret, reg, shift = 8; shift 80 drivers/regulator/max8998.c ret = max8998_get_enable_register(rdev, ®, &shift); shift 88 drivers/regulator/max8998.c return val & (1 << shift); shift 95 drivers/regulator/max8998.c int reg, shift = 8, ret; shift 97 drivers/regulator/max8998.c ret = max8998_get_enable_register(rdev, ®, &shift); shift 101 drivers/regulator/max8998.c return max8998_update_reg(i2c, reg, 1<<shift, 1<<shift); shift 108 drivers/regulator/max8998.c int reg, shift = 8, ret; shift 110 drivers/regulator/max8998.c ret = max8998_get_enable_register(rdev, ®, &shift); shift 114 drivers/regulator/max8998.c return max8998_update_reg(i2c, reg, 0, 1<<shift); shift 122 drivers/regulator/max8998.c int reg, shift = 0, mask = 0xff; shift 129 drivers/regulator/max8998.c shift = 4; shift 131 drivers/regulator/max8998.c shift = 0; shift 140 drivers/regulator/max8998.c shift = 4; shift 142 drivers/regulator/max8998.c shift = 0; shift 147 drivers/regulator/max8998.c shift = 5; shift 150 drivers/regulator/max8998.c shift = 0; shift 174 drivers/regulator/max8998.c *_shift = shift; shift 184 drivers/regulator/max8998.c int reg, shift = 0, mask, ret; shift 187 drivers/regulator/max8998.c ret = max8998_get_voltage_register(rdev, ®, &shift, &mask); shift 195 drivers/regulator/max8998.c val >>= shift; shift 206 drivers/regulator/max8998.c int reg, shift = 0, mask, ret; shift 208 drivers/regulator/max8998.c ret = max8998_get_voltage_register(rdev, ®, &shift, &mask); shift 212 drivers/regulator/max8998.c ret = max8998_update_reg(i2c, reg, selector<<shift, mask<<shift); shift 235 drivers/regulator/max8998.c int reg, shift = 0, mask, ret, j; shift 238 drivers/regulator/max8998.c ret = max8998_get_voltage_register(rdev, ®, &shift, &mask); shift 273 drivers/regulator/max8998.c &shift, shift 309 drivers/regulator/max8998.c ®, &shift, &mask); shift 323 drivers/regulator/max8998.c ret = max8998_update_reg(i2c, reg, selector<<shift, shift 324 drivers/regulator/max8998.c mask<<shift); shift 23 drivers/regulator/qcom_rpm-regulator.c int shift; shift 45 drivers/regulator/qcom_rpm-regulator.c (((reg)->parts->fm.mask >> (reg)->parts->fm.shift) == 3) shift 193 drivers/regulator/qcom_rpm-regulator.c if (WARN_ON((value << req->shift) & ~req->mask)) shift 197 drivers/regulator/qcom_rpm-regulator.c vreg->val[req->word] |= value << req->shift; shift 394 drivers/regulator/qcom_rpm-regulator.c int max_mA = req->mask >> req->shift; shift 644 drivers/regulator/qcom_rpm-regulator.c if (req->mask == 0 || (value << req->shift) & ~req->mask) shift 648 drivers/regulator/qcom_rpm-regulator.c vreg->val[req->word] |= value << req->shift; shift 217 drivers/regulator/tps6507x-regulator.c u8 shift; shift 222 drivers/regulator/tps6507x-regulator.c shift = TPS6507X_MAX_REG_ID - rid; shift 228 drivers/regulator/tps6507x-regulator.c return (data & 1<<shift) ? 1 : 0; shift 235 drivers/regulator/tps6507x-regulator.c u8 shift; shift 240 drivers/regulator/tps6507x-regulator.c shift = TPS6507X_MAX_REG_ID - rid; shift 241 drivers/regulator/tps6507x-regulator.c return tps6507x_pmic_set_bits(tps, TPS6507X_REG_CON_CTRL1, 1 << shift); shift 248 drivers/regulator/tps6507x-regulator.c u8 shift; shift 253 drivers/regulator/tps6507x-regulator.c shift = TPS6507X_MAX_REG_ID - rid; shift 255 drivers/regulator/tps6507x-regulator.c 1 << shift); shift 122 drivers/regulator/tps6524x-regulator.c int shift; shift 289 drivers/regulator/tps6524x-regulator.c return (tmp >> field->shift) & field->mask; shift 299 drivers/regulator/tps6524x-regulator.c field->mask << field->shift, shift 300 drivers/regulator/tps6524x-regulator.c val << field->shift); shift 372 drivers/regulator/tps6524x-regulator.c { .reg = (_reg), .mask = (_mask), .shift = (_shift), } shift 109 drivers/regulator/tps6586x-regulator.c #define TPS6586X_REGULATOR(_id, _ops, _pin_name, vdata, vreg, shift, nbits, \ shift 123 drivers/regulator/tps6586x-regulator.c .vsel_mask = ((1 << (nbits)) - 1) << (shift), \ shift 133 drivers/regulator/tps6586x-regulator.c uv_step, vreg, shift, nbits, ereg0, \ shift 148 drivers/regulator/tps6586x-regulator.c .vsel_mask = ((1 << (nbits)) - 1) << (shift), \ shift 157 drivers/regulator/tps6586x-regulator.c #define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \ shift 160 drivers/regulator/tps6586x-regulator.c TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \ shift 165 drivers/regulator/tps6586x-regulator.c shift, nbits, ereg0, ebit0, ereg1, ebit1) \ shift 168 drivers/regulator/tps6586x-regulator.c min_uv, uv_step, vreg, shift, nbits, \ shift 172 drivers/regulator/tps6586x-regulator.c #define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \ shift 175 drivers/regulator/tps6586x-regulator.c TPS6586X_REGULATOR(_id, ro, _pname, vdata, vreg, shift, nbits, \ shift 179 drivers/regulator/tps6586x-regulator.c #define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \ shift 183 drivers/regulator/tps6586x-regulator.c min_uv, uv_step, vreg, shift, nbits, \ shift 68 drivers/reset/reset-pistachio.c int shift; shift 71 drivers/reset/reset-pistachio.c shift = pistachio_reset_shift(id); shift 72 drivers/reset/reset-pistachio.c if (shift < 0) shift 73 drivers/reset/reset-pistachio.c return shift; shift 74 drivers/reset/reset-pistachio.c mask = BIT(shift); shift 85 drivers/reset/reset-pistachio.c int shift; shift 88 drivers/reset/reset-pistachio.c shift = pistachio_reset_shift(id); shift 89 drivers/reset/reset-pistachio.c if (shift < 0) shift 90 drivers/reset/reset-pistachio.c return shift; shift 91 drivers/reset/reset-pistachio.c mask = BIT(shift); shift 228 drivers/rtc/rtc-lp8788.c u8 mask, shift; shift 234 drivers/rtc/rtc-lp8788.c shift = shift_alarm_en[rtc->alarm]; shift 236 drivers/rtc/rtc-lp8788.c return lp8788_update_bits(lp, LP8788_INTEN_3, mask, enable << shift); shift 49 drivers/rtc/rtc-sunxi.c #define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \ shift 50 drivers/rtc/rtc-sunxi.c >> (shift)) shift 52 drivers/rtc/rtc-sunxi.c #define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift)) shift 81 drivers/rtc/rtc-sunxi.c #define SUNXI_LEAP_SET_VALUE(x, shift) SUNXI_SET(x, SUNXI_MASK_LY, shift) shift 114 drivers/scsi/hisi_sas/hisi_sas.h int shift; shift 424 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_DQE_ECC_1B_ADDR_OFF, shift 431 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_IOST_ECC_1B_ADDR_OFF, shift 438 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_ITCT_ECC_1B_ADDR_OFF, shift 445 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_LM_DFX_STATUS2_IOSTLIST_OFF, shift 452 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_LM_DFX_STATUS2_ITCTLIST_OFF, shift 459 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_CQE_ECC_1B_ADDR_OFF, shift 466 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_RXM_DFX_STATUS14_MEM0_OFF, shift 473 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_RXM_DFX_STATUS14_MEM1_OFF, shift 480 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_RXM_DFX_STATUS14_MEM2_OFF, shift 487 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_RXM_DFX_STATUS15_MEM3_OFF, shift 497 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_DQE_ECC_MB_ADDR_OFF, shift 504 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_IOST_ECC_MB_ADDR_OFF, shift 511 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_ITCT_ECC_MB_ADDR_OFF, shift 518 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_LM_DFX_STATUS2_IOSTLIST_OFF, shift 525 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_LM_DFX_STATUS2_ITCTLIST_OFF, shift 532 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_CQE_ECC_MB_ADDR_OFF, shift 539 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_RXM_DFX_STATUS14_MEM0_OFF, shift 546 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_RXM_DFX_STATUS14_MEM1_OFF, shift 553 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_RXM_DFX_STATUS14_MEM2_OFF, shift 560 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c .shift = HGC_RXM_DFX_STATUS15_MEM3_OFF, shift 2949 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c val >>= ecc_error->shift; shift 2969 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c val >>= ecc_error->shift; shift 3072 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c 1 << axi_error->shift); shift 1836 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_DQE_ECC_MB_ADDR_OFF, shift 1843 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_IOST_ECC_MB_ADDR_OFF, shift 1850 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_ITCT_ECC_MB_ADDR_OFF, shift 1857 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_LM_DFX_STATUS2_IOSTLIST_OFF, shift 1864 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_LM_DFX_STATUS2_ITCTLIST_OFF, shift 1871 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_CQE_ECC_MB_ADDR_OFF, shift 1878 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_RXM_DFX_STATUS14_MEM0_OFF, shift 1885 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_RXM_DFX_STATUS14_MEM1_OFF, shift 1892 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_RXM_DFX_STATUS14_MEM2_OFF, shift 1899 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = HGC_RXM_DFX_STATUS15_MEM3_OFF, shift 1906 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c .shift = AM_ROB_ECC_ERR_ADDR_OFF, shift 1925 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c val >>= ecc_error->shift; shift 59 drivers/sh/intc/access.c unsigned int shift = _INTC_SHIFT(handle); shift 61 drivers/sh/intc/access.c value &= ~(((1 << width) - 1) << shift); shift 62 drivers/sh/intc/access.c value |= field_value << shift; shift 69 drivers/sh/intc/access.c unsigned int shift = _INTC_SHIFT(handle); shift 70 drivers/sh/intc/access.c unsigned int mask = ((1 << width) - 1) << shift; shift 72 drivers/sh/intc/access.c return (value & mask) >> shift; shift 11 drivers/sh/intc/internals.h #define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \ shift 12 drivers/sh/intc/internals.h ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \ shift 437 drivers/soc/fsl/qe/qe_ic.c u32 temp, control_reg = QEIC_CICNR, shift = 0; shift 447 drivers/soc/fsl/qe/qe_ic.c shift = CICNR_ZCC1T_SHIFT; shift 450 drivers/soc/fsl/qe/qe_ic.c shift = CICNR_WCC1T_SHIFT; shift 453 drivers/soc/fsl/qe/qe_ic.c shift = CICNR_YCC1T_SHIFT; shift 456 drivers/soc/fsl/qe/qe_ic.c shift = CICNR_XCC1T_SHIFT; shift 459 drivers/soc/fsl/qe/qe_ic.c shift = CRICR_RTA1T_SHIFT; shift 463 drivers/soc/fsl/qe/qe_ic.c shift = CRICR_RTB1T_SHIFT; shift 470 drivers/soc/fsl/qe/qe_ic.c shift += (2 - priority) * 2; shift 472 drivers/soc/fsl/qe/qe_ic.c temp &= ~(SIGNAL_MASK << shift); shift 473 drivers/soc/fsl/qe/qe_ic.c temp |= (high ? SIGNAL_HIGH : SIGNAL_LOW) << shift; shift 90 drivers/soc/fsl/qe/ucc.c unsigned int *reg_num, unsigned int *shift) shift 96 drivers/soc/fsl/qe/ucc.c *shift = 16 - 8 * (ucc_num & 2); shift 103 drivers/soc/fsl/qe/ucc.c unsigned int shift; shift 109 drivers/soc/fsl/qe/ucc.c get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); shift 112 drivers/soc/fsl/qe/ucc.c setbits32(cmxucr, mask << shift); shift 114 drivers/soc/fsl/qe/ucc.c clrbits32(cmxucr, mask << shift); shift 124 drivers/soc/fsl/qe/ucc.c unsigned int shift; shift 135 drivers/soc/fsl/qe/ucc.c get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); shift 208 drivers/soc/fsl/qe/ucc.c shift += 4; shift 210 drivers/soc/fsl/qe/ucc.c clrsetbits_be32(cmxucr, QE_CMXUCR_TX_CLK_SRC_MASK << shift, shift 211 drivers/soc/fsl/qe/ucc.c clock_bits << shift); shift 506 drivers/soc/fsl/qe/ucc.c u32 shift; shift 508 drivers/soc/fsl/qe/ucc.c shift = (mode == COMM_DIR_RX) ? RX_CLK_SHIFT_BASE : TX_CLK_SHIFT_BASE; shift 510 drivers/soc/fsl/qe/ucc.c shift -= tdm_num * 4; shift 512 drivers/soc/fsl/qe/ucc.c shift -= (tdm_num - 4) * 4; shift 514 drivers/soc/fsl/qe/ucc.c return shift; shift 521 drivers/soc/fsl/qe/ucc.c u32 shift; shift 538 drivers/soc/fsl/qe/ucc.c shift = ucc_get_tdm_clk_shift(mode, tdm_num); shift 543 drivers/soc/fsl/qe/ucc.c qe_clrsetbits32(cmxs1cr, QE_CMXUCR_TX_CLK_SRC_MASK << shift, shift 544 drivers/soc/fsl/qe/ucc.c clock_bits << shift); shift 623 drivers/soc/fsl/qe/ucc.c u32 shift; shift 625 drivers/soc/fsl/qe/ucc.c shift = (mode == COMM_DIR_RX) ? RX_SYNC_SHIFT_BASE : TX_SYNC_SHIFT_BASE; shift 626 drivers/soc/fsl/qe/ucc.c shift -= tdm_num * 2; shift 628 drivers/soc/fsl/qe/ucc.c return shift; shift 635 drivers/soc/fsl/qe/ucc.c u32 shift; shift 651 drivers/soc/fsl/qe/ucc.c shift = ucc_get_tdm_sync_shift(mode, tdm_num); shift 654 drivers/soc/fsl/qe/ucc.c QE_CMXUCR_TX_CLK_SRC_MASK << shift, shift 655 drivers/soc/fsl/qe/ucc.c source << shift); shift 14 drivers/soc/rockchip/grf.c #define HIWORD_UPDATE(val, mask, shift) \ shift 15 drivers/soc/rockchip/grf.c ((val) << (shift) | (mask) << ((shift) + 16)) shift 269 drivers/soc/xilinx/xlnx_vcu.c u32 field, u32 mask, int shift) shift 273 drivers/soc/xilinx/xlnx_vcu.c val &= ~(mask << shift); shift 274 drivers/soc/xilinx/xlnx_vcu.c val |= (field & mask) << shift; shift 558 drivers/spi/spi-lantiq-ssc.c unsigned int rxbv, shift; shift 574 drivers/spi/spi-lantiq-ssc.c shift = (rxbv - 1) * 8; shift 578 drivers/spi/spi-lantiq-ssc.c *rx8++ = (data >> shift) & 0xFF; shift 580 drivers/spi/spi-lantiq-ssc.c shift -= 8; shift 73 drivers/spi/spi-lp8841-rtc.c u32 shift = 32 - bits; shift 94 drivers/spi/spi-lp8841-rtc.c word >>= shift; shift 121 drivers/spi/spi-omap-uwire.c int shift, reg; shift 127 drivers/spi/spi-omap-uwire.c shift = 6; shift 129 drivers/spi/spi-omap-uwire.c shift = 0; shift 136 drivers/spi/spi-omap-uwire.c w &= ~(0x3f << shift); shift 137 drivers/spi/spi-omap-uwire.c w |= val << shift; shift 232 drivers/spi/spi-qup.c int i, shift, num_bytes; shift 255 drivers/spi/spi-qup.c shift = BITS_PER_BYTE; shift 256 drivers/spi/spi-qup.c shift *= (controller->w_size - i - 1); shift 257 drivers/spi/spi-qup.c rx_buf[controller->rx_bytes] = word >> shift; shift 187 drivers/spi/spi-stm32.c int shift; shift 1421 drivers/spi/spi-stm32.c setb |= ((u32)mbrdiv << spi->cfg->regs->br.shift) & shift 544 drivers/ssb/driver_chipcommon_pmu.c u32 addr, shift, mask; shift 552 drivers/ssb/driver_chipcommon_pmu.c shift = 25; shift 557 drivers/ssb/driver_chipcommon_pmu.c shift = 1; shift 562 drivers/ssb/driver_chipcommon_pmu.c shift = 9; shift 567 drivers/ssb/driver_chipcommon_pmu.c shift = 17; shift 579 drivers/ssb/driver_chipcommon_pmu.c shift = 21; shift 586 drivers/ssb/driver_chipcommon_pmu.c ssb_chipco_regctl_maskset(cc, addr, ~(mask << shift), shift 587 drivers/ssb/driver_chipcommon_pmu.c (voltage & mask) << shift); shift 328 drivers/ssb/pci.c u16 mask, u16 shift) shift 334 drivers/ssb/pci.c gain = (v & mask) >> shift; shift 1471 drivers/staging/comedi/comedi_fops.c unsigned int shift = 0; shift 1474 drivers/staging/comedi/comedi_fops.c shift = CR_CHAN(insn->chanspec); shift 1475 drivers/staging/comedi/comedi_fops.c if (shift > 0) { shift 1477 drivers/staging/comedi/comedi_fops.c data[0] <<= shift; shift 1478 drivers/staging/comedi/comedi_fops.c data[1] <<= shift; shift 1483 drivers/staging/comedi/comedi_fops.c if (shift > 0) shift 1484 drivers/staging/comedi/comedi_fops.c data[1] >>= shift; shift 109 drivers/staging/comedi/drivers/addi_apci_1032.c unsigned int shift, oldmask; shift 115 drivers/staging/comedi/drivers/addi_apci_1032.c shift = data[3]; shift 116 drivers/staging/comedi/drivers/addi_apci_1032.c oldmask = (1U << shift) - 1; shift 139 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode1 |= data[4] << shift; shift 140 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode2 |= data[5] << shift; shift 157 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode1 |= data[4] << shift; shift 158 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode2 |= data[5] << shift; shift 454 drivers/staging/comedi/drivers/addi_apci_1500.c unsigned int shift = data[3]; shift 455 drivers/staging/comedi/drivers/addi_apci_1500.c unsigned int hi_mask = data[4] << shift; shift 456 drivers/staging/comedi/drivers/addi_apci_1500.c unsigned int lo_mask = data[5] << shift; shift 458 drivers/staging/comedi/drivers/addi_apci_1500.c unsigned int old_mask = (1 << shift) - 1; shift 334 drivers/staging/comedi/drivers/addi_apci_1564.c unsigned int shift, oldmask; shift 340 drivers/staging/comedi/drivers/addi_apci_1564.c shift = data[3]; shift 341 drivers/staging/comedi/drivers/addi_apci_1564.c oldmask = (1U << shift) - 1; shift 365 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 |= data[4] << shift; shift 366 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode2 |= data[5] << shift; shift 383 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 |= data[4] << shift; shift 384 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode2 |= data[5] << shift; shift 398 drivers/staging/comedi/drivers/adl_pci9111.c unsigned int shift = (maxdata == 0xffff) ? 0 : 4; shift 403 drivers/staging/comedi/drivers/adl_pci9111.c array[i] = ((array[i] >> shift) & maxdata) ^ invert; shift 537 drivers/staging/comedi/drivers/adl_pci9111.c unsigned int shift = (maxdata == 0xffff) ? 0 : 4; shift 563 drivers/staging/comedi/drivers/adl_pci9111.c data[i] = ((data[i] >> shift) & maxdata) ^ invert; shift 923 drivers/staging/comedi/drivers/amplc_pci224.c unsigned int shift; shift 927 drivers/staging/comedi/drivers/amplc_pci224.c shift = 16 - board->ao_bits; shift 939 drivers/staging/comedi/drivers/amplc_pci224.c array[i] = (array[i] << shift) - offset; shift 311 drivers/staging/comedi/drivers/ni_6527.c unsigned int rising, falling, shift; shift 334 drivers/staging/comedi/drivers/ni_6527.c shift = data[3]; shift 335 drivers/staging/comedi/drivers/ni_6527.c if (shift >= s->n_chan) { shift 340 drivers/staging/comedi/drivers/ni_6527.c mask <<= shift; shift 341 drivers/staging/comedi/drivers/ni_6527.c rising = data[4] << shift; shift 342 drivers/staging/comedi/drivers/ni_6527.c falling = data[5] << shift; shift 536 drivers/staging/comedi/drivers/ni_660x.c unsigned int shift = CR_CHAN(insn->chanspec); shift 537 drivers/staging/comedi/drivers/ni_660x.c unsigned int mask = data[0] << shift; shift 538 drivers/staging/comedi/drivers/ni_660x.c unsigned int bits = data[1] << shift; shift 556 drivers/staging/comedi/drivers/ni_660x.c data[1] = ni_660x_read(dev, 0, NI660X_DIO32_INPUT) >> shift; shift 1125 drivers/staging/comedi/drivers/ni_tio.c unsigned int abz_reg, shift, mask; shift 1135 drivers/staging/comedi/drivers/ni_tio.c shift = 10; shift 1138 drivers/staging/comedi/drivers/ni_tio.c shift = 5; shift 1141 drivers/staging/comedi/drivers/ni_tio.c shift = 0; shift 1146 drivers/staging/comedi/drivers/ni_tio.c mask = 0x1f << shift; shift 1151 drivers/staging/comedi/drivers/ni_tio.c counter_dev->regs[chip][abz_reg] |= (source << shift) & mask; shift 1161 drivers/staging/comedi/drivers/ni_tio.c unsigned int abz_reg, shift, mask; shift 1172 drivers/staging/comedi/drivers/ni_tio.c shift = 10; shift 1175 drivers/staging/comedi/drivers/ni_tio.c shift = 5; shift 1178 drivers/staging/comedi/drivers/ni_tio.c shift = 0; shift 1185 drivers/staging/comedi/drivers/ni_tio.c *source = (ni_tio_get_soft_copy(counter, abz_reg) >> shift) & mask; shift 172 drivers/staging/comedi/kcomedilib/kcomedilib_main.c unsigned int shift; shift 194 drivers/staging/comedi/kcomedilib/kcomedilib_main.c shift = base_channel; shift 195 drivers/staging/comedi/kcomedilib/kcomedilib_main.c if (shift) { shift 197 drivers/staging/comedi/kcomedilib/kcomedilib_main.c data[0] <<= shift; shift 198 drivers/staging/comedi/kcomedilib/kcomedilib_main.c data[1] <<= shift; shift 201 drivers/staging/comedi/kcomedilib/kcomedilib_main.c shift = 0; shift 205 drivers/staging/comedi/kcomedilib/kcomedilib_main.c *bits = data[1] >> shift; shift 16 drivers/staging/greybus/audio_topology.c unsigned int reg, rreg, shift, rshift, invert; shift 211 drivers/staging/iio/accel/adis16240.c unsigned int shift = 16 - bits; shift 222 drivers/staging/iio/accel/adis16240.c val = (s16)(val << shift) >> shift; shift 191 drivers/staging/media/allegro-dvt/nal-h264.c int shift; shift 202 drivers/staging/media/allegro-dvt/nal-h264.c shift = 7 - (rbsp->pos % 8); shift 207 drivers/staging/media/allegro-dvt/nal-h264.c bit = (rbsp->data[ofs] >> shift) & 1; shift 222 drivers/staging/media/allegro-dvt/nal-h264.c int shift; shift 228 drivers/staging/media/allegro-dvt/nal-h264.c shift = 7 - (rbsp->pos % 8); shift 233 drivers/staging/media/allegro-dvt/nal-h264.c rbsp->data[ofs] &= ~(1 << shift); shift 234 drivers/staging/media/allegro-dvt/nal-h264.c rbsp->data[ofs] |= value << shift; shift 285 drivers/staging/media/hantro/hantro.h u32 shift; shift 374 drivers/staging/media/hantro/hantro.h v &= ~(reg->mask << reg->shift); shift 375 drivers/staging/media/hantro/hantro.h v |= ((val & reg->mask) << reg->shift); shift 276 drivers/staging/media/hantro/hantro_g1_vp8_dec.c reg.shift = 18; shift 282 drivers/staging/media/hantro/hantro_g1_vp8_dec.c reg.shift = 0; shift 303 drivers/staging/media/hantro/hantro_g1_vp8_dec.c reg.shift = 24; shift 354 drivers/staging/media/hantro/hantro_g1_vp8_dec.c reg.shift = 8; shift 357 drivers/staging/media/hantro/hantro_g1_vp8_dec.c reg.shift = 4; shift 360 drivers/staging/media/hantro/hantro_g1_vp8_dec.c reg.shift = 0; shift 200 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 18, shift 206 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 0, shift 212 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 24, shift 218 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 0, shift 224 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 23, shift 230 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 11, shift 236 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 3, shift 242 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 0, shift 248 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 0, shift 254 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 8, shift 260 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 8, shift 266 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 9, shift 272 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c .shift = 0, shift 96 drivers/staging/media/ipu3/ipu3-dmamap.c unsigned long shift = iova_shift(&imgu->iova_domain); shift 106 drivers/staging/media/ipu3/ipu3-dmamap.c iova = alloc_iova(&imgu->iova_domain, size >> shift, shift 107 drivers/staging/media/ipu3/ipu3-dmamap.c imgu->mmu->aperture_end >> shift, 0); shift 201 drivers/staging/media/ipu3/ipu3-dmamap.c unsigned long shift = iova_shift(&imgu->iova_domain); shift 219 drivers/staging/media/ipu3/ipu3-dmamap.c nents, size >> shift); shift 221 drivers/staging/media/ipu3/ipu3-dmamap.c iova = alloc_iova(&imgu->iova_domain, size >> shift, shift 222 drivers/staging/media/ipu3/ipu3-dmamap.c imgu->mmu->aperture_end >> shift, 0); shift 25 drivers/staging/media/tegra-vde/iommu.c unsigned long shift; shift 31 drivers/staging/media/tegra-vde/iommu.c shift = iova_shift(&vde->iova); shift 33 drivers/staging/media/tegra-vde/iommu.c iova = alloc_iova(&vde->iova, size >> shift, end >> shift, true); shift 53 drivers/staging/media/tegra-vde/iommu.c unsigned long shift = iova_shift(&vde->iova); shift 54 drivers/staging/media/tegra-vde/iommu.c unsigned long size = iova_size(iova) << shift; shift 66 drivers/staging/media/tegra-vde/iommu.c unsigned long shift; shift 102 drivers/staging/media/tegra-vde/iommu.c shift = iova_shift(&vde->iova); shift 103 drivers/staging/media/tegra-vde/iommu.c iova = reserve_iova(&vde->iova, 0x60000000 >> shift, shift 104 drivers/staging/media/tegra-vde/iommu.c 0x70000000 >> shift); shift 118 drivers/staging/media/tegra-vde/iommu.c iova = reserve_iova(&vde->iova, 0xffffffff >> shift, shift 119 drivers/staging/media/tegra-vde/iommu.c (0xffffffff >> shift) + 1); shift 229 drivers/staging/most/dim2/hal.c u8 const shift = (ch_addr % 2) * 16; shift 233 drivers/staging/most/dim2/hal.c mask[idx] = (u32)0xFFFF << shift; shift 234 drivers/staging/most/dim2/hal.c value[idx] = cat << shift; shift 242 drivers/staging/most/dim2/hal.c u8 const shift = (ch_addr % 2) * 16; shift 246 drivers/staging/most/dim2/hal.c mask[idx] = (u32)0xFFFF << shift; shift 300 drivers/staging/most/dim2/hal.c u8 const shift = idx * 16; shift 306 drivers/staging/most/dim2/hal.c bit_mask(ADT1_PS_BIT + shift) | shift 307 drivers/staging/most/dim2/hal.c bit_mask(ADT1_RDY_BIT + shift) | shift 308 drivers/staging/most/dim2/hal.c (ADT1_CTRL_ASYNC_BD_MASK << (ADT1_BD_SHIFT + shift)); shift 310 drivers/staging/most/dim2/hal.c (true << (ADT1_PS_BIT + shift)) | shift 311 drivers/staging/most/dim2/hal.c (true << (ADT1_RDY_BIT + shift)) | shift 312 drivers/staging/most/dim2/hal.c ((buffer_size - 1) << (ADT1_BD_SHIFT + shift)); shift 323 drivers/staging/most/dim2/hal.c u8 const shift = idx * 16; shift 329 drivers/staging/most/dim2/hal.c bit_mask(ADT1_RDY_BIT + shift) | shift 330 drivers/staging/most/dim2/hal.c (ADT1_ISOC_SYNC_BD_MASK << (ADT1_BD_SHIFT + shift)); shift 332 drivers/staging/most/dim2/hal.c (true << (ADT1_RDY_BIT + shift)) | shift 333 drivers/staging/most/dim2/hal.c ((buffer_size - 1) << (ADT1_BD_SHIFT + shift)); shift 576 drivers/staging/most/dim2/hal.c u8 const shift = idx * 16; shift 581 drivers/staging/most/dim2/hal.c if (((adt1 >> (ADT1_DNE_BIT + shift)) & 1) == 0) shift 585 drivers/staging/most/dim2/hal.c bit_mask(ADT1_DNE_BIT + shift) | shift 586 drivers/staging/most/dim2/hal.c bit_mask(ADT1_ERR_BIT + shift) | shift 587 drivers/staging/most/dim2/hal.c bit_mask(ADT1_RDY_BIT + shift); shift 124 drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c int shift; shift 136 drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c shift = p->groups[group].shift; shift 137 drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c if (shift >= 32) { shift 138 drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c shift -= 32; shift 142 drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c mode &= ~(p->groups[group].mask << shift); shift 150 drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c mode |= p->groups[group].gpio << shift; shift 154 drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c mode |= p->func[func]->value << shift; shift 545 drivers/staging/pi433/rf69.c u8 shift; shift 552 drivers/staging/pi433/rf69.c shift = SHIFT_DIO0; shift 557 drivers/staging/pi433/rf69.c shift = SHIFT_DIO1; shift 562 drivers/staging/pi433/rf69.c shift = SHIFT_DIO2; shift 567 drivers/staging/pi433/rf69.c shift = SHIFT_DIO3; shift 572 drivers/staging/pi433/rf69.c shift = SHIFT_DIO4; shift 577 drivers/staging/pi433/rf69.c shift = SHIFT_DIO5; shift 590 drivers/staging/pi433/rf69.c dio_value = dio_value | value << shift; shift 123 drivers/staging/rtl8712/rtl871x_mp.c u8 shift = offset & 0x0003; /* 4 byte access */ shift 132 drivers/staging/rtl8712/rtl871x_mp.c if (shift != 0) { shift 135 drivers/staging/rtl8712/rtl871x_mp.c bb_val >>= (shift * 8); shift 138 drivers/staging/rtl8712/rtl871x_mp.c bb_val2 <<= ((4 - shift) * 8); shift 147 drivers/staging/rtl8712/rtl871x_mp.c u8 shift = offset & 0x0003; /* 4 byte access */ shift 154 drivers/staging/rtl8712/rtl871x_mp.c if (shift != 0) { shift 159 drivers/staging/rtl8712/rtl871x_mp.c oldValue &= (0xFFFFFFFF >> ((4 - shift) * 8)); shift 160 drivers/staging/rtl8712/rtl871x_mp.c value = oldValue | (newValue << (shift * 8)); shift 165 drivers/staging/rtl8712/rtl871x_mp.c oldValue &= (0xFFFFFFFF << (shift * 8)); shift 166 drivers/staging/rtl8712/rtl871x_mp.c value = oldValue | (newValue >> ((4 - shift) * 8)); shift 175 drivers/staging/rtl8723bs/hal/sdio_ops.c u8 shift; shift 203 drivers/staging/rtl8723bs/hal/sdio_ops.c shift = ftaddr & 0x3; shift 204 drivers/staging/rtl8723bs/hal/sdio_ops.c if (shift == 0) { shift 217 drivers/staging/rtl8723bs/hal/sdio_ops.c memcpy(&le_tmp, tmpbuf + shift, 4); shift 232 drivers/staging/rtl8723bs/hal/sdio_ops.c u8 shift; shift 249 drivers/staging/rtl8723bs/hal/sdio_ops.c shift = ftaddr & 0x3; shift 250 drivers/staging/rtl8723bs/hal/sdio_ops.c if (shift == 0) { shift 257 drivers/staging/rtl8723bs/hal/sdio_ops.c n = cnt + shift; shift 264 drivers/staging/rtl8723bs/hal/sdio_ops.c memcpy(buf, tmpbuf + shift, cnt); shift 298 drivers/staging/rtl8723bs/hal/sdio_ops.c u8 shift; shift 319 drivers/staging/rtl8723bs/hal/sdio_ops.c shift = ftaddr & 0x3; shift 320 drivers/staging/rtl8723bs/hal/sdio_ops.c if (shift == 0) { shift 336 drivers/staging/rtl8723bs/hal/sdio_ops.c u8 shift; shift 352 drivers/staging/rtl8723bs/hal/sdio_ops.c shift = ftaddr & 0x3; shift 353 drivers/staging/rtl8723bs/hal/sdio_ops.c if (shift == 0) { shift 360 drivers/staging/rtl8723bs/hal/sdio_ops.c n = cnt + shift; shift 369 drivers/staging/rtl8723bs/hal/sdio_ops.c memcpy(tmpbuf + shift, buf, cnt); shift 21 drivers/staging/rtl8723bs/include/rtl8723b_recv.h u32 shift:2; shift 2252 drivers/staging/speakup/main.c if (speakup_key(vc, param->shift, keycode, param->value, up)) shift 144 drivers/thermal/intel/x86_pkg_temp_thermal.c u32 mask, shift, eax, edx; shift 152 drivers/thermal/intel/x86_pkg_temp_thermal.c shift = THERM_SHIFT_THRESHOLD1; shift 155 drivers/thermal/intel/x86_pkg_temp_thermal.c shift = THERM_SHIFT_THRESHOLD0; shift 163 drivers/thermal/intel/x86_pkg_temp_thermal.c thres_reg_value = (eax & mask) >> shift; shift 177 drivers/thermal/intel/x86_pkg_temp_thermal.c u32 l, h, mask, shift, intr; shift 190 drivers/thermal/intel/x86_pkg_temp_thermal.c shift = THERM_SHIFT_THRESHOLD1; shift 194 drivers/thermal/intel/x86_pkg_temp_thermal.c shift = THERM_SHIFT_THRESHOLD0; shift 205 drivers/thermal/intel/x86_pkg_temp_thermal.c l |= (zonedev->tj_max - temp)/1000 << shift; shift 65 drivers/thunderbolt/nhi.c u32 step, shift, ivr, misc; shift 86 drivers/thunderbolt/nhi.c shift = index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS; shift 88 drivers/thunderbolt/nhi.c ivr &= ~(REG_INT_VEC_ALLOC_MASK << shift); shift 90 drivers/thunderbolt/nhi.c ivr |= ring->vector << shift; shift 2551 drivers/tty/serial/sh-sci.c int shift = clamp(deviation / 2, -8, 7); shift 2553 drivers/tty/serial/sh-sci.c hssrr |= (shift << HSCIF_SRHP_SHIFT) & shift 2506 drivers/tty/synclinkmp.c unsigned char shift; shift 2557 drivers/tty/synclinkmp.c shift = i & 1 ? 4 :0; shift 2559 drivers/tty/synclinkmp.c if (status & BIT0 << shift) shift 2561 drivers/tty/synclinkmp.c if (status & BIT1 << shift) shift 2563 drivers/tty/synclinkmp.c if (status & BIT2 << shift) shift 2565 drivers/tty/synclinkmp.c if (status & BIT3 << shift) shift 2568 drivers/tty/synclinkmp.c if (dmastatus & BIT0 << shift) shift 2570 drivers/tty/synclinkmp.c if (dmastatus & BIT1 << shift) shift 2572 drivers/tty/synclinkmp.c if (dmastatus & BIT2 << shift) shift 2574 drivers/tty/synclinkmp.c if (dmastatus & BIT3 << shift) shift 1430 drivers/tty/vt/keyboard.c param.shift = shift_final = (shift_state | kbd->slockstate) ^ kbd->lockstate; shift 806 drivers/usb/gadget/udc/omap_udc.c int shift = 4 * (ep->dma_channel - 1); shift 807 drivers/usb/gadget/udc/omap_udc.c u16 mask = 0x0f << shift; shift 331 drivers/usb/musb/musb_cppi41.c unsigned shift; shift 333 drivers/usb/musb/musb_cppi41.c shift = (ep - 1) * 2; shift 334 drivers/usb/musb/musb_cppi41.c old &= ~(3 << shift); shift 335 drivers/usb/musb/musb_cppi41.c old |= mode << shift; shift 371 drivers/usb/musb/musb_cppi41.c unsigned int shift; shift 379 drivers/usb/musb/musb_cppi41.c shift = (port - 1) * 4; shift 381 drivers/usb/musb/musb_cppi41.c shift += 16; shift 382 drivers/usb/musb/musb_cppi41.c new_mode = old_mode & ~(3 << shift); shift 383 drivers/usb/musb/musb_cppi41.c new_mode |= mode << shift; shift 286 drivers/usb/storage/alauda.c unsigned int shift = media_info->zoneshift shift 288 drivers/usb/storage/alauda.c unsigned int num_zones = media_info->capacity >> shift; shift 390 drivers/vfio/vfio_iommu_spapr_tce.c unsigned long tce, unsigned long shift, shift 396 drivers/vfio/vfio_iommu_spapr_tce.c mem = mm_iommu_lookup(container->mm, tce, 1ULL << shift); shift 400 drivers/vfio/vfio_iommu_spapr_tce.c ret = mm_iommu_ua_to_hpa(mem, tce, shift, phpa); shift 1596 drivers/video/fbdev/amifb.c short clk_shift, vshift, fstrt, fsize, fstop, fconst, shift, move, mod; shift 1607 drivers/video/fbdev/amifb.c shift = modx(fconst, fstrt); shift 1627 drivers/video/fbdev/amifb.c par->bplcon1 = hscroll2hw(shift); shift 2602 drivers/video/fbdev/amifb.c int shift = dst_idx - src_idx, left, right; shift 2609 drivers/video/fbdev/amifb.c shift = dst_idx - src_idx; shift 2613 drivers/video/fbdev/amifb.c if (!shift) { shift 2654 drivers/video/fbdev/amifb.c right = shift & (BITS_PER_LONG - 1); shift 2655 drivers/video/fbdev/amifb.c left = -shift & (BITS_PER_LONG - 1); shift 2661 drivers/video/fbdev/amifb.c if (shift > 0) { shift 2678 drivers/video/fbdev/amifb.c if (shift > 0) { shift 2742 drivers/video/fbdev/amifb.c int shift = dst_idx - src_idx, left, right; shift 2760 drivers/video/fbdev/amifb.c shift = dst_idx - src_idx; shift 2764 drivers/video/fbdev/amifb.c if (!shift) { shift 2805 drivers/video/fbdev/amifb.c right = shift & (BITS_PER_LONG - 1); shift 2806 drivers/video/fbdev/amifb.c left = -shift & (BITS_PER_LONG - 1); shift 2812 drivers/video/fbdev/amifb.c if (shift < 0) { shift 2829 drivers/video/fbdev/amifb.c if (shift < 0) { shift 2894 drivers/video/fbdev/amifb.c int shift = dst_idx - src_idx, left, right; shift 2901 drivers/video/fbdev/amifb.c shift = dst_idx - src_idx; shift 2905 drivers/video/fbdev/amifb.c if (!shift) { shift 2946 drivers/video/fbdev/amifb.c right = shift & (BITS_PER_LONG - 1); shift 2947 drivers/video/fbdev/amifb.c left = -shift & (BITS_PER_LONG - 1); shift 2953 drivers/video/fbdev/amifb.c if (shift > 0) { shift 2970 drivers/video/fbdev/amifb.c if (shift > 0) { shift 21 drivers/video/fbdev/c2p_core.h unsigned int shift, u32 mask) shift 23 drivers/video/fbdev/c2p_core.h u32 t = (d[i1] ^ (d[i2] >> shift)) & mask; shift 26 drivers/video/fbdev/c2p_core.h d[i2] ^= t << shift; shift 48 drivers/video/fbdev/clps711x-fb.c u32 level, mask, shift; shift 53 drivers/video/fbdev/clps711x-fb.c shift = 4 * (regno & 7); shift 54 drivers/video/fbdev/clps711x-fb.c mask = 0xf << shift; shift 56 drivers/video/fbdev/clps711x-fb.c level = (((red * 77 + green * 151 + blue * 28) >> 20) << shift) & mask; shift 51 drivers/video/fbdev/core/cfbcopyarea.c int const shift = dst_idx-src_idx; shift 66 drivers/video/fbdev/core/cfbcopyarea.c if (!shift) { shift 110 drivers/video/fbdev/core/cfbcopyarea.c int const left = shift & (bits - 1); shift 111 drivers/video/fbdev/core/cfbcopyarea.c int const right = -shift & (bits - 1); shift 119 drivers/video/fbdev/core/cfbcopyarea.c if (shift > 0) { shift 143 drivers/video/fbdev/core/cfbcopyarea.c if (shift > 0) { shift 217 drivers/video/fbdev/core/cfbcopyarea.c int shift; shift 234 drivers/video/fbdev/core/cfbcopyarea.c shift = dst_idx-src_idx; shift 239 drivers/video/fbdev/core/cfbcopyarea.c if (!shift) { shift 283 drivers/video/fbdev/core/cfbcopyarea.c int const left = shift & (bits-1); shift 284 drivers/video/fbdev/core/cfbcopyarea.c int const right = -shift & (bits-1); shift 291 drivers/video/fbdev/core/cfbcopyarea.c if (shift < 0) { shift 316 drivers/video/fbdev/core/cfbcopyarea.c if (shift < 0) { shift 82 drivers/video/fbdev/core/cfbimgblt.c u32 color = 0, val, shift; shift 93 drivers/video/fbdev/core/cfbimgblt.c shift = 0; shift 100 drivers/video/fbdev/core/cfbimgblt.c shift = start_index; shift 109 drivers/video/fbdev/core/cfbimgblt.c val |= FB_SHIFT_HIGH(p, color, shift ^ bswapmask); shift 110 drivers/video/fbdev/core/cfbimgblt.c if (shift >= null_bits) { shift 113 drivers/video/fbdev/core/cfbimgblt.c val = (shift == null_bits) ? 0 : shift 114 drivers/video/fbdev/core/cfbimgblt.c FB_SHIFT_LOW(p, color, 32 - shift); shift 116 drivers/video/fbdev/core/cfbimgblt.c shift += bpp; shift 117 drivers/video/fbdev/core/cfbimgblt.c shift &= (32 - 1); shift 120 drivers/video/fbdev/core/cfbimgblt.c if (shift) { shift 121 drivers/video/fbdev/core/cfbimgblt.c u32 end_mask = fb_shifted_pixels_mask_u32(p, shift, shift 143 drivers/video/fbdev/core/cfbimgblt.c u32 shift, color = 0, bpp = p->var.bits_per_pixel; shift 157 drivers/video/fbdev/core/cfbimgblt.c shift = val = 0; shift 168 drivers/video/fbdev/core/cfbimgblt.c shift = start_index; shift 174 drivers/video/fbdev/core/cfbimgblt.c val |= FB_SHIFT_HIGH(p, color, shift ^ bswapmask); shift 177 drivers/video/fbdev/core/cfbimgblt.c if (shift >= null_bits) { shift 179 drivers/video/fbdev/core/cfbimgblt.c val = (shift == null_bits) ? 0 : shift 180 drivers/video/fbdev/core/cfbimgblt.c FB_SHIFT_LOW(p, color, 32 - shift); shift 182 drivers/video/fbdev/core/cfbimgblt.c shift += bpp; shift 183 drivers/video/fbdev/core/cfbimgblt.c shift &= (32 - 1); shift 188 drivers/video/fbdev/core/cfbimgblt.c if (shift) { shift 189 drivers/video/fbdev/core/cfbimgblt.c u32 end_mask = fb_shifted_pixels_mask_u32(p, shift, shift 221 drivers/video/fbdev/core/cfbimgblt.c u32 bit_mask, end_mask, eorx, shift; shift 252 drivers/video/fbdev/core/cfbimgblt.c dst = (u32 __iomem *) dst1, shift = 8; src = s; shift 255 drivers/video/fbdev/core/cfbimgblt.c shift -= ppw; shift 256 drivers/video/fbdev/core/cfbimgblt.c end_mask = tab[(*src >> shift) & bit_mask]; shift 258 drivers/video/fbdev/core/cfbimgblt.c if (!shift) { shift = 8; src++; } shift 182 drivers/video/fbdev/core/fb_draw.h static inline unsigned long rolx(unsigned long word, unsigned int shift, unsigned int x) shift 184 drivers/video/fbdev/core/fb_draw.h return (word << shift) | (word >> (x - shift)); shift 119 drivers/video/fbdev/core/fbcon.h static inline int attr_col_ec(int shift, struct vc_data *vc, shift 131 drivers/video/fbdev/core/fbcon.h return is_fg ? attr_fgcol(shift,vc->vc_video_erase_char) shift 132 drivers/video/fbdev/core/fbcon.h : attr_bgcol(shift,vc->vc_video_erase_char); shift 43 drivers/video/fbdev/core/fbcon_rotate.h int shift = (8 - (width % 8)) & 7; shift 48 drivers/video/fbdev/core/fbcon_rotate.h for (j = 0; j < width - shift; j++) { shift 50 drivers/video/fbdev/core/fbcon_rotate.h pattern_set_bit(width - (1 + j + shift), shift 61 drivers/video/fbdev/core/fbcon_rotate.h int shift = (8 - (height % 8)) & 7; shift 69 drivers/video/fbdev/core/fbcon_rotate.h pattern_set_bit(height - 1 - i - shift, j, shift 79 drivers/video/fbdev/core/fbcon_rotate.h int shift = (8 - (width % 8)) & 7; shift 87 drivers/video/fbdev/core/fbcon_rotate.h pattern_set_bit(i, width - 1 - j - shift, shift 32 drivers/video/fbdev/core/syscopyarea.c int const shift = dst_idx-src_idx; shift 38 drivers/video/fbdev/core/syscopyarea.c if (!shift) { shift 80 drivers/video/fbdev/core/syscopyarea.c right = shift & (bits - 1); shift 81 drivers/video/fbdev/core/syscopyarea.c left = -shift & (bits - 1); shift 87 drivers/video/fbdev/core/syscopyarea.c if (shift > 0) { shift 110 drivers/video/fbdev/core/syscopyarea.c if (shift > 0) { shift 175 drivers/video/fbdev/core/syscopyarea.c int shift; shift 182 drivers/video/fbdev/core/syscopyarea.c shift = dst_idx-src_idx; shift 187 drivers/video/fbdev/core/syscopyarea.c if (!shift) { shift 227 drivers/video/fbdev/core/syscopyarea.c int const left = shift & (bits-1); shift 228 drivers/video/fbdev/core/syscopyarea.c int const right = -shift & (bits-1); shift 234 drivers/video/fbdev/core/syscopyarea.c if (shift < 0) { shift 258 drivers/video/fbdev/core/syscopyarea.c if (shift < 0) { shift 57 drivers/video/fbdev/core/sysimgblt.c u32 color = 0, val, shift; shift 67 drivers/video/fbdev/core/sysimgblt.c shift = 0; shift 74 drivers/video/fbdev/core/sysimgblt.c shift = start_index; shift 83 drivers/video/fbdev/core/sysimgblt.c val |= FB_SHIFT_HIGH(p, color, shift); shift 84 drivers/video/fbdev/core/sysimgblt.c if (shift >= null_bits) { shift 87 drivers/video/fbdev/core/sysimgblt.c val = (shift == null_bits) ? 0 : shift 88 drivers/video/fbdev/core/sysimgblt.c FB_SHIFT_LOW(p, color, 32 - shift); shift 90 drivers/video/fbdev/core/sysimgblt.c shift += bpp; shift 91 drivers/video/fbdev/core/sysimgblt.c shift &= (32 - 1); shift 94 drivers/video/fbdev/core/sysimgblt.c if (shift) { shift 95 drivers/video/fbdev/core/sysimgblt.c u32 end_mask = FB_SHIFT_HIGH(p, ~(u32)0, shift); shift 115 drivers/video/fbdev/core/sysimgblt.c u32 shift, color = 0, bpp = p->var.bits_per_pixel; shift 128 drivers/video/fbdev/core/sysimgblt.c shift = val = 0; shift 139 drivers/video/fbdev/core/sysimgblt.c shift = start_index; shift 145 drivers/video/fbdev/core/sysimgblt.c val |= FB_SHIFT_HIGH(p, color, shift); shift 148 drivers/video/fbdev/core/sysimgblt.c if (shift >= null_bits) { shift 150 drivers/video/fbdev/core/sysimgblt.c val = (shift == null_bits) ? 0 : shift 151 drivers/video/fbdev/core/sysimgblt.c FB_SHIFT_LOW(p, color, 32 - shift); shift 153 drivers/video/fbdev/core/sysimgblt.c shift += bpp; shift 154 drivers/video/fbdev/core/sysimgblt.c shift &= (32 - 1); shift 159 drivers/video/fbdev/core/sysimgblt.c if (shift) { shift 160 drivers/video/fbdev/core/sysimgblt.c u32 end_mask = FB_SHIFT_HIGH(p, ~(u32)0, shift); shift 191 drivers/video/fbdev/core/sysimgblt.c u32 bit_mask, end_mask, eorx, shift; shift 223 drivers/video/fbdev/core/sysimgblt.c shift = 8; shift 227 drivers/video/fbdev/core/sysimgblt.c shift -= ppw; shift 228 drivers/video/fbdev/core/sysimgblt.c end_mask = tab[(*src >> shift) & bit_mask]; shift 230 drivers/video/fbdev/core/sysimgblt.c if (!shift) { shift 231 drivers/video/fbdev/core/sysimgblt.c shift = 8; shift 817 drivers/video/fbdev/omap2/omapfb/dss/dispc.c int shift; shift 822 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = shifts[plane]; shift 823 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, shift + 7, shift); shift 931 drivers/video/fbdev/omap2/omapfb/dss/dispc.c int shift; shift 937 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = 8; shift 942 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = 16; shift 982 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_MOD(val, chan, shift, shift); shift 985 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_MOD(val, channel, shift, shift); shift 993 drivers/video/fbdev/omap2/omapfb/dss/dispc.c int shift; shift 998 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = 8; shift 1003 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = 16; shift 1012 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (FLD_GET(val, shift, shift) == 1) shift 1042 drivers/video/fbdev/omap2/omapfb/dss/dispc.c int shift; shift 1044 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = shifts[plane]; shift 1045 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), burst_size, shift + 1, shift); shift 1124 drivers/video/fbdev/omap2/omapfb/dss/dispc.c int shift; shift 1129 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = shifts[plane]; shift 1130 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift); shift 168 drivers/video/fbdev/omap2/omapfb/dss/dss.c unsigned shift; shift 178 drivers/video/fbdev/omap2/omapfb/dss/dss.c shift = 0; shift 181 drivers/video/fbdev/omap2/omapfb/dss/dss.c shift = 1; shift 184 drivers/video/fbdev/omap2/omapfb/dss/dss.c shift = 2; shift 192 drivers/video/fbdev/omap2/omapfb/dss/dss.c 1 << shift, val << shift); shift 198 drivers/video/fbdev/omap2/omapfb/dss/dss.c unsigned shift, val; shift 205 drivers/video/fbdev/omap2/omapfb/dss/dss.c shift = 3; shift 219 drivers/video/fbdev/omap2/omapfb/dss/dss.c shift = 5; shift 235 drivers/video/fbdev/omap2/omapfb/dss/dss.c shift = 7; shift 256 drivers/video/fbdev/omap2/omapfb/dss/dss.c 0x3 << shift, val << shift); shift 202 drivers/video/fbdev/omap2/omapfb/dss/hdmi.h u8 shift; shift 595 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c r = FLD_MOD(r, cfg->i2s_cfg.shift, 0, 0); shift 715 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c acore.i2s_cfg.shift = HDMI_AUDIO_I2S_FIRST_BIT_SHIFT; shift 7570 drivers/video/fbdev/sis/init301.c SiS_ShiftXPos(struct SiS_Private *SiS_Pr, int shift) shift 7576 drivers/video/fbdev/sis/init301.c temp = (unsigned short)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift); shift 7580 drivers/video/fbdev/sis/init301.c temp = (unsigned short)((int)(temp) + shift); shift 7584 drivers/video/fbdev/sis/init301.c temp = (unsigned short)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift); shift 418 drivers/video/fbdev/tgafb.c int delta = f - (TGA_PLL_BASE_FREQ * (X)) / (r << shift); \ shift 429 drivers/video/fbdev/tgafb.c int n, shift, base, min_diff, target; shift 439 drivers/video/fbdev/tgafb.c shift = 0; shift 441 drivers/video/fbdev/tgafb.c shift = 1; shift 443 drivers/video/fbdev/tgafb.c shift = 2; shift 445 drivers/video/fbdev/tgafb.c TGA_WRITE_REG(par, shift & 1, TGA_CLOCK_REG); shift 446 drivers/video/fbdev/tgafb.c TGA_WRITE_REG(par, shift >> 1, TGA_CLOCK_REG); shift 471 drivers/video/fbdev/tgafb.c target = (f << shift) / TGA_PLL_BASE_FREQ; shift 624 drivers/video/fbdev/tgafb.c unsigned long rincr, line_length, shift, pos, is8bpp; shift 679 drivers/video/fbdev/tgafb.c shift = pos & 3; shift 683 drivers/video/fbdev/tgafb.c shift = (pos & 7) >> 2; shift 695 drivers/video/fbdev/tgafb.c if (width + shift <= 32) { shift 703 drivers/video/fbdev/tgafb.c pixelmask <<= shift; shift 717 drivers/video/fbdev/tgafb.c __raw_writel(mask << shift, fb_base + pos); shift 724 drivers/video/fbdev/tgafb.c } else if (shift == 0) { shift 784 drivers/video/fbdev/tgafb.c pixelmask = 0xffff << shift; shift 794 drivers/video/fbdev/tgafb.c mask <<= shift; shift 802 drivers/video/fbdev/tgafb.c pixelmask = ((1ul << (width & 15)) - 1) << shift; shift 815 drivers/video/fbdev/tgafb.c mask <<= shift; shift 842 drivers/video/fbdev/tridentfb.c unsigned char shift = !is_oldclock(par->chip_id) ? 2 : 1; shift 845 drivers/video/fbdev/tridentfb.c for (k = shift; k >= 0; k--) shift 847 drivers/video/fbdev/tridentfb.c n = ((m + 2) << shift) - 8; shift 992 drivers/video/fbdev/uvesafb.c int shift = 16 - dac_width; shift 999 drivers/video/fbdev/uvesafb.c entry.red = red >> shift; shift 1000 drivers/video/fbdev/uvesafb.c entry.green = green >> shift; shift 1001 drivers/video/fbdev/uvesafb.c entry.blue = blue >> shift; shift 1041 drivers/video/fbdev/uvesafb.c int shift = 16 - dac_width; shift 1055 drivers/video/fbdev/uvesafb.c entries[i].red = cmap->red[i] >> shift; shift 1056 drivers/video/fbdev/uvesafb.c entries[i].green = cmap->green[i] >> shift; shift 1057 drivers/video/fbdev/uvesafb.c entries[i].blue = cmap->blue[i] >> shift; shift 89 drivers/video/fbdev/vesafb.c int shift = 16 - depth; shift 97 drivers/video/fbdev/vesafb.c outb_p(red >> shift, dac_val); shift 98 drivers/video/fbdev/vesafb.c outb_p(green >> shift, dac_val); shift 99 drivers/video/fbdev/vesafb.c outb_p(blue >> shift, dac_val); shift 110 drivers/video/fbdev/vesafb.c entry.red = red >> shift; shift 111 drivers/video/fbdev/vesafb.c entry.green = green >> shift; shift 112 drivers/video/fbdev/vesafb.c entry.blue = blue >> shift; shift 321 drivers/video/fbdev/vga16fb.c int shift; shift 331 drivers/video/fbdev/vga16fb.c shift = 3; shift 336 drivers/video/fbdev/vga16fb.c shift = 3; shift 343 drivers/video/fbdev/vga16fb.c shift = 2; shift 373 drivers/video/fbdev/vga16fb.c xres >>= shift; shift 374 drivers/video/fbdev/vga16fb.c right >>= shift; shift 375 drivers/video/fbdev/vga16fb.c hslen >>= shift; shift 376 drivers/video/fbdev/vga16fb.c left >>= shift; shift 377 drivers/video/fbdev/vga16fb.c vxres >>= shift; shift 452 drivers/video/fbdev/vga16fb.c pos = yoffset * vxres + (xoffset >> shift); shift 178 fs/adfs/adfs.h static inline __u32 signed_asl(__u32 val, signed int shift) shift 180 fs/adfs/adfs.h if (shift >= 0) shift 181 fs/adfs/adfs.h val <<= shift; shift 183 fs/adfs/adfs.h val >>= -shift; shift 1268 fs/btrfs/compression.c static u8 get4bits(u64 num, int shift) { shift 1271 fs/btrfs/compression.c num >>= shift; shift 1295 fs/btrfs/compression.c int shift; shift 1312 fs/btrfs/compression.c shift = 0; shift 1313 fs/btrfs/compression.c while (shift < bitlen) { shift 1318 fs/btrfs/compression.c addr = get4bits(buf_num, shift); shift 1327 fs/btrfs/compression.c addr = get4bits(buf_num, shift); shift 1333 fs/btrfs/compression.c shift += RADIX_BASE; shift 1345 fs/btrfs/compression.c addr = get4bits(buf_num, shift); shift 1354 fs/btrfs/compression.c addr = get4bits(buf_num, shift); shift 1360 fs/btrfs/compression.c shift += RADIX_BASE; shift 400 fs/cachefiles/rdwr.c unsigned shift; shift 419 fs/cachefiles/rdwr.c shift = PAGE_SHIFT - inode->i_sb->s_blocksize_bits; shift 432 fs/cachefiles/rdwr.c block0 <<= shift; shift 693 fs/cachefiles/rdwr.c unsigned shift, nrbackpages; shift 718 fs/cachefiles/rdwr.c shift = PAGE_SHIFT - inode->i_sb->s_blocksize_bits; shift 740 fs/cachefiles/rdwr.c block0 <<= shift; shift 626 fs/exec.c static int shift_arg_pages(struct vm_area_struct *vma, unsigned long shift) shift 632 fs/exec.c unsigned long new_start = old_start - shift; shift 633 fs/exec.c unsigned long new_end = old_end - shift; shift 5235 fs/ext4/extents.c ext4_ext_shift_path_extents(struct ext4_ext_path *path, ext4_lblk_t shift, shift 5262 fs/ext4/extents.c -shift); shift 5273 fs/ext4/extents.c le32_add_cpu(&ex_last->ee_block, shift); shift 5293 fs/ext4/extents.c le32_add_cpu(&path[depth].p_idx->ei_block, -shift); shift 5295 fs/ext4/extents.c le32_add_cpu(&path[depth].p_idx->ei_block, shift); shift 5320 fs/ext4/extents.c ext4_lblk_t start, ext4_lblk_t shift, shift 5362 fs/ext4/extents.c if ((start == ex_start && shift > ex_start) || shift 5363 fs/ext4/extents.c (shift > start - ex_end)) { shift 5368 fs/ext4/extents.c if (shift > EXT_MAX_BLOCKS - shift 5429 fs/ext4/extents.c ret = ext4_ext_shift_path_extents(path, shift, inode, shift 2734 fs/ext4/xattr.c goto shift; shift 2784 fs/ext4/xattr.c shift: shift 36 fs/f2fs/segment.c int shift = 24, idx = 0; shift 39 fs/f2fs/segment.c shift = 56; shift 41 fs/f2fs/segment.c while (shift >= 0) { shift 42 fs/f2fs/segment.c tmp |= (unsigned long)str[idx++] << shift; shift 43 fs/f2fs/segment.c shift -= BITS_PER_BYTE; shift 2292 fs/gfs2/bmap.c unsigned int shift = sdp->sd_sb.sb_bsize_shift; shift 2298 fs/gfs2/bmap.c lblock_stop = i_size_read(jd->jd_inode) >> shift; shift 2299 fs/gfs2/bmap.c size = (lblock_stop - lblock) << shift; shift 2310 fs/gfs2/bmap.c rc = gfs2_add_jextent(jd, lblock, bh.b_blocknr, bh.b_size >> shift); shift 2348 fs/gfs2/bmap.c unsigned int shift; shift 2361 fs/gfs2/bmap.c shift = sdp->sd_sb.sb_bsize_shift; shift 2363 fs/gfs2/bmap.c end_of_file = (i_size_read(&ip->i_inode) + sdp->sd_sb.sb_bsize - 1) >> shift; shift 2364 fs/gfs2/bmap.c lblock = offset >> shift; shift 2365 fs/gfs2/bmap.c lblock_stop = (offset + len + sdp->sd_sb.sb_bsize - 1) >> shift; shift 2369 fs/gfs2/bmap.c size = (lblock_stop - lblock) << shift; shift 506 fs/gfs2/lops.c unsigned int shift = PAGE_SHIFT - bsize_shift; shift 526 fs/gfs2/lops.c block >> shift, GFP_NOFS); shift 571 fs/gfs2/lops.c gfs2_jhead_process_page(jd, blocks_read >> shift, head, &done); shift 582 fs/gfs2/lops.c gfs2_jhead_process_page(jd, blocks_read >> shift, head, &done); shift 116 fs/gfs2/meta_io.c unsigned int shift; shift 123 fs/gfs2/meta_io.c shift = PAGE_SHIFT - sdp->sd_sb.sb_bsize_shift; shift 124 fs/gfs2/meta_io.c index = blkno >> shift; /* convert block to page */ shift 125 fs/gfs2/meta_io.c bufnum = blkno - (index << shift); /* block buf index within page */ shift 220 fs/jbd2/revoke.c int shift = 0; shift 229 fs/jbd2/revoke.c shift++; shift 232 fs/jbd2/revoke.c table->hash_shift = shift; shift 31 fs/nls/nls_base.c int shift; shift 103 fs/nls/nls_base.c c = t->shift; shift 1529 fs/ocfs2/alloc.c int ret, shift; shift 1536 fs/ocfs2/alloc.c shift = ocfs2_find_branch_target(et, &bh); shift 1537 fs/ocfs2/alloc.c if (shift < 0) { shift 1538 fs/ocfs2/alloc.c ret = shift; shift 1546 fs/ocfs2/alloc.c if (shift) { shift 206 fs/orangefs/orangefs-bufmap.c int shift = 0; shift 210 fs/orangefs/orangefs-bufmap.c shift = bufmap->desc_shift; shift 212 fs/orangefs/orangefs-bufmap.c return shift; shift 93 fs/overlayfs/inode.c unsigned int shift = 64 - xinobits; shift 102 fs/overlayfs/inode.c if (stat->ino >> shift) { shift 107 fs/overlayfs/inode.c stat->ino |= ((u64)lower_layer->fsid) << shift; shift 297 fs/reiserfs/do_balan.c int new_item_len, shift; shift 320 fs/reiserfs/do_balan.c shift = 0; shift 322 fs/reiserfs/do_balan.c shift = tb->tb_sb->s_blocksize_bits - UNFM_P_SHIFT; shift 324 fs/reiserfs/do_balan.c add_le_ih_k_offset(ih, tb->lbytes << shift); shift 482 fs/reiserfs/do_balan.c int shift = tb->tb_sb->s_blocksize_bits - UNFM_P_SHIFT; shift 483 fs/reiserfs/do_balan.c temp_l = l_n << shift; shift 642 fs/reiserfs/do_balan.c int shift; shift 655 fs/reiserfs/do_balan.c shift = 0; shift 657 fs/reiserfs/do_balan.c shift = tb->tb_sb->s_blocksize_bits - UNFM_P_SHIFT; shift 658 fs/reiserfs/do_balan.c offset = le_ih_k_offset(ih) + ((old_len - tb->rbytes) << shift); shift 804 fs/reiserfs/do_balan.c int shift = tb->tb_sb->s_blocksize_bits - UNFM_P_SHIFT; shift 805 fs/reiserfs/do_balan.c temp_rem = n_rem << shift; shift 929 fs/reiserfs/do_balan.c int shift; shift 957 fs/reiserfs/do_balan.c shift = 0; shift 959 fs/reiserfs/do_balan.c shift = tb->tb_sb->s_blocksize_bits - UNFM_P_SHIFT; shift 962 fs/reiserfs/do_balan.c ((old_len - tb->sbytes[i]) << shift)); shift 1073 fs/reiserfs/do_balan.c int n_shift, n_rem, r_zeroes_number, shift; shift 1125 fs/reiserfs/do_balan.c shift = 0; shift 1128 fs/reiserfs/do_balan.c shift = tb->tb_sb->s_blocksize_bits - UNFM_P_SHIFT; shift 1130 fs/reiserfs/do_balan.c add_le_ih_k_offset(tmp, n_rem << shift); shift 130 fs/ufs/inode.c int shift = uspi->s_apbshift-uspi->s_fpbshift; shift 159 fs/ufs/inode.c fs32_to_cpu(sb, q->key32) + (n>>shift)); shift 183 fs/ufs/inode.c fs64_to_cpu(sb, q->key64) + (n>>shift)); shift 340 fs/ufs/inode.c int shift = uspi->s_apbshift - uspi->s_fpbshift; shift 348 fs/ufs/inode.c bh = sb_bread(sb, ind_block + (index >> shift)); shift 5543 fs/xfs/libxfs/xfs_bmap.c xfs_fileoff_t shift) /* shift fsb */ shift 5547 fs/xfs/libxfs/xfs_bmap.c startoff = got->br_startoff - shift; shift 5576 fs/xfs/libxfs/xfs_bmap.c xfs_fileoff_t shift, /* shift fsb */ shift 5592 fs/xfs/libxfs/xfs_bmap.c ASSERT(xfs_bmse_can_merge(left, got, shift)); shift 5786 fs/xfs/libxfs/xfs_bmap.c xfs_fileoff_t shift) shift 5800 fs/xfs/libxfs/xfs_bmap.c ((got.br_startoff + shift) & BMBT_STARTOFF_MASK) < got.br_startoff) shift 221 fs/xfs/libxfs/xfs_bmap.h xfs_fileoff_t shift); shift 345 fs/xfs/xfs_iomap.c int shift = 0; shift 357 fs/xfs/xfs_iomap.c shift = 2; shift 359 fs/xfs/xfs_iomap.c shift += 2; shift 361 fs/xfs/xfs_iomap.c shift += 2; shift 368 fs/xfs/xfs_iomap.c if ((freesp >> shift) < (*qblocks >> *qshift)) { shift 370 fs/xfs/xfs_iomap.c *qshift = shift; shift 404 fs/xfs/xfs_iomap.c int shift = 0; shift 463 fs/xfs/xfs_iomap.c shift = 2; shift 465 fs/xfs/xfs_iomap.c shift++; shift 467 fs/xfs/xfs_iomap.c shift++; shift 469 fs/xfs/xfs_iomap.c shift++; shift 471 fs/xfs/xfs_iomap.c shift++; shift 496 fs/xfs/xfs_iomap.c shift = max(shift, qshift); shift 498 fs/xfs/xfs_iomap.c if (shift) shift 499 fs/xfs/xfs_iomap.c alloc_blocks >>= shift; shift 520 fs/xfs/xfs_iomap.c trace_xfs_iomap_prealloc_size(ip, alloc_blocks, shift, shift 710 fs/xfs/xfs_trace.h TP_PROTO(struct xfs_inode *ip, xfs_fsblock_t blocks, int shift, shift 712 fs/xfs/xfs_trace.h TP_ARGS(ip, blocks, shift, writeio_blocks), shift 717 fs/xfs/xfs_trace.h __field(int, shift) shift 724 fs/xfs/xfs_trace.h __entry->shift = shift; shift 730 fs/xfs/xfs_trace.h __entry->blocks, __entry->shift, __entry->writeio_blocks) shift 99 include/drm/drm_fixed.h unsigned shift, sign = (a >> 63) & 1; shift 101 include/drm/drm_fixed.h for (shift = 62; shift > 0; --shift) shift 102 include/drm/drm_fixed.h if (((a >> shift) & 1) != sign) shift 103 include/drm/drm_fixed.h return shift; shift 110 include/drm/drm_fixed.h unsigned shift = drm_fixp_msbset(a) + drm_fixp_msbset(b); shift 113 include/drm/drm_fixed.h if (shift > 61) { shift 114 include/drm/drm_fixed.h shift = shift - 61; shift 115 include/drm/drm_fixed.h a >>= (shift >> 1) + (shift & 1); shift 116 include/drm/drm_fixed.h b >>= shift >> 1; shift 118 include/drm/drm_fixed.h shift = 0; shift 122 include/drm/drm_fixed.h if (shift > DRM_FIXED_POINT) shift 123 include/drm/drm_fixed.h return result << (shift - DRM_FIXED_POINT); shift 125 include/drm/drm_fixed.h if (shift < DRM_FIXED_POINT) shift 126 include/drm/drm_fixed.h return result >> (DRM_FIXED_POINT - shift); shift 133 include/drm/drm_fixed.h unsigned shift = 62 - drm_fixp_msbset(a); shift 136 include/drm/drm_fixed.h a <<= shift; shift 138 include/drm/drm_fixed.h if (shift < DRM_FIXED_POINT) shift 139 include/drm/drm_fixed.h b >>= (DRM_FIXED_POINT - shift); shift 143 include/drm/drm_fixed.h if (shift > DRM_FIXED_POINT) shift 144 include/drm/drm_fixed.h return result >> (shift - DRM_FIXED_POINT); shift 55 include/drm/drm_hashtab.h unsigned long seed, int bits, int shift, shift 34 include/linux/badblocks.h int shift; /* shift from sectors to block size shift 130 include/linux/bitmap.h unsigned int shift, unsigned int nbits); shift 132 include/linux/bitmap.h unsigned int shift, unsigned int nbits); shift 418 include/linux/bitmap.h unsigned int shift, unsigned int nbits) shift 421 include/linux/bitmap.h *dst = (*src & BITMAP_LAST_WORD_MASK(nbits)) >> shift; shift 423 include/linux/bitmap.h __bitmap_shift_right(dst, src, shift, nbits); shift 427 include/linux/bitmap.h unsigned int shift, unsigned int nbits) shift 430 include/linux/bitmap.h *dst = (*src << shift) & BITMAP_LAST_WORD_MASK(nbits); shift 432 include/linux/bitmap.h __bitmap_shift_left(dst, src, shift, nbits); shift 68 include/linux/bitops.h static inline __u64 rol64(__u64 word, unsigned int shift) shift 70 include/linux/bitops.h return (word << (shift & 63)) | (word >> ((-shift) & 63)); shift 78 include/linux/bitops.h static inline __u64 ror64(__u64 word, unsigned int shift) shift 80 include/linux/bitops.h return (word >> (shift & 63)) | (word << ((-shift) & 63)); shift 88 include/linux/bitops.h static inline __u32 rol32(__u32 word, unsigned int shift) shift 90 include/linux/bitops.h return (word << (shift & 31)) | (word >> ((-shift) & 31)); shift 98 include/linux/bitops.h static inline __u32 ror32(__u32 word, unsigned int shift) shift 100 include/linux/bitops.h return (word >> (shift & 31)) | (word << ((-shift) & 31)); shift 108 include/linux/bitops.h static inline __u16 rol16(__u16 word, unsigned int shift) shift 110 include/linux/bitops.h return (word << (shift & 15)) | (word >> ((-shift) & 15)); shift 118 include/linux/bitops.h static inline __u16 ror16(__u16 word, unsigned int shift) shift 120 include/linux/bitops.h return (word >> (shift & 15)) | (word << ((-shift) & 15)); shift 128 include/linux/bitops.h static inline __u8 rol8(__u8 word, unsigned int shift) shift 130 include/linux/bitops.h return (word << (shift & 7)) | (word >> ((-shift) & 7)); shift 138 include/linux/bitops.h static inline __u8 ror8(__u8 word, unsigned int shift) shift 140 include/linux/bitops.h return (word >> (shift & 7)) | (word << ((-shift) & 7)); shift 152 include/linux/bitops.h __u8 shift = 31 - index; shift 153 include/linux/bitops.h return (__s32)(value << shift) >> shift; shift 163 include/linux/bitops.h __u8 shift = 63 - index; shift 164 include/linux/bitops.h return (__s64)(value << shift) >> shift; shift 449 include/linux/clk-provider.h u8 shift; shift 488 include/linux/clk-provider.h void __iomem *reg, u8 shift, u8 width, shift 492 include/linux/clk-provider.h void __iomem *reg, u8 shift, u8 width, shift 496 include/linux/clk-provider.h void __iomem *reg, u8 shift, u8 width, shift 501 include/linux/clk-provider.h void __iomem *reg, u8 shift, u8 width, shift 541 include/linux/clk-provider.h u8 shift; shift 561 include/linux/clk-provider.h void __iomem *reg, u8 shift, u8 width, shift 566 include/linux/clk-provider.h void __iomem *reg, u8 shift, u8 width, shift 572 include/linux/clk-provider.h void __iomem *reg, u8 shift, u32 mask, shift 577 include/linux/clk-provider.h void __iomem *reg, u8 shift, u32 mask, shift 700 include/linux/clk-provider.h u8 shift; shift 108 include/linux/clockchips.h u32 shift; shift 172 include/linux/clockchips.h div_sc(unsigned long ticks, unsigned long nsec, int shift) shift 174 include/linux/clockchips.h u64 tmp = ((u64)ticks) << shift; shift 195 include/linux/clockchips.h return clocks_calc_mult_shift(&ce->mult, &ce->shift, NSEC_PER_SEC, freq, maxsec); shift 84 include/linux/clocksource.h u32 shift; shift 184 include/linux/clocksource.h static inline s64 clocksource_cyc2ns(u64 cycles, u32 mult, u32 shift) shift 186 include/linux/clocksource.h return ((u64) cycles * mult) >> shift; shift 202 include/linux/clocksource.h clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cycles); shift 204 include/linux/clocksource.h clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec); shift 158 include/linux/fsl/guts.h unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); shift 160 include/linux/fsl/guts.h clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift); shift 195 include/linux/fsl/guts.h unsigned int shift = 2 * (co + 1) - (ch & 1) - 1; shift 197 include/linux/fsl/guts.h clrsetbits_be32(&guts->pmuxcr, 1 << shift, value << shift); shift 179 include/linux/host1x.h unsigned long shift; shift 151 include/linux/iio/adc/ad_sigma_delta.h .shift = (_shift), \ shift 62 include/linux/iio/common/st_sensors.h .shift = sbits - rbits, \ shift 246 include/linux/iio/iio.h u8 shift; shift 19 include/linux/iommu-helper.h unsigned long shift, unsigned long boundary_size) shift 23 include/linux/iommu-helper.h shift = (shift + index) & (boundary_size - 1); shift 24 include/linux/iommu-helper.h return shift + nr > boundary_size; shift 29 include/linux/iommu-helper.h unsigned long shift, shift 14 include/linux/keyboard.h int shift; /* Current shift mask */ shift 177 include/linux/math64.h static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) shift 179 include/linux/math64.h return (u64)(((unsigned __int128)a * mul) >> shift); shift 184 include/linux/math64.h static inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) shift 186 include/linux/math64.h return (u64)(((unsigned __int128)a * mul) >> shift); shift 193 include/linux/math64.h static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) shift 201 include/linux/math64.h ret = mul_u32_u32(al, mul) >> shift; shift 203 include/linux/math64.h ret += mul_u32_u32(ah, mul) << (32 - shift); shift 210 include/linux/math64.h static inline u64 mul_u64_u64_shr(u64 a, u64 b, unsigned int shift) shift 245 include/linux/math64.h if (shift == 0) shift 247 include/linux/math64.h if (shift < 64) shift 248 include/linux/math64.h return (rl.ll >> shift) | (rh.ll << (64 - shift)); shift 249 include/linux/math64.h return rh.ll >> (shift & 63); shift 84 include/linux/mfd/lp3943.h u8 shift; shift 98 include/linux/mfd/syscon/atmel-smc.h unsigned int shift, shift 101 include/linux/mfd/syscon/atmel-smc.h unsigned int shift, unsigned int ncycles); shift 103 include/linux/mfd/syscon/atmel-smc.h unsigned int shift, unsigned int ncycles); shift 105 include/linux/mfd/syscon/atmel-smc.h unsigned int shift, unsigned int ncycles); shift 28 include/linux/mfd/tmio.h #define sd_config_write8(base, shift, reg, val) \ shift 29 include/linux/mfd/tmio.h tmio_iowrite8((val), (base) + ((reg) << (shift))) shift 30 include/linux/mfd/tmio.h #define sd_config_write16(base, shift, reg, val) \ shift 31 include/linux/mfd/tmio.h tmio_iowrite16((val), (base) + ((reg) << (shift))) shift 32 include/linux/mfd/tmio.h #define sd_config_write32(base, shift, reg, val) \ shift 34 include/linux/mfd/tmio.h tmio_iowrite16((val), (base) + ((reg) << (shift))); \ shift 35 include/linux/mfd/tmio.h tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \ shift 85 include/linux/mfd/tmio.h int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base); shift 86 include/linux/mfd/tmio.h int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base); shift 87 include/linux/mfd/tmio.h void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state); shift 88 include/linux/mfd/tmio.h void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state); shift 70 include/linux/netfilter/nf_conntrack_sip.h int *shift); shift 15 include/linux/platform_data/txx9/ndfmc.h unsigned int shift; shift 57 include/linux/sbitmap.h unsigned int shift; shift 155 include/linux/sbitmap.h int sbitmap_init_node(struct sbitmap *sb, unsigned int depth, int shift, shift 228 include/linux/sbitmap.h #define SB_NR_TO_INDEX(sb, bitnr) ((bitnr) >> (sb)->shift) shift 229 include/linux/sbitmap.h #define SB_NR_TO_BIT(sb, bitnr) ((bitnr) & ((1U << (sb)->shift) - 1U)) shift 277 include/linux/sbitmap.h if (!fn(sb, (index << sb->shift) + nr, data)) shift 376 include/linux/sbitmap.h int shift, bool round_robin, gfp_t flags, int node); shift 16 include/linux/sched/loadavg.h extern void get_avenrun(unsigned long *loads, unsigned long offset, int shift); shift 40 include/linux/selection.h extern void invert_screen(struct vc_data *vc, int offset, int count, int shift); shift 20 include/linux/smsc911x.h unsigned int shift; shift 42 include/linux/t10-pi.h unsigned int shift = ilog2(queue_logical_block_size(rq->q)); shift 46 include/linux/t10-pi.h shift = rq->q->integrity.interval_exp; shift 48 include/linux/t10-pi.h return blk_rq_pos(rq) >> (shift - SECTOR_SHIFT) & 0xffffffff; shift 53 include/linux/time32.h s32 shift; shift 34 include/linux/timecounter.h u32 shift; shift 77 include/linux/timecounter.h return ns >> cc->shift; shift 39 include/linux/timekeeper_internal.h u32 shift; shift 29 include/linux/tnum.h struct tnum tnum_lshift(struct tnum a, u8 shift); shift 31 include/linux/tnum.h struct tnum tnum_rshift(struct tnum a, u8 shift); shift 1088 include/linux/xarray.h unsigned char shift; /* Bits remaining in each slot */ shift 1291 include/linux/xarray.h #define __XA_STATE(array, index, shift, sibs) { \ shift 1294 include/linux/xarray.h .xa_shift = shift, \ shift 1560 include/linux/xarray.h if (unlikely(xas_not_node(node) || node->shift || shift 1619 include/linux/xarray.h if (unlikely(xas_not_node(node) || node->shift)) shift 1716 include/linux/xarray.h if (unlikely(xas_not_node(node) || node->shift || shift 1745 include/linux/xarray.h if (unlikely(xas_not_node(node) || node->shift || shift 247 include/net/red.h int shift; shift 269 include/net/red.h shift = p->Stab[(us_idle >> p->Scell_log) & RED_STAB_MASK]; shift 271 include/net/red.h if (shift) shift 272 include/net/red.h return v->qavg >> shift; shift 1219 include/net/sch_generic.h u8 shift; shift 1228 include/net/sch_generic.h return ((u64)(DIV_ROUND_UP(len,48)*53) * r->mult) >> r->shift; shift 1230 include/net/sch_generic.h return ((u64)len * r->mult) >> r->shift; shift 290 include/net/tcp.h static inline bool tcp_too_many_orphans(struct sock *sk, int shift) shift 295 include/net/tcp.h if (orphans << shift > sysctl_tcp_max_orphans) { shift 297 include/net/tcp.h if (orphans << shift > sysctl_tcp_max_orphans) shift 303 include/net/tcp.h bool tcp_check_oom(struct sock *sk, int shift); shift 96 include/rdma/rdmavt_mr.h u32 shift; /* lkey/rkey shift */ shift 739 include/rdma/rdmavt_qp.h static inline void rvt_mod_retry_timer_ext(struct rvt_qp *qp, u8 shift) shift 748 include/rdma/rdmavt_qp.h (qp->timeout_jiffies << shift)); shift 894 include/rdma/rdmavt_qp.h void rvt_add_retry_timer_ext(struct rvt_qp *qp, u8 shift); shift 31 include/soc/tegra/mc.h unsigned int shift; shift 326 include/sound/sb.h #define SB_MIXVAL_SINGLE(reg, shift, mask) \ shift 327 include/sound/sb.h ((reg) | ((shift) << 16) | ((mask) << 24)) shift 340 include/sound/sb.h #define SB_SINGLE(xname, reg, shift, mask) \ shift 343 include/sound/sb.h .private_value = SB_MIXVAL_SINGLE(reg, shift, mask) } shift 76 include/sound/soc-dapm.h .reg = wreg, .mask = 1, .shift = wshift, \ shift 258 include/sound/soc-dapm.h .reg = wreg, .shift = wshift, .mask = wmask, \ shift 266 include/sound/soc-dapm.h .reg = SND_SOC_NOPM, .shift = wdelay, .event = dapm_regulator_event, \ shift 284 include/sound/soc-dapm.h #define SOC_DAPM_DOUBLE_R(xname, lreg, rreg, shift, max, invert) \ shift 288 include/sound/soc-dapm.h .private_value = SOC_DOUBLE_R_VALUE(lreg, rreg, shift, max, invert) } shift 289 include/sound/soc-dapm.h #define SOC_DAPM_SINGLE(xname, reg, shift, max, invert) \ shift 293 include/sound/soc-dapm.h .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) } shift 294 include/sound/soc-dapm.h #define SOC_DAPM_SINGLE_AUTODISABLE(xname, reg, shift, max, invert) \ shift 298 include/sound/soc-dapm.h .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 1) } shift 301 include/sound/soc-dapm.h #define SOC_DAPM_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ shift 307 include/sound/soc-dapm.h .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) } shift 308 include/sound/soc-dapm.h #define SOC_DAPM_SINGLE_TLV_AUTODISABLE(xname, reg, shift, max, invert, tlv_array) \ shift 314 include/sound/soc-dapm.h .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 1) } shift 607 include/sound/soc-dapm.h unsigned char shift; /* bits to shift */ shift 33 include/sound/soc.h {.reg = xreg, .rreg = xreg, .shift = shift_left, \ shift 38 include/sound/soc.h {.reg = xreg, .rreg = xreg, .shift = shift_left, \ shift 48 include/sound/soc.h {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \ shift 52 include/sound/soc.h {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \ shift 57 include/sound/soc.h {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \ shift 59 include/sound/soc.h #define SOC_SINGLE(xname, reg, shift, max, invert) \ shift 63 include/sound/soc.h .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) } shift 69 include/sound/soc.h {.reg = xreg, .rreg = xreg, .shift = xshift, \ shift 72 include/sound/soc.h #define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ shift 79 include/sound/soc.h .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) } shift 90 include/sound/soc.h .shift = xshift, .rshift = xshift, \ shift 100 include/sound/soc.h {.reg = xreg, .rreg = xreg, .shift = xshift, \ shift 168 include/sound/soc.h .shift = xshift, .rshift = xshift, \ shift 260 include/sound/soc.h {.reg = xreg, .rreg = xreg, .shift = xshift, \ shift 1168 include/sound/soc.h unsigned int shift, rshift; shift 1226 include/sound/soc.h if (mc->reg == mc->rreg && mc->shift == mc->rshift) shift 162 include/sound/wss.h #define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \ shift 169 include/sound/wss.h .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } shift 188 include/sound/wss.h #define WSS_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ shift 196 include/sound/wss.h .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ shift 164 include/uapi/drm/msm_drm.h __s32 shift; /* in, amount of left shift (can be negative) */ shift 363 include/uapi/drm/tegra_drm.h __u32 shift; shift 756 include/uapi/linux/kvm.h __u32 shift; shift 58 include/uapi/linux/tc_act/tc_pedit.h __u32 shift; shift 19 include/uapi/linux/tc_ematch/tc_em_meta.h __u8 shift; shift 81 include/uapi/linux/timex.h int shift; /* interval duration (s) (shift) (ro) */ shift 119 include/uapi/linux/timex.h int shift; /* interval duration (s) (shift) (ro) */ shift 447 include/uapi/rdma/mlx5-abi.h __u32 shift; shift 266 include/uapi/sound/asoc.h __le32 shift; shift 485 include/uapi/sound/asoc.h __le32 shift; /* bits to shift */ shift 66 include/vdso/datapage.h u32 shift; shift 37 kernel/bpf/tnum.c struct tnum tnum_lshift(struct tnum a, u8 shift) shift 39 kernel/bpf/tnum.c return TNUM(a.value << shift, a.mask << shift); shift 42 kernel/bpf/tnum.c struct tnum tnum_rshift(struct tnum a, u8 shift) shift 44 kernel/bpf/tnum.c return TNUM(a.value >> shift, a.mask >> shift); shift 8709 kernel/bpf/verifier.c u8 shift = bpf_ctx_narrow_access_offset( shift 8712 kernel/bpf/verifier.c if (shift) shift 8715 kernel/bpf/verifier.c shift); shift 8719 kernel/bpf/verifier.c if (shift) shift 8722 kernel/bpf/verifier.c shift); shift 221 kernel/sched/fair.c int shift = WMULT_SHIFT; shift 228 kernel/sched/fair.c shift--; shift 237 kernel/sched/fair.c shift--; shift 240 kernel/sched/fair.c return mul_u64_u32_shr(delta_exec, fact, shift); shift 72 kernel/sched/loadavg.c void get_avenrun(unsigned long *loads, unsigned long offset, int shift) shift 74 kernel/sched/loadavg.c loads[0] = (avenrun[0] + offset) << shift; shift 75 kernel/sched/loadavg.c loads[1] = (avenrun[1] + offset) << shift; shift 76 kernel/sched/loadavg.c loads[2] = (avenrun[2] + offset) << shift; shift 14 kernel/sched/wait_bit.c const int shift = BITS_PER_LONG == 32 ? 5 : 6; shift 15 kernel/sched/wait_bit.c unsigned long val = (unsigned long)word << shift | bit; shift 35 kernel/time/clockevents.c u64 clc = (u64) latch << evt->shift; shift 46 kernel/time/clockevents.c if ((clc >> evt->shift) != (u64)latch) shift 69 kernel/time/clockevents.c (!ismax || evt->mult <= (1ULL << evt->shift))) shift 247 kernel/time/clockevents.c clc = ((unsigned long long) delta * dev->mult) >> dev->shift; shift 286 kernel/time/clockevents.c clc = ((unsigned long long) delta * dev->mult) >> dev->shift; shift 333 kernel/time/clockevents.c clc = ((unsigned long long) delta * dev->mult) >> dev->shift; shift 45 kernel/time/clocksource.c clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 maxsec) shift 72 kernel/time/clocksource.c *shift = sft; shift 225 kernel/time/clocksource.c watchdog->shift); shift 228 kernel/time/clocksource.c cs_nsec = clocksource_cyc2ns(delta, cs->mult, cs->shift); shift 584 kernel/time/clocksource.c suspend_clocksource->shift); shift 666 kernel/time/clocksource.c u64 clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cyc) shift 684 kernel/time/clocksource.c max_nsecs = clocksource_cyc2ns(max_cycles, mult - maxadj, shift); shift 703 kernel/time/clocksource.c cs->max_idle_ns = clocks_calc_max_nsecs(cs->mult, cs->shift, shift 884 kernel/time/clocksource.c clocks_calc_mult_shift(&cs->mult, &cs->shift, freq, shift 895 kernel/time/clocksource.c cs->shift--; shift 57 kernel/time/jiffies.c .shift = JIFFIES_SHIFT, shift 200 kernel/time/ntp.c txc->shift = pps_shift; shift 230 kernel/time/ntp.c txc->shift = 0; shift 44 kernel/time/sched_clock.c u32 shift; shift 91 kernel/time/sched_clock.c static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift) shift 93 kernel/time/sched_clock.c return (cyc * mult) >> shift; shift 108 kernel/time/sched_clock.c res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift); shift 151 kernel/time/sched_clock.c ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); shift 196 kernel/time/sched_clock.c ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); shift 202 kernel/time/sched_clock.c rd.shift = new_shift; shift 95 kernel/time/tick-broadcast-hrtimer.c .shift = 0, shift 310 kernel/time/time.c txc->shift = tx32.shift; shift 339 kernel/time/time.c tx32.shift = txc->shift; shift 15 kernel/time/timecounter.c tc->mask = (1ULL << cc->shift) - 1; shift 74 kernel/time/timecounter.c ns = ((ns * cc->mult) - frac) >> cc->shift; shift 97 kernel/time/timekeeping.c while (tk->tkr_mono.xtime_nsec >= ((u64)NSEC_PER_SEC << tk->tkr_mono.shift)) { shift 98 kernel/time/timekeeping.c tk->tkr_mono.xtime_nsec -= (u64)NSEC_PER_SEC << tk->tkr_mono.shift; shift 101 kernel/time/timekeeping.c while (tk->tkr_raw.xtime_nsec >= ((u64)NSEC_PER_SEC << tk->tkr_raw.shift)) { shift 102 kernel/time/timekeeping.c tk->tkr_raw.xtime_nsec -= (u64)NSEC_PER_SEC << tk->tkr_raw.shift; shift 112 kernel/time/timekeeping.c ts.tv_nsec = (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); shift 119 kernel/time/timekeeping.c tk->tkr_mono.xtime_nsec = (u64)ts->tv_nsec << tk->tkr_mono.shift; shift 125 kernel/time/timekeeping.c tk->tkr_mono.xtime_nsec += (u64)ts->tv_nsec << tk->tkr_mono.shift; shift 305 kernel/time/timekeeping.c tmp <<= clock->shift; shift 322 kernel/time/timekeeping.c int shift_change = clock->shift - old_clock->shift; shift 332 kernel/time/timekeeping.c tk->tkr_mono.shift = clock->shift; shift 333 kernel/time/timekeeping.c tk->tkr_raw.shift = clock->shift; shift 336 kernel/time/timekeeping.c tk->ntp_error_shift = NTP_SCALE_SHIFT - clock->shift; shift 364 kernel/time/timekeeping.c nsec >>= tkr->shift; shift 651 kernel/time/timekeeping.c nsec += (u32)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); shift 709 kernel/time/timekeeping.c tk->tkr_mono.xtime_nsec += (u64)arch_gettimeoffset() << tk->tkr_mono.shift; shift 715 kernel/time/timekeeping.c tk->tkr_raw.xtime_nsec += (u64)arch_gettimeoffset() << tk->tkr_raw.shift; shift 777 kernel/time/timekeeping.c nsecs = tk->tkr_mono.mult >> tk->tkr_mono.shift; shift 823 kernel/time/timekeeping.c nsecs = tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift; shift 1947 kernel/time/timekeeping.c tk->tkr_mono.shift; shift 1963 kernel/time/timekeeping.c u64 nsecps = (u64)NSEC_PER_SEC << tk->tkr_mono.shift; shift 2011 kernel/time/timekeeping.c u32 shift, unsigned int *clock_set) shift 2013 kernel/time/timekeeping.c u64 interval = tk->cycle_interval << shift; shift 2025 kernel/time/timekeeping.c tk->tkr_mono.xtime_nsec += tk->xtime_interval << shift; shift 2029 kernel/time/timekeeping.c tk->tkr_raw.xtime_nsec += tk->raw_interval << shift; shift 2030 kernel/time/timekeeping.c snsec_per_sec = (u64)NSEC_PER_SEC << tk->tkr_raw.shift; shift 2037 kernel/time/timekeeping.c tk->ntp_error += tk->ntp_tick << shift; shift 2039 kernel/time/timekeeping.c (tk->ntp_error_shift + shift); shift 2053 kernel/time/timekeeping.c int shift = 0, maxshift; shift 2088 kernel/time/timekeeping.c shift = ilog2(offset) - ilog2(tk->cycle_interval); shift 2089 kernel/time/timekeeping.c shift = max(0, shift); shift 2092 kernel/time/timekeeping.c shift = min(shift, maxshift); shift 2094 kernel/time/timekeeping.c offset = logarithmic_accumulation(tk, offset, shift, shift 2096 kernel/time/timekeeping.c if (offset < tk->cycle_interval<<shift) shift 2097 kernel/time/timekeeping.c shift--; shift 216 kernel/time/timer_list.c SEQ_printf(m, " shift: %u\n", dev->shift); shift 25 kernel/time/vsyscall.c vdata[CS_HRES_COARSE].shift = tk->tkr_mono.shift; shift 29 kernel/time/vsyscall.c vdata[CS_RAW].shift = tk->tkr_raw.shift; shift 36 kernel/time/vsyscall.c nsec += ((u64)tk->wall_to_monotonic.tv_nsec << tk->tkr_mono.shift); shift 37 kernel/time/vsyscall.c while (nsec >= (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) { shift 38 kernel/time/vsyscall.c nsec -= (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift); shift 47 kernel/time/vsyscall.c nsec += (u64)tk->monotonic_to_boot.tv_nsec << tk->tkr_mono.shift; shift 53 kernel/time/vsyscall.c while (nsec >= (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) { shift 54 kernel/time/vsyscall.c nsec -= (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift); shift 90 kernel/time/vsyscall.c vdso_ts->nsec = tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift; shift 95 kernel/time/vsyscall.c nsec = tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift; shift 260 lib/assoc_array.c int shift = shortcut->skip_to_level & ASSOC_ARRAY_KEY_CHUNK_MASK; shift 261 lib/assoc_array.c dissimilarity &= ~(ULONG_MAX << shift); shift 102 lib/bitmap.c unsigned shift, unsigned nbits) shift 105 lib/bitmap.c unsigned off = shift/BITS_PER_LONG, rem = shift % BITS_PER_LONG; shift 147 lib/bitmap.c unsigned int shift, unsigned int nbits) shift 151 lib/bitmap.c unsigned int off = shift/BITS_PER_LONG, rem = shift % BITS_PER_LONG; shift 553 lib/idr.c extern void xa_dump_index(unsigned long index, unsigned int shift); shift 565 lib/idr.c unsigned int shift = node->shift + IDA_CHUNK_SHIFT + shift 568 lib/idr.c xa_dump_index(index * IDA_BITMAP_BITS, shift); shift 572 lib/idr.c index | (i << node->shift)); shift 11 lib/iommu-helper.c unsigned long shift, unsigned long boundary_size, shift 21 lib/iommu-helper.c if (iommu_is_span_boundary(index, nr, shift, boundary_size)) { shift 22 lib/iommu-helper.c start = ALIGN(shift + index, boundary_size) - shift; shift 97 lib/radix-tree.c unsigned int offset = (index >> parent->shift) & RADIX_TREE_MAP_MASK; shift 220 lib/radix-tree.c static inline unsigned long shift_maxindex(unsigned int shift) shift 222 lib/radix-tree.c return (RADIX_TREE_MAP_SIZE << shift) - 1; shift 227 lib/radix-tree.c return shift_maxindex(node->shift); shift 234 lib/radix-tree.c return (index & ~node_maxindex(node)) + (offset << node->shift); shift 244 lib/radix-tree.c unsigned int shift, unsigned int offset, shift 289 lib/radix-tree.c ret->shift = shift; shift 407 lib/radix-tree.c return node->shift + RADIX_TREE_MAP_SHIFT; shift 418 lib/radix-tree.c unsigned long index, unsigned int shift) shift 425 lib/radix-tree.c maxshift = shift; shift 435 lib/radix-tree.c root, shift, 0, 1, 0); shift 453 lib/radix-tree.c BUG_ON(shift > BITS_PER_LONG); shift 467 lib/radix-tree.c shift += RADIX_TREE_MAP_SHIFT; shift 468 lib/radix-tree.c } while (shift <= maxshift); shift 504 lib/radix-tree.c if (!node->shift && is_idr(root)) shift 614 lib/radix-tree.c unsigned int shift, offset = 0; shift 618 lib/radix-tree.c shift = radix_tree_load_root(root, &child, &maxindex); shift 622 lib/radix-tree.c int error = radix_tree_extend(root, gfp, max, shift); shift 625 lib/radix-tree.c shift = error; shift 629 lib/radix-tree.c while (shift > 0) { shift 630 lib/radix-tree.c shift -= RADIX_TREE_MAP_SHIFT; shift 633 lib/radix-tree.c child = radix_tree_node_alloc(gfp, node, root, shift, shift 672 lib/radix-tree.c if (xa_is_node(entry) && child->shift) { shift 779 lib/radix-tree.c if (parent->shift == 0) shift 1223 lib/radix-tree.c index += offset << node->shift; shift 1236 lib/radix-tree.c } while (node->shift && radix_tree_is_internal_node(child)); shift 1492 lib/radix-tree.c unsigned int shift, offset = 0; shift 1495 lib/radix-tree.c shift = radix_tree_load_root(root, &child, &maxindex); shift 1502 lib/radix-tree.c int error = radix_tree_extend(root, gfp, start, shift); shift 1505 lib/radix-tree.c shift = error; shift 1508 lib/radix-tree.c if (start == 0 && shift == 0) shift 1509 lib/radix-tree.c shift = RADIX_TREE_MAP_SHIFT; shift 1511 lib/radix-tree.c while (shift) { shift 1512 lib/radix-tree.c shift -= RADIX_TREE_MAP_SHIFT; shift 1515 lib/radix-tree.c child = radix_tree_node_alloc(gfp, node, root, shift, shift 1539 lib/radix-tree.c shift = node->shift; shift 87 lib/reed_solomon/test_rslib.c int shift; shift 463 lib/reed_solomon/test_rslib.c int pad = (pad_coef[i].mult * max_pad) >> pad_coef[i].shift; shift 68 lib/rhashtable.c const unsigned int shift = PAGE_SHIFT - ilog2(sizeof(void *)); shift 69 lib/rhashtable.c const unsigned int len = 1 << shift; shift 77 lib/rhashtable.c size >>= shift; shift 142 lib/rhashtable.c const unsigned int shift = PAGE_SHIFT - ilog2(sizeof(void *)); shift 146 lib/rhashtable.c if (nbuckets < (1 << (shift + 1))) shift 161 lib/rhashtable.c tbl->nest = (ilog2(nbuckets) - 1) % shift + 1; shift 1170 lib/rhashtable.c const unsigned int shift = PAGE_SHIFT - ilog2(sizeof(void *)); shift 1180 lib/rhashtable.c while (ntbl && size > (1 << shift)) { shift 1181 lib/rhashtable.c index = subhash & ((1 << shift) - 1); shift 1184 lib/rhashtable.c size >>= shift; shift 1185 lib/rhashtable.c subhash >>= shift; shift 1211 lib/rhashtable.c const unsigned int shift = PAGE_SHIFT - ilog2(sizeof(void *)); shift 1219 lib/rhashtable.c size <= (1 << shift)); shift 1221 lib/rhashtable.c while (ntbl && size > (1 << shift)) { shift 1222 lib/rhashtable.c index = hash & ((1 << shift) - 1); shift 1223 lib/rhashtable.c size >>= shift; shift 1224 lib/rhashtable.c hash >>= shift; shift 1226 lib/rhashtable.c size <= (1 << shift)); shift 44 lib/sbitmap.c int sbitmap_init_node(struct sbitmap *sb, unsigned int depth, int shift, shift 50 lib/sbitmap.c if (shift < 0) { shift 51 lib/sbitmap.c shift = ilog2(BITS_PER_LONG); shift 59 lib/sbitmap.c while ((4U << shift) > depth) shift 60 lib/sbitmap.c shift--; shift 63 lib/sbitmap.c bits_per_word = 1U << shift; shift 67 lib/sbitmap.c sb->shift = shift; shift 91 lib/sbitmap.c unsigned int bits_per_word = 1U << sb->shift; shift 178 lib/sbitmap.c nr += index << sb->shift; shift 206 lib/sbitmap.c nr += index << sb->shift; shift 215 lib/sbitmap.c alloc_hint = index << sb->shift; shift 286 lib/sbitmap.c seq_printf(m, "bits_per_word=%u\n", 1U << sb->shift); shift 360 lib/sbitmap.c shallow_depth = min(1U << sbq->sb.shift, sbq->min_shallow_depth); shift 361 lib/sbitmap.c depth = ((depth >> sbq->sb.shift) * shallow_depth + shift 362 lib/sbitmap.c min(depth & ((1U << sbq->sb.shift) - 1), shallow_depth)); shift 370 lib/sbitmap.c int shift, bool round_robin, gfp_t flags, int node) shift 375 lib/sbitmap.c ret = sbitmap_init_node(&sbq->sb, depth, shift, flags, node); shift 1583 lib/test_xarray.c xas.xa_shift = node->shift + XA_CHUNK_SHIFT; shift 63 lib/ts_bm.c int shift = bm->patlen - 1, bs; shift 72 lib/ts_bm.c while (shift < text_len) { shift 74 lib/ts_bm.c shift, text[shift]); shift 76 lib/ts_bm.c if ((icase ? toupper(text[shift-i]) shift 77 lib/ts_bm.c : text[shift-i]) shift 83 lib/ts_bm.c return consumed += (shift-(bm->patlen-1)); shift 85 lib/ts_bm.c next: bs = bm->bad_shift[text[shift-i]]; shift 88 lib/ts_bm.c shift = max_t(int, shift-i+bs, shift+bm->good_shift[i]); shift 57 lib/vdso/gettimeofday.c ns >>= vd->shift; shift 461 lib/vsprintf.c int shift = 3; shift 464 lib/vsprintf.c shift = 4; shift 467 lib/vsprintf.c num >>= shift; shift 144 lib/xarray.c return (index >> node->shift) & XA_CHUNK_MASK; shift 155 lib/xarray.c unsigned int shift = xas->xa_node->shift; shift 156 lib/xarray.c xas->xa_index &= ~XA_CHUNK_MASK << shift; shift 157 lib/xarray.c xas->xa_index += offset << shift; shift 193 lib/xarray.c if ((xas->xa_index >> xa_to_node(entry)->shift) > XA_CHUNK_MASK) shift 238 lib/xarray.c if (xas->xa_shift > node->shift) shift 241 lib/xarray.c if (node->shift == 0) shift 355 lib/xarray.c static void *xas_alloc(struct xa_state *xas, unsigned int shift) shift 384 lib/xarray.c XA_NODE_BUG_ON(node, shift > BITS_PER_LONG); shift 386 lib/xarray.c node->shift = shift; shift 430 lib/xarray.c return (XA_CHUNK_SIZE << xa_to_node(entry)->shift) - 1; shift 447 lib/xarray.c if (!xa_is_node(entry) && node->shift) shift 527 lib/xarray.c if (node->shift && xa_is_node(entry)) { shift 559 lib/xarray.c unsigned int shift = 0; shift 565 lib/xarray.c while ((max >> shift) >= XA_CHUNK_SIZE) shift 566 lib/xarray.c shift += XA_CHUNK_SHIFT; shift 567 lib/xarray.c return shift + XA_CHUNK_SHIFT; shift 570 lib/xarray.c shift = node->shift + XA_CHUNK_SHIFT; shift 577 lib/xarray.c XA_NODE_BUG_ON(node, shift > BITS_PER_LONG); shift 578 lib/xarray.c node = xas_alloc(xas, shift); shift 615 lib/xarray.c shift += XA_CHUNK_SHIFT; shift 619 lib/xarray.c return shift; shift 641 lib/xarray.c int shift; shift 649 lib/xarray.c shift = xas_expand(xas, entry); shift 650 lib/xarray.c if (shift < 0) shift 652 lib/xarray.c if (!shift && !allow_root) shift 653 lib/xarray.c shift = XA_CHUNK_SHIFT; shift 661 lib/xarray.c shift = node->shift; shift 665 lib/xarray.c shift = 0; shift 670 lib/xarray.c while (shift > order) { shift 671 lib/xarray.c shift -= XA_CHUNK_SHIFT; shift 673 lib/xarray.c node = xas_alloc(xas, shift); shift 703 lib/xarray.c unsigned char shift = xas->xa_shift; shift 706 lib/xarray.c xas->xa_index |= ((sibs + 1) << shift) - 1; shift 707 lib/xarray.c if (xas_is_node(xas) && xas->xa_node->shift == xas->xa_shift) shift 730 lib/xarray.c xas->xa_shift = shift; shift 789 lib/xarray.c if (node && (xas->xa_shift < node->shift)) shift 814 lib/xarray.c if (xa_is_node(next) && (!node || node->shift)) shift 978 lib/xarray.c xas->xa_index += (offset - xas->xa_offset) << node->shift; shift 1097 lib/xarray.c } else if (!xas->xa_node->shift && shift 1177 lib/xarray.c xas->xa_offset = xas->xa_index >> xas->xa_node->shift; shift 1260 lib/xarray.c if (xas->xa_node->shift > xas->xa_shift) shift 1264 lib/xarray.c if (xas->xa_node->shift == xas->xa_shift) { shift 1514 lib/xarray.c unsigned int shift = 0; shift 1525 lib/xarray.c shift += XA_CHUNK_SHIFT; shift 1535 lib/xarray.c if ((((first + sibs + 1) << shift) - 1) > last) shift 1538 lib/xarray.c xas->xa_shift = shift; shift 1843 lib/xarray.c mask = (XA_CHUNK_SIZE << node->shift) - 1; shift 1845 lib/xarray.c ((unsigned long)xas->xa_offset << node->shift); shift 2021 lib/xarray.c node->parent, node->shift, node->count, node->nr_values, shift 2029 lib/xarray.c void xa_dump_index(unsigned long index, unsigned int shift) shift 2031 lib/xarray.c if (!shift) shift 2033 lib/xarray.c else if (shift >= BITS_PER_LONG) shift 2036 lib/xarray.c pr_info("%lu-%lu: ", index, index | ((1UL << shift) - 1)); shift 2039 lib/xarray.c void xa_dump_entry(const void *entry, unsigned long index, unsigned long shift) shift 2044 lib/xarray.c xa_dump_index(index, shift); shift 2047 lib/xarray.c if (shift == 0) { shift 2055 lib/xarray.c index + (i << node->shift), node->shift); shift 2075 lib/xarray.c unsigned int shift = 0; shift 2081 lib/xarray.c shift = xa_to_node(entry)->shift + XA_CHUNK_SHIFT; shift 2082 lib/xarray.c xa_dump_entry(entry, 0, shift); shift 1171 mm/compaction.c unsigned short shift = BITS_PER_LONG - 1; shift 1173 mm/compaction.c return (COMPACT_CLUSTER_MAX >> min(shift, cc->fast_search_fail)) + 1; shift 1906 mm/mempolicy.c struct vm_area_struct *vma, unsigned long addr, int shift) shift 1918 mm/mempolicy.c BUG_ON(shift < PAGE_SHIFT); shift 1919 mm/mempolicy.c off = vma->vm_pgoff >> (shift - PAGE_SHIFT); shift 1920 mm/mempolicy.c off += (addr - vma->vm_start) >> shift; shift 66 mm/mm_init.c int shift, width; shift 69 mm/mm_init.c shift = 8 * sizeof(unsigned long); shift 70 mm/mm_init.c width = shift - SECTIONS_WIDTH - NODES_WIDTH - ZONES_WIDTH - LAST_CPUPID_SHIFT; shift 96 mm/mm_init.c shift, width, width, NR_PAGEFLAGS, NR_PAGEFLAGS, 0); shift 107 mm/mm_init.c shift -= SECTIONS_WIDTH; shift 108 mm/mm_init.c BUG_ON(shift != SECTIONS_PGSHIFT); shift 111 mm/mm_init.c shift -= NODES_WIDTH; shift 112 mm/mm_init.c BUG_ON(shift != NODES_PGSHIFT); shift 115 mm/mm_init.c shift -= ZONES_WIDTH; shift 116 mm/mm_init.c BUG_ON(shift != ZONES_PGSHIFT); shift 1203 mm/page-writeback.c unsigned long shift; shift 1328 mm/page-writeback.c shift = dirty_ratelimit / (2 * step + 1); shift 1329 mm/page-writeback.c if (shift < BITS_PER_LONG) shift 1330 mm/page-writeback.c step = DIV_ROUND_UP(step >> shift, 8); shift 497 mm/workingset.c xas.xa_shift = node->shift + XA_CHUNK_SHIFT; shift 2223 net/core/filter.c u32 first_sge, last_sge, i, shift, bytes_sg_total; shift 2301 net/core/filter.c shift = last_sge > first_sge ? shift 2304 net/core/filter.c if (!shift) shift 2312 net/core/filter.c if (i + shift >= NR_MSG_FRAG_IDS) shift 2313 net/core/filter.c move_from = i + shift - NR_MSG_FRAG_IDS; shift 2315 net/core/filter.c move_from = i + shift; shift 2326 net/core/filter.c msg->sg.end = msg->sg.end - shift > msg->sg.end ? shift 2327 net/core/filter.c msg->sg.end - shift + NR_MSG_FRAG_IDS : shift 2328 net/core/filter.c msg->sg.end - shift; shift 434 net/core/neighbour.c static struct neigh_hash_table *neigh_hash_alloc(unsigned int shift) shift 436 net/core/neighbour.c size_t size = (1 << shift) * sizeof(struct neighbour *); shift 457 net/core/neighbour.c ret->hash_shift = shift; shift 380 net/ipv4/fib_trie.c unsigned int shift = pos + bits; shift 385 net/ipv4/fib_trie.c BUG_ON(!bits || (shift > KEYLENGTH)); shift 400 net/ipv4/fib_trie.c tn->key = (shift < KEYLENGTH) ? (key >> shift) << shift : 0; shift 2332 net/ipv4/tcp.c bool tcp_check_oom(struct sock *sk, int shift) shift 2336 net/ipv4/tcp.c too_many_orphans = tcp_too_many_orphans(sk, shift); shift 180 net/ipv4/tcp_cubic.c u32 x, b, shift; shift 207 net/ipv4/tcp_cubic.c shift = (a >> (b * 3)); shift 209 net/ipv4/tcp_cubic.c x = ((u32)(((u32)v[shift] + 10) << b)) >> 6; shift 87 net/ipv4/tcp_timer.c int shift = 0; shift 92 net/ipv4/tcp_timer.c shift++; shift 96 net/ipv4/tcp_timer.c shift++; shift 98 net/ipv4/tcp_timer.c if (tcp_check_oom(sk, shift)) { shift 697 net/mac80211/cfg.c int shift = ieee80211_vif_get_shift(&sta->sdata->vif); shift 703 net/mac80211/cfg.c rinfo->legacy = DIV_ROUND_UP(brate, 1 << shift); shift 54 net/mac80211/ibss.c int shift; shift 95 net/mac80211/ibss.c shift = ieee80211_chandef_get_shift(chandef); shift 115 net/mac80211/ibss.c 5 * (1 << shift)); shift 159 net/mac80211/ibss.c 5 * (1 << shift)); shift 411 net/mac80211/ibss.c int shift; shift 446 net/mac80211/ibss.c shift = ieee80211_vif_get_shift(&sdata->vif); shift 461 net/mac80211/ibss.c 5 * (1 << shift)); shift 1037 net/mac80211/ieee80211_i.h int shift = 0; shift 1042 net/mac80211/ieee80211_i.h shift = ieee80211_chandef_get_shift(&chanctx_conf->def); shift 1045 net/mac80211/ieee80211_i.h return shift; shift 1772 net/mac80211/ieee80211_i.h int retry_count, int shift, bool send_to_cooked, shift 1933 net/mac80211/ieee80211_i.h int shift); shift 647 net/mac80211/mlme.c int i, count, rates_len, supp_rates_len, shift; shift 665 net/mac80211/mlme.c shift = ieee80211_vif_get_shift(&sdata->vif); shift 771 net/mac80211/mlme.c 5 * (1 << shift)); shift 787 net/mac80211/mlme.c 5 * (1 << shift)); shift 3113 net/mac80211/mlme.c int shift) shift 3121 net/mac80211/mlme.c if ((rate * 5 * (1 << shift)) > 110) shift 3142 net/mac80211/mlme.c brate = DIV_ROUND_UP(br->bitrate, (1 << shift) * 5); shift 4956 net/mac80211/mlme.c int shift = ieee80211_vif_get_shift(&sdata->vif); shift 4963 net/mac80211/mlme.c shift); shift 442 net/mac80211/rc80211_minstrel.c int shift = ieee80211_chandef_get_shift(chandef); shift 445 net/mac80211/rc80211_minstrel.c DIV_ROUND_UP(rate->bitrate, 1 << shift), erp, 1, shift 446 net/mac80211/rc80211_minstrel.c shift); shift 448 net/mac80211/rc80211_minstrel.c DIV_ROUND_UP(rate->bitrate, 1 << shift), erp, 1, shift 449 net/mac80211/rc80211_minstrel.c shift); shift 504 net/mac80211/rc80211_minstrel.c int shift; shift 516 net/mac80211/rc80211_minstrel.c shift = ieee80211_chandef_get_shift(chandef); shift 518 net/mac80211/rc80211_minstrel.c (1 << shift) * 5); shift 62 net/mac80211/rc80211_minstrel_ht.c .shift = _s, \ shift 99 net/mac80211/rc80211_minstrel_ht.c .shift = _s, \ shift 157 net/mac80211/rc80211_minstrel_ht.c .shift = _s, \ shift 361 net/mac80211/rc80211_minstrel_ht.c minstrel_mcs_groups[group].shift; shift 538 net/mac80211/rc80211_minstrel_ht.c return duration << group->shift; shift 588 net/mac80211/rc80211_minstrel_ht.c if ((group->duration[i] << group->shift) > max_dur) shift 1122 net/mac80211/rc80211_minstrel_ht.c duration <<= g->shift; shift 35 net/mac80211/rc80211_minstrel_ht.h u8 shift; shift 96 net/mac80211/rc80211_minstrel_ht_debugfs.c duration <<= mg->shift; shift 241 net/mac80211/rc80211_minstrel_ht_debugfs.c duration <<= mg->shift; shift 404 net/mac80211/rx.c int shift = 0; shift 407 net/mac80211/rx.c shift = 1; shift 409 net/mac80211/rx.c shift = 2; shift 410 net/mac80211/rx.c *pos = DIV_ROUND_UP(rate->bitrate, 5 * (1 << shift)); shift 2081 net/mac80211/sta_info.c unsigned int shift; shift 2088 net/mac80211/sta_info.c shift = 2; shift 2090 net/mac80211/sta_info.c shift = 1; shift 2092 net/mac80211/sta_info.c shift = 0; shift 2093 net/mac80211/sta_info.c rinfo->legacy = DIV_ROUND_UP(brate, 1 << shift); shift 304 net/mac80211/status.c int rtap_len, int shift, shift 346 net/mac80211/status.c *pos = DIV_ROUND_UP(legacy_rate, 5 * (1 << shift)); shift 806 net/mac80211/status.c int retry_count, int shift, bool send_to_cooked, shift 823 net/mac80211/status.c rtap_len, shift, status); shift 877 net/mac80211/status.c int shift = 0; shift 887 net/mac80211/status.c shift = ieee80211_vif_get_shift(&sta->sdata->vif); shift 1064 net/mac80211/status.c ieee80211_tx_monitor(local, skb, sband, retry_count, shift, shift 55 net/mac80211/tx.c int rate, mrate, erp, dur, i, shift = 0; shift 71 net/mac80211/tx.c shift = ieee80211_chandef_get_shift(&chanctx_conf->def); shift 151 net/mac80211/tx.c rate = DIV_ROUND_UP(r->bitrate, 1 << shift); shift 179 net/mac80211/tx.c rate = DIV_ROUND_UP(mrate, 1 << shift); shift 192 net/mac80211/tx.c shift); shift 202 net/mac80211/tx.c shift); shift 4661 net/mac80211/tx.c int shift; shift 4681 net/mac80211/tx.c shift = ieee80211_vif_get_shift(vif); shift 4686 net/mac80211/tx.c ieee80211_tx_monitor(hw_to_local(hw), copy, sband, 1, shift, false, shift 62 net/mac80211/util.c int shift) shift 100 net/mac80211/util.c dur *= 1 << shift; shift 136 net/mac80211/util.c int erp, shift = 0; shift 145 net/mac80211/util.c shift = ieee80211_vif_get_shift(vif); shift 149 net/mac80211/util.c short_preamble, shift); shift 163 net/mac80211/util.c int erp, shift = 0, bitrate; shift 179 net/mac80211/util.c shift = ieee80211_vif_get_shift(vif); shift 182 net/mac80211/util.c bitrate = DIV_ROUND_UP(rate->bitrate, 1 << shift); shift 186 net/mac80211/util.c erp, short_preamble, shift); shift 189 net/mac80211/util.c erp, short_preamble, shift); shift 192 net/mac80211/util.c erp, short_preamble, shift); shift 207 net/mac80211/util.c int erp, shift = 0, bitrate; shift 222 net/mac80211/util.c shift = ieee80211_vif_get_shift(vif); shift 225 net/mac80211/util.c bitrate = DIV_ROUND_UP(rate->bitrate, 1 << shift); shift 229 net/mac80211/util.c erp, short_preamble, shift); shift 233 net/mac80211/util.c erp, short_preamble, shift); shift 1649 net/mac80211/util.c int shift; shift 1660 net/mac80211/util.c shift = ieee80211_chandef_get_shift(chandef); shift 1671 net/mac80211/util.c (1 << shift) * 5); shift 1933 net/mac80211/util.c int i, j, shift; shift 1940 net/mac80211/util.c shift = ieee80211_vif_get_shift(&sdata->vif); shift 1967 net/mac80211/util.c 1 << shift); shift 3075 net/mac80211/util.c int shift = ieee80211_chandef_get_shift(chandef); shift 3089 net/mac80211/util.c brate = DIV_ROUND_UP(br->bitrate, (1 << shift) * 5); shift 3106 net/mac80211/util.c int rate, shift; shift 3111 net/mac80211/util.c shift = ieee80211_vif_get_shift(&sdata->vif); shift 3137 net/mac80211/util.c 5 * (1 << shift)); shift 3150 net/mac80211/util.c int rate, shift; shift 3156 net/mac80211/util.c shift = ieee80211_vif_get_shift(&sdata->vif); shift 3186 net/mac80211/util.c 5 * (1 << shift)); shift 3269 net/mac80211/util.c int shift = 0; shift 3274 net/mac80211/util.c shift = 1; shift 3277 net/mac80211/util.c shift = 2; shift 3283 net/mac80211/util.c ri.legacy = DIV_ROUND_UP(bitrate, (1 << shift)); shift 3288 net/mac80211/util.c ts += 20 << shift; shift 348 net/netfilter/ipvs/ip_vs_mh.c int mw, shift; shift 369 net/netfilter/ipvs/ip_vs_mh.c shift = fls(mw) - IP_VS_MH_TAB_BITS; shift 370 net/netfilter/ipvs/ip_vs_mh.c return (shift >= 0) ? shift : 0; shift 215 net/netfilter/nf_conntrack_h323_asn1.c unsigned int v, l, shift, bytes; shift 229 net/netfilter/nf_conntrack_h323_asn1.c for (bytes = l >> 3, shift = 24, v = 0; bytes; shift 230 net/netfilter/nf_conntrack_h323_asn1.c bytes--, shift -= 8) shift 231 net/netfilter/nf_conntrack_h323_asn1.c v |= (unsigned int)(*bs->cur++) << shift; shift 234 net/netfilter/nf_conntrack_h323_asn1.c v |= (unsigned int)(*bs->cur) << shift; shift 67 net/netfilter/nf_conntrack_sip.c const char *limit, int *shift) shift 79 net/netfilter/nf_conntrack_sip.c const char *limit, int *shift) shift 111 net/netfilter/nf_conntrack_sip.c const char *limit, int *shift) shift 130 net/netfilter/nf_conntrack_sip.c const char *limit, int *shift) shift 132 net/netfilter/nf_conntrack_sip.c int len = string_len(ct, dptr, limit, shift); shift 140 net/netfilter/nf_conntrack_sip.c return len + digits_len(ct, dptr, limit, shift); shift 186 net/netfilter/nf_conntrack_sip.c const char *limit, int *shift) shift 199 net/netfilter/nf_conntrack_sip.c dptr += digits_len(ct, dptr, limit, shift); shift 206 net/netfilter/nf_conntrack_sip.c const char *limit, int *shift) shift 209 net/netfilter/nf_conntrack_sip.c int s = *shift; shift 216 net/netfilter/nf_conntrack_sip.c (*shift)++; shift 222 net/netfilter/nf_conntrack_sip.c (*shift)++; shift 225 net/netfilter/nf_conntrack_sip.c *shift = s; shift 228 net/netfilter/nf_conntrack_sip.c return epaddr_len(ct, dptr, limit, shift); shift 245 net/netfilter/nf_conntrack_sip.c int shift = 0; shift 264 net/netfilter/nf_conntrack_sip.c if (!skp_epaddr_len(ct, dptr, limit, &shift)) shift 266 net/netfilter/nf_conntrack_sip.c dptr += shift; shift 374 net/netfilter/nf_conntrack_sip.c int shift = 0; shift 424 net/netfilter/nf_conntrack_sip.c *matchlen = hdr->match_len(ct, dptr, limit, &shift); shift 427 net/netfilter/nf_conntrack_sip.c *matchoff = dptr - start + shift; shift 442 net/netfilter/nf_conntrack_sip.c int shift = 0; shift 456 net/netfilter/nf_conntrack_sip.c *matchlen = hdr->match_len(ct, dptr, limit, &shift); shift 459 net/netfilter/nf_conntrack_sip.c *matchoff += shift; shift 674 net/netfilter/nf_conntrack_sip.c const char *limit, int *shift) shift 735 net/netfilter/nf_conntrack_sip.c int shift = 0; shift 771 net/netfilter/nf_conntrack_sip.c *matchlen = hdr->match_len(ct, dptr, limit, &shift); shift 774 net/netfilter/nf_conntrack_sip.c *matchoff = dptr - start + shift; shift 1770 net/netlink/af_netlink.c int pos, idx, shift; shift 1779 net/netlink/af_netlink.c shift = (pos % sizeof(unsigned long)) * 8; shift 1780 net/netlink/af_netlink.c if (put_user((u32)(nlk->groups[idx] >> shift), shift 257 net/rxrpc/proc.c unsigned int shift = 32 - HASH_BITS(rxnet->peer_hash); shift 265 net/rxrpc/proc.c n = *_pos & ((1U << shift) - 1); shift 266 net/rxrpc/proc.c bucket = *_pos >> shift; shift 284 net/rxrpc/proc.c *_pos = (bucket << shift) | n; shift 292 net/rxrpc/proc.c unsigned int shift = 32 - HASH_BITS(rxnet->peer_hash); shift 298 net/rxrpc/proc.c bucket = *_pos >> shift; shift 307 net/rxrpc/proc.c *_pos = (bucket << shift) | n; shift 361 net/sched/act_pedit.c offset += (*d & tkey->offmask) >> tkey->shift; shift 52 net/sched/cls_tcindex.c u32 shift; /* shift ANDed key to the right */ shift 107 net/sched/cls_tcindex.c int key = (skb->tc_index & p->mask) >> p->shift; shift 260 net/sched/cls_tcindex.c return p->hash > (p->mask >> p->shift); shift 356 net/sched/cls_tcindex.c cp->shift = p->shift; shift 370 net/sched/cls_tcindex.c cp->shift = nla_get_u32(tb[TCA_TCINDEX_SHIFT]); shift 376 net/sched/cls_tcindex.c if ((cp->mask >> cp->shift) < PERFECT_HASH_THRESHOLD) shift 377 net/sched/cls_tcindex.c cp->hash = (cp->mask >> cp->shift) + 1; shift 649 net/sched/cls_tcindex.c nla_put_u32(skb, TCA_TCINDEX_SHIFT, p->shift) || shift 711 net/sched/em_meta.c int shift = v->hdr.shift; shift 713 net/sched/em_meta.c if (shift && shift < dst->len) shift 714 net/sched/em_meta.c dst->len -= shift; shift 762 net/sched/em_meta.c if (v->hdr.shift) shift 763 net/sched/em_meta.c dst->value >>= v->hdr.shift; shift 1267 net/sched/sch_cake.c static u64 cake_ewma(u64 avg, u64 sample, u32 shift) shift 1269 net/sched/sch_cake.c avg -= avg >> shift; shift 1270 net/sched/sch_cake.c avg += sample >> shift; shift 1347 net/sched/sch_generic.c r->shift++; shift 723 net/sched/sch_qfq.c static inline u64 qfq_round_down(u64 ts, unsigned int shift) shift 725 net/sched/sch_qfq.c return ts & ~((1ULL << shift) - 1); shift 407 net/sunrpc/auth_gss/gss_krb5_wrap.c static void rotate_buf_a_little(struct xdr_buf *buf, unsigned int shift) shift 413 net/sunrpc/auth_gss/gss_krb5_wrap.c BUG_ON(shift > LOCAL_BUF_LEN); shift 415 net/sunrpc/auth_gss/gss_krb5_wrap.c read_bytes_from_xdr_buf(buf, 0, head, shift); shift 416 net/sunrpc/auth_gss/gss_krb5_wrap.c for (i = 0; i + shift < buf->len; i += LOCAL_BUF_LEN) { shift 417 net/sunrpc/auth_gss/gss_krb5_wrap.c this_len = min(LOCAL_BUF_LEN, buf->len - (i + shift)); shift 418 net/sunrpc/auth_gss/gss_krb5_wrap.c read_bytes_from_xdr_buf(buf, i+shift, tmp, this_len); shift 421 net/sunrpc/auth_gss/gss_krb5_wrap.c write_bytes_to_xdr_buf(buf, buf->len - shift, head, shift); shift 424 net/sunrpc/auth_gss/gss_krb5_wrap.c static void _rotate_left(struct xdr_buf *buf, unsigned int shift) shift 429 net/sunrpc/auth_gss/gss_krb5_wrap.c shift %= buf->len; shift 430 net/sunrpc/auth_gss/gss_krb5_wrap.c while (shifted < shift) { shift 431 net/sunrpc/auth_gss/gss_krb5_wrap.c this_shift = min(shift - shifted, LOCAL_BUF_LEN); shift 437 net/sunrpc/auth_gss/gss_krb5_wrap.c static void rotate_left(u32 base, struct xdr_buf *buf, unsigned int shift) shift 442 net/sunrpc/auth_gss/gss_krb5_wrap.c _rotate_left(&subbuf, shift); shift 564 net/sunrpc/xdr.c int shift = xdr->scratch.iov_len; shift 567 net/sunrpc/xdr.c if (shift == 0) shift 570 net/sunrpc/xdr.c memcpy(xdr->scratch.iov_base, page, shift); shift 571 net/sunrpc/xdr.c memmove(page, page + shift, (void *)xdr->p - page); shift 43 samples/bpf/lathist_kern.c unsigned int shift; shift 46 samples/bpf/lathist_kern.c shift = (v > 0xFF) << 3; v >>= shift; r |= shift; shift 47 samples/bpf/lathist_kern.c shift = (v > 0xF) << 2; v >>= shift; r |= shift; shift 48 samples/bpf/lathist_kern.c shift = (v > 0x3) << 1; v >>= shift; r |= shift; shift 47 samples/bpf/lwt_len_hist_kern.c unsigned int shift; shift 50 samples/bpf/lwt_len_hist_kern.c shift = (v > 0xFF) << 3; v >>= shift; r |= shift; shift 51 samples/bpf/lwt_len_hist_kern.c shift = (v > 0xF) << 2; v >>= shift; r |= shift; shift 52 samples/bpf/lwt_len_hist_kern.c shift = (v > 0x3) << 1; v >>= shift; r |= shift; shift 46 samples/bpf/tracex2_kern.c unsigned int shift; shift 49 samples/bpf/tracex2_kern.c shift = (v > 0xFF) << 3; v >>= shift; r |= shift; shift 50 samples/bpf/tracex2_kern.c shift = (v > 0xF) << 2; v >>= shift; r |= shift; shift 51 samples/bpf/tracex2_kern.c shift = (v > 0x3) << 1; v >>= shift; r |= shift; shift 60 scripts/dtc/fdtdump.c int depth, sz, shift; shift 65 scripts/dtc/fdtdump.c shift = 4; shift 110 scripts/dtc/fdtdump.c printf("%*s%s {\n", depth * shift, "", s); shift 119 scripts/dtc/fdtdump.c printf("%*s};\n", depth * shift, ""); shift 124 scripts/dtc/fdtdump.c printf("%*s// [NOP]\n", depth * shift, ""); shift 129 scripts/dtc/fdtdump.c fprintf(stderr, "%*s ** Unknown tag 0x%08x\n", depth * shift, "", tag); shift 140 scripts/dtc/fdtdump.c printf("%*s%s", depth * shift, "", s); shift 313 security/selinux/ss/avtab.c u32 shift = 0; shift 322 security/selinux/ss/avtab.c shift++; shift 324 security/selinux/ss/avtab.c if (shift > 2) shift 325 security/selinux/ss/avtab.c shift = shift - 2; shift 326 security/selinux/ss/avtab.c nslot = 1 << shift; shift 225 sound/firewire/motu/motu-protocol-v2.c u32 data, u32 mask, u32 shift) shift 234 sound/firewire/motu/motu-protocol-v2.c data = (data & mask) >> shift; shift 226 sound/hda/hdac_bus.c unsigned int shift = ((unsigned long)(addr) & 0x3) << 3; shift 230 sound/hda/hdac_bus.c return (v >> shift) & mask; shift 239 sound/hda/hdac_bus.c unsigned int shift = ((unsigned long)(addr) & 0x3) << 3; shift 243 sound/hda/hdac_bus.c v &= ~(mask << shift); shift 244 sound/hda/hdac_bus.c v |= val << shift; shift 463 sound/hda/hdac_device.c unsigned int shift, num_elems, mask; shift 473 sound/hda/hdac_device.c shift = 16; shift 477 sound/hda/hdac_device.c shift = 8; shift 481 sound/hda/hdac_device.c mask = (1 << (shift-1)) - 1; shift 511 sound/hda/hdac_device.c range_val = !!(parm & (1 << (shift-1))); /* ranges */ shift 519 sound/hda/hdac_device.c parm >>= shift; shift 541 sound/hda/hdac_stream.c cc->shift = 0; shift 349 sound/i2c/other/ak4xxx-adda.c #define AK_COMPOSE(chip,addr,shift,mask) \ shift 350 sound/i2c/other/ak4xxx-adda.c (((chip) << 8) | (addr) | ((shift) << 16) | ((mask) << 24)) shift 466 sound/i2c/other/ak4xxx-adda.c int shift = AK_GET_SHIFT(kcontrol->private_value); shift 468 sound/i2c/other/ak4xxx-adda.c (snd_akm4xxx_get(ak, chip, addr) >> shift) & 3; shift 478 sound/i2c/other/ak4xxx-adda.c int shift = AK_GET_SHIFT(kcontrol->private_value); shift 482 sound/i2c/other/ak4xxx-adda.c nval = (nval << shift) | shift 483 sound/i2c/other/ak4xxx-adda.c (snd_akm4xxx_get(ak, chip, addr) & ~(3 << shift)); shift 498 sound/i2c/other/ak4xxx-adda.c int shift = AK_GET_SHIFT(kcontrol->private_value); shift 501 sound/i2c/other/ak4xxx-adda.c unsigned char val = snd_akm4xxx_get(ak, chip, addr) & (1<<shift); shift 504 sound/i2c/other/ak4xxx-adda.c ucontrol->value.integer.value[0] = (val & (1<<shift)) != 0; shift 514 sound/i2c/other/ak4xxx-adda.c int shift = AK_GET_SHIFT(kcontrol->private_value); shift 524 sound/i2c/other/ak4xxx-adda.c val = oval | (1<<shift); shift 526 sound/i2c/other/ak4xxx-adda.c val = oval & ~(1<<shift); shift 827 sound/i2c/other/ak4xxx-adda.c int shift = idx == 3 ? 6 : (2 - idx) * 2; shift 829 sound/i2c/other/ak4xxx-adda.c knew.private_value = AK_COMPOSE(0, 8, shift, 0); shift 758 sound/isa/ad1816a/ad1816a_lib.c #define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \ shift 763 sound/isa/ad1816a/ad1816a_lib.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ shift 765 sound/isa/ad1816a/ad1816a_lib.c #define AD1816A_SINGLE(xname, reg, shift, mask, invert) \ shift 768 sound/isa/ad1816a/ad1816a_lib.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } shift 786 sound/isa/ad1816a/ad1816a_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 791 sound/isa/ad1816a/ad1816a_lib.c ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask; shift 803 sound/isa/ad1816a/ad1816a_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 812 sound/isa/ad1816a/ad1816a_lib.c val <<= shift; shift 815 sound/isa/ad1816a/ad1816a_lib.c val = (old_val & ~(mask << shift)) | val; shift 380 sound/isa/cs423x/cs4236_lib.c #define CS4236_SINGLE(xname, xindex, reg, shift, mask, invert) \ shift 384 sound/isa/cs423x/cs4236_lib.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } shift 386 sound/isa/cs423x/cs4236_lib.c #define CS4236_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ shift 391 sound/isa/cs423x/cs4236_lib.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ shift 410 sound/isa/cs423x/cs4236_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 415 sound/isa/cs423x/cs4236_lib.c ucontrol->value.integer.value[0] = (chip->eimage[CS4236_REG(reg)] >> shift) & mask; shift 427 sound/isa/cs423x/cs4236_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 436 sound/isa/cs423x/cs4236_lib.c val <<= shift; shift 438 sound/isa/cs423x/cs4236_lib.c val = (chip->eimage[CS4236_REG(reg)] & ~(mask << shift)) | val; shift 445 sound/isa/cs423x/cs4236_lib.c #define CS4236_SINGLEC(xname, xindex, reg, shift, mask, invert) \ shift 449 sound/isa/cs423x/cs4236_lib.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } shift 456 sound/isa/cs423x/cs4236_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 461 sound/isa/cs423x/cs4236_lib.c ucontrol->value.integer.value[0] = (chip->cimage[reg] >> shift) & mask; shift 473 sound/isa/cs423x/cs4236_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 482 sound/isa/cs423x/cs4236_lib.c val <<= shift; shift 484 sound/isa/cs423x/cs4236_lib.c val = (chip->cimage[reg] & ~(mask << shift)) | val; shift 777 sound/isa/es1688/es1688_lib.c #define ES1688_SINGLE(xname, xindex, reg, shift, mask, invert) \ shift 781 sound/isa/es1688/es1688_lib.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } shift 799 sound/isa/es1688/es1688_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 804 sound/isa/es1688/es1688_lib.c ucontrol->value.integer.value[0] = (snd_es1688_mixer_read(chip, reg) >> shift) & mask; shift 816 sound/isa/es1688/es1688_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 825 sound/isa/es1688/es1688_lib.c nval <<= shift; shift 828 sound/isa/es1688/es1688_lib.c nval = (oval & ~(mask << shift)) | nval; shift 437 sound/isa/es18xx.c int shift, err; shift 439 sound/isa/es18xx.c shift = 0; shift 441 sound/isa/es18xx.c shift++; shift 443 sound/isa/es18xx.c shift++; shift 452 sound/isa/es18xx.c chip->dma2_shift = shift; shift 454 sound/isa/es18xx.c chip->dma1_shift = shift; shift 546 sound/isa/es18xx.c int shift, err; shift 548 sound/isa/es18xx.c shift = 0; shift 556 sound/isa/es18xx.c shift++; shift 558 sound/isa/es18xx.c shift++; shift 559 sound/isa/es18xx.c chip->dma1_shift = shift; shift 1110 sound/isa/es18xx.c #define ES18XX_SINGLE(xname, xindex, reg, shift, mask, flags) \ shift 1114 sound/isa/es18xx.c .private_value = reg | (shift << 8) | (mask << 16) | (flags << 24) } shift 1134 sound/isa/es18xx.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 1144 sound/isa/es18xx.c ucontrol->value.integer.value[0] = (val >> shift) & mask; shift 1154 sound/isa/es18xx.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 1163 sound/isa/es18xx.c mask <<= shift; shift 1164 sound/isa/es18xx.c val <<= shift; shift 17 sound/isa/gus/gus_mixer.c #define GF1_SINGLE(xname, xindex, shift, invert) \ shift 21 sound/isa/gus/gus_mixer.c .private_value = shift | (invert << 8) } shift 28 sound/isa/gus/gus_mixer.c int shift = kcontrol->private_value & 0xff; shift 31 sound/isa/gus/gus_mixer.c ucontrol->value.integer.value[0] = (gus->mix_cntrl_reg >> shift) & 1; shift 41 sound/isa/gus/gus_mixer.c int shift = kcontrol->private_value & 0xff; shift 49 sound/isa/gus/gus_mixer.c nval <<= shift; shift 52 sound/isa/gus/gus_mixer.c nval = (oval & ~(1 << shift)) | nval; shift 326 sound/isa/opl3sa2.c #define OPL3SA2_SINGLE(xname, xindex, reg, shift, mask, invert) \ shift 330 sound/isa/opl3sa2.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } shift 331 sound/isa/opl3sa2.c #define OPL3SA2_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ shift 337 sound/isa/opl3sa2.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ shift 345 sound/isa/opl3sa2.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 350 sound/isa/opl3sa2.c ucontrol->value.integer.value[0] = (chip->ctlregs[reg] >> shift) & mask; shift 362 sound/isa/opl3sa2.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 371 sound/isa/opl3sa2.c val <<= shift; shift 374 sound/isa/opl3sa2.c val = (oval & ~(mask << shift)) | val; shift 61 sound/isa/sb/sb_mixer.c int shift = (kcontrol->private_value >> 16) & 0xff; shift 66 sound/isa/sb/sb_mixer.c val = (snd_sbmixer_read(sb, reg) >> shift) & mask; shift 77 sound/isa/sb/sb_mixer.c int shift = (kcontrol->private_value >> 16) & 0x07; shift 82 sound/isa/sb/sb_mixer.c val = (ucontrol->value.integer.value[0] & mask) << shift; shift 85 sound/isa/sb/sb_mixer.c val = (oval & ~(mask << shift)) | val; shift 2059 sound/isa/wss/wss_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 2064 sound/isa/wss/wss_lib.c ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; shift 2078 sound/isa/wss/wss_lib.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 2087 sound/isa/wss/wss_lib.c val <<= shift; shift 2089 sound/isa/wss/wss_lib.c val = (chip->image[reg] & ~(mask << shift)) | val; shift 524 sound/pci/ac97/ac97_codec.c int shift = (kcontrol->private_value >> 8) & 0x0f; shift 528 sound/pci/ac97/ac97_codec.c uinfo->count = shift == rshift ? 1 : 2; shift 539 sound/pci/ac97/ac97_codec.c int shift = (kcontrol->private_value >> 8) & 0x0f; shift 546 sound/pci/ac97/ac97_codec.c ucontrol->value.integer.value[0] = (snd_ac97_read_cache(ac97, reg) >> shift) & mask; shift 547 sound/pci/ac97/ac97_codec.c if (shift != rshift) shift 551 sound/pci/ac97/ac97_codec.c if (shift != rshift) shift 563 sound/pci/ac97/ac97_codec.c int shift = (kcontrol->private_value >> 8) & 0x0f; shift 574 sound/pci/ac97/ac97_codec.c val_mask = mask << shift; shift 575 sound/pci/ac97/ac97_codec.c val = val << shift; shift 576 sound/pci/ac97/ac97_codec.c if (shift != rshift) { shift 807 sound/pci/ac97/ac97_codec.c int shift = (kcontrol->private_value >> 8) & 0x0f; shift 816 sound/pci/ac97/ac97_codec.c mask <<= shift; shift 817 sound/pci/ac97/ac97_codec.c value <<= shift; shift 1129 sound/pci/ac97/ac97_codec.c static void snd_ac97_change_volume_params2(struct snd_ac97 * ac97, int reg, int shift, unsigned char *max) shift 1134 sound/pci/ac97/ac97_codec.c val = AC97_MUTE_MASK_STEREO | (0x20 << shift); shift 2758 sound/pci/ac97/ac97_codec.c int shift = (kcontrol->private_value >> 8) & 0x0f; shift 2761 sound/pci/ac97/ac97_codec.c if (shift != rshift) shift 2794 sound/pci/ac97/ac97_codec.c int shift = (kcontrol->private_value >> 8) & 0x0f; shift 2797 sound/pci/ac97/ac97_codec.c if (shift != rshift) shift 1073 sound/pci/ac97/ac97_patch.c int shift = kcontrol->private_value; shift 1076 sound/pci/ac97/ac97_patch.c val = ac97->regs[AC97_SIGMATEL_OUTSEL] >> shift; shift 1087 sound/pci/ac97/ac97_patch.c int shift = kcontrol->private_value; shift 1097 sound/pci/ac97/ac97_patch.c 7 << shift, val << shift, 0); shift 1112 sound/pci/ac97/ac97_patch.c int shift = kcontrol->private_value; shift 1116 sound/pci/ac97/ac97_patch.c ucontrol->value.enumerated.item[0] = (val >> shift) & 7; shift 1123 sound/pci/ac97/ac97_patch.c int shift = kcontrol->private_value; shift 1125 sound/pci/ac97/ac97_patch.c return ac97_update_bits_page(ac97, AC97_SIGMATEL_INSEL, 7 << shift, shift 1126 sound/pci/ac97/ac97_patch.c ucontrol->value.enumerated.item[0] << shift, 0); shift 1154 sound/pci/ac97/ac97_patch.c #define STAC9758_OUTPUT_JACK(xname, shift) \ shift 1159 sound/pci/ac97/ac97_patch.c .private_value = shift } shift 1160 sound/pci/ac97/ac97_patch.c #define STAC9758_INPUT_JACK(xname, shift) \ shift 1165 sound/pci/ac97/ac97_patch.c .private_value = shift } shift 3632 sound/pci/ac97/ac97_patch.c unsigned short shift; shift 3642 sound/pci/ac97/ac97_patch.c .shift = 0, shift 3650 sound/pci/ac97/ac97_patch.c .shift = 2, shift 3658 sound/pci/ac97/ac97_patch.c .shift = 4, shift 3694 sound/pci/ac97/ac97_patch.c vt1618_uaj[kcontrol->private_value].shift; shift 3705 sound/pci/ac97/ac97_patch.c vt1618_uaj[kcontrol->private_value].shift, shift 10 sound/pci/ac97/ac97_patch.h #define AC97_SINGLE_VALUE(reg,shift,mask,invert) \ shift 11 sound/pci/ac97/ac97_patch.h ((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | \ shift 13 sound/pci/ac97/ac97_patch.h #define AC97_PAGE_SINGLE_VALUE(reg,shift,mask,invert,page) \ shift 14 sound/pci/ac97/ac97_patch.h (AC97_SINGLE_VALUE(reg,shift,mask,invert) | (1<<25) | ((page) << 26)) shift 15 sound/pci/ac97/ac97_patch.h #define AC97_SINGLE(xname, reg, shift, mask, invert) \ shift 19 sound/pci/ac97/ac97_patch.h .private_value = AC97_SINGLE_VALUE(reg, shift, mask, invert) } shift 20 sound/pci/ac97/ac97_patch.h #define AC97_PAGE_SINGLE(xname, reg, shift, mask, invert, page) \ shift 24 sound/pci/ac97/ac97_patch.h .private_value = AC97_PAGE_SINGLE_VALUE(reg, shift, mask, invert, page) } shift 46 sound/pci/ak4531_codec.c #define AK4531_SINGLE(xname, xindex, reg, shift, mask, invert) \ shift 50 sound/pci/ak4531_codec.c .private_value = reg | (shift << 16) | (mask << 24) | (invert << 22) } shift 51 sound/pci/ak4531_codec.c #define AK4531_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ shift 57 sound/pci/ak4531_codec.c .private_value = reg | (shift << 16) | (mask << 24) | (invert << 22), \ shift 75 sound/pci/ak4531_codec.c int shift = (kcontrol->private_value >> 16) & 0x07; shift 81 sound/pci/ak4531_codec.c val = (ak4531->regs[reg] >> shift) & mask; shift 94 sound/pci/ak4531_codec.c int shift = (kcontrol->private_value >> 16) & 0x07; shift 104 sound/pci/ak4531_codec.c val <<= shift; shift 106 sound/pci/ak4531_codec.c val = (ak4531->regs[reg] & ~(mask << shift)) | val; shift 884 sound/pci/azt3328.c #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \ shift 888 sound/pci/azt3328.c .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \ shift 905 sound/pci/azt3328.c #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \ shift 909 sound/pci/azt3328.c .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \ shift 912 sound/pci/azt3328.c #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \ shift 916 sound/pci/azt3328.c .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \ shift 426 sound/pci/cmipci.c unsigned int shift; shift 777 sound/pci/cmipci.c rec->shift = 0; shift 781 sound/pci/cmipci.c rec->shift++; /* 24/32bit */ shift 792 sound/pci/cmipci.c rec->dma_size = runtime->buffer_size << rec->shift; shift 793 sound/pci/cmipci.c period_size = runtime->period_size << rec->shift; shift 945 sound/pci/cmipci.c ptr = (rec->dma_size - (rem + 1)) >> rec->shift; shift 2006 sound/pci/cmipci.c #define CMIPCI_SB_VOL_STEREO(xname,reg,shift,mask) CMIPCI_DOUBLE(xname, reg, reg+1, shift, shift, mask, 0, 1) shift 2007 sound/pci/cmipci.c #define CMIPCI_SB_VOL_MONO(xname,reg,shift,mask) CMIPCI_DOUBLE(xname, reg, reg, shift, shift, mask, 0, 0) shift 2009 sound/pci/cmipci.c #define CMIPCI_SB_SW_MONO(xname,shift) CMIPCI_DOUBLE(xname, SB_DSP4_OUTPUT_SW, SB_DSP4_OUTPUT_SW, shift, shift, 1, 0, 0) shift 2172 sound/pci/cmipci.c #define CMIPCI_MIXER_SW_MONO(xname, reg, shift, invert) \ shift 2176 sound/pci/cmipci.c .private_value = COMPOSE_SB_REG(reg, reg, shift, shift, 1, invert, 0), \ shift 2186 sound/pci/cmipci.c #define CMIPCI_MIXER_VOL_MONO(xname, reg, shift, mask) \ shift 2190 sound/pci/cmipci.c .private_value = COMPOSE_SB_REG(reg, reg, shift, shift, mask, 0, 0), \ shift 1624 sound/pci/cs46xx/cs46xx.h unsigned int shift; /* Shift count to trasform frames in bytes */ shift 1662 sound/pci/cs46xx/cs46xx.h unsigned int shift; /* Shift count to trasform frames in bytes */ shift 911 sound/pci/cs46xx/cs46xx_lib.c return ptr >> cpcm->shift; shift 935 sound/pci/cs46xx/cs46xx_lib.c return ptr >> chip->capt.shift; shift 1226 sound/pci/cs46xx/cs46xx_lib.c cpcm->shift = 2; shift 1229 sound/pci/cs46xx/cs46xx_lib.c cpcm->shift--; shift 1234 sound/pci/cs46xx/cs46xx_lib.c cpcm->shift--; shift 1250 sound/pci/cs46xx/cs46xx_lib.c cpcm->pcm_rec.hw_buffer_size = runtime->period_size * CS46XX_FRAGS << cpcm->shift; shift 1256 sound/pci/cs46xx/cs46xx_lib.c tmp |= (4 << cpcm->shift) - 1; shift 1266 sound/pci/cs46xx/cs46xx_lib.c tmp |= (4 << cpcm->shift) - 1; shift 1326 sound/pci/cs46xx/cs46xx_lib.c chip->capt.shift = 2; shift 445 sound/pci/emu10k1/emu10k1_callback.c unsigned int shift = (vp->apitch - 0xe000) >> 10; shift 446 sound/pci/emu10k1/emu10k1_callback.c temp |= shift << 25; shift 1159 sound/pci/es1938.c #define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ shift 1165 sound/pci/es1938.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ shift 1167 sound/pci/es1938.c #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \ shift 1171 sound/pci/es1938.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } shift 1190 sound/pci/es1938.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 1196 sound/pci/es1938.c ucontrol->value.integer.value[0] = (val >> shift) & mask; shift 1207 sound/pci/es1938.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 1215 sound/pci/es1938.c mask <<= shift; shift 1216 sound/pci/es1938.c val <<= shift; shift 835 sound/pci/fm801.c #define FM801_SINGLE(xname, reg, shift, mask, invert) \ shift 838 sound/pci/fm801.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } shift 857 sound/pci/fm801.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 862 sound/pci/fm801.c value[0] = (fm801_ioread16(chip, reg) >> shift) & mask; shift 873 sound/pci/fm801.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 881 sound/pci/fm801.c return snd_fm801_update_bits(chip, reg, mask << shift, val << shift); shift 736 sound/pci/ice1712/ews.c int shift = kcontrol->private_value & 0xff; shift 746 sound/pci/ice1712/ews.c data[0] = (data[shift >> 3] >> (shift & 7)) & 0x01; shift 757 sound/pci/ice1712/ews.c int shift = kcontrol->private_value & 0xff; shift 767 sound/pci/ice1712/ews.c ndata[shift >> 3] = data[shift >> 3] & ~(1 << (shift & 7)); shift 770 sound/pci/ice1712/ews.c ndata[shift >> 3] |= (1 << (shift & 7)); shift 773 sound/pci/ice1712/ews.c ndata[shift >> 3] |= (1 << (shift & 7)); shift 775 sound/pci/ice1712/ews.c change = (data[shift >> 3] != ndata[shift >> 3]); shift 852 sound/pci/ice1712/ews.c int shift = kcontrol->private_value & 0xff; shift 858 sound/pci/ice1712/ews.c data = (data >> shift) & 1; shift 868 sound/pci/ice1712/ews.c int shift = kcontrol->private_value & 0xff; shift 874 sound/pci/ice1712/ews.c ndata = data & ~(1 << shift); shift 876 sound/pci/ice1712/ews.c ndata |= (1 << shift); shift 878 sound/pci/ice1712/ews.c ndata ^= (1 << shift); shift 2046 sound/pci/ice1712/ice1712.c int change, shift; shift 2059 sound/pci/ice1712/ice1712.c shift = ((idx % 2) * 8) + ((idx / 2) * 2); shift 2062 sound/pci/ice1712/ice1712.c val &= ~(0x03 << shift); shift 2063 sound/pci/ice1712/ice1712.c val |= nval << shift; shift 2074 sound/pci/ice1712/ice1712.c shift = ((idx / 2) * 8) + ((idx % 2) * 4); shift 2077 sound/pci/ice1712/ice1712.c val &= ~(0x07 << shift); shift 2078 sound/pci/ice1712/ice1712.c val |= nval << shift; shift 2081 sound/pci/ice1712/ice1712.c val &= ~(0x08 << shift); shift 2082 sound/pci/ice1712/ice1712.c val |= nval << shift; shift 2116 sound/pci/ice1712/ice1712.c int change, shift; shift 2131 sound/pci/ice1712/ice1712.c shift = idx * 2; shift 2132 sound/pci/ice1712/ice1712.c val &= ~(0x03 << shift); shift 2133 sound/pci/ice1712/ice1712.c val |= nval << shift; shift 2134 sound/pci/ice1712/ice1712.c shift = idx * 4 + 8; shift 2137 sound/pci/ice1712/ice1712.c val &= ~(0x07 << shift); shift 2138 sound/pci/ice1712/ice1712.c val |= nval << shift; shift 2141 sound/pci/ice1712/ice1712.c val &= ~(0x08 << shift); shift 2142 sound/pci/ice1712/ice1712.c val |= nval << shift; shift 475 sound/pci/ice1712/ice1712.h int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift); shift 477 sound/pci/ice1712/ice1712.h int shift); shift 1801 sound/pci/ice1712/ice1724.c int shift = kcontrol->private_value & 0xff; shift 1806 sound/pci/ice1712/ice1724.c (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; shift 1815 sound/pci/ice1712/ice1724.c int shift = kcontrol->private_value & 0xff; shift 1821 sound/pci/ice1712/ice1724.c nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; shift 1824 sound/pci/ice1712/ice1724.c nval |= val & ~(1 << shift); shift 2049 sound/pci/ice1712/ice1724.c int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift) shift 2058 sound/pci/ice1712/ice1724.c val >>= shift; shift 2069 sound/pci/ice1712/ice1724.c int shift) shift 2083 sound/pci/ice1712/ice1724.c val &= ~(0x07 << shift); shift 2084 sound/pci/ice1712/ice1724.c val |= nval << shift; shift 279 sound/pci/ice1712/maya44.c #define COMPOSE_GPIO_VAL(shift, inv) ((shift) | ((inv) << 8)) shift 300 sound/pci/ice1712/maya44.c unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value); shift 303 sound/pci/ice1712/maya44.c val = (snd_ice1712_gpio_read(chip->ice) >> shift) & 1; shift 314 sound/pci/ice1712/maya44.c unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value); shift 319 sound/pci/ice1712/maya44.c mask = 1 << shift; shift 397 sound/pci/ice1712/maya44.c static const unsigned char shift[10] = shift 399 sound/pci/ice1712/maya44.c return shift[idx % 10]; shift 42 sound/pci/ice1712/revo.c int reg, shift; shift 57 sound/pci/ice1712/revo.c shift = 4; shift 60 sound/pci/ice1712/revo.c shift = 3; shift 63 sound/pci/ice1712/revo.c old = (tmp >> shift) & 0x03; shift 70 sound/pci/ice1712/revo.c tmp &= ~(0x03 << shift); shift 71 sound/pci/ice1712/revo.c tmp |= dfs << shift; shift 188 sound/pci/nm256/nm256.c int shift; /* bit shifts */ shift 422 sound/pci/nm256/nm256.c s->shift = 0; shift 425 sound/pci/nm256/nm256.c s->shift++; shift 429 sound/pci/nm256/nm256.c s->shift++; shift 503 sound/pci/nm256/nm256.c snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift)); shift 333 sound/pci/oxygen/oxygen_pcm.c unsigned int mclks, shift; shift 341 sound/pci/oxygen/oxygen_pcm.c shift = 0; shift 343 sound/pci/oxygen/oxygen_pcm.c shift = 2; shift 345 sound/pci/oxygen/oxygen_pcm.c shift = 4; shift 347 sound/pci/oxygen/oxygen_pcm.c return OXYGEN_I2S_MCLK(mclks >> shift); shift 611 sound/pci/oxygen/xonar_wm87x6.c u8 min, max, shift; shift 627 sound/pci/oxygen/xonar_wm87x6.c shift = (ctl->private_value >> 20) & 0xf; shift 634 sound/pci/oxygen/xonar_wm87x6.c reg_value &= ~(mask << shift); shift 635 sound/pci/oxygen/xonar_wm87x6.c reg_value |= value << shift; shift 976 sound/pci/oxygen/xonar_wm87x6.c #define _WM8776_FIELD_CTL(xname, reg, shift, initval, min, max, mask, flags) \ shift 980 sound/pci/oxygen/xonar_wm87x6.c ((mask) << 16) | ((shift) << 20) | ((reg) << 24) | (flags) shift 981 sound/pci/oxygen/xonar_wm87x6.c #define WM8776_FIELD_CTL_ENUM(xname, reg, shift, init, min, max, mask, flags) {\ shift 983 sound/pci/oxygen/xonar_wm87x6.c reg, shift, init, min, max, mask, flags), \ shift 944 sound/pci/sonicvibes.c #define SONICVIBES_SINGLE(xname, xindex, reg, shift, mask, invert) \ shift 948 sound/pci/sonicvibes.c .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } shift 965 sound/pci/sonicvibes.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 970 sound/pci/sonicvibes.c ucontrol->value.integer.value[0] = (snd_sonicvibes_in1(sonic, reg)>> shift) & mask; shift 981 sound/pci/sonicvibes.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 990 sound/pci/sonicvibes.c val <<= shift; shift 993 sound/pci/sonicvibes.c val = (oval & ~(mask << shift)) | val; shift 268 sound/pci/ymfpci/ymfpci.h u32 shift; shift 353 sound/pci/ymfpci/ymfpci_main.c pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; shift 714 sound/pci/ymfpci/ymfpci_main.c ypcm->shift = 0; shift 719 sound/pci/ymfpci/ymfpci_main.c ypcm->shift++; shift 724 sound/pci/ymfpci/ymfpci_main.c ypcm->shift++; shift 738 sound/pci/ymfpci/ymfpci_main.c bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); shift 765 sound/pci/ymfpci/ymfpci_main.c return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; shift 1441 sound/pci/ymfpci/ymfpci_main.c #define YMFPCI_SINGLE(xname, xindex, reg, shift) \ shift 1445 sound/pci/ymfpci/ymfpci_main.c .private_value = ((reg) | ((shift) << 16)) } shift 1454 sound/pci/ymfpci/ymfpci_main.c unsigned int shift = (kcontrol->private_value >> 16) & 0xff; shift 1463 sound/pci/ymfpci/ymfpci_main.c (snd_ymfpci_readl(chip, reg) >> shift) & mask; shift 1472 sound/pci/ymfpci/ymfpci_main.c unsigned int shift = (kcontrol->private_value >> 16) & 0xff; shift 1483 sound/pci/ymfpci/ymfpci_main.c val <<= shift; shift 1486 sound/pci/ymfpci/ymfpci_main.c val = (oval & ~(mask << shift)) | val; shift 203 sound/ppc/awacs.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 209 sound/ppc/awacs.c val = (chip->awacs_reg[reg] >> shift) & 1; shift 222 sound/ppc/awacs.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 224 sound/ppc/awacs.c int mask = 1 << shift; shift 124 sound/ppc/burgundy.c long *volume, int shift) shift 134 sound/ppc/burgundy.c hardvolume = lvolume + (rvolume << shift); shift 135 sound/ppc/burgundy.c if (shift == 8) shift 143 sound/ppc/burgundy.c long *volume, int shift) shift 154 sound/ppc/burgundy.c volume[1] = (wvolume >> shift) & 0xff; shift 176 sound/ppc/burgundy.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 178 sound/ppc/burgundy.c ucontrol->value.integer.value, shift); shift 187 sound/ppc/burgundy.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 191 sound/ppc/burgundy.c ucontrol->value.integer.value, shift); shift 192 sound/ppc/burgundy.c snd_pmac_burgundy_read_volume(chip, addr, nvoices, shift); shift 197 sound/ppc/burgundy.c #define BURGUNDY_VOLUME_W(xname, xindex, addr, shift) \ shift 202 sound/ppc/burgundy.c .private_value = ((ADDR2BASE(addr) & 0xff) | ((shift) << 8)) } shift 232 sound/soc/atmel/tse850-pcm5142.c #define TSE850_DAPM_SINGLE_EXT(xname, reg, shift, max, invert, xget, xput) \ shift 237 sound/soc/atmel/tse850-pcm5142.c .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) } shift 332 sound/soc/codecs/88pm860x-codec.c unsigned int shift = mc->shift; shift 336 sound/soc/codecs/88pm860x-codec.c val = snd_soc_component_read32(component, reg) >> shift; shift 337 sound/soc/codecs/88pm860x-codec.c val2 = snd_soc_component_read32(component, reg2) >> shift; shift 352 sound/soc/codecs/88pm860x-codec.c unsigned int shift = mc->shift; shift 358 sound/soc/codecs/88pm860x-codec.c val_mask = mask << shift; shift 362 sound/soc/codecs/88pm860x-codec.c val = val << shift; shift 363 sound/soc/codecs/88pm860x-codec.c val2 = val2 << shift; shift 164 sound/soc/codecs/adav80x.c #define ADAV80X_MUX_ENUM_DECL(name, reg, shift) \ shift 165 sound/soc/codecs/adav80x.c SOC_VALUE_ENUM_DOUBLE_DECL(name, reg, shift, 7, \ shift 100 sound/soc/codecs/arizona.c 1 << w->shift, 1 << w->shift); shift 105 sound/soc/codecs/arizona.c 1 << w->shift, 0); shift 897 sound/soc/codecs/arizona.c bool arizona_input_analog(struct snd_soc_component *component, int shift) shift 899 sound/soc/codecs/arizona.c unsigned int reg = ARIZONA_IN1L_CONTROL + ((shift / 2) * 8); shift 913 sound/soc/codecs/arizona.c if (w->shift % 2) shift 914 sound/soc/codecs/arizona.c reg = ARIZONA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8); shift 916 sound/soc/codecs/arizona.c reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8); shift 962 sound/soc/codecs/arizona.c switch (w->shift) { shift 989 sound/soc/codecs/arizona.c switch (w->shift) { shift 1012 sound/soc/codecs/arizona.c switch (w->shift) { shift 1042 sound/soc/codecs/arizona.c switch (w->shift) { shift 1077 sound/soc/codecs/arizona.c unsigned int mask = 1 << w->shift; shift 1246 sound/soc/codecs/arizona.c val = 1 << w->shift; shift 1249 sound/soc/codecs/arizona.c val = 1 << (w->shift + 1); shift 325 sound/soc/codecs/arizona.h bool arizona_input_analog(struct snd_soc_component *component, int shift); shift 363 sound/soc/codecs/cpcap.c unsigned int shift = e->shift_l; shift 377 sound/soc/codecs/cpcap.c reg_voice = (reg_voice >> shift) & 1; shift 378 sound/soc/codecs/cpcap.c reg_hifi = (reg_hifi >> shift) & 1; shift 379 sound/soc/codecs/cpcap.c reg_ext = (reg_ext >> shift) & 1; shift 88 sound/soc/codecs/cs47l15.c ret = madera_set_adsp_clk(&cs47l15->core, w->shift, freq); shift 109 sound/soc/codecs/cs47l35.c ret = madera_set_adsp_clk(&cs47l35->core, w->shift, freq); shift 134 sound/soc/codecs/cs47l35.c switch (w->shift) { shift 164 sound/soc/codecs/cs47l35.c switch (w->shift) { shift 133 sound/soc/codecs/cs47l85.c ret = madera_set_adsp_clk(&cs47l85->core, w->shift, freq); shift 196 sound/soc/codecs/cs47l85.c switch (w->shift) { shift 226 sound/soc/codecs/cs47l85.c switch (w->shift) { shift 130 sound/soc/codecs/cs47l90.c ret = madera_set_adsp_clk(&cs47l90->core, w->shift, freq); shift 155 sound/soc/codecs/cs47l92.c ret = madera_set_adsp_clk(&cs47l92->core, w->shift, freq); shift 1161 sound/soc/codecs/cx2072x.c .num_kcontrols = 0, .reg = wreg, .shift = wshift, .mask = wmask, \ shift 1168 sound/soc/codecs/cx2072x.c .num_kcontrols = 0, .reg = wreg, .shift = wshift, .mask = wmask, \ shift 1175 sound/soc/codecs/cx2072x.c .num_kcontrols = 0, .reg = wreg, .shift = wshift, .mask = wmask, \ shift 1182 sound/soc/codecs/cx2072x.c .reg = wreg, .shift = wshift, .mask = wmask, \ shift 453 sound/soc/codecs/da7218.c unsigned int lshift = mc->shift; shift 522 sound/soc/codecs/da7218.c unsigned int lshift = mixer_ctrl->shift; shift 547 sound/soc/codecs/da7218.c unsigned int lshift = mixer_ctrl->shift; shift 668 sound/soc/codecs/da732x.c (1 << w->shift) | DA732X_OUT_HIZ_EN, shift 669 sound/soc/codecs/da732x.c (1 << w->shift) | DA732X_OUT_HIZ_EN); shift 673 sound/soc/codecs/da732x.c (1 << w->shift) | DA732X_OUT_HIZ_EN, shift 674 sound/soc/codecs/da732x.c (1 << w->shift) | DA732X_OUT_HIZ_DIS); shift 697 sound/soc/codecs/hdac_hdmi.c w->shift = 0; shift 243 sound/soc/codecs/madera.c 1 << w->shift, 1 << w->shift); shift 247 sound/soc/codecs/madera.c 1 << w->shift, 0); shift 455 sound/soc/codecs/madera.c int dom_grp = w->shift; shift 2228 sound/soc/codecs/madera.c if (w->shift % 2) shift 2229 sound/soc/codecs/madera.c reg = MADERA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8); shift 2231 sound/soc/codecs/madera.c reg = MADERA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8); shift 2291 sound/soc/codecs/madera.c switch (w->shift) { shift 2307 sound/soc/codecs/madera.c switch (w->shift) { shift 2327 sound/soc/codecs/madera.c switch (w->shift) { shift 2343 sound/soc/codecs/madera.c switch (w->shift) { shift 2374 sound/soc/codecs/madera.c unsigned int mask = 1 << w->shift; shift 2375 sound/soc/codecs/madera.c unsigned int out_num = w->shift / 2; shift 2428 sound/soc/codecs/madera.c val = 1 << w->shift; shift 2431 sound/soc/codecs/madera.c val = 1 << (w->shift + 1); shift 671 sound/soc/codecs/max98088.c (1 << w->shift), (1 << w->shift)); shift 677 sound/soc/codecs/max98088.c (1 << w->shift), 0); shift 373 sound/soc/codecs/max98090.c val = (val >> mc->shift) & mask; shift 414 sound/soc/codecs/max98090.c val = (val >> mc->shift) & mask; shift 427 sound/soc/codecs/max98090.c mask << mc->shift, shift 428 sound/soc/codecs/max98090.c sel << mc->shift); shift 641 sound/soc/codecs/max98095.c (1 << w->shift), (1 << w->shift)); shift 647 sound/soc/codecs/max98095.c (1 << w->shift), 0); shift 681 sound/soc/codecs/max98095.c (1 << (w->shift+2)), (1 << (w->shift+2))); shift 685 sound/soc/codecs/max98095.c (1 << (w->shift+2)), 0); shift 365 sound/soc/codecs/msm8916-wcd-digital.c if (w->shift == 0) shift 367 sound/soc/codecs/msm8916-wcd-digital.c else if (w->shift == 1) shift 586 sound/soc/codecs/msm8916-wcd-digital.c snd_soc_component_write(component, rx_gain_reg[w->shift], shift 587 sound/soc/codecs/msm8916-wcd-digital.c snd_soc_component_read32(component, rx_gain_reg[w->shift])); shift 591 sound/soc/codecs/msm8916-wcd-digital.c 1 << w->shift, 1 << w->shift); shift 593 sound/soc/codecs/msm8916-wcd-digital.c 1 << w->shift, 0x0); shift 604 sound/soc/codecs/msm8916-wcd-digital.c unsigned int decimator = w->shift + 1; shift 634 sound/soc/codecs/msm8916-wcd-digital.c snd_soc_component_write(component, tx_gain_reg[w->shift], shift 635 sound/soc/codecs/msm8916-wcd-digital.c snd_soc_component_read32(component, tx_gain_reg[w->shift])); shift 648 sound/soc/codecs/msm8916-wcd-digital.c snd_soc_component_update_bits(component, dec_reset_reg, 1 << w->shift, shift 649 sound/soc/codecs/msm8916-wcd-digital.c 1 << w->shift); shift 650 sound/soc/codecs/msm8916-wcd-digital.c snd_soc_component_update_bits(component, dec_reset_reg, 1 << w->shift, 0x0); shift 590 sound/soc/codecs/mt6351.c 0x1 << w->shift, shift 591 sound/soc/codecs/mt6351.c 0x1 << w->shift); shift 596 sound/soc/codecs/mt6351.c 0x1 << w->shift, shift 597 sound/soc/codecs/mt6351.c 0x1 << w->shift); shift 605 sound/soc/codecs/mt6351.c 0x1 << w->shift, shift 606 sound/soc/codecs/mt6351.c 0x1 << w->shift); shift 611 sound/soc/codecs/mt6351.c 0x1 << w->shift, shift 612 sound/soc/codecs/mt6351.c 0x1 << w->shift); shift 321 sound/soc/codecs/pcm3168a.c u32 fmt, reg, mask, shift; shift 367 sound/soc/codecs/pcm3168a.c shift = PCM3168A_DAC_FMT_SHIFT; shift 371 sound/soc/codecs/pcm3168a.c shift = PCM3168A_ADC_FMTAD_SHIFT; shift 377 sound/soc/codecs/pcm3168a.c regmap_update_bits(pcm3168a->regmap, reg, mask, fmt << shift); shift 423 sound/soc/codecs/pcm3168a.c u32 val, mask, shift, reg; shift 436 sound/soc/codecs/pcm3168a.c shift = PCM3168A_DAC_MSDA_SHIFT; shift 441 sound/soc/codecs/pcm3168a.c shift = PCM3168A_ADC_MSAD_SHIFT; shift 514 sound/soc/codecs/pcm3168a.c val = ((i + 1) << shift); shift 522 sound/soc/codecs/pcm3168a.c shift = PCM3168A_DAC_FMT_SHIFT; shift 525 sound/soc/codecs/pcm3168a.c shift = PCM3168A_ADC_FMTAD_SHIFT; shift 528 sound/soc/codecs/pcm3168a.c regmap_update_bits(pcm3168a->regmap, reg, mask, fmt << shift); shift 881 sound/soc/codecs/rt5645.c unsigned int reg, shift, val; shift 883 sound/soc/codecs/rt5645.c switch (source->shift) { shift 886 sound/soc/codecs/rt5645.c shift = 0; shift 890 sound/soc/codecs/rt5645.c shift = 4; shift 894 sound/soc/codecs/rt5645.c shift = 0; shift 898 sound/soc/codecs/rt5645.c shift = 4; shift 902 sound/soc/codecs/rt5645.c shift = 8; shift 906 sound/soc/codecs/rt5645.c shift = 12; shift 912 sound/soc/codecs/rt5645.c val = (snd_soc_component_read32(component, reg) >> shift) & 0xf; shift 1710 sound/soc/codecs/rt5659.c unsigned int reg, shift, val; shift 1713 sound/soc/codecs/rt5659.c switch (w->shift) { shift 1716 sound/soc/codecs/rt5659.c shift = RT5659_AD_MONO_R_T_SFT; shift 1720 sound/soc/codecs/rt5659.c shift = RT5659_AD_MONO_L_T_SFT; shift 1724 sound/soc/codecs/rt5659.c shift = RT5659_AD_STO1_T_SFT; shift 1728 sound/soc/codecs/rt5659.c shift = RT5659_DA_MONO_R_T_SFT; shift 1732 sound/soc/codecs/rt5659.c shift = RT5659_DA_MONO_L_T_SFT; shift 1736 sound/soc/codecs/rt5659.c shift = RT5659_DA_STO_T_SFT; shift 1742 sound/soc/codecs/rt5659.c val = (snd_soc_component_read32(component, reg) >> shift) & 0xf; shift 2086 sound/soc/codecs/rt5663.c unsigned int reg, shift, val; shift 2091 sound/soc/codecs/rt5663.c switch (w->shift) { shift 2094 sound/soc/codecs/rt5663.c shift = RT5663_V2_AD_STO1_TRACK_SHIFT; shift 2098 sound/soc/codecs/rt5663.c shift = RT5663_DA_STO1_TRACK_SHIFT; shift 2104 sound/soc/codecs/rt5663.c switch (w->shift) { shift 2107 sound/soc/codecs/rt5663.c shift = RT5663_AD_STO1_TRACK_SHIFT; shift 2111 sound/soc/codecs/rt5663.c shift = RT5663_DA_STO1_TRACK_SHIFT; shift 2118 sound/soc/codecs/rt5663.c val = (snd_soc_component_read32(component, reg) >> shift) & 0x7; shift 2899 sound/soc/codecs/rt5663.c int mask, shift, val; shift 2918 sound/soc/codecs/rt5663.c shift = RT5663_V2_PLL1_SRC_SHIFT; shift 2922 sound/soc/codecs/rt5663.c shift = RT5663_PLL1_SRC_SHIFT; shift 2940 sound/soc/codecs/rt5663.c snd_soc_component_update_bits(component, RT5663_GLB_CLK, mask, (val << shift)); shift 1536 sound/soc/codecs/rt5665.c unsigned int reg, shift, val; shift 1539 sound/soc/codecs/rt5665.c switch (w->shift) { shift 1542 sound/soc/codecs/rt5665.c shift = RT5665_AD_MONOR_CLK_SEL_SFT; shift 1546 sound/soc/codecs/rt5665.c shift = RT5665_AD_MONOL_CLK_SEL_SFT; shift 1550 sound/soc/codecs/rt5665.c shift = RT5665_AD_STO1_CLK_SEL_SFT; shift 1554 sound/soc/codecs/rt5665.c shift = RT5665_AD_STO2_CLK_SEL_SFT; shift 1558 sound/soc/codecs/rt5665.c shift = RT5665_DA_MONOR_CLK_SEL_SFT; shift 1562 sound/soc/codecs/rt5665.c shift = RT5665_DA_MONOL_CLK_SEL_SFT; shift 1566 sound/soc/codecs/rt5665.c shift = RT5665_DA_STO1_CLK_SEL_SFT; shift 1570 sound/soc/codecs/rt5665.c shift = RT5665_DA_STO2_CLK_SEL_SFT; shift 1576 sound/soc/codecs/rt5665.c val = (snd_soc_component_read32(component, reg) >> shift) & 0xf; shift 2576 sound/soc/codecs/rt5665.c switch (w->shift) { shift 2599 sound/soc/codecs/rt5665.c switch (w->shift) { shift 2633 sound/soc/codecs/rt5665.c switch (w->shift) { shift 1196 sound/soc/codecs/rt5668.c if (w->shift == RT5668_PWR_ADC_S1F_BIT && shift 1204 sound/soc/codecs/rt5668.c if (w->shift == RT5668_PWR_ADC_S1F_BIT) shift 1233 sound/soc/codecs/rt5668.c unsigned int reg, shift, val; shift 1237 sound/soc/codecs/rt5668.c switch (w->shift) { shift 1240 sound/soc/codecs/rt5668.c shift = RT5668_FILTER_CLK_SEL_SFT; shift 1244 sound/soc/codecs/rt5668.c shift = RT5668_FILTER_CLK_SEL_SFT; shift 1250 sound/soc/codecs/rt5668.c val = (snd_soc_component_read32(component, reg) >> shift) & 0xf; shift 1474 sound/soc/codecs/rt5668.c switch (w->shift) { shift 1492 sound/soc/codecs/rt5668.c switch (w->shift) { shift 730 sound/soc/codecs/rt5670.c unsigned int reg, shift, val; shift 732 sound/soc/codecs/rt5670.c switch (source->shift) { shift 735 sound/soc/codecs/rt5670.c shift = 0; shift 739 sound/soc/codecs/rt5670.c shift = 4; shift 743 sound/soc/codecs/rt5670.c shift = 12; shift 747 sound/soc/codecs/rt5670.c shift = 0; shift 751 sound/soc/codecs/rt5670.c shift = 4; shift 755 sound/soc/codecs/rt5670.c shift = 8; shift 759 sound/soc/codecs/rt5670.c shift = 12; shift 765 sound/soc/codecs/rt5670.c val = (snd_soc_component_read32(component, reg) >> shift) & 0xf; shift 952 sound/soc/codecs/rt5677.c unsigned int reg, shift, val; shift 955 sound/soc/codecs/rt5677.c switch (source->shift) { shift 958 sound/soc/codecs/rt5677.c shift = 0; shift 962 sound/soc/codecs/rt5677.c shift = 4; shift 966 sound/soc/codecs/rt5677.c shift = 8; shift 970 sound/soc/codecs/rt5677.c shift = 12; shift 976 sound/soc/codecs/rt5677.c switch (source->shift) { shift 979 sound/soc/codecs/rt5677.c shift = 8; shift 983 sound/soc/codecs/rt5677.c shift = 12; shift 987 sound/soc/codecs/rt5677.c shift = 0; shift 991 sound/soc/codecs/rt5677.c shift = 4; shift 995 sound/soc/codecs/rt5677.c shift = 8; shift 999 sound/soc/codecs/rt5677.c shift = 12; shift 1003 sound/soc/codecs/rt5677.c shift = 0; shift 1007 sound/soc/codecs/rt5677.c shift = 4; shift 1011 sound/soc/codecs/rt5677.c shift = 12; shift 1019 sound/soc/codecs/rt5677.c val = (val >> shift) & 0xf; shift 1242 sound/soc/codecs/rt5677.c switch (source->shift) { shift 4604 sound/soc/codecs/rt5677.c int shift; shift 4608 sound/soc/codecs/rt5677.c shift = 2 * (1 - offset); shift 4611 sound/soc/codecs/rt5677.c 0x3 << shift, shift 4612 sound/soc/codecs/rt5677.c (value & 0x3) << shift); shift 4616 sound/soc/codecs/rt5677.c shift = 2 * (9 - offset); shift 4619 sound/soc/codecs/rt5677.c 0x3 << shift, shift 4620 sound/soc/codecs/rt5677.c (value & 0x3) << shift); shift 1223 sound/soc/codecs/rt5682.c if (w->shift == RT5682_PWR_ADC_S1F_BIT && shift 1231 sound/soc/codecs/rt5682.c if (w->shift == RT5682_PWR_ADC_S1F_BIT) shift 1270 sound/soc/codecs/rt5682.c unsigned int reg, shift, val; shift 1274 sound/soc/codecs/rt5682.c switch (w->shift) { shift 1277 sound/soc/codecs/rt5682.c shift = RT5682_FILTER_CLK_SEL_SFT; shift 1281 sound/soc/codecs/rt5682.c shift = RT5682_FILTER_CLK_SEL_SFT; shift 1287 sound/soc/codecs/rt5682.c val = (snd_soc_component_read32(component, reg) >> shift) & 0xf; shift 1535 sound/soc/codecs/rt5682.c switch (w->shift) { shift 1553 sound/soc/codecs/rt5682.c switch (w->shift) { shift 350 sound/soc/codecs/tlv320aic31xx.c #define WIDGET_BIT(reg, shift) (((shift) << 8) | (reg)) shift 360 sound/soc/codecs/tlv320aic31xx.c switch (WIDGET_BIT(w->reg, w->shift)) { shift 151 sound/soc/codecs/tlv320aic3x.c #define SOC_DAPM_SINGLE_AIC3X(xname, reg, shift, mask, invert) \ shift 152 sound/soc/codecs/tlv320aic3x.c SOC_SINGLE_EXT(xname, reg, shift, mask, invert, \ shift 167 sound/soc/codecs/tlv320aic3x.c unsigned int shift = mc->shift; shift 186 sound/soc/codecs/tlv320aic3x.c mask <<= shift; shift 187 sound/soc/codecs/tlv320aic3x.c val <<= shift; shift 2668 sound/soc/codecs/tscs454.c int shift; shift 2676 sound/soc/codecs/tscs454.c shift = FB_I2SCMC_BCMP1; shift 2680 sound/soc/codecs/tscs454.c shift = FB_I2SCMC_BCMP2; shift 2684 sound/soc/codecs/tscs454.c shift = FB_I2SCMC_BCMP3; shift 2709 sound/soc/codecs/tscs454.c R_I2SCMC, mask, val << shift); shift 833 sound/soc/codecs/twl4030.c unsigned int shift = mc->shift; shift 839 sound/soc/codecs/twl4030.c (twl4030_read(component, reg) >> shift) & mask; shift 844 sound/soc/codecs/twl4030.c if (shift != rshift) { shift 862 sound/soc/codecs/twl4030.c unsigned int shift = mc->shift; shift 870 sound/soc/codecs/twl4030.c val_mask = mask << shift; shift 873 sound/soc/codecs/twl4030.c val = val << shift; shift 874 sound/soc/codecs/twl4030.c if (shift != rshift) { shift 892 sound/soc/codecs/twl4030.c unsigned int shift = mc->shift; shift 897 sound/soc/codecs/twl4030.c (twl4030_read(component, reg) >> shift) & mask; shift 899 sound/soc/codecs/twl4030.c (twl4030_read(component, reg2) >> shift) & mask; shift 919 sound/soc/codecs/twl4030.c unsigned int shift = mc->shift; shift 925 sound/soc/codecs/twl4030.c val_mask = mask << shift; shift 934 sound/soc/codecs/twl4030.c val = val << shift; shift 935 sound/soc/codecs/twl4030.c val2 = val2 << shift; shift 90 sound/soc/codecs/wcd9335.c {.port = p + WCD9335_RX_START, .shift = p,} shift 93 sound/soc/codecs/wcd9335.c {.port = p, .shift = p,} shift 294 sound/soc/codecs/wcd9335.c u16 shift; shift 1287 sound/soc/codecs/wcd9335.c u32 port_id = w->shift; shift 1346 sound/soc/codecs/wcd9335.c int dai_id = widget->shift; shift 1347 sound/soc/codecs/wcd9335.c int port_id = mixer->shift; shift 1624 sound/soc/codecs/wcd9335.c if (val == (ch->shift + INTn_2_INP_SEL_RX0)) shift 1646 sound/soc/codecs/wcd9335.c inp = ch->shift + INTn_1_MIX_INP_SEL_RX0; shift 1725 sound/soc/codecs/wcd9335.c payload |= 1 << ch->shift; shift 1792 sound/soc/codecs/wcd9335.c u8 shift = 0, shift_val = 0, tx_mux_sel; shift 1807 sound/soc/codecs/wcd9335.c shift = (tx_port << 1); shift 1811 sound/soc/codecs/wcd9335.c shift = ((tx_port - 4) << 1); shift 1815 sound/soc/codecs/wcd9335.c shift = ((tx_port - 8) << 1); shift 1819 sound/soc/codecs/wcd9335.c shift = 0; shift 1823 sound/soc/codecs/wcd9335.c shift = 4; shift 1830 sound/soc/codecs/wcd9335.c (shift_val << shift); shift 1832 sound/soc/codecs/wcd9335.c tx_mux_sel = tx_mux_sel >> shift; shift 2178 sound/soc/codecs/wcd9335.c int comp = ((struct soc_mixer_control *)kc->private_value)->shift; shift 2190 sound/soc/codecs/wcd9335.c int comp = ((struct soc_mixer_control *) kc->private_value)->shift; shift 3024 sound/soc/codecs/wcd9335.c struct wcd_slim_codec_dai_data *dai = &wcd->dai[w->shift]; shift 3346 sound/soc/codecs/wcd9335.c wcd9335_config_compander(comp, w->shift, event); shift 3352 sound/soc/codecs/wcd9335.c wcd9335_config_compander(comp, w->shift, event); shift 3789 sound/soc/codecs/wcd9335.c if (w->shift == 7) { shift 3792 sound/soc/codecs/wcd9335.c } else if (w->shift == 6) { shift 3797 sound/soc/codecs/wcd9335.c if (w->shift == 7) { shift 3800 sound/soc/codecs/wcd9335.c } else if (w->shift == 6) { shift 297 sound/soc/codecs/wm5110.c switch (w->shift) { shift 331 sound/soc/codecs/wm5110.c switch (w->shift) { shift 411 sound/soc/codecs/wm5110.c unsigned int mask = (0x1 << mc->shift) | (0x1 << mc->rshift); shift 412 sound/soc/codecs/wm5110.c unsigned int lnew = (!!ucontrol->value.integer.value[0]) << mc->shift; shift 431 sound/soc/codecs/wm5110.c lold = dre & (1 << mc->shift); shift 435 sound/soc/codecs/wm5110.c rena = ena & (1 << mc->shift); shift 452 sound/soc/codecs/wm5110.c wm5110_clear_pga_volume(arizona, mc->shift); shift 517 sound/soc/codecs/wm5110.c reg = ARIZONA_IN1L_CONTROL + ((w->shift ^ 0x1) * 4); shift 522 sound/soc/codecs/wm5110.c wm5110->in_value |= 0x3 << ((w->shift ^ 0x1) * 2); shift 527 sound/soc/codecs/wm5110.c wm5110->in_pga_cache[w->shift] = snd_soc_component_read32(component, reg); shift 547 sound/soc/codecs/wm5110.c wm5110->in_pga_cache[w->shift]); shift 571 sound/soc/codecs/wm5110.c if (arizona_input_analog(component, w->shift)) shift 260 sound/soc/codecs/wm8350.c switch (w->shift) { shift 271 sound/soc/codecs/wm8350.c WARN(1, "Invalid shift %d\n", w->shift); shift 105 sound/soc/codecs/wm8400.c #define WM8400_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert, tlv_array) \ shift 106 sound/soc/codecs/wm8400.c SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \ shift 325 sound/soc/codecs/wm8400.c u32 reg_shift = mc->shift; shift 415 sound/soc/codecs/wm8770.c int shift; shift 439 sound/soc/codecs/wm8770.c shift = 4; shift 443 sound/soc/codecs/wm8770.c shift = 0; shift 466 sound/soc/codecs/wm8770.c snd_soc_component_update_bits(component, WM8770_MSTRCTRL, 0x7 << shift, shift 467 sound/soc/codecs/wm8770.c i << shift); shift 275 sound/soc/codecs/wm8903.c wm8903->dcs_pending |= 1 << w->shift; shift 279 sound/soc/codecs/wm8903.c 1 << w->shift, 0); shift 409 sound/soc/codecs/wm8903.c #define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \ shift 410 sound/soc/codecs/wm8903.c SOC_SINGLE_EXT(xname, reg, shift, max, invert, \ shift 707 sound/soc/codecs/wm8904.c reg = w->shift; shift 1548 sound/soc/codecs/wm8962.c int shift = kcontrol->private_value; shift 1552 sound/soc/codecs/wm8962.c ucontrol->value.integer.value[0] = !!(wm8962->dsp2_ena & 1 << shift); shift 1560 sound/soc/codecs/wm8962.c int shift = kcontrol->private_value; shift 1571 sound/soc/codecs/wm8962.c wm8962->dsp2_ena |= 1 << shift; shift 1573 sound/soc/codecs/wm8962.c wm8962->dsp2_ena &= ~(1 << shift); shift 1959 sound/soc/codecs/wm8962.c switch (w->shift) { shift 1973 sound/soc/codecs/wm8962.c WARN(1, "Invalid shift %d\n", w->shift); shift 147 sound/soc/codecs/wm8990.c #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ shift 149 sound/soc/codecs/wm8990.c SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \ shift 810 sound/soc/codecs/wm8991.h #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ shift 812 sound/soc/codecs/wm8991.h SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \ shift 290 sound/soc/codecs/wm8994.c #define WM8994_DRC_SWITCH(xname, reg, shift) \ shift 291 sound/soc/codecs/wm8994.c SOC_SINGLE_EXT(xname, reg, shift, 1, 0, \ shift 303 sound/soc/codecs/wm8994.c if (mc->shift == WM8994_AIF1DAC1_DRC_ENA_SHIFT) shift 1339 sound/soc/codecs/wm8994.c unsigned int mask = 1 << w->shift; shift 1440 sound/soc/codecs/wm8994.c #define WM8994_CLASS_W_SWITCH(xname, reg, shift, max, invert) \ shift 1441 sound/soc/codecs/wm8994.c SOC_SINGLE_EXT(xname, reg, shift, max, invert, \ shift 4236 sound/soc/codecs/wm8995.h #define WM8995_CLASS_W_SWITCH(xname, reg, shift, max, invert) \ shift 4237 sound/soc/codecs/wm8995.h SOC_SINGLE_EXT(xname, reg, shift, max, invert, \ shift 640 sound/soc/codecs/wm8996.c wm8996->hpout_pending &= ~w->shift; shift 643 sound/soc/codecs/wm8996.c wm8996->hpout_pending |= w->shift; shift 763 sound/soc/codecs/wm8996.c wm8996->dcs_pending |= 1 << w->shift; shift 224 sound/soc/codecs/wm9712.c unsigned int mixer, mask, shift, old; shift 228 sound/soc/codecs/wm9712.c mixer = mc->shift >> 8; shift 229 sound/soc/codecs/wm9712.c shift = mc->shift & 0xff; shift 230 sound/soc/codecs/wm9712.c mask = 1 << shift; shift 242 sound/soc/codecs/wm9712.c update.reg = wm9712_mixer_mute_regs[shift]; shift 267 sound/soc/codecs/wm9712.c unsigned int shift, mixer; shift 269 sound/soc/codecs/wm9712.c mixer = mc->shift >> 8; shift 270 sound/soc/codecs/wm9712.c shift = mc->shift & 0xff; shift 273 sound/soc/codecs/wm9712.c (wm9712->hp_mixer[mixer] >> shift) & 1; shift 233 sound/soc/codecs/wm9713.c unsigned int mixer, mask, shift, old; shift 237 sound/soc/codecs/wm9713.c mixer = mc->shift >> 8; shift 238 sound/soc/codecs/wm9713.c shift = mc->shift & 0xff; shift 239 sound/soc/codecs/wm9713.c mask = (1 << shift); shift 251 sound/soc/codecs/wm9713.c update.reg = wm9713_mixer_mute_regs[shift]; shift 276 sound/soc/codecs/wm9713.c unsigned int mixer, shift; shift 278 sound/soc/codecs/wm9713.c mixer = mc->shift >> 8; shift 279 sound/soc/codecs/wm9713.c shift = mc->shift & 0xff; shift 282 sound/soc/codecs/wm9713.c (wm9713->hp_mixer[mixer] >> shift) & 1; shift 2704 sound/soc/codecs/wm_adsp.c struct wm_adsp *dsp = &dsps[w->shift]; shift 3003 sound/soc/codecs/wm_adsp.c struct wm_adsp *dsp = &dsps[w->shift]; shift 3023 sound/soc/codecs/wm_adsp.c struct wm_adsp *dsp = &dsps[mc->shift - 1]; shift 3039 sound/soc/codecs/wm_adsp.c struct wm_adsp *dsp = &dsps[mc->shift - 1]; shift 3076 sound/soc/codecs/wm_adsp.c struct wm_adsp *dsp = &dsps[w->shift]; shift 3131 sound/soc/codecs/wm_adsp.c struct wm_adsp *dsp = &dsps[w->shift]; shift 148 sound/soc/codecs/wm_adsp.h .reg = SND_SOC_NOPM, .shift = num, .event = event_fn, \ shift 152 sound/soc/codecs/wm_adsp.h .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp_event, \ shift 621 sound/soc/codecs/wm_hubs.c switch (w->shift) { shift 650 sound/soc/codecs/wm_hubs.c switch (w->shift) { shift 689 sound/soc/codecs/wm_hubs.c #define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \ shift 690 sound/soc/codecs/wm_hubs.c SOC_SINGLE_EXT(xname, reg, shift, max, invert, \ shift 49 sound/soc/fsl/p1022_ds.c unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); shift 51 sound/soc/fsl/p1022_ds.c clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift); shift 56 sound/soc/fsl/p1022_rdk.c unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); shift 58 sound/soc/fsl/p1022_rdk.c clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift); shift 624 sound/soc/intel/atom/sst-atom-controls.c val |= 1 << mc->shift; shift 590 sound/soc/intel/atom/sst-atom-controls.h .reg = SND_SOC_NOPM, .shift = 0, \ shift 598 sound/soc/intel/atom/sst-atom-controls.h .reg = SND_SOC_NOPM, .shift = 0, \ shift 606 sound/soc/intel/atom/sst-atom-controls.h .reg = SND_SOC_NOPM, .shift = 0, \ shift 614 sound/soc/intel/atom/sst-atom-controls.h .reg = SND_SOC_NOPM, .shift = 0, \ shift 622 sound/soc/intel/atom/sst-atom-controls.h .reg = SND_SOC_NOPM, .shift = 0, \ shift 630 sound/soc/intel/atom/sst-atom-controls.h { .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \ shift 638 sound/soc/intel/atom/sst-atom-controls.h { .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \ shift 647 sound/soc/intel/atom/sst-atom-controls.h { .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \ shift 674 sound/soc/intel/atom/sst-atom-controls.h { .id = snd_soc_dapm_mixer, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \ shift 495 sound/soc/intel/haswell/sst-haswell-dsp.c u32 bit = 0, shift = 0, index; shift 506 sound/soc/intel/haswell/sst-haswell-dsp.c shift = sram_shift[index].dram_shift; shift 509 sound/soc/intel/haswell/sst-haswell-dsp.c shift = sram_shift[index].iram_shift; shift 512 sound/soc/intel/haswell/sst-haswell-dsp.c shift = 0; shift 515 sound/soc/intel/haswell/sst-haswell-dsp.c shift = 0; shift 517 sound/soc/intel/haswell/sst-haswell-dsp.c bit = 1 << (block->index + shift); shift 21 sound/soc/mediatek/common/mtk-afe-fe-dai.c unsigned int val, int shift) shift 23 sound/soc/mediatek/common/mtk-afe-fe-dai.c if (reg < 0 || WARN_ON_ONCE(shift < 0)) shift 25 sound/soc/mediatek/common/mtk-afe-fe-dai.c return regmap_update_bits(map, reg, mask << shift, val << shift); shift 69 sound/soc/meson/axg-pdm.c unsigned int shift; shift 312 sound/soc/meson/axg-pdm.c val |= PDM_HCIC_CTRL1_GAIN_SFT(hcic->shift); shift 540 sound/soc/meson/axg-pdm.c .shift = 0x15, shift 150 sound/soc/meson/axg-spdifin.c unsigned int reg, shift, rem; shift 155 sound/soc/meson/axg-spdifin.c shift = width * (num_per_reg - 1 - rem); shift 157 sound/soc/meson/axg-spdifin.c regmap_update_bits(map, reg, GENMASK(width - 1, 0) << shift, shift 158 sound/soc/meson/axg-spdifin.c val << shift); shift 415 sound/soc/qcom/qdsp6/q6routing.c int session_id = mc->shift; shift 439 sound/soc/qcom/qdsp6/q6routing.c int session_id = mc->shift; shift 28 sound/soc/rockchip/rockchip_i2s.c u32 shift; shift 365 sound/soc/rockchip/rockchip_i2s.c val <<= i2s->pins->shift; shift 366 sound/soc/rockchip/rockchip_i2s.c val |= (I2S_IO_DIRECTION_MASK << i2s->pins->shift) << 16; shift 566 sound/soc/rockchip/rockchip_i2s.c .shift = 11, shift 113 sound/soc/sh/fsi.c #define AB_IO(param, shift) (param << shift) shift 433 sound/soc/sh/fsi.c u32 shift; shift 436 sound/soc/sh/fsi.c shift = is_play ? AO_SHIFT : AI_SHIFT; shift 438 sound/soc/sh/fsi.c shift = is_play ? BO_SHIFT : BI_SHIFT; shift 440 sound/soc/sh/fsi.c return shift; shift 1438 sound/soc/sh/fsi.c u32 shift, i; shift 1442 sound/soc/sh/fsi.c shift = fsi_master_read(master, FIFO_SZ); shift 1443 sound/soc/sh/fsi.c shift >>= fsi_get_port_shift(fsi, io); shift 1444 sound/soc/sh/fsi.c shift &= FIFO_SZ_MASK; shift 1445 sound/soc/sh/fsi.c frame_capa = 256 << shift; shift 215 sound/soc/sh/rcar/adg.c int shift = (id % 2) ? 16 : 0; shift 223 sound/soc/sh/rcar/adg.c val = val << shift; shift 224 sound/soc/sh/rcar/adg.c mask = 0x0f1f << shift; shift 242 sound/soc/sh/rcar/adg.c int shift = (id % 2) ? 16 : 0; shift 250 sound/soc/sh/rcar/adg.c in = in << shift; shift 251 sound/soc/sh/rcar/adg.c out = out << shift; shift 252 sound/soc/sh/rcar/adg.c mask = 0x0f1f << shift; shift 270 sound/soc/sh/rcar/adg.c int shift = (id % 4) * 8; shift 271 sound/soc/sh/rcar/adg.c u32 mask = 0xFF << shift; shift 275 sound/soc/sh/rcar/adg.c val = val << shift; shift 543 sound/soc/sh/rcar/core.c int shift, int add, int timing) shift 545 sound/soc/sh/rcar/core.c u32 mask = 0xF << shift; shift 546 sound/soc/sh/rcar/core.c u8 val = (*status >> shift) & 0xF; shift 553 sound/soc/sh/rcar/core.c *status = (*status & ~mask) + (next_val << shift); shift 851 sound/soc/sh/rcar/ssi.c int shift = 0; shift 856 sound/soc/sh/rcar/ssi.c shift = 8; shift 864 sound/soc/sh/rcar/ssi.c rsnd_mod_write(mod, SSITDR, (*buf) << shift); shift 866 sound/soc/sh/rcar/ssi.c *buf = (rsnd_mod_read(mod, SSIRDR) >> shift); shift 212 sound/soc/sh/rcar/ssiu.c int i, shift; shift 224 sound/soc/sh/rcar/ssiu.c shift = (i * 4) + 20; shift 225 sound/soc/sh/rcar/ssiu.c val = (val & ~(0xF << shift)) | shift 226 sound/soc/sh/rcar/ssiu.c rsnd_mod_id(pos) << shift; shift 389 sound/soc/soc-dapm.c template.shift = mc->shift; shift 427 sound/soc/soc-dapm.c template.shift = e->shift_l; shift 558 sound/soc/soc-dapm.c data->widget->on_val = value >> data->widget->shift; shift 788 sound/soc/soc-dapm.c unsigned int shift = mc->shift; shift 813 sound/soc/soc-dapm.c val = (val >> shift) & mask; shift 1362 sound/soc/soc-dapm.c return regulator_disable_deferred(w->regulator, w->shift); shift 1590 sound/soc/soc-dapm.c mask |= w->mask << w->shift; shift 1592 sound/soc/soc-dapm.c value |= w->on_val << w->shift; shift 1594 sound/soc/soc-dapm.c value |= w->off_val << w->shift; shift 2129 sound/soc/soc-dapm.c w->reg, w->reg, w->mask << w->shift); shift 3250 sound/soc/soc-dapm.c val = val >> w->shift; shift 3285 sound/soc/soc-dapm.c unsigned int shift = mc->shift; shift 3296 sound/soc/soc-dapm.c val = (reg_val >> shift) & mask; shift 3348 sound/soc/soc-dapm.c unsigned int shift = mc->shift; shift 3381 sound/soc/soc-dapm.c val = val << shift; shift 3384 sound/soc/soc-dapm.c reg_change = soc_dapm_test_bits(dapm, reg, mask << shift, val); shift 3402 sound/soc/soc-dapm.c update.mask = mask << shift; shift 133 sound/soc/soc-ops.c unsigned int reg, unsigned int mask, unsigned int shift, shift 143 sound/soc/soc-ops.c val = (val >> shift) & mask; shift 250 sound/soc/soc-ops.c unsigned int shift = mc->shift; shift 263 sound/soc/soc-ops.c ret = snd_soc_read_signed(component, reg, mask, shift, sign_bit, &val); shift 277 sound/soc/soc-ops.c ret = snd_soc_read_signed(component, reg2, mask, shift, shift 310 sound/soc/soc-ops.c unsigned int shift = mc->shift; shift 328 sound/soc/soc-ops.c val_mask = mask << shift; shift 329 sound/soc/soc-ops.c val = val << shift; shift 338 sound/soc/soc-ops.c val2 = val2 << shift; shift 372 sound/soc/soc-ops.c unsigned int shift = mc->shift; shift 384 sound/soc/soc-ops.c ucontrol->value.integer.value[0] = ((val >> shift) - min) & mask; shift 417 sound/soc/soc-ops.c unsigned int shift = mc->shift; shift 425 sound/soc/soc-ops.c val_mask = mask << shift; shift 427 sound/soc/soc-ops.c val = val << shift; shift 493 sound/soc/soc-ops.c unsigned int shift = mc->shift; shift 505 sound/soc/soc-ops.c val_mask = mask << shift; shift 506 sound/soc/soc-ops.c val = val << shift; shift 517 sound/soc/soc-ops.c val_mask = mask << shift; shift 518 sound/soc/soc-ops.c val = val << shift; shift 545 sound/soc/soc-ops.c unsigned int shift = mc->shift; shift 557 sound/soc/soc-ops.c ucontrol->value.integer.value[0] = (val >> shift) & mask; shift 570 sound/soc/soc-ops.c ucontrol->value.integer.value[1] = (val >> shift) & mask; shift 924 sound/soc/soc-ops.c unsigned int shift = mc->shift; shift 925 sound/soc/soc-ops.c unsigned int mask = 1 << shift; shift 936 sound/soc/soc-ops.c if (shift != 0 && val != 0) shift 937 sound/soc/soc-ops.c val = val >> shift; shift 961 sound/soc/soc-ops.c unsigned int shift = mc->shift; shift 962 sound/soc/soc-ops.c unsigned int mask = 1 << shift; shift 212 sound/soc/soc-topology.c return le32_to_cpu(chan[i].shift); shift 873 sound/soc/soc-topology.c sm->shift = tplc_chan_get_shift(tplg, mc->channel, shift 1351 sound/soc/soc-topology.c sm->shift = tplc_chan_get_shift(tplg, mc->channel, shift 1620 sound/soc/soc-topology.c template.shift = le32_to_cpu(w->shift); shift 2137 sound/soc/sof/topology.c tw->shift, swidget->id, tw->name, shift 155 sound/soc/sprd/sprd-mcdt.c u32 shift = MCDT_DAC_DMA_SHIFT + channel; shift 158 sound/soc/sprd/sprd-mcdt.c sprd_mcdt_update(mcdt, MCDT_DMA_EN, BIT(shift), BIT(shift)); shift 160 sound/soc/sprd/sprd-mcdt.c sprd_mcdt_update(mcdt, MCDT_DMA_EN, 0, BIT(shift)); shift 298 sound/soc/sprd/sprd-mcdt.c u32 reg, shift = sprd_mcdt_dma_ack_shift(channel), ack = dma_chan; shift 313 sound/soc/sprd/sprd-mcdt.c sprd_mcdt_update(mcdt, reg, ack << shift, shift 314 sound/soc/sprd/sprd-mcdt.c MCDT_DMA_ACK_SEL_MASK << shift); shift 320 sound/soc/sprd/sprd-mcdt.c u32 reg, shift = sprd_mcdt_dma_ack_shift(channel), ack = dma_chan; shift 335 sound/soc/sprd/sprd-mcdt.c sprd_mcdt_update(mcdt, reg, ack << shift, shift 336 sound/soc/sprd/sprd-mcdt.c MCDT_DMA_ACK_SEL_MASK << shift); shift 342 sound/soc/sprd/sprd-mcdt.c u32 reg, shift; shift 362 sound/soc/sprd/sprd-mcdt.c shift = fifo_sts; shift 368 sound/soc/sprd/sprd-mcdt.c shift = 8 + fifo_sts; shift 373 sound/soc/sprd/sprd-mcdt.c shift = 16 + fifo_sts; shift 378 sound/soc/sprd/sprd-mcdt.c shift = 24 + fifo_sts; shift 385 sound/soc/sprd/sprd-mcdt.c return !!(readl_relaxed(mcdt->base + reg) & BIT(shift)); shift 395 sound/soc/sprd/sprd-mcdt.c u32 shift = MCDT_ADC_FIFO_SHIFT + channel; shift 397 sound/soc/sprd/sprd-mcdt.c sprd_mcdt_update(mcdt, MCDT_FIFO_CLR, BIT(shift), BIT(shift)); shift 456 sound/soc/sprd/sprd-mcdt.c u32 reg, shift = sprd_mcdt_int_type_shift(channel, int_type); shift 473 sound/soc/sprd/sprd-mcdt.c sprd_mcdt_update(mcdt, reg, BIT(shift), BIT(shift)); shift 475 sound/soc/sprd/sprd-mcdt.c sprd_mcdt_update(mcdt, reg, 0, BIT(shift)); shift 481 sound/soc/sprd/sprd-mcdt.c u32 reg, shift = sprd_mcdt_int_type_shift(channel, int_type); shift 497 sound/soc/sprd/sprd-mcdt.c sprd_mcdt_update(mcdt, reg, BIT(shift), BIT(shift)); shift 503 sound/soc/sprd/sprd-mcdt.c u32 reg, shift = sprd_mcdt_int_type_shift(channel, int_type); shift 519 sound/soc/sprd/sprd-mcdt.c return !!(readl_relaxed(mcdt->base + reg) & BIT(shift)); shift 19 sound/soc/sti/uniperif.h #define GET_UNIPERIF_REG(ip, offset, shift, mask) \ shift 20 sound/soc/sti/uniperif.h ((readl_relaxed(ip->base + offset) >> shift) & mask) shift 21 sound/soc/sti/uniperif.h #define SET_UNIPERIF_REG(ip, offset, shift, mask, value) \ shift 23 sound/soc/sti/uniperif.h ~(mask << shift)) | (((value) & mask) << shift)), ip->base + offset) shift 24 sound/soc/sti/uniperif.h #define SET_UNIPERIF_BIT_REG(ip, offset, shift, mask, value) \ shift 25 sound/soc/sti/uniperif.h writel_relaxed((((value) & mask) << shift), ip->base + offset) shift 110 sound/soc/uniphier/aio-core.c int shift; shift 119 sound/soc/uniphier/aio-core.c shift = 0; shift 122 sound/soc/uniphier/aio-core.c shift = 1; shift 125 sound/soc/uniphier/aio-core.c shift = 2; shift 128 sound/soc/uniphier/aio-core.c shift = 3; shift 148 sound/soc/uniphier/aio-core.c regmap_update_bits(r, A2APLLCTR1, A2APLLCTR1_APLLX_MASK << shift, shift 149 sound/soc/uniphier/aio-core.c v << shift); shift 392 sound/soc/uniphier/aio-reg.h #define SBF_(frame, shift) (((frame) * 2 - 1) << shift) shift 1356 sound/sparc/cs4231.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 1362 sound/sparc/cs4231.c ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; shift 1379 sound/sparc/cs4231.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 1388 sound/sparc/cs4231.c val <<= shift; shift 1392 sound/sparc/cs4231.c val = (chip->image[reg] & ~(mask << shift)) | val; shift 1483 sound/sparc/cs4231.c #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \ shift 1487 sound/sparc/cs4231.c .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) } shift 1726 sound/sparc/cs4231.c u32 csr, shift; shift 1741 sound/sparc/cs4231.c shift = 0; shift 1743 sound/sparc/cs4231.c shift = 1; shift 1745 sound/sparc/cs4231.c csr &= ~(APC_CPAUSE << shift); shift 1747 sound/sparc/cs4231.c csr |= (APC_CPAUSE << shift); shift 1750 sound/sparc/cs4231.c csr |= (APC_CDMA_READY << shift); shift 1752 sound/sparc/cs4231.c csr &= ~(APC_CDMA_READY << shift); shift 2345 sound/sparc/dbri.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 2354 sound/sparc/dbri.c (dbri->mm.data[elem] >> shift) & mask; shift 2357 sound/sparc/dbri.c (dbri->mm.ctrl[elem - 4] >> shift) & mask; shift 2370 sound/sparc/dbri.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 2382 sound/sparc/dbri.c val <<= shift; shift 2386 sound/sparc/dbri.c ~(mask << shift)) | val; shift 2390 sound/sparc/dbri.c ~(mask << shift)) | val; shift 2414 sound/sparc/dbri.c #define CS4215_SINGLE(xname, entry, shift, mask, invert) \ shift 2418 sound/sparc/dbri.c .private_value = (entry) | ((shift) << 8) | ((mask) << 16) | \ shift 406 sound/spi/at73c213.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 413 sound/spi/at73c213.c (chip->reg_image[reg] >> shift) & mask; shift 429 sound/spi/at73c213.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 438 sound/spi/at73c213.c val <<= shift; shift 442 sound/spi/at73c213.c val = (chip->reg_image[reg] & ~(mask << shift)) | val; shift 555 sound/spi/at73c213.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 561 sound/spi/at73c213.c (chip->reg_image[reg] >> shift) & 0x01; shift 577 sound/spi/at73c213.c int shift = (kcontrol->private_value >> 8) & 0xff; shift 590 sound/spi/at73c213.c val <<= shift; shift 594 sound/spi/at73c213.c val |= (chip->reg_image[reg] & ~(mask << shift)); shift 644 sound/spi/at73c213.c #define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert) \ shift 652 sound/spi/at73c213.c .private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \ shift 1080 sound/usb/endpoint.c int shift; shift 1189 sound/usb/endpoint.c shift = 0; shift 1192 sound/usb/endpoint.c shift++; shift 1196 sound/usb/endpoint.c shift--; shift 1198 sound/usb/endpoint.c ep->freqshift = shift; shift 647 tools/firewire/nosy-dump.c uint32_t index, shift, mask; shift 650 tools/firewire/nosy-dump.c shift = 32 - (offset & 31) - width; shift 653 tools/firewire/nosy-dump.c return (data[index] >> shift) & mask; shift 77 tools/iio/iio_generic_buffer.c input >>= info->shift; shift 100 tools/iio/iio_generic_buffer.c input >>= info->shift; shift 123 tools/iio/iio_generic_buffer.c input >>= info->shift; shift 146 tools/iio/iio_generic_buffer.c input >>= info->shift; shift 86 tools/iio/iio_utils.c unsigned *shift, uint64_t *mask, unsigned *be, shift 143 tools/iio/iio_utils.c &padint, shift); shift 501 tools/iio/iio_utils.c ¤t->shift, shift 45 tools/iio/iio_utils.h unsigned shift; shift 61 tools/iio/iio_utils.h unsigned *shift, uint64_t *mask, unsigned *be, shift 68 tools/include/linux/bitops.h static inline __u32 rol32(__u32 word, unsigned int shift) shift 70 tools/include/linux/bitops.h return (word << shift) | (word >> ((-shift) & 31)); shift 756 tools/include/uapi/linux/kvm.h __u32 shift; shift 483 tools/perf/arch/x86/util/intel-pt.c unsigned int shift; shift 501 tools/perf/arch/x86/util/intel-pt.c for (shift = 0; bits && !(bits & 1); shift++) shift 504 tools/perf/arch/x86/util/intel-pt.c config >>= shift; shift 408 tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c unsigned int offs = 1, shift; shift 413 tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c for (shift = 5; byte & 1; shift += 7) { shift 419 tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c payload |= ((uint64_t)byte >> 1) << shift; shift 769 tools/perf/util/intel-pt.c unsigned int shift; shift 775 tools/perf/util/intel-pt.c for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++) shift 780 tools/perf/util/intel-pt.c return (config & pt->mtc_freq_bits) >> shift; shift 2636 tools/power/x86/turbostat/turbostat.c int so, shift, sib_core; shift 2658 tools/power/x86/turbostat/turbostat.c for (shift = 0; shift < BITMASK_SIZE; shift++) { shift 2659 tools/power/x86/turbostat/turbostat.c if ((map >> shift) & 0x1) { shift 2660 tools/power/x86/turbostat/turbostat.c so = shift + offset; shift 59 tools/testing/radix-tree/multiorder.c int shift = height * XA_CHUNK_SHIFT; shift 63 tools/testing/radix-tree/multiorder.c assert(xas.xa_node->shift == shift); shift 217 tools/testing/radix-tree/test.c tag, slot->shift, tagged, anyset); shift 229 tools/testing/radix-tree/test.c if (slot->shift > 0) { shift 272 tools/testing/radix-tree/test.c unsigned shift; shift 282 tools/testing/radix-tree/test.c shift = node->shift; shift 283 tools/testing/radix-tree/test.c if (shift > 0) shift 284 tools/testing/radix-tree/test.c assert(maxindex > shift_maxindex(shift - RADIX_TREE_MAP_SHIFT)); shift 57 tools/testing/radix-tree/test.h unsigned long shift_maxindex(unsigned int shift); shift 16 tools/testing/selftests/bpf/bpf_rand.h static inline uint64_t bpf_rand_u##x(int shift) \ shift 18 tools/testing/selftests/bpf/bpf_rand.h return bpf_rand_mask((m)) << shift; \ shift 7 tools/testing/selftests/bpf/progs/test_jhash.h static __always_inline u32 rol32(u32 word, unsigned int shift) shift 9 tools/testing/selftests/bpf/progs/test_jhash.h return (word << shift) | (word >> ((-shift) & 31)); shift 26 tools/testing/selftests/bpf/progs/test_l4lb.c static inline __u32 rol32(__u32 word, unsigned int shift) shift 28 tools/testing/selftests/bpf/progs/test_l4lb.c return (word << shift) | (word >> ((-shift) & 31)); shift 22 tools/testing/selftests/bpf/progs/test_l4lb_noinline.c static __u32 rol32(__u32 word, unsigned int shift) shift 24 tools/testing/selftests/bpf/progs/test_l4lb_noinline.c return (word << shift) | (word >> ((-shift) & 31)); shift 19 tools/testing/selftests/bpf/progs/test_xdp_noinline.c static __u32 rol32(__u32 word, unsigned int shift) shift 21 tools/testing/selftests/bpf/progs/test_xdp_noinline.c return (word << shift) | (word >> ((-shift) & 31)); shift 26 tools/testing/selftests/kvm/lib/aarch64/processor.c unsigned int shift = (vm->pgtable_levels - 1) * (vm->page_shift - 3) + vm->page_shift; shift 27 tools/testing/selftests/kvm/lib/aarch64/processor.c uint64_t mask = (1UL << (vm->va_bits - shift)) - 1; shift 29 tools/testing/selftests/kvm/lib/aarch64/processor.c return (gva >> shift) & mask; shift 34 tools/testing/selftests/kvm/lib/aarch64/processor.c unsigned int shift = 2 * (vm->page_shift - 3) + vm->page_shift; shift 40 tools/testing/selftests/kvm/lib/aarch64/processor.c return (gva >> shift) & mask; shift 45 tools/testing/selftests/kvm/lib/aarch64/processor.c unsigned int shift = (vm->page_shift - 3) + vm->page_shift; shift 51 tools/testing/selftests/kvm/lib/aarch64/processor.c return (gva >> shift) & mask; shift 68 tools/testing/selftests/kvm/lib/aarch64/processor.c unsigned int shift = (vm->pgtable_levels - 1) * (vm->page_shift - 3) + vm->page_shift; shift 69 tools/testing/selftests/kvm/lib/aarch64/processor.c return 1 << (vm->va_bits - shift); shift 75 tools/testing/selftests/vm/map_hugetlb.c int shift = 0; shift 80 tools/testing/selftests/vm/map_hugetlb.c shift = atoi(argv[2]); shift 81 tools/testing/selftests/vm/map_hugetlb.c if (shift) shift 82 tools/testing/selftests/vm/map_hugetlb.c flags |= (shift & MAP_HUGE_MASK) << MAP_HUGE_SHIFT; shift 85 tools/testing/selftests/vm/map_hugetlb.c if (shift) shift 86 tools/testing/selftests/vm/map_hugetlb.c printf("%u kB hugepages\n", 1 << shift); shift 813 virt/kvm/arm/vgic/vgic-its.c static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size) shift 815 virt/kvm/arm/vgic/vgic-its.c return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1);