CTX_R_PWR_CLK_STATE 1120 drivers/gpu/drm/i915/gem/i915_gem_context.c 		 (CTX_R_PWR_CLK_STATE + 1) * 4;
CTX_R_PWR_CLK_STATE  879 drivers/gpu/drm/i915/gt/intel_lrc.c 		regs[CTX_R_PWR_CLK_STATE] =
CTX_R_PWR_CLK_STATE 1778 drivers/gpu/drm/i915/gt/intel_lrc.c 		regs[CTX_R_PWR_CLK_STATE + 1] =
CTX_R_PWR_CLK_STATE 3283 drivers/gpu/drm/i915/gt/intel_lrc.c 		CTX_REG(regs, CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE, 0);
CTX_R_PWR_CLK_STATE 1706 drivers/gpu/drm/i915/i915_perf.c 		CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE,
CTX_R_PWR_CLK_STATE 1869 drivers/gpu/drm/i915/i915_perf.c 			CTX_R_PWR_CLK_STATE,