set_l2_indirect_reg  214 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMCR, L2PMCR_RESET_ALL);
set_l2_indirect_reg  215 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMCNTENCLR, l2_counter_present_mask);
set_l2_indirect_reg  216 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMINTENCLR, l2_counter_present_mask);
set_l2_indirect_reg  217 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMOVSCLR, l2_counter_present_mask);
set_l2_indirect_reg  222 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMCR, L2PMCR_COUNTERS_ENABLE);
set_l2_indirect_reg  227 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMCR, L2PMCR_COUNTERS_DISABLE);
set_l2_indirect_reg  233 drivers/perf/qcom_l2_pmu.c 		set_l2_indirect_reg(L2PMCCNTR, value);
set_l2_indirect_reg  235 drivers/perf/qcom_l2_pmu.c 		set_l2_indirect_reg(reg_idx(IA_L2PMXEVCNTR, idx), value);
set_l2_indirect_reg  252 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMCNTENSET, idx_to_reg_bit(idx));
set_l2_indirect_reg  257 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMCNTENCLR, idx_to_reg_bit(idx));
set_l2_indirect_reg  262 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMINTENSET, idx_to_reg_bit(idx));
set_l2_indirect_reg  267 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMINTENCLR, idx_to_reg_bit(idx));
set_l2_indirect_reg  272 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMCCNTCR, val);
set_l2_indirect_reg  277 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(reg_idx(IA_L2PMXEVCNTCR, ctr), val);
set_l2_indirect_reg  282 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(reg_idx(IA_L2PMXEVTYPER, ctr), val);
set_l2_indirect_reg  302 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMRESR, resr_val);
set_l2_indirect_reg  318 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(reg_idx(IA_L2PMXEVFILTER, ctr), val);
set_l2_indirect_reg  325 drivers/perf/qcom_l2_pmu.c 	set_l2_indirect_reg(L2PMOVSCLR, result);