set_io_bits       427 drivers/spi/spi-davinci.c 			set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select);
set_io_bits       431 drivers/spi/spi-davinci.c 		set_io_bits(dspi->base + SPIPC0, SPIPC0_SPIENA_MASK);
set_io_bits       434 drivers/spi/spi-davinci.c 		set_io_bits(dspi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK);
set_io_bits       598 drivers/spi/spi-davinci.c 	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
set_io_bits       604 drivers/spi/spi-davinci.c 			set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT);
set_io_bits       666 drivers/spi/spi-davinci.c 		set_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN);
set_io_bits       687 drivers/spi/spi-davinci.c 	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
set_io_bits       998 drivers/spi/spi-davinci.c 	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK);
set_io_bits       999 drivers/spi/spi-davinci.c 	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
set_io_bits      1000 drivers/spi/spi-davinci.c 	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);