CTRL_ENABLE        88 arch/arm/mach-spear/time.c 	val |= CTRL_ENABLE ;
CTRL_ENABLE       101 arch/arm/mach-spear/time.c 	val &= ~CTRL_ENABLE;
CTRL_ENABLE       140 arch/arm/mach-spear/time.c 	val |= CTRL_ENABLE | CTRL_INT_ENABLE;
CTRL_ENABLE       162 arch/arm/mach-spear/time.c 	if (val & CTRL_ENABLE)
CTRL_ENABLE       163 arch/arm/mach-spear/time.c 		writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT));
CTRL_ENABLE       167 arch/arm/mach-spear/time.c 	val |= CTRL_ENABLE | CTRL_INT_ENABLE;
CTRL_ENABLE       288 drivers/iommu/exynos-iommu.c 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
CTRL_ENABLE       501 drivers/iommu/exynos-iommu.c 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
CTRL_ENABLE       139 drivers/pwm/pwm-vt8500.c 	val |= CTRL_ENABLE;
CTRL_ENABLE       152 drivers/pwm/pwm-vt8500.c 	val &= ~CTRL_ENABLE;