sdrc_read_reg 343 arch/arm/mach-omap2/control.c (sdrc_read_reg(SDRC_SYSCONFIG) & 0xFFFF); sdrc_read_reg 345 arch/arm/mach-omap2/control.c (sdrc_read_reg(SDRC_CS_CFG) & 0xFFFF); sdrc_read_reg 347 arch/arm/mach-omap2/control.c (sdrc_read_reg(SDRC_SHARING) & 0xFFFF); sdrc_read_reg 349 arch/arm/mach-omap2/control.c (sdrc_read_reg(SDRC_ERR_TYPE) & 0xFFFF); sdrc_read_reg 350 arch/arm/mach-omap2/control.c sdrc_block_contents.dll_a_ctrl = sdrc_read_reg(SDRC_DLLA_CTRL); sdrc_read_reg 359 arch/arm/mach-omap2/control.c sdrc_block_contents.power = (sdrc_read_reg(SDRC_POWER) & sdrc_read_reg 365 arch/arm/mach-omap2/control.c sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER); sdrc_read_reg 368 arch/arm/mach-omap2/control.c sdrc_block_contents.mcfg_0 = sdrc_read_reg(SDRC_MCFG_0); sdrc_read_reg 369 arch/arm/mach-omap2/control.c sdrc_block_contents.mr_0 = (sdrc_read_reg(SDRC_MR_0) & 0xFFFF); sdrc_read_reg 374 arch/arm/mach-omap2/control.c sdrc_read_reg(SDRC_ACTIM_CTRL_A_0); sdrc_read_reg 376 arch/arm/mach-omap2/control.c sdrc_read_reg(SDRC_ACTIM_CTRL_B_0); sdrc_read_reg 378 arch/arm/mach-omap2/control.c sdrc_read_reg(SDRC_RFR_CTRL_0); sdrc_read_reg 380 arch/arm/mach-omap2/control.c sdrc_block_contents.mcfg_1 = sdrc_read_reg(SDRC_MCFG_1); sdrc_read_reg 381 arch/arm/mach-omap2/control.c sdrc_block_contents.mr_1 = sdrc_read_reg(SDRC_MR_1) & 0xFFFF; sdrc_read_reg 386 arch/arm/mach-omap2/control.c sdrc_read_reg(SDRC_ACTIM_CTRL_A_1); sdrc_read_reg 388 arch/arm/mach-omap2/control.c sdrc_read_reg(SDRC_ACTIM_CTRL_B_1); sdrc_read_reg 390 arch/arm/mach-omap2/control.c sdrc_read_reg(SDRC_RFR_CTRL_1); sdrc_read_reg 94 arch/arm/mach-omap2/pm24xx.c omap2_sram_suspend(sdrc_read_reg(SDRC_DLLA_CTRL), sdrc_read_reg 251 arch/arm/mach-omap2/pm34xx.c sdrc_pwr = sdrc_read_reg(SDRC_POWER); sdrc_read_reg 137 arch/arm/mach-omap2/sdrc.c l = sdrc_read_reg(SDRC_SYSCONFIG); sdrc_read_reg 64 arch/arm/mach-omap2/sdrc2xxx.c u32 dll_state = sdrc_read_reg(SDRC_DLLA_CTRL); sdrc_read_reg 120 arch/arm/mach-omap2/sdrc2xxx.c mem_timings.m_type = !((sdrc_read_reg(SDRC_MR_0) & 0x3) == 0x1); sdrc_read_reg 140 arch/arm/mach-omap2/sdrc2xxx.c fast_dll = sdrc_read_reg(SDRC_DLLA_CTRL); sdrc_read_reg 141 arch/arm/mach-omap2/sdrc2xxx.c dll_cnt = sdrc_read_reg(SDRC_DLLA_STATUS) & 0xff00; sdrc_read_reg 143 arch/arm/mach-omap2/sdrc2xxx.c fast_dll = sdrc_read_reg(SDRC_DLLB_CTRL); sdrc_read_reg 144 arch/arm/mach-omap2/sdrc2xxx.c dll_cnt = sdrc_read_reg(SDRC_DLLB_STATUS) & 0xff00;