scache             53 arch/microblaze/include/asm/cacheflush.h extern struct scache *mbc;
scache            509 arch/microblaze/kernel/cpu/cache.c struct scache *mbc;
scache            512 arch/microblaze/kernel/cpu/cache.c static const struct scache wb_msr = {
scache            528 arch/microblaze/kernel/cpu/cache.c static const struct scache wb_nomsr = {
scache            544 arch/microblaze/kernel/cpu/cache.c static const struct scache wt_msr = {
scache            559 arch/microblaze/kernel/cpu/cache.c static const struct scache wt_nomsr = {
scache            575 arch/microblaze/kernel/cpu/cache.c static const struct scache wt_msr_noirq = {
scache            590 arch/microblaze/kernel/cpu/cache.c static const struct scache wt_nomsr_noirq = {
scache            614 arch/microblaze/kernel/cpu/cache.c 			mbc = (struct scache *)&wb_msr;
scache            622 arch/microblaze/kernel/cpu/cache.c 				mbc = (struct scache *)&wt_msr_noirq;
scache            625 arch/microblaze/kernel/cpu/cache.c 				mbc = (struct scache *)&wt_msr;
scache            631 arch/microblaze/kernel/cpu/cache.c 			mbc = (struct scache *)&wb_nomsr;
scache            639 arch/microblaze/kernel/cpu/cache.c 				mbc = (struct scache *)&wt_nomsr_noirq;
scache            642 arch/microblaze/kernel/cpu/cache.c 				mbc = (struct scache *)&wt_nomsr;
scache            491 arch/mips/include/asm/cpu-features.h #define cpu_scache_line_size()	cpu_data[0].scache.linesz
scache             78 arch/mips/include/asm/cpu-info.h 	struct cache_desc	scache; /* Secondary cache */
scache            573 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, )
scache            577 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, )
scache            580 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
scache            583 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
scache            587 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, )
scache            588 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, )
scache            589 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, )
scache            590 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, )
scache            668 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, )
scache            673 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , )
scache            676 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , )
scache            694 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16)
scache            695 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32)
scache            696 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64)
scache            697 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128)
scache             38 arch/mips/kernel/cacheinfo.c 	if (c->scache.waysize) {
scache             88 arch/mips/kernel/cacheinfo.c 	if (c->scache.waysize) {
scache             91 arch/mips/kernel/cacheinfo.c 		populate_cache(scache, this_leaf, 2, CACHE_TYPE_UNIFIED);
scache            725 arch/mips/kernel/cpu-probe.c 		c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
scache            957 arch/mips/kernel/cpu-probe.c 	c->scache.flags = MIPS_CACHE_NOT_PRESENT;
scache           1796 arch/mips/kernel/cpu-probe.c 		c->scache.ways = 8;
scache           1556 arch/mips/mm/c-r4k.c 	c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22);
scache           1557 arch/mips/mm/c-r4k.c 	c->scache.ways = 1;
scache           1558 arch/mips/mm/c-r4k.c 	c->scache.waybit = 0;		/* does not matter */
scache           1568 arch/mips/mm/c-r4k.c 	c->scache.linesz = 32;
scache           1569 arch/mips/mm/c-r4k.c 	c->scache.ways = 4;
scache           1570 arch/mips/mm/c-r4k.c 	c->scache.waybit = 0;
scache           1571 arch/mips/mm/c-r4k.c 	c->scache.waysize = scache_size / (c->scache.ways);
scache           1572 arch/mips/mm/c-r4k.c 	c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways);
scache           1574 arch/mips/mm/c-r4k.c 	       scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
scache           1587 arch/mips/mm/c-r4k.c 		c->scache.linesz = 2 << lsize;
scache           1589 arch/mips/mm/c-r4k.c 		c->scache.linesz = 0;
scache           1590 arch/mips/mm/c-r4k.c 	c->scache.sets = 64 << ((config2 >> 8) & 15);
scache           1591 arch/mips/mm/c-r4k.c 	c->scache.ways = 1 + (config2 & 15);
scache           1593 arch/mips/mm/c-r4k.c 	scache_size = c->scache.sets *
scache           1594 arch/mips/mm/c-r4k.c 				  c->scache.ways *
scache           1595 arch/mips/mm/c-r4k.c 				  c->scache.linesz;
scache           1598 arch/mips/mm/c-r4k.c 	c->scache.waybit = 0;
scache           1599 arch/mips/mm/c-r4k.c 	c->scache.waysize = scache_size / c->scache.ways;
scache           1601 arch/mips/mm/c-r4k.c 	       scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
scache           1637 arch/mips/mm/c-r4k.c 		c->scache.linesz = 64 << ((config >> 13) & 1);
scache           1638 arch/mips/mm/c-r4k.c 		c->scache.ways = 2;
scache           1639 arch/mips/mm/c-r4k.c 		c->scache.waybit= 0;
scache           1675 arch/mips/mm/c-r4k.c 				scache_size = c->scache.ways * c->scache.sets * c->scache.linesz;
scache           1678 arch/mips/mm/c-r4k.c 				       way_string[c->scache.ways], c->scache.linesz);
scache           1681 arch/mips/mm/c-r4k.c 			if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
scache           1693 arch/mips/mm/c-r4k.c 	c->scache.waysize = scache_size / c->scache.ways;
scache           1695 arch/mips/mm/c-r4k.c 	c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways);
scache           1698 arch/mips/mm/c-r4k.c 	       scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
scache           1914 arch/mips/mm/c-r4k.c 		if (c->scache.flags & MIPS_CACHE_NOT_PRESENT)
scache            144 arch/mips/mm/sc-mips.c 		c->scache.linesz = 2 << tmp;
scache            162 arch/mips/mm/sc-mips.c 		c->scache.sets = 64 << sets;
scache            167 arch/mips/mm/sc-mips.c 		c->scache.linesz = 2 << line_sz;
scache            171 arch/mips/mm/sc-mips.c 	c->scache.ways = assoc + 1;
scache            172 arch/mips/mm/sc-mips.c 	c->scache.waysize = c->scache.sets * c->scache.linesz;
scache            173 arch/mips/mm/sc-mips.c 	c->scache.waybit = __ffs(c->scache.waysize);
scache            175 arch/mips/mm/sc-mips.c 	if (c->scache.linesz) {
scache            176 arch/mips/mm/sc-mips.c 		c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
scache            191 arch/mips/mm/sc-mips.c 	c->scache.flags |= MIPS_CACHE_NOT_PRESENT;
scache            214 arch/mips/mm/sc-mips.c 		c->scache.sets = 64 << tmp;
scache            220 arch/mips/mm/sc-mips.c 		c->scache.ways = tmp + 1;
scache            231 arch/mips/mm/sc-mips.c 			c->scache.ways = 4;
scache            239 arch/mips/mm/sc-mips.c 			c->scache.sets = 256;
scache            240 arch/mips/mm/sc-mips.c 			c->scache.ways = 4;
scache            245 arch/mips/mm/sc-mips.c 	c->scache.waysize = c->scache.sets * c->scache.linesz;
scache            246 arch/mips/mm/sc-mips.c 	c->scache.waybit = __ffs(c->scache.waysize);
scache            248 arch/mips/mm/sc-mips.c 	c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
scache            237 arch/mips/mm/sc-rm7k.c 	c->scache.linesz = sc_lsize;
scache            238 arch/mips/mm/sc-rm7k.c 	c->scache.ways = 4;
scache            239 arch/mips/mm/sc-rm7k.c 	c->scache.waybit= __ffs(scache_size / c->scache.ways);
scache            240 arch/mips/mm/sc-rm7k.c 	c->scache.waysize = scache_size / c->scache.ways;
scache            241 arch/mips/mm/sc-rm7k.c 	c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways);
scache             84 arch/sh/include/asm/processor.h 	struct cache_info scache;	/* Secondary cache */
scache            212 arch/sh/kernel/cpu/init.c 		l2_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.scache);
scache            123 arch/sh/kernel/cpu/proc.c 		show_cacheinfo(m, "scache", c->scache);
scache            242 arch/sh/kernel/cpu/sh4/probe.c 			boot_cpu_data.scache.way_incr		= (1 << 16);
scache            243 arch/sh/kernel/cpu/sh4/probe.c 			boot_cpu_data.scache.entry_shift	= 5;
scache            244 arch/sh/kernel/cpu/sh4/probe.c 			boot_cpu_data.scache.ways		= 4;
scache            245 arch/sh/kernel/cpu/sh4/probe.c 			boot_cpu_data.scache.linesz		= L1_CACHE_BYTES;
scache            247 arch/sh/kernel/cpu/sh4/probe.c 			boot_cpu_data.scache.entry_mask	=
scache            248 arch/sh/kernel/cpu/sh4/probe.c 				(boot_cpu_data.scache.way_incr -
scache            249 arch/sh/kernel/cpu/sh4/probe.c 				 boot_cpu_data.scache.linesz);
scache            251 arch/sh/kernel/cpu/sh4/probe.c 			boot_cpu_data.scache.sets	= size /
scache            252 arch/sh/kernel/cpu/sh4/probe.c 				(boot_cpu_data.scache.linesz *
scache            253 arch/sh/kernel/cpu/sh4/probe.c 				 boot_cpu_data.scache.ways);
scache            255 arch/sh/kernel/cpu/sh4/probe.c 			boot_cpu_data.scache.way_size	=
scache            256 arch/sh/kernel/cpu/sh4/probe.c 				(boot_cpu_data.scache.sets *
scache            257 arch/sh/kernel/cpu/sh4/probe.c 				 boot_cpu_data.scache.linesz);
scache            281 arch/sh/mm/cache.c 			boot_cpu_data.scache.ways,
scache            282 arch/sh/mm/cache.c 			boot_cpu_data.scache.sets,
scache            283 arch/sh/mm/cache.c 			boot_cpu_data.scache.way_incr);
scache            285 arch/sh/mm/cache.c 			boot_cpu_data.scache.entry_mask,
scache            286 arch/sh/mm/cache.c 			boot_cpu_data.scache.alias_mask,
scache            287 arch/sh/mm/cache.c 			boot_cpu_data.scache.n_aliases);
scache            301 arch/sh/mm/cache.c 	compute_alias(&boot_cpu_data.scache);