CT2_PCI_CPQ_BASE  262 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_HOSTFN_LPU0_MBOX0		(CT2_PCI_CPQ_BASE + 0x00)
CT2_PCI_CPQ_BASE  263 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_HOSTFN_LPU1_MBOX0		(CT2_PCI_CPQ_BASE + 0x20)
CT2_PCI_CPQ_BASE  264 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_LPU0_HOSTFN_MBOX0		(CT2_PCI_CPQ_BASE + 0x40)
CT2_PCI_CPQ_BASE  265 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_LPU1_HOSTFN_MBOX0		(CT2_PCI_CPQ_BASE + 0x60)
CT2_PCI_CPQ_BASE  266 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_HOSTFN_LPU0_CMD_STAT	(CT2_PCI_CPQ_BASE + 0x80)
CT2_PCI_CPQ_BASE  267 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_HOSTFN_LPU1_CMD_STAT	(CT2_PCI_CPQ_BASE + 0x84)
CT2_PCI_CPQ_BASE  268 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_LPU0_HOSTFN_CMD_STAT	(CT2_PCI_CPQ_BASE + 0x88)
CT2_PCI_CPQ_BASE  269 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_LPU1_HOSTFN_CMD_STAT	(CT2_PCI_CPQ_BASE + 0x8c)
CT2_PCI_CPQ_BASE  270 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_HOSTFN_LPU0_READ_STAT	(CT2_PCI_CPQ_BASE + 0x90)
CT2_PCI_CPQ_BASE  271 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_HOSTFN_LPU1_READ_STAT	(CT2_PCI_CPQ_BASE + 0x94)
CT2_PCI_CPQ_BASE  272 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_LPU0_HOSTFN_MBOX0_MSK	(CT2_PCI_CPQ_BASE + 0x98)
CT2_PCI_CPQ_BASE  273 drivers/net/ethernet/brocade/bna/bfi_reg.h #define CT2_LPU1_HOSTFN_MBOX0_MSK	(CT2_PCI_CPQ_BASE + 0x9C)
CT2_PCI_CPQ_BASE  263 drivers/scsi/bfa/bfi_reg.h #define CT2_HOSTFN_LPU0_MBOX0		(CT2_PCI_CPQ_BASE + 0x00)
CT2_PCI_CPQ_BASE  264 drivers/scsi/bfa/bfi_reg.h #define CT2_HOSTFN_LPU1_MBOX0		(CT2_PCI_CPQ_BASE + 0x20)
CT2_PCI_CPQ_BASE  265 drivers/scsi/bfa/bfi_reg.h #define CT2_LPU0_HOSTFN_MBOX0		(CT2_PCI_CPQ_BASE + 0x40)
CT2_PCI_CPQ_BASE  266 drivers/scsi/bfa/bfi_reg.h #define CT2_LPU1_HOSTFN_MBOX0		(CT2_PCI_CPQ_BASE + 0x60)
CT2_PCI_CPQ_BASE  267 drivers/scsi/bfa/bfi_reg.h #define CT2_HOSTFN_LPU0_CMD_STAT	(CT2_PCI_CPQ_BASE + 0x80)
CT2_PCI_CPQ_BASE  268 drivers/scsi/bfa/bfi_reg.h #define CT2_HOSTFN_LPU1_CMD_STAT	(CT2_PCI_CPQ_BASE + 0x84)
CT2_PCI_CPQ_BASE  269 drivers/scsi/bfa/bfi_reg.h #define CT2_LPU0_HOSTFN_CMD_STAT	(CT2_PCI_CPQ_BASE + 0x88)
CT2_PCI_CPQ_BASE  270 drivers/scsi/bfa/bfi_reg.h #define CT2_LPU1_HOSTFN_CMD_STAT	(CT2_PCI_CPQ_BASE + 0x8c)
CT2_PCI_CPQ_BASE  271 drivers/scsi/bfa/bfi_reg.h #define CT2_HOSTFN_LPU0_READ_STAT	(CT2_PCI_CPQ_BASE + 0x90)
CT2_PCI_CPQ_BASE  272 drivers/scsi/bfa/bfi_reg.h #define CT2_HOSTFN_LPU1_READ_STAT	(CT2_PCI_CPQ_BASE + 0x94)
CT2_PCI_CPQ_BASE  273 drivers/scsi/bfa/bfi_reg.h #define CT2_LPU0_HOSTFN_MBOX0_MSK	(CT2_PCI_CPQ_BASE + 0x98)
CT2_PCI_CPQ_BASE  274 drivers/scsi/bfa/bfi_reg.h #define CT2_LPU1_HOSTFN_MBOX0_MSK	(CT2_PCI_CPQ_BASE + 0x9C)