sandybridge_pcode_write  729 drivers/gpu/drm/i915/display/intel_cdclk.c 	ret = sandybridge_pcode_write(dev_priv,
sandybridge_pcode_write  779 drivers/gpu/drm/i915/display/intel_cdclk.c 	sandybridge_pcode_write(dev_priv, HSW_PCODE_DE_WRITE_FREQ_REQ,
sandybridge_pcode_write 1076 drivers/gpu/drm/i915/display/intel_cdclk.c 	sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
sandybridge_pcode_write 1672 drivers/gpu/drm/i915/display/intel_cdclk.c 	sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
sandybridge_pcode_write 1849 drivers/gpu/drm/i915/display/intel_cdclk.c 	sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
sandybridge_pcode_write 5686 drivers/gpu/drm/i915/display/intel_display.c 		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL,
sandybridge_pcode_write 5715 drivers/gpu/drm/i915/display/intel_display.c 		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
sandybridge_pcode_write 4295 drivers/gpu/drm/i915/display/intel_display_power.c 		if (sandybridge_pcode_write(dev_priv,
sandybridge_pcode_write  218 drivers/gpu/drm/i915/display/intel_hdcp.c 		ret = sandybridge_pcode_write(dev_priv,
sandybridge_pcode_write 3692 drivers/gpu/drm/i915/intel_pm.c 	ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL,
sandybridge_pcode_write 7446 drivers/gpu/drm/i915/intel_pm.c 		ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_RC6VIDS, rc6vids);
sandybridge_pcode_write 7552 drivers/gpu/drm/i915/intel_pm.c 		sandybridge_pcode_write(dev_priv,