s4 69 arch/mips/include/asm/asmmacro-32.h LONG_S s4, THREAD_REG20(\thread) s4 82 arch/mips/include/asm/asmmacro-32.h LONG_L s4, THREAD_REG20(\thread) s4 22 arch/mips/include/asm/asmmacro-64.h LONG_S s4, THREAD_REG20(\thread) s4 35 arch/mips/include/asm/asmmacro-64.h LONG_L s4, THREAD_REG20(\thread) s4 35 arch/riscv/include/asm/ptrace.h unsigned long s4; s4 40 arch/riscv/include/uapi/asm/ptrace.h unsigned long s4; s4 81 arch/riscv/kernel/asm-offsets.c OFFSET(PT_S4, pt_regs, s4); s4 51 arch/riscv/kernel/process.c regs->s2, regs->s3, regs->s4); s4 713 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 1059 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 1160 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 1250 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 1563 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 1664 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 1754 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 2652 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3003 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3137 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3245 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3353 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3419 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3485 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3551 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3627 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3746 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3819 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 3894 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 4005 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 4058 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 4149 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 4663 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 4725 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 4778 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 4794 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 4809 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 4824 arch/x86/include/asm/uv/uv_mmrs.h } s4; s4 296 crypto/cast5_generic.c (((s1[I >> 24] ^ s2[(I>>16)&0xff]) - s3[(I>>8)&0xff]) + s4[I&0xff])) s4 298 crypto/cast5_generic.c (((s1[I >> 24] - s2[(I>>16)&0xff]) + s3[(I>>8)&0xff]) ^ s4[I&0xff])) s4 300 crypto/cast5_generic.c (((s1[I >> 24] + s2[(I>>16)&0xff]) ^ s3[(I>>8)&0xff]) - s4[I&0xff])) s4 28 crypto/cast6_generic.c (((s1[I >> 24] ^ s2[(I>>16)&0xff]) - s3[(I>>8)&0xff]) + s4[I&0xff])) s4 30 crypto/cast6_generic.c (((s1[I >> 24] - s2[(I>>16)&0xff]) + s3[(I>>8)&0xff]) ^ s4[I&0xff])) s4 32 crypto/cast6_generic.c (((s1[I >> 24] + s2[(I>>16)&0xff]) ^ s3[(I>>8)&0xff]) - s4[I&0xff])) s4 96 crypto/poly1305_generic.c u32 s1, s2, s3, s4; s4 112 crypto/poly1305_generic.c s4 = r4 * 5; s4 129 crypto/poly1305_generic.c d0 = mlt(h0, r0) + mlt(h1, s4) + mlt(h2, s3) + s4 131 crypto/poly1305_generic.c d1 = mlt(h0, r1) + mlt(h1, r0) + mlt(h2, s4) + s4 134 crypto/poly1305_generic.c mlt(h3, s4) + mlt(h4, s3); s4 136 crypto/poly1305_generic.c mlt(h3, r0) + mlt(h4, s4); s4 96 drivers/gpu/drm/savage/savage_drv.h } s4; s4 65 drivers/gpu/drm/savage/savage_state.c uint32_t drawctrl0 = dev_priv->state.s4.new_drawctrl0; s4 66 drivers/gpu/drm/savage/savage_state.c uint32_t drawctrl1 = dev_priv->state.s4.new_drawctrl1; s4 73 drivers/gpu/drm/savage/savage_state.c if (drawctrl0 != dev_priv->state.s4.drawctrl0 || s4 74 drivers/gpu/drm/savage/savage_state.c drawctrl1 != dev_priv->state.s4.drawctrl1) { s4 81 drivers/gpu/drm/savage/savage_state.c dev_priv->state.s4.drawctrl0 = drawctrl0; s4 82 drivers/gpu/drm/savage/savage_state.c dev_priv->state.s4.drawctrl1 = drawctrl1; s4 178 drivers/gpu/drm/savage/savage_state.c SAVE_STATE_MASK(SAVAGE_DRAWCTRL0_S4, s4.new_drawctrl0, s4 180 drivers/gpu/drm/savage/savage_state.c SAVE_STATE_MASK(SAVAGE_DRAWCTRL1_S4, s4.new_drawctrl1, s4 187 drivers/gpu/drm/savage/savage_state.c SAVE_STATE(SAVAGE_TEXDESCR_S4, s4.texdescr); s4 188 drivers/gpu/drm/savage/savage_state.c SAVE_STATE(SAVAGE_TEXADDR0_S4, s4.texaddr0); s4 189 drivers/gpu/drm/savage/savage_state.c SAVE_STATE(SAVAGE_TEXADDR1_S4, s4.texaddr1); s4 190 drivers/gpu/drm/savage/savage_state.c if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX0EN_MASK) s4 192 drivers/gpu/drm/savage/savage_state.c dev_priv->state.s4.texaddr0); s4 193 drivers/gpu/drm/savage/savage_state.c if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX1EN_MASK) s4 195 drivers/gpu/drm/savage/savage_state.c dev_priv->state.s4.texaddr1); s4 133 drivers/staging/speakup/speakup_keypc.c int s1, s2, s3, s4; s4 138 drivers/staging/speakup/speakup_keypc.c s4 = inb_p(synth_port + 3); s4 139 drivers/staging/speakup/speakup_keypc.c pr_warn("synth timeout %d %d %d %d\n", s1, s2, s3, s4); s4 157 fs/cifs/netmisc.c struct sockaddr_in *s4 = (struct sockaddr_in *) dst; s4 161 fs/cifs/netmisc.c if (cifs_inet_pton(AF_INET, src, len, &s4->sin_addr.s_addr)) { s4 162 fs/cifs/netmisc.c s4->sin_family = AF_INET; s4 117 include/linux/random.h __u32 s1, s2, s3, s4; s4 164 include/linux/random.h state->s4 = __seed(i, 128U); s4 66 lib/random32.c state->s4 = TAUSWORTHE(state->s4, 3U, 12U, 4294967168U, 13U); s4 68 lib/random32.c return (state->s1 ^ state->s2 ^ state->s3 ^ state->s4); s4 169 lib/random32.c state->s4 = __seed(HWSEED() ^ LCG(state->s3), 128U); s4 253 lib/random32.c state->s4 = __seed(seeds[3], 128U); s4 182 net/sunrpc/svcauth_unix.c struct sockaddr_in s4; s4 210 net/sunrpc/svcauth_unix.c ipv6_addr_set_v4mapped(address.s4.sin_addr.s_addr, s4 13 tools/testing/selftests/bpf/progs/btf_dump_test_case_ordering.c struct s4; s4 18 tools/testing/selftests/bpf/progs/btf_dump_test_case_ordering.c struct s4 *s4; s4 51 tools/testing/selftests/bpf/progs/btf_dump_test_case_ordering.c struct s4 s4;