CSSELR_EL1        176 arch/arm64/include/asm/kvm_host.h #define c0_CSSELR	(CSSELR_EL1 * 2)/* Cache Size Selection Register */
CSSELR_EL1         45 arch/arm64/kvm/hyp/sysreg-sr.c 	ctxt->sys_regs[CSSELR_EL1]	= read_sysreg(csselr_el1);
CSSELR_EL1        119 arch/arm64/kvm/hyp/sysreg-sr.c 	write_sysreg(ctxt->sys_regs[CSSELR_EL1],	csselr_el1);
CSSELR_EL1         83 arch/arm64/kvm/sys_regs.c 	case CSSELR_EL1:	return read_sysreg_s(SYS_CSSELR_EL1);
CSSELR_EL1        126 arch/arm64/kvm/sys_regs.c 	case CSSELR_EL1:	write_sysreg_s(val, SYS_CSSELR_EL1);	return;
CSSELR_EL1       1304 arch/arm64/kvm/sys_regs.c 	csselr = vcpu_read_sys_reg(vcpu, CSSELR_EL1);
CSSELR_EL1       1550 arch/arm64/kvm/sys_regs.c 	{ SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 },