CSR_TIMER1_LOAD    55 arch/arm/mach-footbridge/dc21285-timer.c 	*CSR_TIMER1_LOAD = delta;
CSR_TIMER1_LOAD    70 arch/arm/mach-footbridge/dc21285-timer.c 	*CSR_TIMER1_LOAD = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);