CSR_PCICMD         84 arch/arm/mach-footbridge/dc21285.c 	v = *CSR_PCICMD;
CSR_PCICMD         86 arch/arm/mach-footbridge/dc21285.c 		*CSR_PCICMD = v & (0xffff|PCICMD_ABORT);
CSR_PCICMD        119 arch/arm/mach-footbridge/dc21285.c 	v = *CSR_PCICMD;
CSR_PCICMD        121 arch/arm/mach-footbridge/dc21285.c 		*CSR_PCICMD = v & (0xffff|PCICMD_ABORT);
CSR_PCICMD        154 arch/arm/mach-footbridge/dc21285.c 	cmd = *CSR_PCICMD;
CSR_PCICMD        174 arch/arm/mach-footbridge/dc21285.c 	*CSR_PCICMD = cmd;
CSR_PCICMD        217 arch/arm/mach-footbridge/dc21285.c 	cmd = *CSR_PCICMD & 0xffff;
CSR_PCICMD        218 arch/arm/mach-footbridge/dc21285.c 	*CSR_PCICMD = cmd | 1 << 24;
CSR_PCICMD        232 arch/arm/mach-footbridge/dc21285.c 	cmd = *CSR_PCICMD & 0xffff;
CSR_PCICMD        233 arch/arm/mach-footbridge/dc21285.c 	*CSR_PCICMD = cmd | 1 << 31;
CSR_PCICMD        315 arch/arm/mach-footbridge/dc21285.c 		*CSR_PCICMD = (*CSR_PCICMD & 0xffff) | PCICMD_ERROR_BITS;
CSR_PCICMD        346 arch/arm/mach-footbridge/dc21285.c 		*CSR_PCICMD = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |