rvu_block_reset   430 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_block_reset(rvu, BLKADDR_NPA, NPA_AF_BLK_RST);
rvu_block_reset   431 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_block_reset(rvu, BLKADDR_NIX0, NIX_AF_BLK_RST);
rvu_block_reset   432 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_block_reset(rvu, BLKADDR_NPC, NPC_AF_BLK_RST);
rvu_block_reset   433 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_block_reset(rvu, BLKADDR_SSO, SSO_AF_BLK_RST);
rvu_block_reset   434 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_block_reset(rvu, BLKADDR_TIM, TIM_AF_BLK_RST);
rvu_block_reset   435 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_block_reset(rvu, BLKADDR_CPT0, CPT_AF_BLK_RST);
rvu_block_reset   436 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_block_reset(rvu, BLKADDR_NDC0, NDC_AF_BLK_RST);
rvu_block_reset   437 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_block_reset(rvu, BLKADDR_NDC1, NDC_AF_BLK_RST);
rvu_block_reset   438 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	rvu_block_reset(rvu, BLKADDR_NDC2, NDC_AF_BLK_RST);