rtl8192_setBBreg  146 drivers/staging/rtl8192u/r8190_rtl8256.c 		rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
rtl8192_setBBreg  149 drivers/staging/rtl8192u/r8190_rtl8256.c 		rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
rtl8192_setBBreg  152 drivers/staging/rtl8192u/r8190_rtl8256.c 		rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);	/* Set 0 to 4 bits for Z-serial and set 1 to 6 bits for 8258 */
rtl8192_setBBreg  153 drivers/staging/rtl8192u/r8190_rtl8256.c 		rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);	/* Set 0 to 12 bits for Z-serial and 8258, and set 1 to 14 bits for ??? */
rtl8192_setBBreg  207 drivers/staging/rtl8192u/r8190_rtl8256.c 			rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
rtl8192_setBBreg  211 drivers/staging/rtl8192u/r8190_rtl8256.c 			rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);
rtl8192_setBBreg  244 drivers/staging/rtl8192u/r8190_rtl8256.c 	rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
rtl8192_setBBreg  292 drivers/staging/rtl8192u/r8190_rtl8256.c 		rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
rtl8192_setBBreg 2823 drivers/staging/rtl8192u/r8192U_core.c 	rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
rtl8192_setBBreg 2824 drivers/staging/rtl8192u/r8192U_core.c 	rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
rtl8192_setBBreg  594 drivers/staging/rtl8192u/r8192U_dm.c 						rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
rtl8192_setBBreg  601 drivers/staging/rtl8192u/r8192U_dm.c 					rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
rtl8192_setBBreg  749 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]);
rtl8192_setBBreg 1369 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
rtl8192_setBBreg 1375 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
rtl8192_setBBreg 1380 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
rtl8192_setBBreg 1385 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
rtl8192_setBBreg 1391 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
rtl8192_setBBreg 1396 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
rtl8192_setBBreg 1410 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
rtl8192_setBBreg 1418 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
rtl8192_setBBreg 1425 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
rtl8192_setBBreg 1434 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
rtl8192_setBBreg 1442 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
rtl8192_setBBreg 1449 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
rtl8192_setBBreg 1473 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
rtl8192_setBBreg 1480 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
rtl8192_setBBreg 1538 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);	/* Only clear byte 1 and rewrite. */
rtl8192_setBBreg 1539 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1);
rtl8192_setBBreg 1540 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bit_mask, (u32)priv->initgain_backup.xbagccore1);
rtl8192_setBBreg 1541 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bit_mask, (u32)priv->initgain_backup.xcagccore1);
rtl8192_setBBreg 1542 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bit_mask, (u32)priv->initgain_backup.xdagccore1);
rtl8192_setBBreg 1544 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, rCCK0_CCA, bit_mask, (u32)priv->initgain_backup.cca);
rtl8192_setBBreg 1553 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);	/* Only clear byte 1 and rewrite. */
rtl8192_setBBreg 1566 drivers/staging/rtl8192u/r8192U_dm.c 	rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);	/* Only clear byte 1 and rewrite. */
rtl8192_setBBreg 1674 drivers/staging/rtl8192u/r8192U_dm.c 			rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);	/* Only clear byte 1 and rewrite. */
rtl8192_setBBreg 1712 drivers/staging/rtl8192u/r8192U_dm.c 			rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);	/* Only clear byte 1 and rewrite.*/
rtl8192_setBBreg 1747 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);	/*  Only clear byte 1 and rewrite. */
rtl8192_setBBreg 1838 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);	/*  Only clear byte 1 and rewrite. */
rtl8192_setBBreg 2519 drivers/staging/rtl8192u/r8192U_dm.c 			rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<min_rssi_index, 0x0);	/* 0xc04[3:0] */
rtl8192_setBBreg 2520 drivers/staging/rtl8192u/r8192U_dm.c 			rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<min_rssi_index, 0x0);	/* 0xd04[3:0] */
rtl8192_setBBreg 2533 drivers/staging/rtl8192u/r8192U_dm.c 		rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000, DM_RxPathSelTable.cck_rx_path);
rtl8192_setBBreg 2542 drivers/staging/rtl8192u/r8192U_dm.c 					rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<i, 0x1);	/* 0xc04[3:0] */
rtl8192_setBBreg 2543 drivers/staging/rtl8192u/r8192U_dm.c 					rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<i, 0x1);	/* 0xd04[3:0] */
rtl8192_setBBreg  134 drivers/staging/rtl8192u/r819xU_phy.c 	rtl8192_setBBreg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData, 0);
rtl8192_setBBreg  143 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset,
rtl8192_setBBreg  152 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset,
rtl8192_setBBreg  166 drivers/staging/rtl8192u/r819xU_phy.c 	rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress,
rtl8192_setBBreg  169 drivers/staging/rtl8192u/r819xU_phy.c 	rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,  bLSSIReadEdge, 0x0);
rtl8192_setBBreg  170 drivers/staging/rtl8192u/r819xU_phy.c 	rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,  bLSSIReadEdge, 0x1);
rtl8192_setBBreg  184 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord,
rtl8192_setBBreg  225 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset,
rtl8192_setBBreg  232 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset,
rtl8192_setBBreg  249 drivers/staging/rtl8192u/r819xU_phy.c 	rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
rtl8192_setBBreg  259 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset,
rtl8192_setBBreg  500 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, pdwArray[i], pdwArray[i+1],
rtl8192_setBBreg  521 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, Rtl8192UsbPHY_REG_1T2RArray[i],
rtl8192_setBBreg  531 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, Rtl8192UsbAGCTAB_Array[i],
rtl8192_setBBreg  793 drivers/staging/rtl8192u/r819xU_phy.c 	rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0);
rtl8192_setBBreg  812 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC),
rtl8192_setBBreg  817 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap,
rtl8192_setBBreg 1095 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4),
rtl8192_setBBreg 1098 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300,
rtl8192_setBBreg 1101 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18,
rtl8192_setBBreg 1104 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3);
rtl8192_setBBreg 1106 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x3, 0x3);
rtl8192_setBBreg 1108 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60,
rtl8192_setBBreg 1120 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4),
rtl8192_setBBreg 1123 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00,
rtl8192_setBBreg 1126 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18,
rtl8192_setBBreg 1129 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
rtl8192_setBBreg 1131 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
rtl8192_setBBreg 1133 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60,
rtl8192_setBBreg 1501 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x0);
rtl8192_setBBreg 1502 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x0);
rtl8192_setBBreg 1503 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1,
rtl8192_setBBreg 1531 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x1);
rtl8192_setBBreg 1532 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x1);
rtl8192_setBBreg 1533 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand,
rtl8192_setBBreg 1535 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0);
rtl8192_setBBreg 1536 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00,
rtl8192_setBBreg 1661 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
rtl8192_setBBreg 1700 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
rtl8192_setBBreg 1702 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bitmask,
rtl8192_setBBreg 1704 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bitmask,
rtl8192_setBBreg 1706 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bitmask,
rtl8192_setBBreg 1708 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bitmask,
rtl8192_setBBreg 1711 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rCCK0_CCA, bitmask,
rtl8192_setBBreg 1729 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
rtl8192_setBBreg   50 drivers/staging/rtl8192u/r819xU_phy.h void rtl8192_setBBreg(struct net_device *dev, u32 reg_addr,