reg_write 123 arch/arm/mach-prima2/rtciobrg.c .reg_write = regmap_iobg_regwrite, reg_write 284 arch/x86/kvm/emulate.c return reg_write(ctxt, nr); reg_write 2273 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RAX) = (u32) (old >> 0); reg_write 2274 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RDX) = (u32) (old >> 32); reg_write 2506 arch/x86/kvm/emulate.c *reg_write(ctxt, i) = GET_SMSTATE(u32, smstate, 0x7fd0 + i * 4); reg_write 2558 arch/x86/kvm/emulate.c *reg_write(ctxt, i) = GET_SMSTATE(u64, smstate, 0x7ff8 - i * 8); reg_write 2819 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RCX) = ctxt->_eip; reg_write 2822 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_R11) = ctxt->eflags; reg_write 2891 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RSP) = (efer & EFER_LMA) ? msr_data : reg_write 2951 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RSP) = rcx; reg_write 3036 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RCX) = 0; reg_write 3079 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RAX) = tss->ax; reg_write 3080 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RCX) = tss->cx; reg_write 3081 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RDX) = tss->dx; reg_write 3082 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RBX) = tss->bx; reg_write 3083 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RSP) = tss->sp; reg_write 3084 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RBP) = tss->bp; reg_write 3085 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RSI) = tss->si; reg_write 3086 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RDI) = tss->di; reg_write 3198 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RAX) = tss->eax; reg_write 3199 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RCX) = tss->ecx; reg_write 3200 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RDX) = tss->edx; reg_write 3201 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RBX) = tss->ebx; reg_write 3202 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RSP) = tss->esp; reg_write 3203 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RBP) = tss->ebp; reg_write 3204 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RSI) = tss->esi; reg_write 3205 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RDI) = tss->edi; reg_write 3630 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RAX) = (u32)tsc; reg_write 3631 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RDX) = tsc >> 32; reg_write 3641 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RAX) = (u32)pmc; reg_write 3642 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RDX) = pmc >> 32; reg_write 3739 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RAX) = (u32)msr_data; reg_write 3740 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RDX) = msr_data >> 32; reg_write 4005 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RAX) = eax; reg_write 4006 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RBX) = ebx; reg_write 4007 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RCX) = ecx; reg_write 4008 arch/x86/kvm/emulate.c *reg_write(ctxt, VCPU_REGS_RDX) = edx; reg_write 104 arch/x86/pci/ce4100.c DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) reg_write 105 arch/x86/pci/ce4100.c DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) reg_write 106 arch/x86/pci/ce4100.c DEFINE_REG(2, 1, 0x10, (64*KB), reg_init, reg_read, reg_write) reg_write 107 arch/x86/pci/ce4100.c DEFINE_REG(3, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) reg_write 108 arch/x86/pci/ce4100.c DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) reg_write 109 arch/x86/pci/ce4100.c DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write) reg_write 110 arch/x86/pci/ce4100.c DEFINE_REG(6, 0, 0x10, (512*KB), reg_init, reg_read, reg_write) reg_write 111 arch/x86/pci/ce4100.c DEFINE_REG(6, 1, 0x10, (512*KB), reg_init, reg_read, reg_write) reg_write 112 arch/x86/pci/ce4100.c DEFINE_REG(6, 2, 0x10, (64*KB), reg_init, reg_read, reg_write) reg_write 113 arch/x86/pci/ce4100.c DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write) reg_write 114 arch/x86/pci/ce4100.c DEFINE_REG(8, 1, 0x10, (64*KB), reg_init, reg_read, reg_write) reg_write 115 arch/x86/pci/ce4100.c DEFINE_REG(8, 2, 0x10, (64*KB), reg_init, reg_read, reg_write) reg_write 116 arch/x86/pci/ce4100.c DEFINE_REG(9, 0, 0x10 , (1*MB), reg_init, reg_read, reg_write) reg_write 117 arch/x86/pci/ce4100.c DEFINE_REG(9, 0, 0x14, (64*KB), reg_init, reg_read, reg_write) reg_write 118 arch/x86/pci/ce4100.c DEFINE_REG(10, 0, 0x10, (256), reg_init, reg_read, reg_write) reg_write 119 arch/x86/pci/ce4100.c DEFINE_REG(10, 0, 0x14, (256*MB), reg_init, reg_read, reg_write) reg_write 120 arch/x86/pci/ce4100.c DEFINE_REG(11, 0, 0x10, (256), reg_init, reg_read, reg_write) reg_write 121 arch/x86/pci/ce4100.c DEFINE_REG(11, 0, 0x14, (256), reg_init, reg_read, reg_write) reg_write 122 arch/x86/pci/ce4100.c DEFINE_REG(11, 1, 0x10, (256), reg_init, reg_read, reg_write) reg_write 123 arch/x86/pci/ce4100.c DEFINE_REG(11, 2, 0x10, (256), reg_init, reg_read, reg_write) reg_write 124 arch/x86/pci/ce4100.c DEFINE_REG(11, 2, 0x14, (256), reg_init, reg_read, reg_write) reg_write 125 arch/x86/pci/ce4100.c DEFINE_REG(11, 2, 0x18, (256), reg_init, reg_read, reg_write) reg_write 126 arch/x86/pci/ce4100.c DEFINE_REG(11, 3, 0x10, (256), reg_init, reg_read, reg_write) reg_write 127 arch/x86/pci/ce4100.c DEFINE_REG(11, 3, 0x14, (256), reg_init, reg_read, reg_write) reg_write 128 arch/x86/pci/ce4100.c DEFINE_REG(11, 4, 0x10, (256), reg_init, reg_read, reg_write) reg_write 129 arch/x86/pci/ce4100.c DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write) reg_write 130 arch/x86/pci/ce4100.c DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write) reg_write 131 arch/x86/pci/ce4100.c DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write) reg_write 132 arch/x86/pci/ce4100.c DEFINE_REG(11, 7, 0x3c, 256, reg_init, reg_noirq_read, reg_write) reg_write 133 arch/x86/pci/ce4100.c DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) reg_write 134 arch/x86/pci/ce4100.c DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write) reg_write 135 arch/x86/pci/ce4100.c DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write) reg_write 136 arch/x86/pci/ce4100.c DEFINE_REG(13, 0, 0x10, (32*KB), reg_init, ehci_reg_read, reg_write) reg_write 137 arch/x86/pci/ce4100.c DEFINE_REG(13, 1, 0x10, (32*KB), reg_init, ehci_reg_read, reg_write) reg_write 139 arch/x86/pci/ce4100.c DEFINE_REG(14, 0, 0x10, 0, reg_init, reg_read, reg_write) reg_write 140 arch/x86/pci/ce4100.c DEFINE_REG(14, 0, 0x14, 0, reg_init, reg_read, reg_write) reg_write 141 arch/x86/pci/ce4100.c DEFINE_REG(14, 0, 0x18, 0, reg_init, reg_read, reg_write) reg_write 142 arch/x86/pci/ce4100.c DEFINE_REG(14, 0, 0x1C, 0, reg_init, reg_read, reg_write) reg_write 143 arch/x86/pci/ce4100.c DEFINE_REG(14, 0, 0x20, 0, reg_init, reg_read, reg_write) reg_write 144 arch/x86/pci/ce4100.c DEFINE_REG(14, 0, 0x24, (0x200), sata_reg_init, reg_read, reg_write) reg_write 145 arch/x86/pci/ce4100.c DEFINE_REG(15, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) reg_write 146 arch/x86/pci/ce4100.c DEFINE_REG(15, 0, 0x14, (64*KB), reg_init, reg_read, reg_write) reg_write 147 arch/x86/pci/ce4100.c DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) reg_write 148 arch/x86/pci/ce4100.c DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write) reg_write 149 arch/x86/pci/ce4100.c DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write) reg_write 150 arch/x86/pci/ce4100.c DEFINE_REG(16, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write) reg_write 151 arch/x86/pci/ce4100.c DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) reg_write 152 arch/x86/pci/ce4100.c DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write) reg_write 153 arch/x86/pci/ce4100.c DEFINE_REG(18, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write) reg_write 494 drivers/atm/lanai.c reg_write(lanai, lanai->conf1, Config1_Reg); reg_write 499 drivers/atm/lanai.c reg_write(lanai, lanai->conf2, Config2_Reg); reg_write 515 drivers/atm/lanai.c reg_write(lanai, 0, Reset_Reg); reg_write 1059 drivers/atm/lanai.c reg_write(lanai, i, IntControlEna_Reg); reg_write 1064 drivers/atm/lanai.c reg_write(lanai, i, IntControlDis_Reg); reg_write 1270 drivers/atm/lanai.c reg_write(lanai, (ptr << 12) | lvcc->vci, Butt_Reg); reg_write 1570 drivers/atm/lanai.c reg_write(lanai, INT_ALL, IntAck_Reg); reg_write 1590 drivers/atm/lanai.c reg_write(lanai, 0, ServWrite_Reg); reg_write 1592 drivers/atm/lanai.c reg_write(lanai, reg_write 1721 drivers/atm/lanai.c reg_write(lanai, wreg, ServRead_Reg); reg_write 1871 drivers/atm/lanai.c reg_write(lanai, ack, IntAck_Reg); reg_write 2092 drivers/atm/lanai.c reg_write(lanai, pcr_to_cbricg(&lanai->cbrvcc->qos), CBR_ICG_Reg); reg_write 2093 drivers/atm/lanai.c reg_write(lanai, lanai->cbrvcc->vci, CBR_PTR_Reg); reg_write 2149 drivers/atm/lanai.c reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg); reg_write 2174 drivers/atm/lanai.c reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg); reg_write 2195 drivers/atm/lanai.c reg_write(lanai, TX_FIFO_DEPTH, TxDepth_Reg); reg_write 2196 drivers/atm/lanai.c reg_write(lanai, 0, CBR_ICG_Reg); /* CBR defaults to no limit */ reg_write 104 drivers/base/regmap/internal.h int (*reg_write)(void *context, unsigned int reg, unsigned int val); reg_write 65 drivers/base/regmap/regmap-ac97.c .reg_write = regmap_ac97_reg_write, reg_write 47 drivers/base/regmap/regmap-i2c.c .reg_write = regmap_smbus_byte_reg_write, reg_write 83 drivers/base/regmap/regmap-i2c.c .reg_write = regmap_smbus_word_reg_write, reg_write 119 drivers/base/regmap/regmap-i2c.c .reg_write = regmap_smbus_word_write_swapped, reg_write 23 drivers/base/regmap/regmap-mmio.c void (*reg_write)(struct regmap_mmio_context *ctx, reg_write 126 drivers/base/regmap/regmap-mmio.c ctx->reg_write(ctx, reg, val); reg_write 205 drivers/base/regmap/regmap-mmio.c .reg_write = regmap_mmio_write, reg_write 251 drivers/base/regmap/regmap-mmio.c ctx->reg_write = regmap_mmio_write8; reg_write 255 drivers/base/regmap/regmap-mmio.c ctx->reg_write = regmap_mmio_write16le; reg_write 259 drivers/base/regmap/regmap-mmio.c ctx->reg_write = regmap_mmio_write32le; reg_write 264 drivers/base/regmap/regmap-mmio.c ctx->reg_write = regmap_mmio_write64le; reg_write 279 drivers/base/regmap/regmap-mmio.c ctx->reg_write = regmap_mmio_write8; reg_write 283 drivers/base/regmap/regmap-mmio.c ctx->reg_write = regmap_mmio_write16be; reg_write 287 drivers/base/regmap/regmap-mmio.c ctx->reg_write = regmap_mmio_write32be; reg_write 84 drivers/base/regmap/regmap-sccb.c .reg_write = regmap_sccb_write, reg_write 34 drivers/base/regmap/regmap-sdw.c .reg_write = regmap_sdw_write, reg_write 177 drivers/base/regmap/regmap-w1.c .reg_write = w1_reg_a8_v8_write, reg_write 182 drivers/base/regmap/regmap-w1.c .reg_write = w1_reg_a8_v16_write, reg_write 187 drivers/base/regmap/regmap-w1.c .reg_write = w1_reg_a16_v16_write, reg_write 823 drivers/base/regmap/regmap.c map->reg_write = config->reg_write; reg_write 829 drivers/base/regmap/regmap.c map->reg_write = _regmap_bus_reg_write; reg_write 1044 drivers/base/regmap/regmap.c map->reg_write = _regmap_bus_formatted_write; reg_write 1047 drivers/base/regmap/regmap.c map->reg_write = _regmap_bus_raw_write; reg_write 1743 drivers/base/regmap/regmap.c return map->bus->reg_write(map->bus_context, reg, val); reg_write 1791 drivers/base/regmap/regmap.c return map->reg_write(context, reg, val); reg_write 428 drivers/bus/sunxi-rsb.c .reg_write = regmap_sunxi_rsb_reg_write, reg_write 560 drivers/edac/altera_edac.c .reg_write = s10_protected_reg_write, reg_write 85 drivers/edac/aspeed_edac.c .reg_write = regmap_reg_write, reg_write 58 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_PhyControl, (addr << 8) | 0x00008000); reg_write 75 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_PhyControl, (addr << 8) | data | 0x00004000); reg_write 89 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); reg_write 114 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_BusOptions, bus_options); reg_write 117 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_NodeID, 0x0000ffc0); reg_write 120 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_HCControlSet, reg_write 124 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff); reg_write 127 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_LinkControlSet, reg_write 131 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_LinkControlClear, 0x00000400); reg_write 134 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 0xffffffff); reg_write 135 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 0xffffffff); reg_write 136 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 0xffffffff); reg_write 137 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 0xffffffff); reg_write 140 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); reg_write 143 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_ATRetries, reg_write 149 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_HCControlClear, reg_write 153 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_linkEnable); reg_write 185 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_IntEventClear, reg_write 197 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 0xffffffff); reg_write 198 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 0xffffffff); reg_write 199 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_PhyUpperBound, 0xffff0000); reg_write 212 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS); reg_write 215 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff); reg_write 216 drivers/firewire/init_ohci1394_dma.c reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff); reg_write 228 drivers/firewire/nosy.c reg_write(lynx, offset, (reg_read(lynx, offset) | mask)); reg_write 239 drivers/firewire/nosy.c reg_write(lynx, DMA0_CURRENT_PCL + dmachan * 0x20, pcl_bus); reg_write 240 drivers/firewire/nosy.c reg_write(lynx, DMA0_CHAN_CTRL + dmachan * 0x20, reg_write 257 drivers/firewire/nosy.c reg_write(lynx, LINK_PHY, LINK_PHY_WRITE | reg_write 470 drivers/firewire/nosy.c reg_write(lynx, LINK_INT_STATUS, link_int_status); reg_write 480 drivers/firewire/nosy.c reg_write(lynx, PCI_INT_STATUS, pci_int_status); reg_write 501 drivers/firewire/nosy.c reg_write(lynx, PCI_INT_ENABLE, 0); reg_write 594 drivers/firewire/nosy.c reg_write(lynx, DMA0_CHAN_CTRL, 0); reg_write 595 drivers/firewire/nosy.c reg_write(lynx, DMA_GLOBAL_REGISTER, 0x00 << 24); reg_write 612 drivers/firewire/nosy.c reg_write(lynx, FIFO_SIZES, 255); reg_write 616 drivers/firewire/nosy.c reg_write(lynx, LINK_INT_ENABLE, reg_write 660 drivers/firewire/nosy.c reg_write(lynx, PCI_INT_ENABLE, 0); reg_write 554 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); reg_write 580 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_PhyControl, reg_write 672 drivers/firewire/ohci.c reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); reg_write 695 drivers/firewire/ohci.c reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); reg_write 1035 drivers/firewire/ohci.c reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); reg_write 1036 drivers/firewire/ohci.c reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); reg_write 1214 drivers/firewire/ohci.c reg_write(ohci, COMMAND_PTR(ctx->regs), reg_write 1216 drivers/firewire/ohci.c reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); reg_write 1217 drivers/firewire/ohci.c reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); reg_write 1264 drivers/firewire/ohci.c reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); reg_write 1411 drivers/firewire/ohci.c reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); reg_write 1570 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_CSRData, lock_data); reg_write 1571 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); reg_write 1572 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_CSRControl, sel); reg_write 1754 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); reg_write 1902 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_LinkControlSet, reg_write 2007 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); reg_write 2036 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_BusOptions, reg_write 2039 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_ConfigROMhdr, reg_write 2044 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); reg_write 2045 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); reg_write 2077 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IntEventClear, reg_write 2098 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); reg_write 2110 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); reg_write 2126 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IntEventClear, reg_write 2135 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_LinkControlSet, reg_write 2168 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); reg_write 2234 drivers/firewire/ohci.c reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); reg_write 2237 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_HCControlClear, reg_write 2291 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_HCControlSet, reg_write 2317 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_HCControlClear, reg_write 2320 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); reg_write 2321 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_LinkControlSet, reg_write 2325 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_ATRetries, reg_write 2335 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), reg_write 2340 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, reg_write 2346 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_FairnessControl, 0x3f); reg_write 2348 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_FairnessControl, 0); reg_write 2351 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); reg_write 2352 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IntEventClear, ~0); reg_write 2353 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IntMaskClear, ~0); reg_write 2403 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_ConfigROMhdr, 0); reg_write 2404 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_BusOptions, reg_write 2406 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); reg_write 2408 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); reg_write 2422 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IntMaskSet, irqs); reg_write 2424 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_HCControlSet, reg_write 2428 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_LinkControlSet, reg_write 2509 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); reg_write 2601 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); reg_write 2603 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); reg_write 2671 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_LinkControlClear, reg_write 2681 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_LinkControlSet, reg_write 2690 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_NodeID, value >> 16); reg_write 2695 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); reg_write 2696 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IntEventSet, reg_write 2711 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_ATRetries, value); reg_write 2716 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); reg_write 2925 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); reg_write 2926 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); reg_write 2927 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); reg_write 2928 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); reg_write 3050 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); reg_write 3051 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); reg_write 3066 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); reg_write 3067 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); reg_write 3068 drivers/firewire/ohci.c reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); reg_write 3089 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); reg_write 3095 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); reg_write 3464 drivers/firewire/ohci.c reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); reg_write 3658 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); reg_write 3661 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); reg_write 3667 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); reg_write 3674 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); reg_write 3758 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_IntMaskClear, ~0); reg_write 3833 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); reg_write 3834 drivers/firewire/ohci.c reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); reg_write 2000 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c atom_card_info->reg_write = cail_reg_write; reg_write 465 drivers/gpu/drm/amd/amdgpu/atom.c gctx->card->reg_write(gctx->card, idx, reg_write 468 drivers/gpu/drm/amd/amdgpu/atom.c gctx->card->reg_write(gctx->card, idx, val); reg_write 117 drivers/gpu/drm/amd/amdgpu/atom.h void (* reg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */ reg_write 312 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c u32 reg_write = 0x10000 + reg; reg_write 317 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c writel(reg_write, base + PHY_TST_CTRL1); reg_write 692 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, reg, old_val | val); reg_write 702 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, reg, old_val & ~val); reg_write 709 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER); reg_write 711 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_SOFTRESET, 0); reg_write 719 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SERIAL_1, 0x00); reg_write 720 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(1)); reg_write 721 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SERIAL_3, 0x00); reg_write 722 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_SERIALIZER, 0x00); reg_write 723 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_BUFFER_OUT, 0x00); reg_write 724 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SCG1, 0x00); reg_write 725 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_AUDIO_DIV, AUDIO_DIV_SERCLK_8); reg_write 726 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_SEL_CLK, SEL_CLK_SEL_CLK1 | SEL_CLK_ENA_SC_CLK); reg_write 727 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SCGN1, 0xfa); reg_write 728 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SCGN2, 0x00); reg_write 729 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SCGR1, 0x5b); reg_write 730 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SCGR2, 0x00); reg_write 731 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SCG2, 0x10); reg_write 734 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_MUX_VP_VIP_OUT, 0x24); reg_write 1014 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENA_AP, settings->ena_ap); reg_write 1015 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENA_ACLK, settings->route->ena_aclk); reg_write 1016 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_MUX_AP, settings->route->mux_ap); reg_write 1017 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_I2S_FORMAT, settings->i2s_format); reg_write 1018 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_AIP_CLKSEL, settings->route->aip_clksel); reg_write 1021 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_CTS_N, settings->cts_n); reg_write 1022 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_AUDIO_DIV, adiv); reg_write 1128 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENA_AP, 0); reg_write 1223 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_DDC_ADDR, 0xa0); reg_write 1224 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_DDC_OFFS, offset); reg_write 1225 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_DDC_SEGM_ADDR, 0x60); reg_write 1226 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_DDC_SEGM, segptr); reg_write 1230 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_EDID_CTRL, 0x1); reg_write 1233 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_EDID_CTRL, 0x0); reg_write 1393 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENA_VP_0, 0xff); reg_write 1394 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENA_VP_1, 0xff); reg_write 1395 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENA_VP_2, 0xff); reg_write 1397 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_VIP_CNTRL_0, priv->vip_cntrl_0); reg_write 1398 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_VIP_CNTRL_1, priv->vip_cntrl_1); reg_write 1399 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_VIP_CNTRL_2, priv->vip_cntrl_2); reg_write 1411 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENA_VP_0, 0x00); reg_write 1412 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENA_VP_1, 0x00); reg_write 1413 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENA_VP_2, 0x00); reg_write 1536 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS); reg_write 1538 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(0)); reg_write 1541 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_HVF_CNTRL_0, HVF_CNTRL_0_PREFIL(0) | reg_write 1544 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_VIP_CNTRL_5, VIP_CNTRL_5_SP_CNT(0)); reg_write 1545 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_VIP_CNTRL_4, VIP_CNTRL_4_BLANKIT(0) | reg_write 1551 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_SERIALIZER, 0); reg_write 1552 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_HVF_CNTRL_1, HVF_CNTRL_1_VQR(0)); reg_write 1554 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_RPT_CNTRL, RPT_CNTRL_REPEAT(rep)); reg_write 1555 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_SEL_CLK, sel_clk); reg_write 1556 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(div) | reg_write 1574 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_MAT_CONTRL, MAT_CONTRL_MAT_BP | reg_write 1580 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ANA_GENERAL, 0x09); reg_write 1595 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_VIP_CNTRL_3, reg); reg_write 1597 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_VIDFORMAT, 0x00); reg_write 1621 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENABLE_SPACE, 0x00); reg_write 1633 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_TBG_CNTRL_1, reg); reg_write 1636 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_TBG_CNTRL_0, 0); reg_write 1654 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_TBG_CNTRL_1, reg); reg_write 1655 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(1)); reg_write 1872 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_DDC_DISABLE, 0x00); reg_write 1875 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_TX3, 39); reg_write 611 drivers/gpu/drm/i915/gt/selftest_workarounds.c expect = reg_write(expect, values[v], rsvd); reg_write 621 drivers/gpu/drm/i915/gt/selftest_workarounds.c expect = reg_write(expect, ~values[v], rsvd); reg_write 646 drivers/gpu/drm/i915/gt/selftest_workarounds.c expect = reg_write(expect, w, rsvd); reg_write 657 drivers/gpu/drm/i915/gt/selftest_workarounds.c expect = reg_write(expect, w, rsvd); reg_write 764 drivers/gpu/drm/meson/meson_dw_hdmi.c .reg_write = meson_dw_hdmi_reg_write, reg_write 471 drivers/gpu/drm/radeon/atom.c gctx->card->reg_write(gctx->card, idx, reg_write 474 drivers/gpu/drm/radeon/atom.c gctx->card->reg_write(gctx->card, idx, val); reg_write 114 drivers/gpu/drm/radeon/atom.h void (* reg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */ reg_write 984 drivers/gpu/drm/radeon/radeon_device.c atom_card_info->reg_write = cail_reg_write; reg_write 254 drivers/gpu/drm/stm/ltdc.c reg_write(base, reg, reg_read(base, reg) | mask); reg_write 259 drivers/gpu/drm/stm/ltdc.c reg_write(base, reg, reg_read(base, reg) & ~mask); reg_write 265 drivers/gpu/drm/stm/ltdc.c reg_write(base, reg, (reg_read(base, reg) & ~mask) | val); reg_write 395 drivers/gpu/drm/stm/ltdc.c reg_write(ldev->regs, LTDC_ICR, ldev->irq_status); reg_write 419 drivers/gpu/drm/stm/ltdc.c reg_write(ldev->regs, LTDC_L1CLUTWR, val); reg_write 431 drivers/gpu/drm/stm/ltdc.c reg_write(ldev->regs, LTDC_BCCR, BCCR_BCBLACK); reg_write 615 drivers/gpu/drm/stm/ltdc.c reg_write(ldev->regs, LTDC_LIPCR, (accum_act_h + 1)); reg_write 850 drivers/gpu/drm/stm/ltdc.c reg_write(ldev->regs, LTDC_L1CFBAR + lofs, paddr); reg_write 369 drivers/hwmon/aspeed-pwm-tacho.c .reg_write = regmap_aspeed_pwm_tacho_reg_write, reg_write 68 drivers/i2c/busses/i2c-pasemi.c #define TXFIFO_WR(smbus, reg) reg_write((smbus), REG_MTXFIFO, (reg)) reg_write 76 drivers/i2c/busses/i2c-pasemi.c reg_write(smbus, REG_SMSTA, status); reg_write 97 drivers/i2c/busses/i2c-pasemi.c reg_write(smbus, REG_SMSTA, status); reg_write 102 drivers/i2c/busses/i2c-pasemi.c reg_write(smbus, REG_SMSTA, SMSTA_XEN); reg_write 145 drivers/i2c/busses/i2c-pasemi.c reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR | reg_write 312 drivers/i2c/busses/i2c-pasemi.c reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR | reg_write 364 drivers/i2c/busses/i2c-pasemi.c reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR | reg_write 79 drivers/iio/adc/ad7606.c ret = st->bops->reg_write(st, reg, writeval); reg_write 142 drivers/iio/adc/ad7606.h int (*reg_write)(struct ad7606_state *st, reg_write 173 drivers/iio/adc/ad7606_spi.c return st->bops->reg_write(st, addr, readval); reg_write 272 drivers/iio/adc/ad7606_spi.c st->bops->reg_write(st, reg_write 292 drivers/iio/adc/ad7606_spi.c .reg_write = ad7606_spi_reg_write, reg_write 301 drivers/iio/adc/ad7606_spi.c .reg_write = ad7606_spi_reg_write, reg_write 57 drivers/iio/dac/ad5592r-base.c st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val); reg_write 72 drivers/iio/dac/ad5592r-base.c ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out); reg_write 76 drivers/iio/dac/ad5592r-base.c ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in); reg_write 100 drivers/iio/dac/ad5592r-base.c ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val); reg_write 104 drivers/iio/dac/ad5592r-base.c ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out); reg_write 108 drivers/iio/dac/ad5592r-base.c ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in); reg_write 172 drivers/iio/dac/ad5592r-base.c st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac); reg_write 254 drivers/iio/dac/ad5592r-base.c ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown); reg_write 258 drivers/iio/dac/ad5592r-base.c ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate); reg_write 263 drivers/iio/dac/ad5592r-base.c ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac); reg_write 267 drivers/iio/dac/ad5592r-base.c ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc); reg_write 271 drivers/iio/dac/ad5592r-base.c ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val); reg_write 275 drivers/iio/dac/ad5592r-base.c ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out); reg_write 279 drivers/iio/dac/ad5592r-base.c ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in); reg_write 362 drivers/iio/dac/ad5592r-base.c ret = st->ops->reg_write(st, AD5592R_REG_CTRL, reg_write 635 drivers/iio/dac/ad5592r-base.c ret = ops->reg_write(st, AD5592R_REG_PD, reg_write 45 drivers/iio/dac/ad5592r-base.h int (*reg_write)(struct ad5592r_state *st, u8 reg, u16 value); reg_write 122 drivers/iio/dac/ad5592r.c .reg_write = ad5592r_reg_write, reg_write 90 drivers/iio/dac/ad5593r.c .reg_write = ad5593r_reg_write, reg_write 107 drivers/media/dvb-frontends/tc90522.c return reg_write(fe->demodulator_priv, set_tsid, ARRAY_SIZE(set_tsid)); reg_write 119 drivers/media/dvb-frontends/tc90522.c return reg_write(fe->demodulator_priv, &rv, 1); reg_write 495 drivers/media/dvb-frontends/tc90522.c ret = reg_write(state, &reset_sat, 1); reg_write 500 drivers/media/dvb-frontends/tc90522.c ret = reg_write(state, &reset_ter, 1); reg_write 559 drivers/media/dvb-frontends/tc90522.c return reg_write(state, rv, num); reg_write 572 drivers/media/dvb-frontends/tc90522.c ret = reg_write(state, &sleep_sat, 1); reg_write 574 drivers/media/dvb-frontends/tc90522.c ret = reg_write(state, &sleep_ter, 1); reg_write 605 drivers/media/dvb-frontends/tc90522.c ret = reg_write(state, &wakeup_sat, 1); reg_write 607 drivers/media/dvb-frontends/tc90522.c ret = reg_write(state, &wakeup_ter, 1); reg_write 26 drivers/media/dvb-frontends/zd1301_demod.c return pdata->reg_write(pdata->reg_priv, reg, val); reg_write 24 drivers/media/dvb-frontends/zd1301_demod.h int (*reg_write)(void *, u16, u8); reg_write 52 drivers/media/i2c/ak881x.c return reg_write(client, reg, (ret & ~mask) | (data & mask)); reg_write 86 drivers/media/i2c/ak881x.c if (reg_write(client, reg->reg, reg->val) < 0) reg_write 191 drivers/media/i2c/ak881x.c reg_write(client, AK881X_DAC_MODE, dac); reg_write 196 drivers/media/i2c/ak881x.c reg_write(client, AK881X_DAC_MODE, 0); reg_write 288 drivers/media/i2c/ak881x.c reg_write(client, AK881X_INTERFACE_MODE, ifmode | (20 << 3)); reg_write 134 drivers/media/i2c/mt9m001.c return reg_write(client, reg, ret | data); reg_write 145 drivers/media/i2c/mt9m001.c return reg_write(client, reg, ret & ~data); reg_write 159 drivers/media/i2c/mt9m001.c int ret = reg_write(client, regs[i].reg, regs[i].data); reg_write 233 drivers/media/i2c/mt9m001.c ret = reg_write(client, MT9M001_OUTPUT_CONTROL, 2); reg_write 238 drivers/media/i2c/mt9m001.c reg_write(client, MT9M001_OUTPUT_CONTROL, 0); reg_write 443 drivers/media/i2c/mt9m001.c if (reg_write(client, reg->reg, reg->val) < 0) reg_write 532 drivers/media/i2c/mt9m001.c ret = reg_write(client, MT9M001_GLOBAL_GAIN, data); reg_write 549 drivers/media/i2c/mt9m001.c ret = reg_write(client, MT9M001_GLOBAL_GAIN, data); reg_write 562 drivers/media/i2c/mt9m001.c ret = reg_write(client, MT9M001_SHUTTER_WIDTH, shutter); reg_write 566 drivers/media/i2c/mt9m001.c ret = reg_write(client, MT9M001_SHUTTER_WIDTH, reg_write 591 drivers/media/i2c/mt9m001.c data = reg_write(client, MT9M001_CHIP_ENABLE, 1); reg_write 380 drivers/media/i2c/mt9m111.c return reg_write(CONTEXT_CONTROL, ctx->control); reg_write 404 drivers/media/i2c/mt9m111.c ret = reg_write(COLUMN_START, rect->left); reg_write 406 drivers/media/i2c/mt9m111.c ret = reg_write(ROW_START, rect->top); reg_write 409 drivers/media/i2c/mt9m111.c ret = reg_write(WINDOW_WIDTH, rect->width); reg_write 411 drivers/media/i2c/mt9m111.c ret = reg_write(WINDOW_HEIGHT, rect->height); reg_write 433 drivers/media/i2c/mt9m111.c return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE); reg_write 827 drivers/media/i2c/mt9m111.c return reg_write(GLOBAL_GAIN, val); reg_write 472 drivers/media/i2c/rj54n1cb0c.c return reg_write(client, reg, (ret & ~mask) | (data & mask)); reg_write 481 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, rv->reg, rv->val); reg_write 515 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, reg_xy, reg_write 520 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, reg_x, width & 0xff); reg_write 522 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, reg_y, height & 0xff); reg_write 533 drivers/media/i2c/rj54n1cb0c.c int ret = reg_write(client, RJ54N1_INIT_START, 1); reg_write 536 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_INIT_START, 0); reg_write 725 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff); reg_write 727 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8); reg_write 753 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc); reg_write 755 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8); reg_write 767 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8); reg_write 769 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left); reg_write 771 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top); reg_write 773 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right); reg_write 775 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom); reg_write 785 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_PEAK_H, reg_write 788 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_PEAK_50, peak_50); reg_write 790 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_PEAK_60, peak_60); reg_write 792 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150); reg_write 796 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESIZE_CONTROL, reg_write 805 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1); reg_write 826 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY); reg_write 829 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK); reg_write 832 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_PLL_L, PLL_L); reg_write 834 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_PLL_N, PLL_N); reg_write 838 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RATIO_TG, reg_write 841 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RATIO_T, reg_write 844 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RATIO_R, reg_write 849 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3); reg_write 853 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OCLK_DSP, 0); reg_write 857 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RATIO_OP, reg_write 860 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RATIO_O, reg_write 865 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1); reg_write 869 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_TG_BYPASS, 2); reg_write 873 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESET_STANDBY, reg_write 877 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_PLL_EN, 1); reg_write 884 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_CLK_RST, 1); reg_write 899 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1); reg_write 916 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4)); reg_write 918 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf); reg_write 922 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESIZE_CONTROL, reg_write 927 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_Y_GAIN, 0x84); reg_write 934 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27); reg_write 941 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80); reg_write 953 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESET_STANDBY, reg_write 962 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RESET_STANDBY, reg_write 967 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_FWFLG, 2); reg_write 1033 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OUT_SEL, 0); reg_write 1038 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OUT_SEL, 0); reg_write 1043 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OUT_SEL, 0x11); reg_write 1048 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OUT_SEL, 0x11); reg_write 1053 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OUT_SEL, 4); reg_write 1057 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RA_SEL_UL, 0); reg_write 1060 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OUT_SEL, 4); reg_write 1064 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RA_SEL_UL, 8); reg_write 1067 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OUT_SEL, 4); reg_write 1071 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RA_SEL_UL, 0); reg_write 1074 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OUT_SEL, 4); reg_write 1078 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_RA_SEL_UL, 8); reg_write 1081 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_OUT_SEL, 5); reg_write 1156 drivers/media/i2c/rj54n1cb0c.c if (reg_write(client, reg->reg, reg->val) < 0) reg_write 1214 drivers/media/i2c/rj54n1cb0c.c if (reg_write(client, RJ54N1_Y_GAIN, ctrl->val * 2) < 0) reg_write 1286 drivers/media/i2c/rj54n1cb0c.c ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7); reg_write 222 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) | DVP_CTL_ENA); reg_write 224 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_VTP, (u32)vip_buf->dma); reg_write 225 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_VBP, (u32)vip_buf->dma + offset); reg_write 337 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_ITM, DVP_IT_VSB | DVP_IT_VST); reg_write 353 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA); reg_write 355 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_ITM, 0); reg_write 684 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_TFO, 0); reg_write 686 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_BFO, 0); reg_write 688 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_TFS, t_stop); reg_write 690 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_BFS, b_stop); reg_write 692 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_VMP, pitch); reg_write 802 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA); reg_write 819 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_HLFLN, DVP_HLFLN_SD); reg_write 821 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_CTL, DVP_CTL_RST); reg_write 823 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_CTL, 0); reg_write 830 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_ITM, 0); reg_write 832 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_CTL, DVP_CTL_RST); reg_write 834 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_CTL, 0); reg_write 1192 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_CTL, vip->register_save_area[0] & DVP_CTL_DIS); reg_write 1194 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_ITM, 0); reg_write 1259 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, 4 * i, vip->register_save_area[i]); reg_write 1261 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, registers_to_save[i], reg_write 1263 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_CTL, vip->register_save_area[0]); reg_write 1264 drivers/media/pci/sta2x11/sta2x11_vip.c reg_write(vip, DVP_ITM, vip->register_save_area[SAVE_COUNT]); reg_write 74 drivers/media/pci/tw686x/tw686x-audio.c reg_write(dev, reg, next->dma); reg_write 170 drivers/media/pci/tw686x/tw686x-audio.c reg_write(dev, AUDIO_CONTROL2, reg); reg_write 181 drivers/media/pci/tw686x/tw686x-audio.c reg_write(dev, AUDIO_CONTROL1, reg); reg_write 209 drivers/media/pci/tw686x/tw686x-audio.c reg_write(dev, ADMA_P_ADDR[ac->ch], p_buf->dma); reg_write 210 drivers/media/pci/tw686x/tw686x-audio.c reg_write(dev, ADMA_B_ADDR[ac->ch], b_buf->dma); reg_write 351 drivers/media/pci/tw686x/tw686x-audio.c reg_write(dev, reg, ac->dma_descs[pb].phys); reg_write 365 drivers/media/pci/tw686x/tw686x-audio.c reg_write(dev, DMA_CMD, dma_cmd & ~0xff00); reg_write 366 drivers/media/pci/tw686x/tw686x-audio.c reg_write(dev, DMA_CHANNEL_ENABLE, dma_ch_mask & ~0xff00); reg_write 382 drivers/media/pci/tw686x/tw686x-audio.c reg_write(dev, AUDIO_CONTROL1, BIT(0)); reg_write 108 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CHANNEL_ENABLE, dma_en); reg_write 109 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CMD, dma_cmd); reg_write 133 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CHANNEL_ENABLE, dev->pending_dma_en); reg_write 134 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CMD, dev->pending_dma_cmd); reg_write 156 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CHANNEL_ENABLE, dma_en & ~ch_mask); reg_write 162 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CMD, dma_cmd & ~ch_mask); reg_write 300 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, SYS_SOFT_RST, 0x0f); reg_write 303 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, SRST[0], 0x3f); reg_write 305 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, SRST[1], 0x3f); reg_write 308 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CMD, 0); reg_write 309 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CHANNEL_ENABLE, 0); reg_write 312 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CONFIG, 0xffffff04); reg_write 313 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_CHANNEL_TIMEOUT, 0x140c8584); reg_write 314 drivers/media/pci/tw686x/tw686x-core.c reg_write(dev, DMA_TIMER_INTERVAL, dma_interval); reg_write 123 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, reg, vc->dma_descs[pb].phys); reg_write 168 drivers/media/pci/tw686x/tw686x-video.c reg_write(vc->dev, reg, phys); reg_write 289 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, reg, desc->phys); reg_write 408 drivers/media/pci/tw686x/tw686x-video.c reg_write(vc->dev, VIDEO_FIELD_CTRL[vc->ch], fps_map[i]); reg_write 599 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, BRIGHT[ch], ctrl->val & 0xff); reg_write 603 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, CONTRAST[ch], ctrl->val); reg_write 607 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, SAT_U[ch], ctrl->val); reg_write 608 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, SAT_V[ch], ctrl->val); reg_write 612 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, HUE[ch], ctrl->val & 0xff); reg_write 725 drivers/media/pci/tw686x/tw686x-video.c reg_write(vc->dev, VDMA_CHANNEL_CONFIG[vc->ch], val); reg_write 732 drivers/media/pci/tw686x/tw686x-video.c reg_write(vc->dev, VDMA_WHP[vc->ch], val); reg_write 793 drivers/media/pci/tw686x/tw686x-video.c reg_write(vc->dev, SDT[vc->ch], val); reg_write 800 drivers/media/pci/tw686x/tw686x-video.c reg_write(vc->dev, VIDEO_CONTROL1, val); reg_write 848 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, SDT[vc->ch], 0x7); reg_write 849 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, SDT_EN[vc->ch], 0xff); reg_write 859 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, SDT[vc->ch], old_std); reg_write 990 drivers/media/pci/tw686x/tw686x-video.c reg_write(vc->dev, VDMA_CHANNEL_CONFIG[vc->ch], val); reg_write 1216 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, VDELAY_LO[ch], 0x14); reg_write 1217 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, HACTIVE_LO[ch], 0xd0); reg_write 1218 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, VIDEO_SIZE[ch], 0); reg_write 1294 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, PHASE_REF, val); reg_write 1296 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, MISC2[0], 0xe7); reg_write 1297 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, VCTRL1[0], 0xcc); reg_write 1298 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, LOOP[0], 0xa5); reg_write 1300 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, VCTRL1[1], 0xcc); reg_write 1301 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, LOOP[1], 0xa5); reg_write 1302 drivers/media/pci/tw686x/tw686x-video.c reg_write(dev, MISC2[1], 0xe7); reg_write 411 drivers/media/platform/meson/ao-cec-g12a.c .reg_write = meson_ao_cec_g12a_write, reg_write 195 drivers/media/platform/stm32/stm32-dcmi.c reg_write(base, reg, reg_read(base, reg) | mask); reg_write 200 drivers/media/platform/stm32/stm32-dcmi.c reg_write(base, reg, reg_read(base, reg) & ~mask); reg_write 390 drivers/media/platform/stm32/stm32-dcmi.c reg_write(dcmi->regs, DCMI_CWSIZE, size); reg_write 395 drivers/media/platform/stm32/stm32-dcmi.c reg_write(dcmi->regs, DCMI_CWSTRT, start); reg_write 780 drivers/media/platform/stm32/stm32-dcmi.c reg_write(dcmi->regs, DCMI_CR, val); reg_write 84 drivers/media/platform/ti-vpe/cal.c reg_write(dev, offset, val); } reg_write 409 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev->cm, CM_CTRL_CORE_CAMERRX_CONTROL, val); reg_write 426 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev->cm, CM_CTRL_CORE_CAMERRX_CONTROL, val); reg_write 533 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(1), 0xFF000000); reg_write 543 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_HL_IRQENABLE_CLR(2), val); reg_write 547 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_HL_IRQENABLE_CLR(3), val); reg_write 549 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(1), 0); reg_write 565 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), val); reg_write 574 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), val); reg_write 593 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_CTRL, val); reg_write 620 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), val); reg_write 659 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_CSI2_CTX0(ctx->csi2_port), val); reg_write 675 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_PIX_PROC(ctx->csi2_port), val); reg_write 694 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_WR_DMA_CTRL(ctx->csi2_port), val); reg_write 718 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_WR_DMA_XSIZE(ctx->csi2_port), val); reg_write 725 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->dev, CAL_WR_DMA_ADDR(ctx->csi2_port), dmaaddr); reg_write 778 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->cc, CAL_CSI2_PHY_REG0, reg0); reg_write 787 drivers/media/platform/ti-vpe/cal.c reg_write(ctx->cc, CAL_CSI2_PHY_REG1, reg1); reg_write 850 drivers/media/platform/ti-vpe/cal.c reg_write(dev, CAL_HL_IRQSTATUS(2), irqst2); reg_write 872 drivers/media/platform/ti-vpe/cal.c reg_write(dev, CAL_HL_IRQSTATUS(3), irqst3); reg_write 83 drivers/media/tuners/mxl301rf.c ret = reg_write(state, 0x14, 0x01); reg_write 215 drivers/media/tuners/mxl301rf.c ret = reg_write(state, 0x1a, 0x0d); reg_write 259 drivers/media/tuners/mxl301rf.c ret = reg_write(state, 0x01, 0x01); reg_write 107 drivers/media/tuners/qm1d1c0042.c return reg_write(state, 0x03, state->regs[0x03]); reg_write 117 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x01, state->regs[0x01]); reg_write 119 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x05, state->regs[0x05]); reg_write 205 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x02, val); reg_write 213 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x06, state->regs[0x06]); reg_write 219 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x07, state->regs[0x07]); reg_write 230 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x08, val); reg_write 251 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x09, state->regs[0x09]); reg_write 253 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x0a, state->regs[0x0a]); reg_write 255 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x0b, state->regs[0x0b]); reg_write 261 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x13, state->regs[0x13]); reg_write 269 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x0c, val); reg_write 274 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x0c, val); reg_write 287 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x08, 0x09); reg_write 292 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x13, state->regs[0x13]); reg_write 308 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x05, state->regs[0x05]); reg_write 310 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x01, state->regs[0x01]); reg_write 325 drivers/media/tuners/qm1d1c0042.c reg_write(state, 0x01, 0x0c); reg_write 326 drivers/media/tuners/qm1d1c0042.c reg_write(state, 0x01, 0x0c); reg_write 328 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x01, 0x0c); /* soft reset on */ reg_write 333 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x01, 0x1c); /* soft reset off */ reg_write 352 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, 0x0c, state->regs[0x0c]); reg_write 359 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, i, state->regs[i]); reg_write 364 drivers/media/tuners/qm1d1c0042.c ret = reg_write(state, i, state->regs[i]); reg_write 140 drivers/media/usb/dvb-usb-v2/zd1301.c dev->demod_pdata.reg_write = zd1301_demod_wreg; reg_write 1769 drivers/media/usb/gspca/spca501.c ret = reg_write(gspca_dev, data[i][0], data[i][2], reg_write 1783 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA501_REG_CCDSP, 0x12, val); reg_write 1788 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, 0x00, 0x00, (val >> 8) & 0xff); reg_write 1789 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, 0x00, 0x01, val & 0xff); reg_write 1794 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA501_REG_CCDSP, 0x0c, val); reg_write 1799 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA501_REG_CCDSP, 0x11, val); reg_write 1804 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA501_REG_CCDSP, 0x13, val); reg_write 1880 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA50X_REG_USB, 0x6, 0x94); reg_write 1883 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA50X_REG_USB, 0x07, 0x004a); reg_write 1886 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA50X_REG_USB, 0x07, 0x104a); reg_write 1890 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA50X_REG_USB, 0x07, 0x204a); reg_write 1893 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA501_REG_CTLRL, 0x01, 0x02); reg_write 1902 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA501_REG_CTLRL, 0x01, 0x00); reg_write 1910 drivers/media/usb/gspca/spca501.c reg_write(gspca_dev, SPCA501_REG_CTLRL, 0x05, 0x00); reg_write 577 drivers/media/usb/gspca/spca505.c ret = reg_write(gspca_dev, data[i][0], data[i][2], reg_write 619 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x05, 0x00, (255 - brightness) >> 6); reg_write 620 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x05, 0x01, (255 - brightness) << 2); reg_write 651 drivers/media/usb/gspca/spca505.c ret = reg_write(gspca_dev, 0x06, 0x16, 0x0a); reg_write 654 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x05, 0xc2, 0x12); reg_write 659 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x02, 0x00, 0x00); reg_write 662 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, SPCA50X_REG_COMPRESS, 0x00, mode_tb[mode][0]); reg_write 663 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, SPCA50X_REG_COMPRESS, 0x06, mode_tb[mode][1]); reg_write 664 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, SPCA50X_REG_COMPRESS, 0x07, mode_tb[mode][2]); reg_write 666 drivers/media/usb/gspca/spca505.c return reg_write(gspca_dev, SPCA50X_REG_USB, reg_write 674 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x02, 0x00, 0x00); reg_write 684 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x03, 0x03, 0x20); reg_write 685 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x03, 0x01, 0x00); reg_write 686 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x03, 0x00, 0x01); reg_write 687 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x05, 0x10, 0x01); reg_write 688 drivers/media/usb/gspca/spca505.c reg_write(gspca_dev, 0x05, 0x11, 0x0f); reg_write 1278 drivers/media/usb/gspca/spca508.c ret = reg_write(gspca_dev, 0x8802, reg >> 8); reg_write 1281 drivers/media/usb/gspca/spca508.c ret = reg_write(gspca_dev, 0x8801, reg & 0x00ff); reg_write 1285 drivers/media/usb/gspca/spca508.c ret = reg_write(gspca_dev, 0x8805, val & 0x00ff); reg_write 1290 drivers/media/usb/gspca/spca508.c ret = reg_write(gspca_dev, 0x8800, val); reg_write 1325 drivers/media/usb/gspca/spca508.c ret = reg_write(gspca_dev, (*data)[1], reg_write 1393 drivers/media/usb/gspca/spca508.c reg_write(gspca_dev, 0x8500, mode); reg_write 1397 drivers/media/usb/gspca/spca508.c reg_write(gspca_dev, 0x8700, 0x28); /* clock */ reg_write 1402 drivers/media/usb/gspca/spca508.c reg_write(gspca_dev, 0x8700, 0x23); /* clock */ reg_write 1405 drivers/media/usb/gspca/spca508.c reg_write(gspca_dev, 0x8112, 0x10 | 0x20); reg_write 1412 drivers/media/usb/gspca/spca508.c reg_write(gspca_dev, 0x8112, 0x20); reg_write 1439 drivers/media/usb/gspca/spca508.c reg_write(gspca_dev, 0x8651, brightness); reg_write 1440 drivers/media/usb/gspca/spca508.c reg_write(gspca_dev, 0x8652, brightness); reg_write 1441 drivers/media/usb/gspca/spca508.c reg_write(gspca_dev, 0x8653, brightness); reg_write 1442 drivers/media/usb/gspca/spca508.c reg_write(gspca_dev, 0x8654, brightness); reg_write 145 drivers/mfd/altera-sysmgr.c sysmgr_config.reg_write = s10_protected_reg_write; reg_write 68 drivers/mfd/atmel-hlcdc.c .reg_write = regmap_atmel_hlcdc_reg_write, reg_write 404 drivers/mfd/intel_soc_pmic_bxtwc.c .reg_write = regmap_ipc_byte_reg_write, reg_write 114 drivers/mfd/intel_soc_pmic_chtwc.c .reg_write = cht_wc_byte_reg_write, reg_write 105 drivers/mfd/intel_soc_pmic_mrfld.c .reg_write = bcove_ipc_byte_reg_write, reg_write 101 drivers/mfd/mcp-core.c mcp->ops->reg_write(mcp, reg, val); reg_write 147 drivers/mfd/mcp-sa11x0.c .reg_write = mcp_sa11x0_write, reg_write 492 drivers/mfd/qcom-pm8xxx.c .reg_write = ssbi_reg_write reg_write 223 drivers/mfd/si476x-prop.c .reg_write = si476x_core_regmap_write, reg_write 692 drivers/misc/eeprom/at24.c nvmem_config.reg_write = at24_write; reg_write 359 drivers/misc/eeprom/at25.c at25->nvmem_config.reg_write = at25_ee_write; reg_write 466 drivers/misc/eeprom/eeprom_93xx46.c edev->nvmem_config.reg_write = eeprom_93xx46_write; reg_write 132 drivers/misc/vexpress-syscfg.c .reg_write = vexpress_syscfg_write, reg_write 94 drivers/net/dsa/lan9303_mdio.c .reg_write = lan9303_mdio_write, reg_write 62 drivers/net/dsa/mv88e6060.c ret = reg_write(priv, REG_PORT(i), PORT_CONTROL, reg_write 72 drivers/net/dsa/mv88e6060.c ret = reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL, reg_write 104 drivers/net/dsa/mv88e6060.c ret = reg_write(priv, REG_GLOBAL, GLOBAL_CONTROL, reg_write 111 drivers/net/dsa/mv88e6060.c return reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL, reg_write 125 drivers/net/dsa/mv88e6060.c ret = reg_write(priv, addr, PORT_CONTROL, reg_write 139 drivers/net/dsa/mv88e6060.c ret = reg_write(priv, addr, PORT_VLAN_MAP, reg_write 152 drivers/net/dsa/mv88e6060.c return reg_write(priv, addr, PORT_ASSOC_VECTOR, BIT(p)); reg_write 170 drivers/net/dsa/mv88e6060.c ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_01, val); reg_write 174 drivers/net/dsa/mv88e6060.c ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_23, reg_write 179 drivers/net/dsa/mv88e6060.c return reg_write(priv, REG_GLOBAL, GLOBAL_MAC_45, reg_write 243 drivers/net/dsa/mv88e6060.c return reg_write(priv, addr, regnum, val); reg_write 257 drivers/net/dsa/qca8k.c .reg_write = qca8k_regmap_write, reg_write 326 drivers/net/dsa/realtek-smi-core.c .reg_write = realtek_smi_write, reg_write 501 drivers/net/ethernet/microchip/encx24j600-regmap.c .reg_write = regmap_encx24j600_phy_reg_write, reg_write 77 drivers/net/ethernet/smsc/smsc911x.c void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val); reg_write 231 drivers/net/ethernet/smsc/smsc911x.c pdata->ops->reg_write(pdata, reg, val); reg_write 2357 drivers/net/ethernet/smsc/smsc911x.c .reg_write = __smsc911x_reg_write, reg_write 2365 drivers/net/ethernet/smsc/smsc911x.c .reg_write = __smsc911x_reg_write_shift, reg_write 107 drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.c } reg_write; reg_write 109 drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.c reg_write.addr = cpu_to_le32(addr); reg_write 110 drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.c reg_write.data = cpu_to_le32(data); reg_write 112 drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.c ®_write, sizeof(reg_write)); reg_write 51 drivers/net/wireless/mediatek/mt7601u/trace.h DEFINE_EVENT(dev_reg_evtu, reg_write, reg_write 237 drivers/nvmem/bcm-ocotp.c .reg_write = bcm_otpc_write, reg_write 57 drivers/nvmem/core.c if (nvmem->reg_write) reg_write 58 drivers/nvmem/core.c return nvmem->reg_write(nvmem->priv, offset, val, bytes); reg_write 387 drivers/nvmem/core.c nvmem->reg_write = config->reg_write; reg_write 400 drivers/nvmem/core.c config->read_only || !nvmem->reg_write; reg_write 420 drivers/nvmem/imx-ocotp.c .reg_write = imx_ocotp_write, reg_write 159 drivers/nvmem/lpc18xx_eeprom.c .reg_write = lpc18xx_eeprom_gather_write, reg_write 82 drivers/nvmem/meson-efuse.c econfig->reg_write = meson_efuse_write; reg_write 64 drivers/nvmem/mtk-efuse.c econfig.reg_write = mtk_reg_write; reg_write 96 drivers/nvmem/nvmem-sysfs.c if (!nvmem->reg_write) reg_write 99 drivers/nvmem/nvmem-sysfs.c rc = nvmem->reg_write(nvmem->priv, pos, buf, count); reg_write 28 drivers/nvmem/nvmem.h nvmem_reg_write_t reg_write; reg_write 333 drivers/nvmem/rave-sp-eeprom.c config.reg_write = rave_sp_eeprom_reg_write; reg_write 129 drivers/nvmem/snvs_lpgpr.c cfg->reg_write = snvs_lpgpr_write; reg_write 171 drivers/nvmem/stm32-romem.c priv->cfg.reg_write = stm32_bsec_write; reg_write 189 drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c .reg_write = phy_g12a_usb3_pcie_cr_bus_write, reg_write 1089 drivers/pinctrl/pinctrl-sx150x.c .reg_write = sx150x_regmap_reg_write, reg_write 1789 drivers/platform/x86/mlx-platform.c .reg_write = mlxplat_mlxcpld_reg_write, reg_write 1803 drivers/platform/x86/mlx-platform.c .reg_write = mlxplat_mlxcpld_reg_write, reg_write 718 drivers/rtc/rtc-cmos.c .reg_write = cmos_nvram_write, reg_write 561 drivers/rtc/rtc-ds1305.c .reg_write = ds1305_nvram_write, reg_write 1849 drivers/rtc/rtc-ds1307.c .reg_write = ds1307_nvram_write, reg_write 476 drivers/rtc/rtc-ds1343.c .reg_write = ds1343_nvram_write, reg_write 426 drivers/rtc/rtc-ds1511.c .reg_write = ds1511_nvram_write, reg_write 263 drivers/rtc/rtc-ds1553.c .reg_write = ds1553_nvram_write, reg_write 1053 drivers/rtc/rtc-ds1685.c .reg_write = ds1685_nvram_write, reg_write 153 drivers/rtc/rtc-ds1742.c .reg_write = ds1742_nvram_write, reg_write 493 drivers/rtc/rtc-ds3232.c .reg_write = ds3232_nvmem_write, reg_write 443 drivers/rtc/rtc-isl12026.c .reg_write = isl12026_nvm_write, reg_write 778 drivers/rtc/rtc-isl1208.c .reg_write = isl1208_nvmem_write, reg_write 375 drivers/rtc/rtc-m48t59.c .reg_write = m48t59_nvram_write, reg_write 230 drivers/rtc/rtc-m48t86.c .reg_write = m48t86_nvram_write, reg_write 199 drivers/rtc/rtc-meson.c .reg_write = meson_rtc_serial_bus_reg_write, reg_write 291 drivers/rtc/rtc-meson.c .reg_write = meson_rtc_regmem_write, reg_write 724 drivers/rtc/rtc-omap.c .reg_write = omap_rtc_scratch_write, reg_write 452 drivers/rtc/rtc-pcf2127.c .reg_write = pcf2127_nvmem_write, reg_write 409 drivers/rtc/rtc-pcf85063.c .reg_write = pcf85063_nvmem_write, reg_write 371 drivers/rtc/rtc-pcf85363.c .reg_write = pcf85x63_nvram_write, reg_write 378 drivers/rtc/rtc-pcf85363.c .reg_write = pcf85363_nvram_write, reg_write 230 drivers/rtc/rtc-rp5c01.c .reg_write = rp5c01_nvram_write, reg_write 610 drivers/rtc/rtc-rv3028.c .reg_write = rv3028_nvram_write, reg_write 619 drivers/rtc/rtc-rv3028.c .reg_write = rv3028_eeprom_write, reg_write 529 drivers/rtc/rtc-rv8803.c .reg_write = rv8803_nvram_write, reg_write 264 drivers/rtc/rtc-rx8581.c .reg_write = rx85x1_nvram_write, reg_write 271 drivers/rtc/rtc-rx8581.c .reg_write = rx8571_nvram_write, reg_write 271 drivers/rtc/rtc-stk17ta8.c .reg_write = stk17ta8_nvram_write, reg_write 245 drivers/rtc/rtc-tx4939.c .reg_write = tx4939_nvram_write, reg_write 1664 drivers/soc/mediatek/mtk-pmic-wrap.c .reg_write = pwrap_regmap_write, reg_write 1673 drivers/soc/mediatek/mtk-pmic-wrap.c .reg_write = pwrap_regmap_write, reg_write 246 drivers/staging/media/soc_camera/imx074.c return reg_write(client, MODE_SELECT, !!enable); reg_write 322 drivers/staging/media/soc_camera/imx074.c reg_write(client, PLL_MULTIPLIER, 0x2D); reg_write 323 drivers/staging/media/soc_camera/imx074.c reg_write(client, PRE_PLL_CLK_DIV, 0x02); reg_write 324 drivers/staging/media/soc_camera/imx074.c reg_write(client, PLSTATIM, 0x4B); reg_write 327 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3024, 0x00); reg_write 329 drivers/staging/media/soc_camera/imx074.c reg_write(client, IMAGE_ORIENTATION, 0x00); reg_write 336 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x0112, 0x08); reg_write 337 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x0113, 0x08); reg_write 340 drivers/staging/media/soc_camera/imx074.c reg_write(client, VNDMY_ABLMGSHLMT, 0x80); reg_write 341 drivers/staging/media/soc_camera/imx074.c reg_write(client, Y_OPBADDR_START_DI, 0x08); reg_write 342 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3015, 0x37); reg_write 343 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x301C, 0x01); reg_write 344 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x302C, 0x05); reg_write 345 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3031, 0x26); reg_write 346 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3041, 0x60); reg_write 347 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3051, 0x24); reg_write 348 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3053, 0x34); reg_write 349 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3057, 0xC0); reg_write 350 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x305C, 0x09); reg_write 351 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x305D, 0x07); reg_write 352 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3060, 0x30); reg_write 353 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3065, 0x00); reg_write 354 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x30AA, 0x08); reg_write 355 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x30AB, 0x1C); reg_write 356 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x30B0, 0x32); reg_write 357 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x30B2, 0x83); reg_write 358 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x30D3, 0x04); reg_write 359 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3106, 0x78); reg_write 360 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x310C, 0x82); reg_write 361 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3304, 0x05); reg_write 362 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3305, 0x04); reg_write 363 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3306, 0x11); reg_write 364 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3307, 0x02); reg_write 365 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3308, 0x0C); reg_write 366 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3309, 0x06); reg_write 367 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x330A, 0x08); reg_write 368 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x330B, 0x04); reg_write 369 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x330C, 0x08); reg_write 370 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x330D, 0x06); reg_write 371 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x330E, 0x01); reg_write 372 drivers/staging/media/soc_camera/imx074.c reg_write(client, 0x3381, 0x00); reg_write 376 drivers/staging/media/soc_camera/imx074.c reg_write(client, FRAME_LENGTH_LINES_HI, 0x06); reg_write 377 drivers/staging/media/soc_camera/imx074.c reg_write(client, FRAME_LENGTH_LINES_LO, 0x48); reg_write 378 drivers/staging/media/soc_camera/imx074.c reg_write(client, YADDR_START, 0x00); reg_write 379 drivers/staging/media/soc_camera/imx074.c reg_write(client, YADDR_END, 0x2F); reg_write 381 drivers/staging/media/soc_camera/imx074.c reg_write(client, X_OUTPUT_SIZE_MSB, 0x08); reg_write 382 drivers/staging/media/soc_camera/imx074.c reg_write(client, X_OUTPUT_SIZE_LSB, 0x38); reg_write 384 drivers/staging/media/soc_camera/imx074.c reg_write(client, Y_OUTPUT_SIZE_MSB, 0x06); reg_write 385 drivers/staging/media/soc_camera/imx074.c reg_write(client, Y_OUTPUT_SIZE_LSB, 0x18); reg_write 386 drivers/staging/media/soc_camera/imx074.c reg_write(client, X_EVEN_INC, 0x01); reg_write 387 drivers/staging/media/soc_camera/imx074.c reg_write(client, X_ODD_INC, 0x03); reg_write 388 drivers/staging/media/soc_camera/imx074.c reg_write(client, Y_EVEN_INC, 0x01); reg_write 389 drivers/staging/media/soc_camera/imx074.c reg_write(client, Y_ODD_INC, 0x03); reg_write 390 drivers/staging/media/soc_camera/imx074.c reg_write(client, HMODEADD, 0x00); reg_write 391 drivers/staging/media/soc_camera/imx074.c reg_write(client, VMODEADD, 0x16); reg_write 392 drivers/staging/media/soc_camera/imx074.c reg_write(client, VAPPLINE_START, 0x24); reg_write 393 drivers/staging/media/soc_camera/imx074.c reg_write(client, VAPPLINE_END, 0x53); reg_write 394 drivers/staging/media/soc_camera/imx074.c reg_write(client, SHUTTER, 0x00); reg_write 395 drivers/staging/media/soc_camera/imx074.c reg_write(client, HADDAVE, 0x80); reg_write 397 drivers/staging/media/soc_camera/imx074.c reg_write(client, LANESEL, 0x00); reg_write 399 drivers/staging/media/soc_camera/imx074.c reg_write(client, GROUPED_PARAMETER_HOLD, 0x00); /* off */ reg_write 106 drivers/staging/media/soc_camera/mt9t031.c return reg_write(client, reg, ret | data); reg_write 117 drivers/staging/media/soc_camera/mt9t031.c return reg_write(client, reg, ret & ~data); reg_write 124 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_SHUTTER_WIDTH_UPPER, data >> 16); reg_write 127 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_SHUTTER_WIDTH, data & 0xffff); reg_write 151 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_RESET, 1); reg_write 153 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_RESET, 0); reg_write 245 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_HORIZONTAL_BLANKING, hblank); reg_write 247 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_VERTICAL_BLANKING, vblank); reg_write 252 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_COLUMN_ADDRESS_MODE, reg_write 255 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_ROW_ADDRESS_MODE, reg_write 266 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_COLUMN_START, rect->left); reg_write 268 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_ROW_START, rect->top); reg_write 270 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_WINDOW_WIDTH, rect->width - 1); reg_write 272 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_WINDOW_HEIGHT, reg_write 430 drivers/staging/media/soc_camera/mt9t031.c if (reg_write(client, reg->reg, reg->val) < 0) reg_write 490 drivers/staging/media/soc_camera/mt9t031.c data = reg_write(client, MT9T031_GLOBAL_GAIN, data); reg_write 511 drivers/staging/media/soc_camera/mt9t031.c data = reg_write(client, MT9T031_GLOBAL_GAIN, data); reg_write 572 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_COLUMN_ADDRESS_MODE, reg_write 577 drivers/staging/media/soc_camera/mt9t031.c ret = reg_write(client, MT9T031_ROW_ADDRESS_MODE, reg_write 188 drivers/staging/media/soc_camera/soc_mt9v022.c return reg_write(client, reg, ret | data); reg_write 199 drivers/staging/media/soc_camera/soc_mt9v022.c return reg_write(client, reg, ret & ~data); reg_write 213 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); reg_write 215 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_READ_MODE, 0x300); reg_write 222 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_ANALOG_GAIN, 16); reg_write 224 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, 480); reg_write 226 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, mt9v022->reg->max_total_shutter_width, 480); reg_write 231 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_DIGITAL_TEST_PATTERN, 0); reg_write 270 drivers/staging/media/soc_camera/soc_mt9v022.c if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0) reg_write 306 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, mt9v022->reg->max_total_shutter_width, reg_write 319 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_COLUMN_START, rect.left); reg_write 321 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_ROW_START, rect.top); reg_write 340 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width); reg_write 342 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_WINDOW_HEIGHT, reg_write 507 drivers/staging/media/soc_camera/soc_mt9v022.c if (reg_write(client, reg->reg, reg->val) < 0) reg_write 616 drivers/staging/media/soc_camera/soc_mt9v022.c if (reg_write(client, MT9V022_ANALOG_GAIN, gain_val) < 0) reg_write 639 drivers/staging/media/soc_camera/soc_mt9v022.c if (reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, reg_write 645 drivers/staging/media/soc_camera/soc_mt9v022.c if (reg_write(client, MT9V022_HORIZONTAL_BLANKING, reg_write 650 drivers/staging/media/soc_camera/soc_mt9v022.c if (reg_write(client, MT9V022_VERTICAL_BLANKING, reg_write 691 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_RESET, 1); reg_write 706 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11); reg_write 710 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11); reg_write 839 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, mt9v022->reg->pixclk_fv_lv, pixclk); reg_write 846 drivers/staging/media/soc_camera/soc_mt9v022.c ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); reg_write 683 drivers/staging/media/soc_camera/soc_ov5642.c ret = reg_write(client, reg, val16 >> 8); reg_write 686 drivers/staging/media/soc_camera/soc_ov5642.c return reg_write(client, reg + 1, val16 & 0x00ff); reg_write 717 drivers/staging/media/soc_camera/soc_ov5642.c return reg_write(client, reg->reg, reg->val); reg_write 725 drivers/staging/media/soc_camera/soc_ov5642.c int ret = reg_write(client, vals->reg_num, vals->value); reg_write 329 drivers/thunderbolt/switch.c config.reg_write = tb_switch_nvm_write; reg_write 135 drivers/video/fbdev/w100fb.c static DEVICE_ATTR(reg_write, 0200, NULL, w100fb_reg_write); reg_write 106 drivers/watchdog/stm32_iwdg.c reg_write(wdt->regs, IWDG_KR, KR_KEY_EWA); reg_write 109 drivers/watchdog/stm32_iwdg.c reg_write(wdt->regs, IWDG_PR, iwdg_pr); reg_write 110 drivers/watchdog/stm32_iwdg.c reg_write(wdt->regs, IWDG_RLR, iwdg_rlr); reg_write 111 drivers/watchdog/stm32_iwdg.c reg_write(wdt->regs, IWDG_KR, KR_KEY_ENABLE); reg_write 123 drivers/watchdog/stm32_iwdg.c reg_write(wdt->regs, IWDG_KR, KR_KEY_RELOAD); reg_write 135 drivers/watchdog/stm32_iwdg.c reg_write(wdt->regs, IWDG_KR, KR_KEY_RELOAD); reg_write 27 include/linux/mfd/mcp.h void (*reg_write)(struct mcp *, unsigned int, unsigned int); reg_write 68 include/linux/nvmem-provider.h nvmem_reg_write_t reg_write; reg_write 373 include/linux/regmap.h int (*reg_write)(void *context, unsigned int reg, unsigned int val); reg_write 509 include/linux/regmap.h regmap_hw_reg_write reg_write; reg_write 355 sound/firewire/isight.c err = reg_write(isight, REG_SAMPLE_RATE, cpu_to_be32(RATE_48000)); reg_write 363 sound/firewire/isight.c err = reg_write(isight, REG_AUDIO_ENABLE, cpu_to_be32(AUDIO_ENABLE)); reg_write 401 sound/firewire/isight.c reg_write(isight, REG_AUDIO_ENABLE, 0); reg_write 510 sound/firewire/isight.c return reg_write(isight, REG_GAIN, reg_write 535 sound/firewire/isight.c return reg_write(isight, REG_MUTE, reg_write 363 sound/hda/hdac_regmap.c .reg_write = hda_reg_write, reg_write 106 sound/i2c/other/ak4113.c reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); reg_write 115 sound/i2c/other/ak4113.c reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN)); reg_write 118 sound/i2c/other/ak4113.c reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN); reg_write 121 sound/i2c/other/ak4113.c reg_write(chip, reg, chip->regmap[reg]); reg_write 123 sound/i2c/other/ak4113.c reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN); reg_write 242 sound/i2c/other/ak4113.c reg_write(chip, AK4113_REG_IO1, reg_write 116 sound/i2c/other/ak4114.c reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); reg_write 118 sound/i2c/other/ak4114.c reg_write(chip, reg, reg_write 128 sound/i2c/other/ak4114.c reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN)); reg_write 131 sound/i2c/other/ak4114.c reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN); reg_write 134 sound/i2c/other/ak4114.c reg_write(chip, reg, chip->regmap[reg]); reg_write 136 sound/i2c/other/ak4114.c reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]); reg_write 138 sound/i2c/other/ak4114.c reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN); reg_write 260 sound/i2c/other/ak4114.c reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]); reg_write 105 sound/i2c/other/ak4117.c reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); reg_write 115 sound/i2c/other/ak4117.c reg_write(chip, AK4117_REG_PWRDN, 0); reg_write 118 sound/i2c/other/ak4117.c reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN); reg_write 121 sound/i2c/other/ak4117.c reg_write(chip, reg, chip->regmap[reg]); reg_write 123 sound/i2c/other/ak4117.c reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN); reg_write 209 sound/i2c/other/ak4117.c reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0)); reg_write 456 sound/pci/ice1712/quartet.c reg_write(ice, GPIO_SCR, val); reg_write 463 sound/pci/ice1712/quartet.c reg_write(ice, GPIO_MCR, val); reg_write 470 sound/pci/ice1712/quartet.c reg_write(ice, GPIO_CPLD_CSN, val); reg_write 193 sound/soc/codecs/ab8500-codec.c .reg_write = ab8500_codec_write_reg, reg_write 781 sound/soc/codecs/adau1701.c .reg_write = adau1701_reg_write, reg_write 1614 sound/soc/codecs/cx2072x.c .reg_write = cx2072x_reg_write, reg_write 537 sound/soc/codecs/jz4725b.c .reg_write = jz4725b_codec_reg_write, reg_write 1087 sound/soc/codecs/rt274.c .reg_write = rl6347a_hw_write, reg_write 1068 sound/soc/codecs/rt286.c .reg_write = rl6347a_hw_write, reg_write 1135 sound/soc/codecs/rt298.c .reg_write = rl6347a_hw_write, reg_write 1197 sound/soc/codecs/rt5514.c .reg_write = rt5514_i2c_write, reg_write 4986 sound/soc/codecs/rt5677.c .reg_write = rt5677_write, reg_write 327 sound/soc/codecs/sti-sas.c .reg_write = sti_sas_write_reg, reg_write 911 sound/soc/codecs/tas5086.c .reg_write = tas5086_reg_write, reg_write 429 sound/soc/codecs/tas571x.c .reg_write = tas571x_reg_write, reg_write 534 sound/soc/codecs/tas571x.c .reg_write = tas571x_reg_write, reg_write 641 sound/soc/codecs/tas571x.c .reg_write = tas571x_reg_write, reg_write 712 sound/soc/codecs/tas571x.c .reg_write = tas571x_reg_write, reg_write 540 sound/soc/codecs/uda134x.c .reg_write = uda134x_regmap_write, reg_write 87 sound/soc/sunxi/sun8i-adda-pr-regmap.c .reg_write = adda_reg_write,