reg_update_bits 105 drivers/base/regmap/internal.h int (*reg_update_bits)(void *context, unsigned int reg, reg_update_bits 835 drivers/base/regmap/regmap.c map->reg_update_bits = bus->reg_update_bits; reg_update_bits 2875 drivers/base/regmap/regmap.c if (regmap_volatile(map, reg) && map->reg_update_bits) { reg_update_bits 2876 drivers/base/regmap/regmap.c ret = map->reg_update_bits(map->bus_context, reg, mask, val); reg_update_bits 596 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_GCR, reg_update_bits 601 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_SSCR, SSCR_VSH | SSCR_HSW, val); reg_update_bits 605 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_BPCR, BPCR_AVBP | BPCR_AHBP, val); reg_update_bits 609 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_AWCR, AWCR_AAW | AWCR_AAH, val); reg_update_bits 613 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_TWCR, TWCR_TOTALH | TWCR_TOTALW, val); reg_update_bits 796 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1WHPCR + lofs, reg_update_bits 801 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1WVPCR + lofs, reg_update_bits 815 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1PFCR + lofs, LXPFCR_PF, val); reg_update_bits 822 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1CFBLR + lofs, reg_update_bits 827 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1CACR + lofs, LXCACR_CONSTA, val); reg_update_bits 839 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1BFCR + lofs, reg_update_bits 844 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1CFBLNR + lofs, LXCFBLNR_CFBLN, val); reg_update_bits 855 drivers/gpu/drm/stm/ltdc.c reg_update_bits(ldev->regs, LTDC_L1CR + lofs, reg_update_bits 485 drivers/net/ethernet/microchip/encx24j600-regmap.c .reg_update_bits = regmap_encx24j600_reg_update_bits, reg_update_bits 510 include/linux/regmap.h regmap_hw_reg_update_bits reg_update_bits;