reg_data 291 arch/powerpc/platforms/powermac/low_i2c.c kw_write_reg(reg_data, *(host->data++)); reg_data 300 arch/powerpc/platforms/powermac/low_i2c.c *(host->data++) = kw_read_reg(reg_data); reg_data 314 arch/powerpc/platforms/powermac/low_i2c.c kw_write_reg(reg_data, *(host->data++)); reg_data 359 drivers/char/xilinx_hwicap/fifo_icap.c u32 reg_data; reg_data 364 drivers/char/xilinx_hwicap/fifo_icap.c reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET); reg_data 367 drivers/char/xilinx_hwicap/fifo_icap.c reg_data | XHI_CR_SW_RESET_MASK); reg_data 370 drivers/char/xilinx_hwicap/fifo_icap.c reg_data & (~XHI_CR_SW_RESET_MASK)); reg_data 380 drivers/char/xilinx_hwicap/fifo_icap.c u32 reg_data; reg_data 385 drivers/char/xilinx_hwicap/fifo_icap.c reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET); reg_data 388 drivers/char/xilinx_hwicap/fifo_icap.c reg_data | XHI_CR_FIFO_CLR_MASK); reg_data 391 drivers/char/xilinx_hwicap/fifo_icap.c reg_data & (~XHI_CR_FIFO_CLR_MASK)); reg_data 265 drivers/char/xilinx_hwicap/xilinx_hwicap.c u32 reg, u32 *reg_data) reg_data 311 drivers/char/xilinx_hwicap/xilinx_hwicap.c status = drvdata->config->get_configuration(drvdata, reg_data, 1); reg_data 529 drivers/clk/clk-cdce925.c u8 reg_data[2]; reg_data 535 drivers/clk/clk-cdce925.c reg_data[0] = CDCE925_I2C_COMMAND_BYTE_TRANSFER | ((u8 *)data)[0]; reg_data 536 drivers/clk/clk-cdce925.c reg_data[1] = ((u8 *)data)[1]; reg_data 539 drivers/clk/clk-cdce925.c reg_data[0], reg_data[1]); reg_data 541 drivers/clk/clk-cdce925.c ret = i2c_master_send(i2c, reg_data, count); reg_data 557 drivers/clk/clk-cdce925.c u8 reg_data[2]; reg_data 564 drivers/clk/clk-cdce925.c xfer[0].buf = reg_data; reg_data 566 drivers/clk/clk-cdce925.c reg_data[0] = reg_data 570 drivers/clk/clk-cdce925.c reg_data[0] = reg_data 572 drivers/clk/clk-cdce925.c reg_data[1] = val_size; reg_data 584 drivers/clk/clk-cdce925.c reg_size, val_size, reg_data[0], *((u8 *)val)); reg_data 63 drivers/clk/rockchip/clk-cpu.c const struct rockchip_cpuclk_reg_data *reg_data; reg_data 90 drivers/clk/rockchip/clk-cpu.c const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; reg_data 91 drivers/clk/rockchip/clk-cpu.c u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg); reg_data 93 drivers/clk/rockchip/clk-cpu.c clksel0 >>= reg_data->div_core_shift; reg_data 94 drivers/clk/rockchip/clk-cpu.c clksel0 &= reg_data->div_core_mask; reg_data 123 drivers/clk/rockchip/clk-cpu.c const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; reg_data 149 drivers/clk/rockchip/clk-cpu.c if (alt_div > reg_data->div_core_mask) { reg_data 151 drivers/clk/rockchip/clk-cpu.c __func__, alt_div, reg_data->div_core_mask); reg_data 152 drivers/clk/rockchip/clk-cpu.c alt_div = reg_data->div_core_mask; reg_data 165 drivers/clk/rockchip/clk-cpu.c writel(HIWORD_UPDATE(alt_div, reg_data->div_core_mask, reg_data 166 drivers/clk/rockchip/clk-cpu.c reg_data->div_core_shift) | reg_data 167 drivers/clk/rockchip/clk-cpu.c HIWORD_UPDATE(reg_data->mux_core_alt, reg_data 168 drivers/clk/rockchip/clk-cpu.c reg_data->mux_core_mask, reg_data 169 drivers/clk/rockchip/clk-cpu.c reg_data->mux_core_shift), reg_data 170 drivers/clk/rockchip/clk-cpu.c cpuclk->reg_base + reg_data->core_reg); reg_data 173 drivers/clk/rockchip/clk-cpu.c writel(HIWORD_UPDATE(reg_data->mux_core_alt, reg_data 174 drivers/clk/rockchip/clk-cpu.c reg_data->mux_core_mask, reg_data 175 drivers/clk/rockchip/clk-cpu.c reg_data->mux_core_shift), reg_data 176 drivers/clk/rockchip/clk-cpu.c cpuclk->reg_base + reg_data->core_reg); reg_data 186 drivers/clk/rockchip/clk-cpu.c const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; reg_data 209 drivers/clk/rockchip/clk-cpu.c writel(HIWORD_UPDATE(0, reg_data->div_core_mask, reg_data 210 drivers/clk/rockchip/clk-cpu.c reg_data->div_core_shift) | reg_data 211 drivers/clk/rockchip/clk-cpu.c HIWORD_UPDATE(reg_data->mux_core_main, reg_data 212 drivers/clk/rockchip/clk-cpu.c reg_data->mux_core_mask, reg_data 213 drivers/clk/rockchip/clk-cpu.c reg_data->mux_core_shift), reg_data 214 drivers/clk/rockchip/clk-cpu.c cpuclk->reg_base + reg_data->core_reg); reg_data 248 drivers/clk/rockchip/clk-cpu.c const struct rockchip_cpuclk_reg_data *reg_data, reg_data 267 drivers/clk/rockchip/clk-cpu.c init.parent_names = &parent_names[reg_data->mux_core_main]; reg_data 281 drivers/clk/rockchip/clk-cpu.c cpuclk->reg_data = reg_data; reg_data 285 drivers/clk/rockchip/clk-cpu.c cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]); reg_data 288 drivers/clk/rockchip/clk-cpu.c __func__, reg_data->mux_core_alt); reg_data 300 drivers/clk/rockchip/clk-cpu.c clk = __clk_lookup(parent_names[reg_data->mux_core_main]); reg_data 303 drivers/clk/rockchip/clk-cpu.c __func__, reg_data->mux_core_main, reg_data 304 drivers/clk/rockchip/clk-cpu.c parent_names[reg_data->mux_core_main]); reg_data 574 drivers/clk/rockchip/clk.c const struct rockchip_cpuclk_reg_data *reg_data, reg_data 581 drivers/clk/rockchip/clk.c reg_data, rates, nrates, reg_data 353 drivers/clk/rockchip/clk.h const struct rockchip_cpuclk_reg_data *reg_data, reg_data 846 drivers/clk/rockchip/clk.h const struct rockchip_cpuclk_reg_data *reg_data, reg_data 444 drivers/clk/ti/clkctrl.c const struct omap_clkctrl_reg_data *reg_data; reg_data 577 drivers/clk/ti/clkctrl.c reg_data = data->regs; reg_data 579 drivers/clk/ti/clkctrl.c while (reg_data->parent) { reg_data 580 drivers/clk/ti/clkctrl.c if ((reg_data->flags & CLKF_SOC_MASK) && reg_data 581 drivers/clk/ti/clkctrl.c (reg_data->flags & soc_mask) == 0) { reg_data 582 drivers/clk/ti/clkctrl.c reg_data++; reg_data 590 drivers/clk/ti/clkctrl.c hw->enable_reg.ptr = provider->base + reg_data->offset; reg_data 592 drivers/clk/ti/clkctrl.c _ti_clkctrl_setup_subclks(provider, node, reg_data, reg_data 595 drivers/clk/ti/clkctrl.c if (reg_data->flags & CLKF_SW_SUP) reg_data 597 drivers/clk/ti/clkctrl.c if (reg_data->flags & CLKF_HW_SUP) reg_data 599 drivers/clk/ti/clkctrl.c if (reg_data->flags & CLKF_NO_IDLEST) reg_data 602 drivers/clk/ti/clkctrl.c if (reg_data->clkdm_name) reg_data 603 drivers/clk/ti/clkctrl.c hw->clkdm_name = reg_data->clkdm_name; reg_data 607 drivers/clk/ti/clkctrl.c init.parent_names = ®_data->parent; reg_data 610 drivers/clk/ti/clkctrl.c if (reg_data->flags & CLKF_SET_RATE_PARENT) reg_data 615 drivers/clk/ti/clkctrl.c reg_data->offset, 0); reg_data 618 drivers/clk/ti/clkctrl.c node, reg_data->offset, 0); reg_data 630 drivers/clk/ti/clkctrl.c clkctrl_clk->reg_offset = reg_data->offset; reg_data 635 drivers/clk/ti/clkctrl.c reg_data++; reg_data 210 drivers/edac/qcom_edac.c struct llcc_edac_reg_data reg_data = edac_reg_data[err_type]; reg_data 214 drivers/edac/qcom_edac.c for (i = 0; i < reg_data.reg_cnt; i++) { reg_data 215 drivers/edac/qcom_edac.c synd_reg = reg_data.synd_reg + (i * 4); reg_data 222 drivers/edac/qcom_edac.c reg_data.name, i, synd_val); reg_data 226 drivers/edac/qcom_edac.c drv->offsets[bank] + reg_data.count_status_reg, reg_data 231 drivers/edac/qcom_edac.c err_cnt &= reg_data.count_mask; reg_data 232 drivers/edac/qcom_edac.c err_cnt >>= reg_data.count_shift; reg_data 234 drivers/edac/qcom_edac.c reg_data.name, err_cnt); reg_data 237 drivers/edac/qcom_edac.c drv->offsets[bank] + reg_data.ways_status_reg, reg_data 242 drivers/edac/qcom_edac.c err_ways &= reg_data.ways_mask; reg_data 243 drivers/edac/qcom_edac.c err_ways >>= reg_data.ways_shift; reg_data 246 drivers/edac/qcom_edac.c reg_data.name, err_ways); reg_data 91 drivers/extcon/extcon-ptn5150.c unsigned int reg_data; reg_data 99 drivers/extcon/extcon-ptn5150.c ret = regmap_read(info->regmap, PTN5150_REG_CC_STATUS, ®_data); reg_data 122 drivers/extcon/extcon-ptn5150.c port_status = ((reg_data & reg_data 137 drivers/extcon/extcon-ptn5150.c vbus = ((reg_data & reg_data 188 drivers/extcon/extcon-ptn5150.c unsigned int reg_data, vendor_id, version_id; reg_data 191 drivers/extcon/extcon-ptn5150.c ret = regmap_read(info->regmap, PTN5150_REG_DEVICE_ID, ®_data); reg_data 197 drivers/extcon/extcon-ptn5150.c vendor_id = ((reg_data & PTN5150_REG_DEVICE_ID_VENDOR_MASK) >> reg_data 199 drivers/extcon/extcon-ptn5150.c version_id = ((reg_data & PTN5150_REG_DEVICE_ID_VERSION_MASK) >> reg_data 206 drivers/extcon/extcon-ptn5150.c ret = regmap_read(info->regmap, PTN5150_REG_INT_STATUS, ®_data); reg_data 214 drivers/extcon/extcon-ptn5150.c ret = regmap_read(info->regmap, PTN5150_REG_INT_REG_STATUS, ®_data); reg_data 55 drivers/extcon/extcon-rt8973a.c struct reg_data *reg_data; reg_data 71 drivers/extcon/extcon-rt8973a.c static struct reg_data rt8973a_reg_data[] = { reg_data 524 drivers/extcon/extcon-rt8973a.c u8 reg = info->reg_data[i].reg; reg_data 525 drivers/extcon/extcon-rt8973a.c u8 mask = info->reg_data[i].mask; reg_data 528 drivers/extcon/extcon-rt8973a.c if (info->reg_data[i].invert) reg_data 529 drivers/extcon/extcon-rt8973a.c val = ~info->reg_data[i].val; reg_data 531 drivers/extcon/extcon-rt8973a.c val = info->reg_data[i].val; reg_data 572 drivers/extcon/extcon-rt8973a.c info->reg_data = rt8973a_reg_data; reg_data 51 drivers/extcon/extcon-sm5502.c struct reg_data *reg_data; reg_data 66 drivers/extcon/extcon-sm5502.c static struct reg_data sm5502_reg_data[] = { reg_data 517 drivers/extcon/extcon-sm5502.c unsigned int reg_data, vendor_id, version_id; reg_data 521 drivers/extcon/extcon-sm5502.c ret = regmap_read(info->regmap, SM5502_REG_DEVICE_ID, ®_data); reg_data 528 drivers/extcon/extcon-sm5502.c vendor_id = ((reg_data & SM5502_REG_DEVICE_ID_VENDOR_MASK) >> reg_data 530 drivers/extcon/extcon-sm5502.c version_id = ((reg_data & SM5502_REG_DEVICE_ID_VERSION_MASK) >> reg_data 540 drivers/extcon/extcon-sm5502.c if (!info->reg_data[i].invert) reg_data 541 drivers/extcon/extcon-sm5502.c val |= ~info->reg_data[i].val; reg_data 543 drivers/extcon/extcon-sm5502.c val = info->reg_data[i].val; reg_data 544 drivers/extcon/extcon-sm5502.c regmap_write(info->regmap, info->reg_data[i].reg, val); reg_data 568 drivers/extcon/extcon-sm5502.c info->reg_data = sm5502_reg_data; reg_data 1594 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ATOM_MEMORY_SETTING_DATA_BLOCK *reg_data = reg_data 1615 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c while ((le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) && reg_data 1617 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c t_mem_id = (u8)((le32_to_cpu(*(u32 *)reg_data) & MEM_ID_MASK) reg_data 1621 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (u32)((le32_to_cpu(*(u32 *)reg_data) & CLOCK_RANGE_MASK) reg_data 1626 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (u32)le32_to_cpu(*((u32 *)reg_data + j)); reg_data 1635 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *) reg_data 1636 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); reg_data 1638 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) reg_data 635 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c uint32_t reg_data = 0; reg_data 639 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data = 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; reg_data 641 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data = 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; reg_data 642 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data |= 1 << JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT; reg_data 643 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data |= 4 << JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT; reg_data 644 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15_DPG_MODE(UVD, 0, mmJPEG_CGC_CTRL, reg_data, 0xFFFFFFFF, sram_sel); reg_data 650 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; reg_data 652 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; reg_data 653 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT; reg_data 654 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; reg_data 655 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | reg_data 675 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_CGC_CTRL, reg_data, 0xFFFFFFFF, sram_sel); reg_data 1230 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c uint32_t reg_data = 0; reg_data 1240 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) & reg_data 1246 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (!(reg_data & UVD_DPG_PAUSE__JPEG_PAUSE_DPG_ACK_MASK)) reg_data 1253 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK; reg_data 1254 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); reg_data 1283 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK; reg_data 1284 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); reg_data 1295 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) & reg_data 1301 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (!(reg_data & UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK)) reg_data 1313 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data |= UVD_DPG_PAUSE__JPEG_PAUSE_DPG_REQ_MASK; reg_data 1314 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); reg_data 1343 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c reg_data &= ~UVD_DPG_PAUSE__JPEG_PAUSE_DPG_REQ_MASK; reg_data 1344 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); reg_data 614 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c uint32_t reg_data = 0; reg_data 618 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; reg_data 620 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; reg_data 621 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT; reg_data 622 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; reg_data 623 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | reg_data 644 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c UVD, 0, mmUVD_CGC_CTRL), reg_data, sram_sel, indirect); reg_data 1335 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c uint32_t reg_data = 0; reg_data 1342 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) & reg_data 1352 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK; reg_data 1353 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); reg_data 1384 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK; reg_data 1385 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); reg_data 430 drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c packets_vec[0].reg_data[0] = cntl.u32All; reg_data 440 drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c packets_vec[1].reg_data[0] = addrHi.u32All; reg_data 450 drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c packets_vec[2].reg_data[0] = addrLo.u32All; reg_data 466 drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c packets_vec[3].reg_data[0] = cntl.u32All; reg_data 656 drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c packets_vec[0].reg_data[0] = reg_gfx_index.u32All; reg_data 665 drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c packets_vec[1].reg_data[0] = reg_sq_cmd.u32All; reg_data 680 drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c packets_vec[2].reg_data[0] = reg_gfx_index.u32All; reg_data 199 drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_diq.h unsigned int reg_data[1]; /*1..N of these fields */ reg_data 59 drivers/gpu/drm/amd/display/dc/dce/dce_audio.c uint32_t reg_data) reg_data 69 drivers/gpu/drm/amd/display/dc/dce/dce_audio.c AZALIA_ENDPOINT_REG_DATA, reg_data); reg_data 72 drivers/gpu/drm/amd/display/dc/dce/dce_audio.c reg_index, reg_data); reg_data 248 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c uint32_t reg_data; reg_data 250 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL); reg_data 251 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c set_reg_field_value(reg_data, 0, FBC_CNTL, FBC_GRPH_COMP_EN); reg_data 252 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data); reg_data 636 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c uint32_t reg_data = 0; reg_data 661 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c reg_data, reg_data 667 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c reg_data, reg_data 672 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c dm_write_reg(xfm->ctx, mmLBV_DATA_FORMAT, reg_data); reg_data 423 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c uint32_t reg_data; reg_data 425 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL); reg_data 426 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c set_reg_field_value(reg_data, 0, FBC_CNTL, FBC_GRPH_COMP_EN); reg_data 427 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data); reg_data 115 drivers/gpu/drm/amd/display/modules/stats/stats.c unsigned int reg_data; reg_data 131 drivers/gpu/drm/amd/display/modules/stats/stats.c ®_data, sizeof(unsigned int), &flag)) reg_data 132 drivers/gpu/drm/amd/display/modules/stats/stats.c core_stats->enabled = reg_data; reg_data 138 drivers/gpu/drm/amd/display/modules/stats/stats.c ®_data, sizeof(unsigned int), &flag)) { reg_data 139 drivers/gpu/drm/amd/display/modules/stats/stats.c if (reg_data > DAL_STATS_ENTRIES_REGKEY_MAX) reg_data 142 drivers/gpu/drm/amd/display/modules/stats/stats.c core_stats->entries = reg_data; reg_data 54 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c ATOM_MEMORY_SETTING_DATA_BLOCK *reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *) reg_data 59 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c while (*(uint32_t *)reg_data != END_OF_REG_DATA_BLOCK && reg_data 61 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c tmem_id = (uint8_t)((*(uint32_t *)reg_data & MEM_ID_MASK) >> MEM_ID_SHIFT); reg_data 65 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c (uint32_t)((*(uint32_t *)reg_data & CLOCK_RANGE_MASK) >> reg_data 72 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c (uint32_t)*((uint32_t *)reg_data + j); reg_data 83 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *) reg_data 84 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c ((uint8_t *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)) ; reg_data 87 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c PP_ASSERT_WITH_CODE((*(uint32_t *)reg_data == END_OF_REG_DATA_BLOCK), reg_data 176 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c uint32_t reg_data; reg_data 208 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c reg_data = lower_32_bits(info.mc_addr) & reg_data 210 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data); reg_data 212 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c reg_data = upper_32_bits(info.mc_addr) & reg_data 214 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_HI, reg_data); reg_data 292 drivers/gpu/drm/i915/gvt/edid.c u32 reg_data = 0; reg_data 305 drivers/gpu/drm/i915/gvt/edid.c reg_data |= (byte_data << (i << 3)); reg_data 308 drivers/gpu/drm/i915/gvt/edid.c memcpy(&vgpu_vreg(vgpu, offset), ®_data, byte_count); reg_data 995 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c struct hdmi_hdcp_reg_data reg_data[] = { reg_data 1003 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c u32 size = ARRAY_SIZE(reg_data); reg_data 1004 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c u32 reg[ARRAY_SIZE(reg_data)]; reg_data 1005 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c u32 data[ARRAY_SIZE(reg_data)]; reg_data 1009 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c rd = ®_data[i]; reg_data 1018 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c reg[i] = reg_data[i].reg_id; reg_data 4012 drivers/gpu/drm/radeon/radeon_atombios.c ATOM_MEMORY_SETTING_DATA_BLOCK *reg_data = reg_data 4033 drivers/gpu/drm/radeon/radeon_atombios.c while ((le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) && reg_data 4035 drivers/gpu/drm/radeon/radeon_atombios.c t_mem_id = (u8)((le32_to_cpu(*(u32 *)reg_data) & MEM_ID_MASK) reg_data 4039 drivers/gpu/drm/radeon/radeon_atombios.c (u32)((le32_to_cpu(*(u32 *)reg_data) & CLOCK_RANGE_MASK) reg_data 4044 drivers/gpu/drm/radeon/radeon_atombios.c (u32)le32_to_cpu(*((u32 *)reg_data + j)); reg_data 4053 drivers/gpu/drm/radeon/radeon_atombios.c reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *) reg_data 4054 drivers/gpu/drm/radeon/radeon_atombios.c ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); reg_data 4056 drivers/gpu/drm/radeon/radeon_atombios.c if (le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) reg_data 141 drivers/iio/dummy/iio_dummy_evgen.c iio_evgen->regs[this_attr->address].reg_data = event; reg_data 7 drivers/iio/dummy/iio_dummy_evgen.h u32 reg_data; reg_data 179 drivers/iio/dummy/iio_simple_dummy_events.c st->regs->reg_id, st->regs->reg_data); reg_data 181 drivers/iio/dummy/iio_simple_dummy_events.c switch (st->regs->reg_data) { reg_data 1335 drivers/input/misc/ims-pcu.c static DEVICE_ATTR(reg_data, S_IRUGO | S_IWUSR, reg_data 409 drivers/input/mouse/cyapa.h int cyapa_pip_state_parse(struct cyapa *cyapa, u8 *reg_data, int len); reg_data 334 drivers/input/mouse/cyapa_gen3.c static int cyapa_gen3_state_parse(struct cyapa *cyapa, u8 *reg_data, int len) reg_data 339 drivers/input/mouse/cyapa_gen3.c if (reg_data[REG_BL_FILE] == BL_FILE && reg_data 340 drivers/input/mouse/cyapa_gen3.c reg_data[REG_BL_ERROR] == BL_ERROR_NO_ERR_IDLE && reg_data 341 drivers/input/mouse/cyapa_gen3.c (reg_data[REG_BL_STATUS] == reg_data 343 drivers/input/mouse/cyapa_gen3.c reg_data[REG_BL_STATUS] == BL_STATUS_RUNNING)) { reg_data 351 drivers/input/mouse/cyapa_gen3.c } else if (reg_data[REG_BL_FILE] == BL_FILE && reg_data 352 drivers/input/mouse/cyapa_gen3.c (reg_data[REG_BL_STATUS] & BL_STATUS_RUNNING) == reg_data 355 drivers/input/mouse/cyapa_gen3.c if (reg_data[REG_BL_STATUS] & BL_STATUS_BUSY) { reg_data 358 drivers/input/mouse/cyapa_gen3.c if ((reg_data[REG_BL_ERROR] & BL_ERROR_BOOTLOADING) == reg_data 364 drivers/input/mouse/cyapa_gen3.c } else if ((reg_data[REG_OP_STATUS] & OP_STATUS_SRC) && reg_data 365 drivers/input/mouse/cyapa_gen3.c (reg_data[REG_OP_DATA1] & OP_DATA_VALID)) { reg_data 371 drivers/input/mouse/cyapa_gen3.c if (GEN3_FINGER_NUM(reg_data[REG_OP_DATA1]) <= reg_data 377 drivers/input/mouse/cyapa_gen3.c } else if (reg_data[REG_OP_STATUS] == 0x0C && reg_data 378 drivers/input/mouse/cyapa_gen3.c reg_data[REG_OP_DATA1] == 0x08) { reg_data 382 drivers/input/mouse/cyapa_gen3.c } else if (reg_data[REG_BL_STATUS] & reg_data 833 drivers/input/mouse/cyapa_gen5.c static int gen5_hid_description_header_parse(struct cyapa *cyapa, u8 *reg_data) reg_data 854 drivers/input/mouse/cyapa_gen5.c if (reg_data[PIP_RESP_REPORT_ID_OFFSET] == reg_data 891 drivers/input/mouse/cyapa_gen5.c static int gen5_report_data_header_parse(struct cyapa *cyapa, u8 *reg_data) reg_data 895 drivers/input/mouse/cyapa_gen5.c length = get_unaligned_le16(®_data[PIP_RESP_LENGTH_OFFSET]); reg_data 896 drivers/input/mouse/cyapa_gen5.c switch (reg_data[PIP_RESP_REPORT_ID_OFFSET]) { reg_data 922 drivers/input/mouse/cyapa_gen5.c static int gen5_cmd_resp_header_parse(struct cyapa *cyapa, u8 *reg_data) reg_data 933 drivers/input/mouse/cyapa_gen5.c length = get_unaligned_le16(®_data[PIP_RESP_LENGTH_OFFSET]); reg_data 940 drivers/input/mouse/cyapa_gen5.c if (reg_data[PIP_RESP_REPORT_ID_OFFSET] == reg_data 976 drivers/input/mouse/cyapa_gen5.c static int cyapa_gen5_state_parse(struct cyapa *cyapa, u8 *reg_data, int len) reg_data 980 drivers/input/mouse/cyapa_gen5.c if (!reg_data || len < 3) reg_data 986 drivers/input/mouse/cyapa_gen5.c length = get_unaligned_le16(®_data[PIP_RESP_LENGTH_OFFSET]); reg_data 990 drivers/input/mouse/cyapa_gen5.c (reg_data[2] == PIP_HID_BL_REPORT_ID || reg_data 991 drivers/input/mouse/cyapa_gen5.c reg_data[2] == PIP_HID_APP_REPORT_ID)) { reg_data 992 drivers/input/mouse/cyapa_gen5.c gen5_hid_description_header_parse(cyapa, reg_data); reg_data 995 drivers/input/mouse/cyapa_gen5.c reg_data[2] == GEN5_APP_REPORT_DESCRIPTOR_ID) { reg_data 1000 drivers/input/mouse/cyapa_gen5.c reg_data[2] == GEN5_BL_REPORT_DESCRIPTOR_ID) { reg_data 1004 drivers/input/mouse/cyapa_gen5.c } else if (reg_data[2] == PIP_TOUCH_REPORT_ID || reg_data 1005 drivers/input/mouse/cyapa_gen5.c reg_data[2] == PIP_BTN_REPORT_ID || reg_data 1006 drivers/input/mouse/cyapa_gen5.c reg_data[2] == GEN5_OLD_PUSH_BTN_REPORT_ID || reg_data 1007 drivers/input/mouse/cyapa_gen5.c reg_data[2] == PIP_PUSH_BTN_REPORT_ID || reg_data 1008 drivers/input/mouse/cyapa_gen5.c reg_data[2] == PIP_WAKEUP_EVENT_REPORT_ID) { reg_data 1009 drivers/input/mouse/cyapa_gen5.c gen5_report_data_header_parse(cyapa, reg_data); reg_data 1010 drivers/input/mouse/cyapa_gen5.c } else if (reg_data[2] == PIP_BL_RESP_REPORT_ID || reg_data 1011 drivers/input/mouse/cyapa_gen5.c reg_data[2] == PIP_APP_RESP_REPORT_ID) { reg_data 1012 drivers/input/mouse/cyapa_gen5.c gen5_cmd_resp_header_parse(cyapa, reg_data); reg_data 136 drivers/input/mouse/cyapa_gen6.c int cyapa_pip_state_parse(struct cyapa *cyapa, u8 *reg_data, int len) reg_data 2481 drivers/media/dvb-frontends/drxk_hard.c u16 reg_data = 0; reg_data 2510 drivers/media/dvb-frontends/drxk_hard.c ®_data); reg_data 2514 drivers/media/dvb-frontends/drxk_hard.c eq_reg_td_sqr_err_i = (u32) reg_data; reg_data 2519 drivers/media/dvb-frontends/drxk_hard.c status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_Q__A, ®_data); reg_data 2523 drivers/media/dvb-frontends/drxk_hard.c eq_reg_td_sqr_err_q = (u32) reg_data; reg_data 526 drivers/media/dvb-frontends/mxl5xx.c u32 reg_data = 0; reg_data 533 drivers/media/dvb-frontends/mxl5xx.c ®_data); reg_data 538 drivers/media/dvb-frontends/mxl5xx.c p->cnr.stat[0].svalue = (s16)reg_data * 10; reg_data 604 drivers/media/dvb-frontends/mxl5xx.c u32 reg_data = 0; reg_data 610 drivers/media/dvb-frontends/mxl5xx.c ®_data); reg_data 615 drivers/media/dvb-frontends/mxl5xx.c p->strength.stat[0].svalue = (s16) reg_data * 10; /* fix scale */ reg_data 624 drivers/media/dvb-frontends/mxl5xx.c u32 reg_data = 0; reg_data 630 drivers/media/dvb-frontends/mxl5xx.c ®_data); reg_data 634 drivers/media/dvb-frontends/mxl5xx.c *status = (reg_data == 1) ? 0x1f : 0; reg_data 693 drivers/media/dvb-frontends/mxl5xx.c u32 reg_data[MXL_DEMOD_CHAN_PARAMS_BUFF_SIZE]; reg_data 702 drivers/media/dvb-frontends/mxl5xx.c (u8 *) ®_data[0]); reg_data 713 drivers/media/dvb-frontends/mxl5xx.c freq * 1000, reg_data[DMD_STANDARD_ADDR], reg_data 714 drivers/media/dvb-frontends/mxl5xx.c reg_data[DMD_SYMBOL_RATE_ADDR]); reg_data 715 drivers/media/dvb-frontends/mxl5xx.c p->symbol_rate = reg_data[DMD_SYMBOL_RATE_ADDR]; reg_data 726 drivers/media/dvb-frontends/mxl5xx.c p->fec_inner = conv_fec(reg_data[DMD_FEC_CODE_RATE_ADDR]); reg_data 732 drivers/media/dvb-frontends/mxl5xx.c reg_data[DMD_DVBS2_PILOT_ON_OFF_ADDR]) { reg_data 745 drivers/media/dvb-frontends/mxl5xx.c reg_data[DMD_MODULATION_SCHEME_ADDR]) { reg_data 756 drivers/media/dvb-frontends/mxl5xx.c reg_data[DMD_SPECTRUM_ROLL_OFF_ADDR]) { reg_data 970 drivers/media/dvb-frontends/mxl5xx.c u32 reg_data = 0; reg_data 1006 drivers/media/dvb-frontends/mxl5xx.c status = read_register(state, HYDRA_PRCM_ROOT_CLK_REG, ®_data); reg_data 119 drivers/media/dvb-frontends/stv0900_core.c u8 reg_data) reg_data 132 drivers/media/dvb-frontends/stv0900_core.c data[2] = reg_data; reg_data 340 drivers/media/dvb-frontends/stv0900_priv.h u16 reg_addr, u8 reg_data); reg_data 82 drivers/media/i2c/ov2680.c const struct reg_value *reg_data; reg_data 288 drivers/media/i2c/ov2680.c const struct reg_value *regs = mode->reg_data; reg_data 190 drivers/media/i2c/ov5640.c const struct reg_value *reg_data; reg_data 1099 drivers/media/i2c/ov5640.c const struct reg_value *regs = mode->reg_data; reg_data 1637 drivers/media/i2c/ov5640.c if (!mode->reg_data) reg_data 1789 drivers/media/i2c/ov5640.c if (!mode->reg_data) reg_data 484 drivers/media/tuners/xc5000.c u16 reg_data; reg_data 487 drivers/media/tuners/xc5000.c result = xc5000_readreg(priv, XREG_FREQ_ERROR, ®_data); reg_data 491 drivers/media/tuners/xc5000.c tmp = (u32)reg_data; reg_data 527 drivers/media/tuners/xc5000.c u16 reg_data; reg_data 530 drivers/media/tuners/xc5000.c result = xc5000_readreg(priv, XREG_HSYNC_FREQ, ®_data); reg_data 534 drivers/media/tuners/xc5000.c (*hsync_freq_hz) = ((reg_data & 0x0fff) * 763)/100; reg_data 165 drivers/media/usb/gspca/m5602/m5602_s5k83a.c static int s5k83a_get_rotation(struct sd *sd, u8 *reg_data); reg_data 532 drivers/media/usb/gspca/m5602/m5602_s5k83a.c static int s5k83a_get_rotation(struct sd *sd, u8 *reg_data) reg_data 534 drivers/media/usb/gspca/m5602/m5602_s5k83a.c int err = m5602_read_bridge(sd, M5602_XB_GPIO_DAT, reg_data); reg_data 535 drivers/media/usb/gspca/m5602/m5602_s5k83a.c *reg_data = (*reg_data & S5K83A_GPIO_ROTATION_MASK) ? 0 : 1; reg_data 67 drivers/mfd/da9150-core.c u8 *reg_data; reg_data 70 drivers/mfd/da9150-core.c reg_data = kzalloc(1 + count, GFP_KERNEL); reg_data 71 drivers/mfd/da9150-core.c if (!reg_data) reg_data 74 drivers/mfd/da9150-core.c reg_data[0] = addr; reg_data 75 drivers/mfd/da9150-core.c memcpy(®_data[1], buf, count); reg_data 81 drivers/mfd/da9150-core.c xfer.buf = reg_data; reg_data 84 drivers/mfd/da9150-core.c kfree(reg_data); reg_data 266 drivers/mfd/max14577.c u8 reg_data, vendor_id, device_id; reg_data 270 drivers/mfd/max14577.c ®_data); reg_data 277 drivers/mfd/max14577.c vendor_id = ((reg_data & DEVID_VENDORID_MASK) >> reg_data 279 drivers/mfd/max14577.c device_id = ((reg_data & DEVID_DEVICEID_MASK) >> reg_data 156 drivers/mfd/max77693.c unsigned int reg_data; reg_data 179 drivers/mfd/max77693.c ®_data); reg_data 184 drivers/mfd/max77693.c dev_info(max77693->dev, "device ID: 0x%x\n", reg_data); reg_data 100 drivers/mfd/max77843.c unsigned int reg_data; reg_data 129 drivers/mfd/max77843.c MAX77843_SYS_REG_PMICID, ®_data); reg_data 134 drivers/mfd/max77843.c dev_info(&i2c->dev, "device ID: 0x%x\n", reg_data); reg_data 26 drivers/mux/adgs1408.c u8 reg_addr, u8 reg_data) reg_data 31 drivers/mux/adgs1408.c tx_buf[1] = reg_data; reg_data 1587 drivers/net/ethernet/atheros/atl1c/atl1c_main.c u32 reg_data; reg_data 1590 drivers/net/ethernet/atheros/atl1c/atl1c_main.c AT_READ_REG(hw, REG_ISR, ®_data); reg_data 1591 drivers/net/ethernet/atheros/atl1c/atl1c_main.c status = reg_data & hw->intr_mask; reg_data 9361 drivers/net/ethernet/broadcom/bnxt/bnxt.c *val = le16_to_cpu(resp->reg_data); reg_data 9384 drivers/net/ethernet/broadcom/bnxt/bnxt.c req.reg_data = cpu_to_le16(val); reg_data 3285 drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h __le16 reg_data; reg_data 3322 drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h __le16 reg_data; reg_data 57 drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h u32 reg_data[SGE_QBASE_DATA_REG_NUM]; reg_data 1385 drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c *buff = t4_read_reg(padap, qbase->reg_data[i]); reg_data 1429 drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c sge_qbase->reg_data[i] = reg_data 5353 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c static void t4_tp_indirect_rw(struct adapter *adap, u32 reg_addr, u32 reg_data, reg_data 5382 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_read_indirect(adap, reg_addr, reg_data, buff, nregs, reg_data 5385 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_write_indirect(adap, reg_addr, reg_data, buff, nregs, reg_data 731 drivers/net/ethernet/intel/e1000e/80003es2lan.c u32 reg_data; reg_data 777 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = er32(TXDCTL(0)); reg_data 778 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | reg_data 780 drivers/net/ethernet/intel/e1000e/80003es2lan.c ew32(TXDCTL(0), reg_data); reg_data 783 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = er32(TXDCTL(1)); reg_data 784 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | reg_data 786 drivers/net/ethernet/intel/e1000e/80003es2lan.c ew32(TXDCTL(1), reg_data); reg_data 789 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = er32(TCTL); reg_data 790 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data |= E1000_TCTL_RTLC; reg_data 791 drivers/net/ethernet/intel/e1000e/80003es2lan.c ew32(TCTL, reg_data); reg_data 794 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = er32(TCTL_EXT); reg_data 795 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data &= ~E1000_TCTL_EXT_GCEX_MASK; reg_data 796 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data |= DEFAULT_TCTL_EXT_GCEX_80003ES2LAN; reg_data 797 drivers/net/ethernet/intel/e1000e/80003es2lan.c ew32(TCTL_EXT, reg_data); reg_data 800 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = er32(TIPG); reg_data 801 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data &= ~E1000_TIPG_IPGT_MASK; reg_data 802 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN; reg_data 803 drivers/net/ethernet/intel/e1000e/80003es2lan.c ew32(TIPG, reg_data); reg_data 805 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = E1000_READ_REG_ARRAY(hw, E1000_FFLT, 0x0001); reg_data 806 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data &= ~0x00100000; reg_data 807 drivers/net/ethernet/intel/e1000e/80003es2lan.c E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data); reg_data 1027 drivers/net/ethernet/intel/e1000e/80003es2lan.c u16 reg_data; reg_data 1043 drivers/net/ethernet/intel/e1000e/80003es2lan.c ®_data); reg_data 1046 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data |= 0x3F; reg_data 1048 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data); reg_data 1054 drivers/net/ethernet/intel/e1000e/80003es2lan.c ®_data); reg_data 1057 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data |= E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING; reg_data 1061 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data); reg_data 1114 drivers/net/ethernet/intel/e1000e/80003es2lan.c u16 reg_data, reg_data2; reg_data 1116 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT; reg_data 1120 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data); reg_data 1131 drivers/net/ethernet/intel/e1000e/80003es2lan.c ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, ®_data); reg_data 1139 drivers/net/ethernet/intel/e1000e/80003es2lan.c } while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY)); reg_data 1142 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data |= GG82563_KMCR_PASS_FALSE_CARRIER; reg_data 1144 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER; reg_data 1146 drivers/net/ethernet/intel/e1000e/80003es2lan.c return e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data); reg_data 1159 drivers/net/ethernet/intel/e1000e/80003es2lan.c u16 reg_data, reg_data2; reg_data 1163 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data = E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT; reg_data 1167 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data); reg_data 1178 drivers/net/ethernet/intel/e1000e/80003es2lan.c ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, ®_data); reg_data 1186 drivers/net/ethernet/intel/e1000e/80003es2lan.c } while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY)); reg_data 1188 drivers/net/ethernet/intel/e1000e/80003es2lan.c reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER; reg_data 1190 drivers/net/ethernet/intel/e1000e/80003es2lan.c return e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data); reg_data 1067 drivers/net/ethernet/intel/e1000e/82571.c u32 reg_data; reg_data 1101 drivers/net/ethernet/intel/e1000e/82571.c reg_data = er32(TXDCTL(0)); reg_data 1102 drivers/net/ethernet/intel/e1000e/82571.c reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | reg_data 1104 drivers/net/ethernet/intel/e1000e/82571.c ew32(TXDCTL(0), reg_data); reg_data 1113 drivers/net/ethernet/intel/e1000e/82571.c reg_data = er32(GCR); reg_data 1114 drivers/net/ethernet/intel/e1000e/82571.c reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX; reg_data 1115 drivers/net/ethernet/intel/e1000e/82571.c ew32(GCR, reg_data); reg_data 1118 drivers/net/ethernet/intel/e1000e/82571.c reg_data = er32(TXDCTL(1)); reg_data 1119 drivers/net/ethernet/intel/e1000e/82571.c reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | reg_data 1122 drivers/net/ethernet/intel/e1000e/82571.c ew32(TXDCTL(1), reg_data); reg_data 2069 drivers/net/ethernet/intel/e1000e/ich8lan.c u16 word_addr, reg_data, reg_addr, phy_page = 0; reg_data 2149 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1, ®_data); reg_data 2160 drivers/net/ethernet/intel/e1000e/ich8lan.c phy_page = reg_data; reg_data 2167 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy_locked(hw, (u32)reg_addr, reg_data); reg_data 4979 drivers/net/ethernet/intel/e1000e/ich8lan.c u16 reg_data; reg_data 4994 drivers/net/ethernet/intel/e1000e/ich8lan.c ®_data); reg_data 4997 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_data |= 0x3F; reg_data 4999 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_data); reg_data 5022 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, ®_data); reg_data 5026 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_data &= ~IFE_PMC_AUTO_MDIX; reg_data 5030 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_data &= ~IFE_PMC_FORCE_MDIX; reg_data 5033 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_data |= IFE_PMC_FORCE_MDIX; reg_data 5037 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_data |= IFE_PMC_AUTO_MDIX; reg_data 5040 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, reg_data); reg_data 5255 drivers/net/ethernet/intel/e1000e/ich8lan.c u16 reg_data; reg_data 5261 drivers/net/ethernet/intel/e1000e/ich8lan.c ®_data); reg_data 5264 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_data |= E1000_KMRNCTRLSTA_DIAG_NELPBK; reg_data 5266 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_data); reg_data 5269 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_data &= ~E1000_KMRNCTRLSTA_DIAG_NELPBK; reg_data 5270 drivers/net/ethernet/intel/e1000e/ich8lan.c e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET, reg_data); reg_data 2145 drivers/net/ethernet/intel/igb/igb_main.c u32 reg_data = rd32(E1000_CTRL_EXT); reg_data 2147 drivers/net/ethernet/intel/igb/igb_main.c reg_data |= E1000_CTRL_EXT_PFRSTD; reg_data 2148 drivers/net/ethernet/intel/igb/igb_main.c wr32(E1000_CTRL_EXT, reg_data); reg_data 3955 drivers/net/ethernet/intel/igb/igb_main.c u32 reg_data = rd32(E1000_CTRL_EXT); reg_data 3957 drivers/net/ethernet/intel/igb/igb_main.c reg_data |= E1000_CTRL_EXT_PFRSTD; reg_data 3958 drivers/net/ethernet/intel/igb/igb_main.c wr32(E1000_CTRL_EXT, reg_data); reg_data 1726 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c u32 rctl, reg_data; reg_data 1747 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); reg_data 1748 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data |= IXGBE_DMATXCTL_TE; reg_data 1749 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); reg_data 1790 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c u32 reg_data; reg_data 1794 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0); reg_data 1795 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data |= IXGBE_HLREG0_LPBK; reg_data 1796 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data); reg_data 1798 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL); reg_data 1799 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE; reg_data 1800 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data); reg_data 1808 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data = IXGBE_READ_REG(hw, IXGBE_MACC); reg_data 1809 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data |= IXGBE_MACC_FLU; reg_data 1810 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data); reg_data 1814 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU; reg_data 1815 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data); reg_data 1849 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c u32 reg_data; reg_data 1851 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0); reg_data 1852 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c reg_data &= ~IXGBE_HLREG0_LPBK; reg_data 1853 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data); reg_data 1806 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c u32 reg_data; reg_data 1812 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c reg_data = (mvpp2_read(port->priv, MVPP2_TXP_SCHED_Q_CMD_REG)) & reg_data 1814 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c if (reg_data != 0) reg_data 1816 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c (reg_data << MVPP2_TXP_SCHED_DISQ_OFFSET)); reg_data 1824 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c reg_data); reg_data 1833 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c reg_data = mvpp2_read(port->priv, MVPP2_TXP_SCHED_Q_CMD_REG); reg_data 1834 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c } while (reg_data & MVPP2_TXP_SCHED_ENQ_MASK); reg_data 2897 drivers/net/ethernet/mellanox/mlx4/fw.c u8 reg_data[MLX4_MAILBOX_SIZE-MLX4_ACCESS_REG_HEADER_SIZE]; reg_data 2914 drivers/net/ethernet/mellanox/mlx4/fw.c u16 reg_len, void *reg_data) reg_data 2938 drivers/net/ethernet/mellanox/mlx4/fw.c reg_len = min(reg_len, (u16)(sizeof(inbuf->reg_data))); reg_data 2943 drivers/net/ethernet/mellanox/mlx4/fw.c memcpy(inbuf->reg_data, reg_data, reg_len); reg_data 2958 drivers/net/ethernet/mellanox/mlx4/fw.c memcpy(reg_data, outbuf->reg_data, reg_len); reg_data 3006 drivers/net/ethernet/mellanox/mlx4/fw.c (struct mlx4_ptys_reg *)inbuf->reg_data; reg_data 334 drivers/net/ethernet/micrel/ks8851_mll.c u16 reg_data = 0; reg_data 337 drivers/net/ethernet/micrel/ks8851_mll.c reg_data = ks_rdreg16(ks, KS_CCR); reg_data 340 drivers/net/ethernet/micrel/ks8851_mll.c ks->sharedbus = (reg_data & CCR_SHARED) == CCR_SHARED; reg_data 346 drivers/net/ethernet/micrel/ks8851_mll.c if (reg_data & CCR_8BIT) { reg_data 349 drivers/net/ethernet/micrel/ks8851_mll.c } else if (reg_data & CCR_16BIT) { reg_data 2424 drivers/net/ethernet/qlogic/qed/qed_debug.c const struct dbg_attn_reg *reg_data = reg_data 2430 drivers/net/ethernet/qlogic/qed/qed_debug.c eval_mode = GET_FIELD(reg_data->mode.data, reg_data 2433 drivers/net/ethernet/qlogic/qed/qed_debug.c GET_FIELD(reg_data->mode.data, reg_data 2440 drivers/net/ethernet/qlogic/qed/qed_debug.c DWORDS_TO_BYTES(reg_data-> reg_data 2926 drivers/net/ethernet/qlogic/qed/qed_debug.c const struct dbg_attn_reg *reg_data = reg_data 2933 drivers/net/ethernet/qlogic/qed/qed_debug.c eval_mode = GET_FIELD(reg_data->mode.data, reg_data 2936 drivers/net/ethernet/qlogic/qed/qed_debug.c GET_FIELD(reg_data->mode.data, reg_data 2943 drivers/net/ethernet/qlogic/qed/qed_debug.c addr = reg_data->mask_address; reg_data 2951 drivers/net/ethernet/qlogic/qed/qed_debug.c addr = GET_FIELD(reg_data->data, reg_data 5580 drivers/net/ethernet/qlogic/qed/qed_debug.c const struct dbg_attn_reg *reg_data = &attn_reg_arr[reg_idx]; reg_data 5587 drivers/net/ethernet/qlogic/qed/qed_debug.c eval_mode = GET_FIELD(reg_data->mode.data, reg_data 5589 drivers/net/ethernet/qlogic/qed/qed_debug.c modes_buf_offset = GET_FIELD(reg_data->mode.data, reg_data 5596 drivers/net/ethernet/qlogic/qed/qed_debug.c reg_data->sts_clr_address : reg_data 5597 drivers/net/ethernet/qlogic/qed/qed_debug.c GET_FIELD(reg_data->data, reg_data 5609 drivers/net/ethernet/qlogic/qed/qed_debug.c GET_FIELD(reg_data->data, DBG_ATTN_REG_NUM_REG_ATTN)); reg_data 5610 drivers/net/ethernet/qlogic/qed/qed_debug.c reg_result->block_attn_offset = reg_data->block_attn_offset; reg_data 5615 drivers/net/ethernet/qlogic/qed/qed_debug.c (reg_data->mask_address)); reg_data 161 drivers/net/ethernet/xilinx/xilinx_emaclite.c u32 reg_data; reg_data 164 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); reg_data 165 drivers/net/ethernet/xilinx/xilinx_emaclite.c xemaclite_writel(reg_data | XEL_TSR_XMIT_IE_MASK, reg_data 184 drivers/net/ethernet/xilinx/xilinx_emaclite.c u32 reg_data; reg_data 190 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); reg_data 191 drivers/net/ethernet/xilinx/xilinx_emaclite.c xemaclite_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK), reg_data 195 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET); reg_data 196 drivers/net/ethernet/xilinx/xilinx_emaclite.c xemaclite_writel(reg_data & (~XEL_RSR_RECV_IE_MASK), reg_data 318 drivers/net/ethernet/xilinx/xilinx_emaclite.c u32 reg_data; reg_data 329 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET); reg_data 330 drivers/net/ethernet/xilinx/xilinx_emaclite.c if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | reg_data 343 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET); reg_data 345 drivers/net/ethernet/xilinx/xilinx_emaclite.c if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | reg_data 362 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET); reg_data 363 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK); reg_data 364 drivers/net/ethernet/xilinx/xilinx_emaclite.c xemaclite_writel(reg_data, addr + XEL_TSR_OFFSET); reg_data 384 drivers/net/ethernet/xilinx/xilinx_emaclite.c u32 reg_data; reg_data 390 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET); reg_data 392 drivers/net/ethernet/xilinx/xilinx_emaclite.c if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { reg_data 408 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET); reg_data 409 drivers/net/ethernet/xilinx/xilinx_emaclite.c if ((reg_data & XEL_RSR_RECV_DONE_MASK) != reg_data 453 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET); reg_data 454 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data &= ~XEL_RSR_RECV_DONE_MASK; reg_data 455 drivers/net/ethernet/xilinx/xilinx_emaclite.c xemaclite_writel(reg_data, addr + XEL_RSR_OFFSET); reg_data 475 drivers/net/ethernet/xilinx/xilinx_emaclite.c u32 reg_data; reg_data 485 drivers/net/ethernet/xilinx/xilinx_emaclite.c reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET); reg_data 486 drivers/net/ethernet/xilinx/xilinx_emaclite.c xemaclite_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET); reg_data 423 drivers/net/ieee802154/mcr20a.c u8 reg_data[MCR20A_IRQSTS_NUM]; reg_data 454 drivers/net/ieee802154/mcr20a.c lp->reg_data[0] = MCR20A_XCVSEQ_TX; reg_data 478 drivers/net/ieee802154/mcr20a.c lp->reg_data[0] = MCR20A_XCVSEQ_IDLE; reg_data 785 drivers/net/ieee802154/mcr20a.c u8 len = lp->reg_data[0] & DAR_RX_FRAME_LENGTH_MASK; reg_data 824 drivers/net/ieee802154/mcr20a.c len = lp->reg_data[0] & DAR_RX_FRAME_LENGTH_MASK; reg_data 943 drivers/net/ieee802154/mcr20a.c memcpy(lp->reg_data, lp->irq_data, MCR20A_IRQSTS_NUM); reg_data 1044 drivers/net/ieee802154/mcr20a.c lp->reg_xfer_data.rx_buf = lp->reg_data; reg_data 1045 drivers/net/ieee802154/mcr20a.c lp->reg_xfer_data.tx_buf = lp->reg_data; reg_data 261 drivers/net/wireless/ath/wcn36xx/dxe.c int reg_data = 0; reg_data 265 drivers/net/wireless/ath/wcn36xx/dxe.c ®_data); reg_data 267 drivers/net/wireless/ath/wcn36xx/dxe.c reg_data |= wcn_ch; reg_data 271 drivers/net/wireless/ath/wcn36xx/dxe.c (int)reg_data); reg_data 786 drivers/net/wireless/ath/wcn36xx/dxe.c int reg_data = 0, ret; reg_data 788 drivers/net/wireless/ath/wcn36xx/dxe.c reg_data = WCN36XX_DXE_REG_RESET; reg_data 789 drivers/net/wireless/ath/wcn36xx/dxe.c wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data); reg_data 792 drivers/net/wireless/ath/wcn36xx/dxe.c reg_data = (WCN36XX_DXE_INT_CH3_MASK | WCN36XX_DXE_INT_CH1_MASK) << 16 | reg_data 795 drivers/net/wireless/ath/wcn36xx/dxe.c wcn36xx_ccu_write_register(wcn, WCN36XX_CCU_DXE_INT_SELECT_PRONTO, reg_data); reg_data 797 drivers/net/wireless/ath/wcn36xx/dxe.c wcn36xx_ccu_write_register(wcn, WCN36XX_CCU_DXE_INT_SELECT_RIVA, reg_data); reg_data 818 drivers/net/wireless/ath/wcn36xx/dxe.c wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data); reg_data 841 drivers/net/wireless/ath/wcn36xx/dxe.c wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data); reg_data 1649 drivers/net/wireless/zydas/zd1211rw/zd_usb.c struct reg_data *rd = ®s->regs[i]; reg_data 1687 drivers/net/wireless/zydas/zd1211rw/zd_usb.c struct reg_data *rd = ®s->regs[i]; reg_data 1912 drivers/net/wireless/zydas/zd1211rw/zd_usb.c struct reg_data *rw = &req->reg_writes[i]; reg_data 82 drivers/net/wireless/zydas/zd1211rw/zd_usb.h struct reg_data reg_writes[0]; reg_data 121 drivers/net/wireless/zydas/zd1211rw/zd_usb.h struct reg_data regs[0]; reg_data 82 drivers/pinctrl/pinctrl-sx150x.c u8 reg_data; reg_data 157 drivers/pinctrl/pinctrl-sx150x.c .reg_data = 0x00, reg_data 177 drivers/pinctrl/pinctrl-sx150x.c .reg_data = 0x00, reg_data 200 drivers/pinctrl/pinctrl-sx150x.c .reg_data = 0x00, reg_data 223 drivers/pinctrl/pinctrl-sx150x.c .reg_data = 0x00, reg_data 242 drivers/pinctrl/pinctrl-sx150x.c .reg_data = 0x00, reg_data 264 drivers/pinctrl/pinctrl-sx150x.c .reg_data = 0x00, reg_data 287 drivers/pinctrl/pinctrl-sx150x.c .reg_data = 0x08, reg_data 308 drivers/pinctrl/pinctrl-sx150x.c .reg_data = 0x08, reg_data 329 drivers/pinctrl/pinctrl-sx150x.c .reg_data = 0x10, reg_data 412 drivers/pinctrl/pinctrl-sx150x.c ret = regmap_read(pctl->regmap, pctl->data->reg_data, &value); reg_data 422 drivers/pinctrl/pinctrl-sx150x.c return regmap_write_bits(pctl->regmap, pctl->data->reg_data, reg_data 452 drivers/pinctrl/pinctrl-sx150x.c regmap_write_bits(pctl->regmap, pctl->data->reg_data, *mask, *bits); reg_data 1079 drivers/pinctrl/pinctrl-sx150x.c return reg == pctl->data->reg_irq_src || reg == pctl->data->reg_data; reg_data 4232 drivers/pinctrl/sh-pfc/pfc-sh73a0.c struct sh_pfc *pfc = reg->reg_data; reg_data 4265 drivers/pinctrl/sh-pfc/pfc-sh73a0.c struct sh_pfc *pfc = reg->reg_data; reg_data 154 drivers/pinctrl/ti/pinctrl-ti-iodelay.c const struct ti_iodelay_reg_data *reg_data; reg_data 209 drivers/pinctrl/ti/pinctrl-ti-iodelay.c const struct ti_iodelay_reg_data *reg = iod->reg_data; reg_data 283 drivers/pinctrl/ti/pinctrl-ti-iodelay.c const struct ti_iodelay_reg_data *reg = iod->reg_data; reg_data 361 drivers/pinctrl/ti/pinctrl-ti-iodelay.c const struct ti_iodelay_reg_data *reg = iod->reg_data; reg_data 399 drivers/pinctrl/ti/pinctrl-ti-iodelay.c const struct ti_iodelay_reg_data *r = iod->reg_data; reg_data 439 drivers/pinctrl/ti/pinctrl-ti-iodelay.c r = iod->reg_data; reg_data 641 drivers/pinctrl/ti/pinctrl-ti-iodelay.c const struct ti_iodelay_reg_data *r = iod->reg_data; reg_data 663 drivers/pinctrl/ti/pinctrl-ti-iodelay.c r = iod->reg_data; reg_data 744 drivers/pinctrl/ti/pinctrl-ti-iodelay.c const struct ti_iodelay_reg_data *r = iod->reg_data; reg_data 846 drivers/pinctrl/ti/pinctrl-ti-iodelay.c iod->reg_data = match->data; reg_data 864 drivers/pinctrl/ti/pinctrl-ti-iodelay.c iod->reg_data->regmap_config); reg_data 51 drivers/power/supply/max14577_charger.c u8 reg_data; reg_data 64 drivers/power/supply/max14577_charger.c ret = max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, ®_data); reg_data 68 drivers/power/supply/max14577_charger.c if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0) { reg_data 73 drivers/power/supply/max14577_charger.c ret = max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data); reg_data 77 drivers/power/supply/max14577_charger.c if (reg_data & STATUS3_CGMBC_MASK) { reg_data 79 drivers/power/supply/max14577_charger.c if (reg_data & STATUS3_EOC_MASK) reg_data 124 drivers/power/supply/max14577_charger.c u8 reg_data; reg_data 128 drivers/power/supply/max14577_charger.c ret = max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data); reg_data 132 drivers/power/supply/max14577_charger.c reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT); reg_data 133 drivers/power/supply/max14577_charger.c chg_type = maxim_get_charger_type(chg->max14577->dev_type, reg_data); reg_data 164 drivers/power/supply/max14577_charger.c u8 reg_data; reg_data 167 drivers/power/supply/max14577_charger.c ret = max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data); reg_data 171 drivers/power/supply/max14577_charger.c reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT); reg_data 172 drivers/power/supply/max14577_charger.c chg_type = maxim_get_charger_type(chg->max14577->dev_type, reg_data); reg_data 178 drivers/power/supply/max14577_charger.c ret = max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data); reg_data 182 drivers/power/supply/max14577_charger.c if (reg_data & STATUS3_OVP_MASK) { reg_data 209 drivers/power/supply/max14577_charger.c u8 reg_data; reg_data 213 drivers/power/supply/max14577_charger.c reg_data = hours - 3; reg_data 217 drivers/power/supply/max14577_charger.c reg_data = 0x7; reg_data 224 drivers/power/supply/max14577_charger.c reg_data <<= CHGCTRL1_TCHW_SHIFT; reg_data 227 drivers/power/supply/max14577_charger.c MAX14577_REG_CHGCTRL1, CHGCTRL1_TCHW_MASK, reg_data); reg_data 233 drivers/power/supply/max14577_charger.c u8 reg_data; reg_data 240 drivers/power/supply/max14577_charger.c reg_data = 0x0; reg_data 242 drivers/power/supply/max14577_charger.c reg_data = 0x1f; reg_data 249 drivers/power/supply/max14577_charger.c reg_data = 0x1 + val; reg_data 251 drivers/power/supply/max14577_charger.c reg_data = val; /* Fix for gap between 4.18V and 4.22V */ reg_data 255 drivers/power/supply/max14577_charger.c reg_data <<= CHGCTRL3_MBCCVWRC_SHIFT; reg_data 258 drivers/power/supply/max14577_charger.c MAX14577_CHG_REG_CHG_CTRL3, reg_data); reg_data 265 drivers/power/supply/max14577_charger.c u8 reg_data; reg_data 294 drivers/power/supply/max14577_charger.c reg_data = current_bits << CHGCTRL5_EOCS_SHIFT; reg_data 298 drivers/power/supply/max14577_charger.c reg_data); reg_data 304 drivers/power/supply/max14577_charger.c u8 reg_data; reg_data 309 drivers/power/supply/max14577_charger.c ret = maxim_charger_calc_reg_current(limits, uamp, uamp, ®_data); reg_data 318 drivers/power/supply/max14577_charger.c reg_data); reg_data 329 drivers/power/supply/max14577_charger.c u8 reg_data; reg_data 337 drivers/power/supply/max14577_charger.c reg_data = 0x1 << CDETCTRL1_CHGDETEN_SHIFT; reg_data 340 drivers/power/supply/max14577_charger.c reg_data); reg_data 346 drivers/power/supply/max14577_charger.c reg_data = 0x1 << CHGCTRL2_VCHGR_RC_SHIFT; reg_data 347 drivers/power/supply/max14577_charger.c reg_data |= 0x1 << CHGCTRL2_MBCHOSTEN_SHIFT; reg_data 348 drivers/power/supply/max14577_charger.c max14577_write_reg(rmap, MAX14577_REG_CHGCTRL2, reg_data); reg_data 351 drivers/power/supply/max14577_charger.c reg_data = 0x0 << CHGCTRL6_AUTOSTOP_SHIFT; reg_data 352 drivers/power/supply/max14577_charger.c max14577_write_reg(rmap, MAX14577_REG_CHGCTRL6, reg_data); reg_data 374 drivers/power/supply/max14577_charger.c reg_data = 0x0; reg_data 379 drivers/power/supply/max14577_charger.c reg_data = 0x1 + (chg->pdata->ovp_uvolt - 6000000) / 500000; reg_data 386 drivers/power/supply/max14577_charger.c reg_data <<= CHGCTRL7_OTPCGHCVS_SHIFT; reg_data 387 drivers/power/supply/max14577_charger.c max14577_write_reg(rmap, MAX14577_REG_CHGCTRL7, reg_data); reg_data 512 drivers/power/supply/max14577_charger.c u8 reg_data; reg_data 517 drivers/power/supply/max14577_charger.c ®_data); reg_data 521 drivers/power/supply/max14577_charger.c reg_data &= CHGCTRL1_TCHW_MASK; reg_data 522 drivers/power/supply/max14577_charger.c reg_data >>= CHGCTRL1_TCHW_SHIFT; reg_data 523 drivers/power/supply/max14577_charger.c switch (reg_data) { reg_data 525 drivers/power/supply/max14577_charger.c val = reg_data + 3; reg_data 5090 drivers/regulator/core.c rdev->reg_data = config->driver_data; reg_data 5106 drivers/regulator/core.c ret = init_data->regulator_init(rdev->reg_data); reg_data 5349 drivers/regulator/core.c return rdev->reg_data; reg_data 5362 drivers/regulator/core.c return regulator->rdev->reg_data; reg_data 5373 drivers/regulator/core.c regulator->rdev->reg_data = data; reg_data 19 drivers/regulator/max14577-regulator.c u8 reg_data; reg_data 23 drivers/regulator/max14577-regulator.c max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, ®_data); reg_data 24 drivers/regulator/max14577-regulator.c if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0) reg_data 26 drivers/regulator/max14577-regulator.c max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data); reg_data 27 drivers/regulator/max14577-regulator.c if ((reg_data & STATUS3_CGMBC_MASK) == 0) reg_data 38 drivers/regulator/max14577-regulator.c u8 reg_data; reg_data 47 drivers/regulator/max14577-regulator.c max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL4, ®_data); reg_data 49 drivers/regulator/max14577-regulator.c if ((reg_data & CHGCTRL4_MBCICHWRCL_MASK) == 0) reg_data 52 drivers/regulator/max14577-regulator.c reg_data = ((reg_data & CHGCTRL4_MBCICHWRCH_MASK) >> reg_data 54 drivers/regulator/max14577-regulator.c return limits->high_start + reg_data * limits->high_step; reg_data 60 drivers/regulator/max14577-regulator.c u8 reg_data; reg_data 69 drivers/regulator/max14577-regulator.c ret = maxim_charger_calc_reg_current(limits, min_uA, max_uA, ®_data); reg_data 75 drivers/regulator/max14577-regulator.c reg_data); reg_data 57 drivers/regulator/max77693-regulator.c const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev); reg_data 64 drivers/regulator/max77693-regulator.c ret = regmap_read(rdev->regmap, reg_data->linear_reg, ®); reg_data 68 drivers/regulator/max77693-regulator.c sel = reg & reg_data->linear_mask; reg_data 71 drivers/regulator/max77693-regulator.c if (sel <= reg_data->min_sel) reg_data 74 drivers/regulator/max77693-regulator.c sel -= reg_data->min_sel; reg_data 76 drivers/regulator/max77693-regulator.c val = chg_min_uA + reg_data->uA_step * sel; reg_data 86 drivers/regulator/max77693-regulator.c const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev); reg_data 90 drivers/regulator/max77693-regulator.c while (chg_min_uA + reg_data->uA_step * sel < min_uA) reg_data 93 drivers/regulator/max77693-regulator.c if (chg_min_uA + reg_data->uA_step * sel > max_uA) reg_data 97 drivers/regulator/max77693-regulator.c sel += reg_data->min_sel; reg_data 99 drivers/regulator/max77693-regulator.c return regmap_write(rdev->regmap, reg_data->linear_reg, sel); reg_data 159 drivers/regulator/max8952.c pd->reg_data = of_get_regulator_init_data(dev, np, ®ulator); reg_data 160 drivers/regulator/max8952.c if (!pd->reg_data) { reg_data 207 drivers/regulator/max8952.c config.init_data = pdata->reg_data; reg_data 211 drivers/regulator/max8952.c if (pdata->reg_data->constraints.boot_on) reg_data 974 drivers/regulator/palmas-regulator.c config.init_data = pdata->reg_data[id]; reg_data 1081 drivers/regulator/palmas-regulator.c config.init_data = pdata->reg_data[id]; reg_data 1266 drivers/regulator/palmas-regulator.c config.init_data = pdata->reg_data[id]; reg_data 1370 drivers/regulator/palmas-regulator.c config.init_data = pdata->reg_data[id]; reg_data 1504 drivers/regulator/palmas-regulator.c pdata->reg_data[idx] = match->init_data; reg_data 453 drivers/regulator/tps6586x-regulator.c struct regulator_init_data *reg_data; reg_data 475 drivers/regulator/tps6586x-regulator.c reg_data = pdata->reg_init_data[id]; reg_data 492 drivers/regulator/tps6586x-regulator.c config.init_data = reg_data; reg_data 505 drivers/regulator/tps6586x-regulator.c if (reg_data) { reg_data 507 drivers/regulator/tps6586x-regulator.c reg_data); reg_data 1322 drivers/scsi/lpfc/lpfc.h struct lpfc_register reg_data; reg_data 1324 drivers/scsi/lpfc/lpfc.h reg_data.word0 = 0; reg_data 1325 drivers/scsi/lpfc/lpfc.h bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id); reg_data 1326 drivers/scsi/lpfc/lpfc.h bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay); reg_data 1327 drivers/scsi/lpfc/lpfc.h writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr); reg_data 7857 drivers/scsi/lpfc/lpfc_init.c struct lpfc_register reg_data; reg_data 7862 drivers/scsi/lpfc/lpfc_init.c memset(®_data, 0, sizeof(reg_data)); reg_data 7953 drivers/scsi/lpfc/lpfc_init.c ®_data.word0) || reg_data 7954 drivers/scsi/lpfc/lpfc_init.c (bf_get(lpfc_sliport_status_err, ®_data) && reg_data 7955 drivers/scsi/lpfc/lpfc_init.c !bf_get(lpfc_sliport_status_rn, ®_data))) { reg_data 7967 drivers/scsi/lpfc/lpfc_init.c reg_data.word0, reg_data 9977 drivers/scsi/lpfc/lpfc_init.c struct lpfc_register reg_data; reg_data 10024 drivers/scsi/lpfc/lpfc_init.c STATUSregaddr, ®_data.word0)) { reg_data 10028 drivers/scsi/lpfc/lpfc_init.c if (bf_get(lpfc_sliport_status_rdy, ®_data)) reg_data 10033 drivers/scsi/lpfc/lpfc_init.c if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { reg_data 10041 drivers/scsi/lpfc/lpfc_init.c reg_data.word0, reg_data 10052 drivers/scsi/lpfc/lpfc_init.c reg_data.word0 = 0; reg_data 10053 drivers/scsi/lpfc/lpfc_init.c bf_set(lpfc_sliport_ctrl_end, ®_data, reg_data 10055 drivers/scsi/lpfc/lpfc_init.c bf_set(lpfc_sliport_ctrl_ip, ®_data, reg_data 10057 drivers/scsi/lpfc/lpfc_init.c writel(reg_data.word0, phba->sli4_hba.u.if_type2. reg_data 10066 drivers/scsi/lpfc/lpfc_init.c } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { reg_data 2346 drivers/scsi/qla1280.c uint16_t reg_data; reg_data 2366 drivers/scsi/qla1280.c reg_data = RD_REG_WORD(®->nvram); reg_data 2367 drivers/scsi/qla1280.c if (reg_data & NV_DATA_IN) reg_data 109 drivers/scsi/qla2xxx/qla_sup.c uint16_t reg_data; reg_data 127 drivers/scsi/qla2xxx/qla_sup.c reg_data = RD_REG_WORD(®->nvram); reg_data 128 drivers/scsi/qla2xxx/qla_sup.c if (reg_data & NVR_DATA_IN) reg_data 66 drivers/soc/qcom/spm.c const struct spm_reg_data *reg_data; reg_data 118 drivers/soc/qcom/spm.c if (drv->reg_data->reg_offset[reg]) reg_data 120 drivers/soc/qcom/spm.c drv->reg_data->reg_offset[reg]); reg_data 129 drivers/soc/qcom/spm.c if (!drv->reg_data->reg_offset[reg]) reg_data 134 drivers/soc/qcom/spm.c drv->reg_data->reg_offset[reg]); reg_data 136 drivers/soc/qcom/spm.c drv->reg_data->reg_offset[reg]); reg_data 146 drivers/soc/qcom/spm.c return readl_relaxed(drv->reg_base + drv->reg_data->reg_offset[reg]); reg_data 155 drivers/soc/qcom/spm.c start_index = drv->reg_data->start_index[mode]; reg_data 341 drivers/soc/qcom/spm.c drv->reg_data = match_id->data; reg_data 344 drivers/soc/qcom/spm.c addr = drv->reg_base + drv->reg_data->reg_offset[SPM_REG_SEQ_ENTRY]; reg_data 345 drivers/soc/qcom/spm.c __iowrite32_copy(addr, drv->reg_data->seq, reg_data 346 drivers/soc/qcom/spm.c ARRAY_SIZE(drv->reg_data->seq) / 4); reg_data 354 drivers/soc/qcom/spm.c spm_register_write(drv, SPM_REG_CFG, drv->reg_data->spm_cfg); reg_data 355 drivers/soc/qcom/spm.c spm_register_write(drv, SPM_REG_DLY, drv->reg_data->spm_dly); reg_data 356 drivers/soc/qcom/spm.c spm_register_write(drv, SPM_REG_PMIC_DLY, drv->reg_data->pmic_dly); reg_data 358 drivers/soc/qcom/spm.c drv->reg_data->pmic_data[0]); reg_data 360 drivers/soc/qcom/spm.c drv->reg_data->pmic_data[1]); reg_data 1558 drivers/soc/tegra/pmc.c u32 pmu_addr, ctrl_id, reg_addr, reg_data, pinmux; reg_data 1587 drivers/soc/tegra/pmc.c if (of_property_read_u32(np, "nvidia,reg-data", ®_data)) { reg_data 1599 drivers/soc/tegra/pmc.c value = (reg_data << PMC_SCRATCH54_DATA_SHIFT) | reg_data 1612 drivers/soc/tegra/pmc.c checksum = reg_addr + reg_data + (value & 0xff) + ((value >> 8) & 0xff) reg_data 534 drivers/staging/android/vsoc.c struct vsoc_region_data *reg_data; reg_data 541 drivers/staging/android/vsoc.c reg_data = vsoc_dev.regions_data + reg_num; reg_data 582 drivers/staging/android/vsoc.c if (!atomic_xchg(reg_data->outgoing_signalled, 1)) { reg_data 595 drivers/staging/android/vsoc.c (reg_data->interrupt_wait_queue, reg_data 596 drivers/staging/android/vsoc.c (atomic_read(reg_data->incoming_signalled) != 0)); reg_data 605 drivers/staging/android/vsoc.c atomic_set(reg_data->incoming_signalled, 1); reg_data 606 drivers/staging/android/vsoc.c wake_up_interruptible(®_data->interrupt_wait_queue); reg_data 98 drivers/staging/emxx_udc/emxx_udc.c u32 reg_data; reg_data 111 drivers/staging/emxx_udc/emxx_udc.c reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i)); reg_data 112 drivers/staging/emxx_udc/emxx_udc.c dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data); reg_data 114 drivers/staging/emxx_udc/emxx_udc.c reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i + 4)); reg_data 115 drivers/staging/emxx_udc/emxx_udc.c dev_dbg(&udc->dev, " %08x", (int)reg_data); reg_data 117 drivers/staging/emxx_udc/emxx_udc.c reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i + 8)); reg_data 118 drivers/staging/emxx_udc/emxx_udc.c dev_dbg(&udc->dev, " %08x", (int)reg_data); reg_data 120 drivers/staging/emxx_udc/emxx_udc.c reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i + 12)); reg_data 121 drivers/staging/emxx_udc/emxx_udc.c dev_dbg(&udc->dev, " %08x\n", (int)reg_data); reg_data 594 drivers/staging/vt6656/rf.c u8 reg_data[4]; reg_data 598 drivers/staging/vt6656/rf.c reg_data[0] = (u8)data; reg_data 599 drivers/staging/vt6656/rf.c reg_data[1] = (u8)(data >> 8); reg_data 600 drivers/staging/vt6656/rf.c reg_data[2] = (u8)(data >> 16); reg_data 601 drivers/staging/vt6656/rf.c reg_data[3] = (u8)(data >> 24); reg_data 604 drivers/staging/vt6656/rf.c 0, 0, ARRAY_SIZE(reg_data), reg_data); reg_data 37 drivers/usb/isp1760/isp1760-if.c u32 reg_data; reg_data 73 drivers/usb/isp1760/isp1760-if.c reg_data = 0; reg_data 74 drivers/usb/isp1760/isp1760-if.c while ((reg_data != 0xFACE) && retry_count) { reg_data 80 drivers/usb/isp1760/isp1760-if.c reg_data = readl(iobase + HC_SCRATCH_REG) & 0x0000ffff; reg_data 90 drivers/usb/isp1760/isp1760-if.c if (reg_data != 0xFACE) { reg_data 91 drivers/usb/isp1760/isp1760-if.c dev_err(&dev->dev, "scratch register mismatch %x\n", reg_data); reg_data 113 drivers/usb/isp1760/isp1760-if.c reg_data = readl(iobase + PLX_INT_CSR_REG); reg_data 114 drivers/usb/isp1760/isp1760-if.c reg_data |= 0x900; reg_data 115 drivers/usb/isp1760/isp1760-if.c writel(reg_data, iobase + PLX_INT_CSR_REG); reg_data 86 drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c unsigned char reg_data) reg_data 92 drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c data = 0x0100 | reg_data; /* register data write */ reg_data 57 drivers/watchdog/mlx_wdt.c struct mlxreg_core_data *reg_data; reg_data 67 drivers/watchdog/mlx_wdt.c reg_data = &wdt->pdata->data[wdt->reset_idx]; reg_data 68 drivers/watchdog/mlx_wdt.c rc = regmap_read(wdt->regmap, reg_data->reg, ®val); reg_data 70 drivers/watchdog/mlx_wdt.c if (regval & ~reg_data->mask) { reg_data 81 drivers/watchdog/mlx_wdt.c struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->action_idx]; reg_data 83 drivers/watchdog/mlx_wdt.c return regmap_update_bits(wdt->regmap, reg_data->reg, ~reg_data->mask, reg_data 84 drivers/watchdog/mlx_wdt.c BIT(reg_data->bit)); reg_data 90 drivers/watchdog/mlx_wdt.c struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->action_idx]; reg_data 92 drivers/watchdog/mlx_wdt.c return regmap_update_bits(wdt->regmap, reg_data->reg, ~reg_data->mask, reg_data 93 drivers/watchdog/mlx_wdt.c ~BIT(reg_data->bit)); reg_data 99 drivers/watchdog/mlx_wdt.c struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->ping_idx]; reg_data 101 drivers/watchdog/mlx_wdt.c return regmap_update_bits_base(wdt->regmap, reg_data->reg, reg_data 102 drivers/watchdog/mlx_wdt.c ~reg_data->mask, BIT(reg_data->bit), reg_data 110 drivers/watchdog/mlx_wdt.c struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->timeout_idx]; reg_data 115 drivers/watchdog/mlx_wdt.c rc = regmap_read(wdt->regmap, reg_data->reg, ®val); reg_data 120 drivers/watchdog/mlx_wdt.c regval = (regval & reg_data->mask) | hw_timeout; reg_data 129 drivers/watchdog/mlx_wdt.c rc = regmap_write(wdt->regmap, reg_data->reg, regval); reg_data 149 drivers/watchdog/mlx_wdt.c struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->tleft_idx]; reg_data 153 drivers/watchdog/mlx_wdt.c rc = regmap_read(wdt->regmap, reg_data->reg, ®val); reg_data 330 include/linux/mfd/palmas.h struct regulator_init_data *reg_data[PALMAS_NUM_REGS]; reg_data 474 include/linux/regulator/driver.h void *reg_data; /* regulator_dev data */ reg_data 114 include/linux/regulator/max8952.h struct regulator_init_data *reg_data; reg_data 396 sound/soc/kirkwood/kirkwood-i2s.c unsigned int reg_data; reg_data 403 sound/soc/kirkwood/kirkwood-i2s.c reg_data = readl(priv->io + 0x1200); reg_data 404 sound/soc/kirkwood/kirkwood-i2s.c reg_data &= (~(0x333FF8)); reg_data 405 sound/soc/kirkwood/kirkwood-i2s.c reg_data |= 0x111D18; reg_data 406 sound/soc/kirkwood/kirkwood-i2s.c writel(reg_data, priv->io + 0x1200); reg_data 410 sound/soc/kirkwood/kirkwood-i2s.c reg_data = readl(priv->io + 0x1200); reg_data 411 sound/soc/kirkwood/kirkwood-i2s.c reg_data &= (~(0x333FF8)); reg_data 412 sound/soc/kirkwood/kirkwood-i2s.c reg_data |= 0x111D18; reg_data 413 sound/soc/kirkwood/kirkwood-i2s.c writel(reg_data, priv->io + 0x1200);