reg_addr 728 arch/alpha/kernel/traps.c unsigned long fake_reg, *reg_addr = &fake_reg; reg_addr 761 arch/alpha/kernel/traps.c reg_addr = (unsigned long *) reg_addr 790 arch/alpha/kernel/traps.c *reg_addr = tmp1|tmp2; reg_addr 838 arch/alpha/kernel/traps.c *reg_addr = (int)(tmp1|tmp2); reg_addr 854 arch/alpha/kernel/traps.c *reg_addr = tmp1|tmp2; reg_addr 879 arch/alpha/kernel/traps.c : "r"(va), "r"(*reg_addr), "0"(0)); reg_addr 907 arch/alpha/kernel/traps.c : "r"(va), "r"(*reg_addr), "0"(0)); reg_addr 935 arch/alpha/kernel/traps.c : "r"(va), "r"(*reg_addr), "0"(0)); reg_addr 132 arch/c6x/platforms/dscr.c void __iomem *reg_addr = dscr.base + reg; reg_addr 148 arch/c6x/platforms/dscr.c : "a"(reg_addr), "b"(val), "a"(lock_addr), "b"(key) reg_addr 106 arch/microblaze/kernel/ptrace.c microblaze_reg_t *reg_addr = reg_save_addr(addr, child); reg_addr 108 arch/microblaze/kernel/ptrace.c val = *reg_addr; reg_addr 111 arch/microblaze/kernel/ptrace.c *reg_addr = data; reg_addr 118 arch/microblaze/kernel/ptrace.c u32 paddr = virt_to_phys((u32)reg_addr); reg_addr 120 arch/microblaze/kernel/ptrace.c *reg_addr = data; reg_addr 432 arch/powerpc/platforms/powermac/low_i2c.c kw_write_reg(reg_addr, addrdir & 0xff); reg_addr 335 arch/sparc/kernel/unaligned_64.c unsigned long addr, *reg_addr; reg_addr 354 arch/sparc/kernel/unaligned_64.c reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs); reg_addr 355 arch/sparc/kernel/unaligned_64.c err = do_int_load(reg_addr, size, reg_addr 359 arch/sparc/kernel/unaligned_64.c unsigned long val_in = *reg_addr; reg_addr 375 arch/sparc/kernel/unaligned_64.c *reg_addr = val_in; reg_addr 321 arch/x86/kernel/umip.c unsigned long seg_base = 0, *reg_addr; reg_addr 413 arch/x86/kernel/umip.c reg_addr = (unsigned long *)((unsigned long)regs + reg_offset); reg_addr 414 arch/x86/kernel/umip.c memcpy(reg_addr, dummy_data, dummy_data_size); reg_addr 439 drivers/ata/sata_via.c void __iomem *reg_addr = iomap[ap->port_no]; reg_addr 443 drivers/ata/sata_via.c ioaddr->cmd_addr = reg_addr; reg_addr 446 drivers/ata/sata_via.c ((unsigned long)(reg_addr + 8) | ATA_PCI_CTL_OFS); reg_addr 478 drivers/atm/lanai.c t = readl(reg_addr(lanai, reg)); reg_addr 489 drivers/atm/lanai.c writel(val, reg_addr(lanai, reg)); reg_addr 175 drivers/char/agp/intel-gtt.c phys_addr_t reg_addr; reg_addr 184 drivers/char/agp/intel-gtt.c reg_addr = pci_resource_start(intel_private.pcidev, I810_MMADR_BAR); reg_addr 186 drivers/char/agp/intel-gtt.c intel_private.registers = ioremap(reg_addr, KB(64)); reg_addr 193 drivers/char/agp/intel-gtt.c intel_private.gtt_phys_addr = reg_addr + I810_PTE_BASE; reg_addr 791 drivers/char/agp/intel-gtt.c phys_addr_t reg_addr; reg_addr 793 drivers/char/agp/intel-gtt.c reg_addr = pci_resource_start(intel_private.pcidev, I810_MMADR_BAR); reg_addr 795 drivers/char/agp/intel-gtt.c intel_private.registers = ioremap(reg_addr, KB(64)); reg_addr 799 drivers/char/agp/intel-gtt.c intel_private.gtt_phys_addr = reg_addr + I810_PTE_BASE; reg_addr 1131 drivers/char/agp/intel-gtt.c phys_addr_t reg_addr; reg_addr 1134 drivers/char/agp/intel-gtt.c reg_addr = pci_resource_start(intel_private.pcidev, I915_MMADR_BAR); reg_addr 1136 drivers/char/agp/intel-gtt.c intel_private.registers = ioremap(reg_addr, size); reg_addr 1146 drivers/char/agp/intel-gtt.c intel_private.gtt_phys_addr = reg_addr + MB(2); reg_addr 1149 drivers/char/agp/intel-gtt.c intel_private.gtt_phys_addr = reg_addr + KB(512); reg_addr 655 drivers/crypto/cavium/nitrox/nitrox_hal.c u64 reg_addr; reg_addr 658 drivers/crypto/cavium/nitrox/nitrox_hal.c reg_addr = NPS_PKT_MBOX_INT_LO_ENA_W1S; reg_addr 659 drivers/crypto/cavium/nitrox/nitrox_hal.c nitrox_write_csr(ndev, reg_addr, value); reg_addr 662 drivers/crypto/cavium/nitrox/nitrox_hal.c reg_addr = NPS_PKT_MBOX_INT_HI_ENA_W1S; reg_addr 663 drivers/crypto/cavium/nitrox/nitrox_hal.c nitrox_write_csr(ndev, reg_addr, value); reg_addr 669 drivers/crypto/cavium/nitrox/nitrox_hal.c u64 reg_addr; reg_addr 672 drivers/crypto/cavium/nitrox/nitrox_hal.c reg_addr = NPS_PKT_MBOX_INT_LO_ENA_W1C; reg_addr 673 drivers/crypto/cavium/nitrox/nitrox_hal.c nitrox_write_csr(ndev, reg_addr, value); reg_addr 676 drivers/crypto/cavium/nitrox/nitrox_hal.c reg_addr = NPS_PKT_MBOX_INT_HI_ENA_W1C; reg_addr 677 drivers/crypto/cavium/nitrox/nitrox_hal.c nitrox_write_csr(ndev, reg_addr, value); reg_addr 38 drivers/crypto/cavium/nitrox/nitrox_mbx.c u64 reg_addr; reg_addr 40 drivers/crypto/cavium/nitrox/nitrox_mbx.c reg_addr = NPS_PKT_MBOX_VF_PF_PFDATAX(ring); reg_addr 41 drivers/crypto/cavium/nitrox/nitrox_mbx.c return nitrox_read_csr(ndev, reg_addr); reg_addr 47 drivers/crypto/cavium/nitrox/nitrox_mbx.c u64 reg_addr; reg_addr 49 drivers/crypto/cavium/nitrox/nitrox_mbx.c reg_addr = NPS_PKT_MBOX_PF_VF_PFDATAX(ring); reg_addr 50 drivers/crypto/cavium/nitrox/nitrox_mbx.c nitrox_write_csr(ndev, reg_addr, value); reg_addr 116 drivers/crypto/cavium/nitrox/nitrox_mbx.c u64 value, reg_addr; reg_addr 121 drivers/crypto/cavium/nitrox/nitrox_mbx.c reg_addr = NPS_PKT_MBOX_INT_LO; reg_addr 122 drivers/crypto/cavium/nitrox/nitrox_mbx.c value = nitrox_read_csr(ndev, reg_addr); reg_addr 139 drivers/crypto/cavium/nitrox/nitrox_mbx.c nitrox_write_csr(ndev, reg_addr, BIT_ULL(i)); reg_addr 143 drivers/crypto/cavium/nitrox/nitrox_mbx.c reg_addr = NPS_PKT_MBOX_INT_HI; reg_addr 144 drivers/crypto/cavium/nitrox/nitrox_mbx.c value = nitrox_read_csr(ndev, reg_addr); reg_addr 162 drivers/crypto/cavium/nitrox/nitrox_mbx.c nitrox_write_csr(ndev, reg_addr, BIT_ULL(i)); reg_addr 302 drivers/crypto/qat/qat_common/icp_qat_uclo.h unsigned int reg_addr; reg_addr 335 drivers/crypto/qat/qat_common/icp_qat_uclo.h unsigned int reg_addr; reg_addr 269 drivers/crypto/qat/qat_common/qat_hal.c unsigned short reg_addr; reg_addr 274 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = 0x80 | (reg_num & 0x7f); reg_addr 278 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = reg_num & 0x1f; reg_addr 283 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = 0x180 | (reg_num & 0x1f); reg_addr 286 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = 0x140 | ((reg_num & 0x3) << 1); reg_addr 291 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = 0x1c0 | (reg_num & 0x1f); reg_addr 294 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = 0x100 | ((reg_num & 0x3) << 1); reg_addr 297 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = 0x280 | (reg_num & 0x1f); reg_addr 300 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = 0x200; reg_addr 303 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = 0x220; reg_addr 306 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = 0x300 | (reg_num & 0xff); reg_addr 309 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = BAD_REGADDR; reg_addr 312 drivers/crypto/qat/qat_common/qat_hal.c return reg_addr; reg_addr 973 drivers/crypto/qat/qat_common/qat_hal.c unsigned short reg_addr; reg_addr 977 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = qat_hal_get_reg_addr(reg_type, reg_num); reg_addr 978 drivers/crypto/qat/qat_common/qat_hal.c if (reg_addr == BAD_REGADDR) { reg_addr 979 drivers/crypto/qat/qat_common/qat_hal.c pr_err("QAT: bad regaddr=0x%x\n", reg_addr); reg_addr 984 drivers/crypto/qat/qat_common/qat_hal.c insts = 0xA070000000ull | (reg_addr & 0x3ff); reg_addr 987 drivers/crypto/qat/qat_common/qat_hal.c insts = (uint64_t)0xA030000000ull | ((reg_addr & 0x3ff) << 10); reg_addr 1187 drivers/crypto/qat/qat_common/qat_hal.c unsigned int reg_addr; reg_addr 1205 drivers/crypto/qat/qat_common/qat_hal.c reg_addr = reg_num + (ctx << 0x5); reg_addr 1209 drivers/crypto/qat/qat_common/qat_hal.c SET_AE_XFER(handle, ae, reg_addr, val); reg_addr 1213 drivers/crypto/qat/qat_common/qat_hal.c SET_AE_XFER(handle, ae, (reg_addr + dr_offset), val); reg_addr 788 drivers/crypto/qat/qat_common/qat_uclo.c unsigned short reg_addr, unsigned int value) reg_addr 798 drivers/crypto/qat/qat_common/qat_uclo.c reg_addr, value); reg_addr 810 drivers/crypto/qat/qat_common/qat_uclo.c reg_addr, value); reg_addr 818 drivers/crypto/qat/qat_common/qat_uclo.c reg_addr, value); reg_addr 820 drivers/crypto/qat/qat_common/qat_uclo.c return qat_hal_init_nn(handle, ae, ctx_mask, reg_addr, value); reg_addr 852 drivers/crypto/qat/qat_common/qat_uclo.c (unsigned short)init_regsym->reg_addr, reg_addr 867 drivers/crypto/qat/qat_common/qat_uclo.c (unsigned short)init_regsym->reg_addr, reg_addr 73 drivers/firmware/arm_scmi/sensors.c u64 reg_addr; reg_addr 96 drivers/firmware/arm_scmi/sensors.c si->reg_addr = le32_to_cpu(attr->reg_addr_low) | reg_addr 5526 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c uint32_t reg_addr, uint32_t cmd) reg_addr 5560 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (reg_addr << RLC_SERDES_WR_CTRL__REG_ADDR__SHIFT) | reg_addr 572 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c unsigned int reg_addr, reg_addr 585 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c reg = AUX_ADDR_7_0(reg_addr); reg_addr 587 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c reg = AUX_ADDR_15_8(reg_addr); reg_addr 589 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c reg = AUX_ADDR_19_16(reg_addr); reg_addr 350 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en; reg_addr 354 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c reg_addr = RD_CH_ADDR(ch); reg_addr 364 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c val = readl(base + reg_addr); reg_addr 553 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en; reg_addr 565 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c reg_addr = RD_CH_ADDR(ch); reg_addr 575 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c writel(addr, base + reg_addr); reg_addr 1229 drivers/gpu/drm/i915/i915_cmd_parser.c const u32 reg_addr = cmd[offset] & desc->reg.mask; reg_addr 1231 drivers/gpu/drm/i915/i915_cmd_parser.c find_reg(engine, reg_addr); reg_addr 1235 drivers/gpu/drm/i915/i915_cmd_parser.c reg_addr, *cmd, engine->name); reg_addr 1246 drivers/gpu/drm/i915/i915_cmd_parser.c reg_addr); reg_addr 1252 drivers/gpu/drm/i915/i915_cmd_parser.c reg_addr); reg_addr 1260 drivers/gpu/drm/i915/i915_cmd_parser.c reg_addr); reg_addr 250 drivers/hid/intel-ish-hid/ipc/ipc.c uint32_t reg_addr; reg_addr 301 drivers/hid/intel-ish-hid/ipc/ipc.c for (i = 0, reg_addr = IPC_REG_HOST2ISH_MSG; i < length >> 2; i++, reg_addr 302 drivers/hid/intel-ish-hid/ipc/ipc.c reg_addr += 4) reg_addr 303 drivers/hid/intel-ish-hid/ipc/ipc.c ish_reg_write(dev, reg_addr, r_buf[i]); reg_addr 310 drivers/hid/intel-ish-hid/ipc/ipc.c ish_reg_write(dev, reg_addr, reg); reg_addr 985 drivers/i2c/busses/i2c-rk3x.c u32 reg_addr = 0; reg_addr 993 drivers/i2c/busses/i2c-rk3x.c reg_addr |= msgs[0].buf[i] << (i * 8); reg_addr 994 drivers/i2c/busses/i2c-rk3x.c reg_addr |= REG_MRXADDR_VALID(i); reg_addr 1003 drivers/i2c/busses/i2c-rk3x.c i2c_writel(i2c, reg_addr, REG_MRXRADDR); reg_addr 541 drivers/ide/sis5513.c u16 reg_addr = hwif->channel ? 0x52: 0x50; reg_addr 542 drivers/ide/sis5513.c pci_read_config_word(pdev, reg_addr, ®w); reg_addr 57 drivers/iio/accel/mma9551.c u16 reg_addr; reg_addr 62 drivers/iio/accel/mma9551.c reg_addr = MMA9551_TILT_YZ_ANG_REG; reg_addr 66 drivers/iio/accel/mma9551.c reg_addr = MMA9551_TILT_XZ_ANG_REG; reg_addr 70 drivers/iio/accel/mma9551.c reg_addr = MMA9551_TILT_XY_ANG_REG; reg_addr 82 drivers/iio/accel/mma9551.c reg_addr, &angle); reg_addr 725 drivers/iio/accel/mma9551_core.c u16 reg_addr; reg_addr 731 drivers/iio/accel/mma9551_core.c reg_addr = MMA9551_AFE_X_ACCEL_REG; reg_addr 734 drivers/iio/accel/mma9551_core.c reg_addr = MMA9551_AFE_Y_ACCEL_REG; reg_addr 737 drivers/iio/accel/mma9551_core.c reg_addr = MMA9551_AFE_Z_ACCEL_REG; reg_addr 748 drivers/iio/accel/mma9551_core.c reg_addr, &raw_accel); reg_addr 229 drivers/iio/adc/max9611.c u8 reg_addr = max9611_mux_conf[selector][1]; reg_addr 249 drivers/iio/adc/max9611.c ret = i2c_smbus_read_word_swapped(max9611->i2c_client, reg_addr); reg_addr 252 drivers/iio/adc/max9611.c reg_addr); reg_addr 30 drivers/iio/common/st_sensors/st_sensors_core.c u8 reg_addr, u8 mask, u8 data) reg_addr 35 drivers/iio/common/st_sensors/st_sensors_core.c reg_addr, mask, data << __ffs(mask)); reg_addr 8 drivers/iio/common/st_sensors/st_sensors_core.h u8 reg_addr, u8 mask, u8 data); reg_addr 45 drivers/iio/gyro/adis16130.c static int adis16130_spi_read(struct iio_dev *indio_dev, u8 reg_addr, u32 *val) reg_addr 57 drivers/iio/gyro/adis16130.c st->buf[0] = ADIS16130_CON_RD | reg_addr; reg_addr 181 drivers/iio/light/gp2ap020a00f.c #define GP2AP020A00F_THRESH_VAL_ID(reg_addr) ((reg_addr - 4) / 2) reg_addr 342 drivers/infiniband/hw/qib/qib_diag.c const u64 __iomem *reg_addr; reg_addr 347 drivers/infiniband/hw/qib/qib_diag.c reg_addr = (const u64 __iomem *)qib_remap_ioaddr32(dd, regoffs, &limit); reg_addr 348 drivers/infiniband/hw/qib/qib_diag.c if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) { reg_addr 354 drivers/infiniband/hw/qib/qib_diag.c reg_end = reg_addr + (count / sizeof(u64)); reg_addr 357 drivers/infiniband/hw/qib/qib_diag.c while (reg_addr < reg_end) { reg_addr 358 drivers/infiniband/hw/qib/qib_diag.c u64 data = readq(reg_addr); reg_addr 364 drivers/infiniband/hw/qib/qib_diag.c reg_addr++; reg_addr 386 drivers/infiniband/hw/qib/qib_diag.c u64 __iomem *reg_addr; reg_addr 391 drivers/infiniband/hw/qib/qib_diag.c reg_addr = (u64 __iomem *)qib_remap_ioaddr32(dd, regoffs, &limit); reg_addr 392 drivers/infiniband/hw/qib/qib_diag.c if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) { reg_addr 398 drivers/infiniband/hw/qib/qib_diag.c reg_end = reg_addr + (count / sizeof(u64)); reg_addr 401 drivers/infiniband/hw/qib/qib_diag.c while (reg_addr < reg_end) { reg_addr 408 drivers/infiniband/hw/qib/qib_diag.c writeq(data, reg_addr); reg_addr 410 drivers/infiniband/hw/qib/qib_diag.c reg_addr++; reg_addr 431 drivers/infiniband/hw/qib/qib_diag.c const u32 __iomem *reg_addr; reg_addr 436 drivers/infiniband/hw/qib/qib_diag.c reg_addr = qib_remap_ioaddr32(dd, regoffs, &limit); reg_addr 437 drivers/infiniband/hw/qib/qib_diag.c if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) { reg_addr 443 drivers/infiniband/hw/qib/qib_diag.c reg_end = reg_addr + (count / sizeof(u32)); reg_addr 446 drivers/infiniband/hw/qib/qib_diag.c while (reg_addr < reg_end) { reg_addr 447 drivers/infiniband/hw/qib/qib_diag.c u32 data = readl(reg_addr); reg_addr 454 drivers/infiniband/hw/qib/qib_diag.c reg_addr++; reg_addr 477 drivers/infiniband/hw/qib/qib_diag.c u32 __iomem *reg_addr; reg_addr 482 drivers/infiniband/hw/qib/qib_diag.c reg_addr = qib_remap_ioaddr32(dd, regoffs, &limit); reg_addr 483 drivers/infiniband/hw/qib/qib_diag.c if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) { reg_addr 489 drivers/infiniband/hw/qib/qib_diag.c reg_end = reg_addr + (count / sizeof(u32)); reg_addr 491 drivers/infiniband/hw/qib/qib_diag.c while (reg_addr < reg_end) { reg_addr 498 drivers/infiniband/hw/qib/qib_diag.c writel(data, reg_addr); reg_addr 500 drivers/infiniband/hw/qib/qib_diag.c reg_addr++; reg_addr 1373 drivers/input/misc/ims-pcu.c static DEVICE_ATTR(reg_addr, S_IRUGO | S_IWUSR, reg_addr 71 drivers/input/mouse/sentelic.c static int fsp_reg_read(struct psmouse *psmouse, int reg_addr, int *reg_val) reg_addr 99 drivers/input/mouse/sentelic.c if ((addr = fsp_test_invert_cmd(reg_addr)) != reg_addr) { reg_addr 101 drivers/input/mouse/sentelic.c } else if ((addr = fsp_test_swap_cmd(reg_addr)) != reg_addr) { reg_addr 124 drivers/input/mouse/sentelic.c reg_addr, *reg_val, rc); reg_addr 128 drivers/input/mouse/sentelic.c static int fsp_reg_write(struct psmouse *psmouse, int reg_addr, int reg_val) reg_addr 139 drivers/input/mouse/sentelic.c if ((v = fsp_test_invert_cmd(reg_addr)) != reg_addr) { reg_addr 143 drivers/input/mouse/sentelic.c if ((v = fsp_test_swap_cmd(reg_addr)) != reg_addr) { reg_addr 176 drivers/input/mouse/sentelic.c reg_addr, reg_val, rc); reg_addr 77 drivers/input/touchscreen/chipone_icn8505.c int reg_addr, int reg_addr_width, reg_addr 97 drivers/input/touchscreen/chipone_icn8505.c buf[i] = (reg_addr >> (reg_addr_width - (i + 1) * 8)) & 0xff; reg_addr 106 drivers/input/touchscreen/chipone_icn8505.c i2c_addr, reg_addr, ret); reg_addr 114 drivers/input/touchscreen/chipone_icn8505.c int reg_addr, int reg_addr_width, reg_addr 129 drivers/input/touchscreen/chipone_icn8505.c buf[i] = (reg_addr >> (reg_addr_width - (i + 1) * 8)) & 0xff; reg_addr 140 drivers/input/touchscreen/chipone_icn8505.c i2c_addr, reg_addr, ret); reg_addr 113 drivers/input/touchscreen/edt-ft5x06.c struct edt_reg_addr reg_addr; reg_addr 592 drivers/input/touchscreen/edt-ft5x06.c struct edt_reg_addr *reg_addr = &tsdata->reg_addr; reg_addr 625 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_threshold, reg_addr 627 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_gain, reg_addr 629 drivers/input/touchscreen/edt-ft5x06.c if (reg_addr->reg_offset != NO_REGISTER) reg_addr 630 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_offset, reg_addr 632 drivers/input/touchscreen/edt-ft5x06.c if (reg_addr->reg_offset_x != NO_REGISTER) reg_addr 633 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_x, reg_addr 635 drivers/input/touchscreen/edt-ft5x06.c if (reg_addr->reg_offset_y != NO_REGISTER) reg_addr 636 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_y, reg_addr 638 drivers/input/touchscreen/edt-ft5x06.c if (reg_addr->reg_report_rate != NO_REGISTER) reg_addr 639 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_report_rate, reg_addr 920 drivers/input/touchscreen/edt-ft5x06.c struct edt_reg_addr *reg_addr = &tsdata->reg_addr; reg_addr 926 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_threshold, val); reg_addr 932 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_gain, val); reg_addr 938 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_offset, val); reg_addr 944 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_x, val); reg_addr 950 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_y, val); reg_addr 958 drivers/input/touchscreen/edt-ft5x06.c struct edt_reg_addr *reg_addr = &tsdata->reg_addr; reg_addr 961 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_threshold); reg_addr 962 drivers/input/touchscreen/edt-ft5x06.c tsdata->gain = edt_ft5x06_register_read(tsdata, reg_addr->reg_gain); reg_addr 963 drivers/input/touchscreen/edt-ft5x06.c if (reg_addr->reg_offset != NO_REGISTER) reg_addr 965 drivers/input/touchscreen/edt-ft5x06.c edt_ft5x06_register_read(tsdata, reg_addr->reg_offset); reg_addr 966 drivers/input/touchscreen/edt-ft5x06.c if (reg_addr->reg_offset_x != NO_REGISTER) reg_addr 968 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_x); reg_addr 969 drivers/input/touchscreen/edt-ft5x06.c if (reg_addr->reg_offset_y != NO_REGISTER) reg_addr 971 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_y); reg_addr 972 drivers/input/touchscreen/edt-ft5x06.c if (reg_addr->reg_report_rate != NO_REGISTER) reg_addr 974 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_report_rate); reg_addr 979 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_num_x); reg_addr 981 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_num_y); reg_addr 991 drivers/input/touchscreen/edt-ft5x06.c struct edt_reg_addr *reg_addr = &tsdata->reg_addr; reg_addr 995 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_threshold = WORK_REGISTER_THRESHOLD; reg_addr 996 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_report_rate = WORK_REGISTER_REPORT_RATE; reg_addr 997 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_gain = WORK_REGISTER_GAIN; reg_addr 998 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset = WORK_REGISTER_OFFSET; reg_addr 999 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_x = NO_REGISTER; reg_addr 1000 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_y = NO_REGISTER; reg_addr 1001 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_num_x = WORK_REGISTER_NUM_X; reg_addr 1002 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_num_y = WORK_REGISTER_NUM_Y; reg_addr 1007 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_threshold = M09_REGISTER_THRESHOLD; reg_addr 1008 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_report_rate = NO_REGISTER; reg_addr 1009 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_gain = M09_REGISTER_GAIN; reg_addr 1010 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset = M09_REGISTER_OFFSET; reg_addr 1011 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_x = NO_REGISTER; reg_addr 1012 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_y = NO_REGISTER; reg_addr 1013 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_num_x = M09_REGISTER_NUM_X; reg_addr 1014 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_num_y = M09_REGISTER_NUM_Y; reg_addr 1018 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_threshold = EV_REGISTER_THRESHOLD; reg_addr 1019 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_gain = EV_REGISTER_GAIN; reg_addr 1020 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset = NO_REGISTER; reg_addr 1021 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_x = EV_REGISTER_OFFSET_X; reg_addr 1022 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_y = EV_REGISTER_OFFSET_Y; reg_addr 1023 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_num_x = NO_REGISTER; reg_addr 1024 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_num_y = NO_REGISTER; reg_addr 1025 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_report_rate = NO_REGISTER; reg_addr 1030 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_threshold = M09_REGISTER_THRESHOLD; reg_addr 1031 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_gain = M09_REGISTER_GAIN; reg_addr 1032 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset = M09_REGISTER_OFFSET; reg_addr 1033 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_x = NO_REGISTER; reg_addr 1034 drivers/input/touchscreen/edt-ft5x06.c reg_addr->reg_offset_y = NO_REGISTER; reg_addr 92 drivers/irqchip/irq-csky-apb-intc.c static inline void setup_irq_channel(u32 magic, void __iomem *reg_addr) reg_addr 98 drivers/irqchip/irq-csky-apb-intc.c writel(build_channel_val(i, magic), reg_addr + i); reg_addr 317 drivers/leds/leds-bd2802.c #define BD2802_SET_REGISTER(reg_addr, reg_name) \ reg_addr 318 drivers/leds/leds-bd2802.c static ssize_t bd2802_store_reg##reg_addr(struct device *dev, \ reg_addr 330 drivers/leds/leds-bd2802.c bd2802_write_byte(led->client, reg_addr, (u8) val); \ reg_addr 334 drivers/leds/leds-bd2802.c static struct device_attribute bd2802_reg##reg_addr##_attr = { \ reg_addr 336 drivers/leds/leds-bd2802.c .store = bd2802_store_reg##reg_addr, \ reg_addr 113 drivers/macintosh/therm_adt746x.c u8 reg_addr, data; reg_addr 116 drivers/macintosh/therm_adt746x.c reg_addr = (u8)reg; reg_addr 117 drivers/macintosh/therm_adt746x.c rc = i2c_master_send(th->clt, ®_addr, 1); reg_addr 182 drivers/media/dvb-frontends/lgs8gxx.c u8 reg_addr, t; reg_addr 186 drivers/media/dvb-frontends/lgs8gxx.c reg_addr = 0x23; reg_addr 188 drivers/media/dvb-frontends/lgs8gxx.c reg_addr = 0x48; reg_addr 191 drivers/media/dvb-frontends/lgs8gxx.c lgs8gxx_read_reg(priv, reg_addr, &t); reg_addr 194 drivers/media/dvb-frontends/lgs8gxx.c reg_addr--; reg_addr 521 drivers/media/dvb-frontends/lgs8gxx.c u8 t, reg_addr; reg_addr 523 drivers/media/dvb-frontends/lgs8gxx.c reg_addr = (priv->config->prod == LGS8GXX_PROD_LGS8G75) ? 0x30 : 0xC2; reg_addr 524 drivers/media/dvb-frontends/lgs8gxx.c ret = lgs8gxx_read_reg(priv, reg_addr, &t); reg_addr 533 drivers/media/dvb-frontends/lgs8gxx.c ret = lgs8gxx_write_reg(priv, reg_addr, t); reg_addr 1467 drivers/media/dvb-frontends/mxl5xx.c xpt_nco_clock_rate[demod_id].reg_addr, /* Reg Addr */ reg_addr 1479 drivers/media/dvb-frontends/mxl5xx.c xpt_continuous_clock[demod_id].reg_addr, reg_addr 1487 drivers/media/dvb-frontends/mxl5xx.c xpt_sync_polarity[demod_id].reg_addr, reg_addr 1493 drivers/media/dvb-frontends/mxl5xx.c xpt_valid_polarity[demod_id].reg_addr, reg_addr 1499 drivers/media/dvb-frontends/mxl5xx.c xpt_clock_polarity[demod_id].reg_addr, reg_addr 1505 drivers/media/dvb-frontends/mxl5xx.c xpt_sync_byte[demod_id].reg_addr, reg_addr 1511 drivers/media/dvb-frontends/mxl5xx.c xpt_ts_clock_phase[demod_id].reg_addr, reg_addr 1517 drivers/media/dvb-frontends/mxl5xx.c xpt_lsb_first[demod_id].reg_addr, reg_addr 1525 drivers/media/dvb-frontends/mxl5xx.c xpt_err_replace_sync[demod_id].reg_addr, reg_addr 1530 drivers/media/dvb-frontends/mxl5xx.c xpt_err_replace_valid[demod_id].reg_addr, reg_addr 1538 drivers/media/dvb-frontends/mxl5xx.c xpt_err_replace_sync[demod_id].reg_addr, reg_addr 1544 drivers/media/dvb-frontends/mxl5xx.c xpt_err_replace_valid[demod_id].reg_addr, reg_addr 1553 drivers/media/dvb-frontends/mxl5xx.c xpt_err_replace_sync[demod_id].reg_addr, reg_addr 1559 drivers/media/dvb-frontends/mxl5xx.c xpt_err_replace_valid[demod_id].reg_addr, reg_addr 1570 drivers/media/dvb-frontends/mxl5xx.c xpt_enable_output[demod_id].reg_addr, reg_addr 204 drivers/media/dvb-frontends/mxl5xx_defs.h u32 reg_addr; reg_addr 118 drivers/media/dvb-frontends/stv0900_core.c void stv0900_write_reg(struct stv0900_internal *intp, u16 reg_addr, reg_addr 130 drivers/media/dvb-frontends/stv0900_core.c data[0] = MSB(reg_addr); reg_addr 131 drivers/media/dvb-frontends/stv0900_core.c data[1] = LSB(reg_addr); reg_addr 340 drivers/media/dvb-frontends/stv0900_priv.h u16 reg_addr, u8 reg_data); reg_addr 343 drivers/media/dvb-frontends/stv0900_priv.h u16 reg_addr); reg_addr 255 drivers/media/i2c/noon010pc30.c static int cam_i2c_read(struct v4l2_subdev *sd, u32 reg_addr) reg_addr 259 drivers/media/i2c/noon010pc30.c int ret = set_i2c_page(info, client, reg_addr); reg_addr 263 drivers/media/i2c/noon010pc30.c return i2c_smbus_read_byte_data(client, reg_addr & 0xFF); reg_addr 266 drivers/media/i2c/noon010pc30.c static int cam_i2c_write(struct v4l2_subdev *sd, u32 reg_addr, u32 val) reg_addr 270 drivers/media/i2c/noon010pc30.c int ret = set_i2c_page(info, client, reg_addr); reg_addr 274 drivers/media/i2c/noon010pc30.c return i2c_smbus_write_byte_data(client, reg_addr & 0xFF, val); reg_addr 65 drivers/media/i2c/ov2680.c u16 reg_addr; reg_addr 291 drivers/media/i2c/ov2680.c u16 reg_addr; reg_addr 295 drivers/media/i2c/ov2680.c reg_addr = regs->reg_addr; reg_addr 298 drivers/media/i2c/ov2680.c ret = ov2680_write_reg(sensor, reg_addr, val); reg_addr 177 drivers/media/i2c/ov5640.c u16 reg_addr; reg_addr 1102 drivers/media/i2c/ov5640.c u16 reg_addr; reg_addr 1108 drivers/media/i2c/ov5640.c reg_addr = regs->reg_addr; reg_addr 1113 drivers/media/i2c/ov5640.c ret = ov5640_mod_reg(sensor, reg_addr, mask, val); reg_addr 1115 drivers/media/i2c/ov5640.c ret = ov5640_write_reg(sensor, reg_addr, val); reg_addr 299 drivers/media/i2c/sr030pc30.c static int cam_i2c_read(struct v4l2_subdev *sd, u32 reg_addr) reg_addr 304 drivers/media/i2c/sr030pc30.c int ret = set_i2c_page(info, client, reg_addr); reg_addr 306 drivers/media/i2c/sr030pc30.c ret = i2c_smbus_read_byte_data(client, reg_addr & 0xFF); reg_addr 310 drivers/media/i2c/sr030pc30.c static int cam_i2c_write(struct v4l2_subdev *sd, u32 reg_addr, u32 val) reg_addr 315 drivers/media/i2c/sr030pc30.c int ret = set_i2c_page(info, client, reg_addr); reg_addr 318 drivers/media/i2c/sr030pc30.c client, reg_addr & 0xFF, val); reg_addr 950 drivers/media/pci/cx23885/cx23885-core.c dev->i2c_bus[0].reg_addr = I2C1_ADDR; reg_addr 960 drivers/media/pci/cx23885/cx23885-core.c dev->i2c_bus[1].reg_addr = I2C2_ADDR; reg_addr 970 drivers/media/pci/cx23885/cx23885-core.c dev->i2c_bus[2].reg_addr = I2C3_ADDR; reg_addr 83 drivers/media/pci/cx23885/cx23885-i2c.c cx_write(bus->reg_addr, msg->addr << 25); reg_addr 105 drivers/media/pci/cx23885/cx23885-i2c.c cx_write(bus->reg_addr, addr); reg_addr 127 drivers/media/pci/cx23885/cx23885-i2c.c cx_write(bus->reg_addr, addr); reg_addr 162 drivers/media/pci/cx23885/cx23885-i2c.c cx_write(bus->reg_addr, msg->addr << 25); reg_addr 188 drivers/media/pci/cx23885/cx23885-i2c.c cx_write(bus->reg_addr, msg->addr << 25); reg_addr 243 drivers/media/pci/cx23885/cx23885.h u32 reg_addr; reg_addr 892 drivers/media/pci/cx25821/cx25821-core.c dev->i2c_bus[0].reg_addr = I2C1_ADDR; reg_addr 82 drivers/media/pci/cx25821/cx25821-i2c.c cx_write(bus->reg_addr, msg->addr << 25); reg_addr 106 drivers/media/pci/cx25821/cx25821-i2c.c cx_write(bus->reg_addr, addr); reg_addr 132 drivers/media/pci/cx25821/cx25821-i2c.c cx_write(bus->reg_addr, addr); reg_addr 173 drivers/media/pci/cx25821/cx25821-i2c.c cx_write(bus->reg_addr, msg->addr << 25); reg_addr 198 drivers/media/pci/cx25821/cx25821-i2c.c cx_write(bus->reg_addr, msg->addr << 25); reg_addr 344 drivers/media/pci/cx25821/cx25821-i2c.c int cx25821_i2c_read(struct cx25821_i2c *bus, u16 reg_addr, int *value) reg_addr 365 drivers/media/pci/cx25821/cx25821-i2c.c addr[0] = (reg_addr >> 8); reg_addr 366 drivers/media/pci/cx25821/cx25821-i2c.c addr[1] = (reg_addr & 0xff); reg_addr 378 drivers/media/pci/cx25821/cx25821-i2c.c int cx25821_i2c_write(struct cx25821_i2c *bus, u16 reg_addr, int value) reg_addr 393 drivers/media/pci/cx25821/cx25821-i2c.c buf[0] = reg_addr >> 8; reg_addr 394 drivers/media/pci/cx25821/cx25821-i2c.c buf[1] = reg_addr & 0xff; reg_addr 152 drivers/media/pci/cx25821/cx25821.h u32 reg_addr; reg_addr 372 drivers/media/pci/cx25821/cx25821.h extern int cx25821_i2c_read(struct cx25821_i2c *bus, u16 reg_addr, int *value); reg_addr 373 drivers/media/pci/cx25821/cx25821.h extern int cx25821_i2c_write(struct cx25821_i2c *bus, u16 reg_addr, int value); reg_addr 2125 drivers/media/platform/coda/coda-bit.c u32 reg_addr, reg_stride; reg_addr 2180 drivers/media/platform/coda/coda-bit.c reg_addr = CODA9_CMD_DEC_PIC_ROT_ADDR_Y; reg_addr 2183 drivers/media/platform/coda/coda-bit.c reg_addr = CODA_CMD_DEC_PIC_ROT_ADDR_Y; reg_addr 2186 drivers/media/platform/coda/coda-bit.c coda_write_base(ctx, q_data_dst, dst_buf, reg_addr); reg_addr 582 drivers/media/platform/ti-vpe/vpdma.c void vpdma_set_max_size(struct vpdma_data *vpdma, int reg_addr, reg_addr 585 drivers/media/platform/ti-vpe/vpdma.c if (reg_addr != VPDMA_MAX_SIZE1 && reg_addr != VPDMA_MAX_SIZE2 && reg_addr 586 drivers/media/platform/ti-vpe/vpdma.c reg_addr != VPDMA_MAX_SIZE3) reg_addr 587 drivers/media/platform/ti-vpe/vpdma.c reg_addr = VPDMA_MAX_SIZE1; reg_addr 589 drivers/media/platform/ti-vpe/vpdma.c write_field_reg(vpdma, reg_addr, width - 1, reg_addr 592 drivers/media/platform/ti-vpe/vpdma.c write_field_reg(vpdma, reg_addr, height - 1, reg_addr 980 drivers/media/platform/ti-vpe/vpdma.c u32 reg_addr = VPDMA_INT_LIST0_MASK + VPDMA_INTX_OFFSET * irq_num; reg_addr 983 drivers/media/platform/ti-vpe/vpdma.c val = read_reg(vpdma, reg_addr); reg_addr 988 drivers/media/platform/ti-vpe/vpdma.c write_reg(vpdma, reg_addr, val); reg_addr 995 drivers/media/platform/ti-vpe/vpdma.c u32 reg_addr = VPDMA_INT_LIST0_STAT + VPDMA_INTX_OFFSET * irq_num; reg_addr 997 drivers/media/platform/ti-vpe/vpdma.c return read_reg(vpdma, reg_addr); reg_addr 1004 drivers/media/platform/ti-vpe/vpdma.c u32 reg_addr = VPDMA_INT_LIST0_MASK + VPDMA_INTX_OFFSET * irq_num; reg_addr 1006 drivers/media/platform/ti-vpe/vpdma.c return read_reg(vpdma, reg_addr); reg_addr 1014 drivers/media/platform/ti-vpe/vpdma.c u32 reg_addr = VPDMA_INT_LIST0_STAT + VPDMA_INTX_OFFSET * irq_num; reg_addr 1016 drivers/media/platform/ti-vpe/vpdma.c write_reg(vpdma, reg_addr, 3 << (list_num * 2)); reg_addr 272 drivers/media/platform/ti-vpe/vpdma.h void vpdma_set_max_size(struct vpdma_data *vpdma, int reg_addr, reg_addr 317 drivers/media/tuners/xc5000.c static int xc_write_reg(struct xc5000_priv *priv, u16 reg_addr, u16 i2c_data) reg_addr 323 drivers/media/tuners/xc5000.c buf[0] = (reg_addr >> 8) & 0xFF; reg_addr 324 drivers/media/tuners/xc5000.c buf[1] = reg_addr & 0xFF; reg_addr 313 drivers/media/usb/as102/as10x_cmd.h struct as10x_register_addr reg_addr; reg_addr 332 drivers/media/usb/as102/as10x_cmd.h struct as10x_register_addr reg_addr; reg_addr 379 drivers/media/usb/as102/as10x_cmd.h struct as10x_register_addr reg_addr; reg_addr 267 drivers/memory/omap-gpmc.c void __iomem *reg_addr; reg_addr 269 drivers/memory/omap-gpmc.c reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; reg_addr 270 drivers/memory/omap-gpmc.c writel_relaxed(val, reg_addr); reg_addr 275 drivers/memory/omap-gpmc.c void __iomem *reg_addr; reg_addr 277 drivers/memory/omap-gpmc.c reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; reg_addr 278 drivers/memory/omap-gpmc.c return readl_relaxed(reg_addr); reg_addr 353 drivers/memstick/core/memstick.c (char *)&card->reg_addr, reg_addr 354 drivers/memstick/core/memstick.c sizeof(card->reg_addr)); reg_addr 393 drivers/memstick/core/memstick.c card->reg_addr.r_offset = offsetof(struct ms_register, id); reg_addr 394 drivers/memstick/core/memstick.c card->reg_addr.r_length = sizeof(id_reg); reg_addr 395 drivers/memstick/core/memstick.c card->reg_addr.w_offset = offsetof(struct ms_register, id); reg_addr 396 drivers/memstick/core/memstick.c card->reg_addr.w_length = sizeof(id_reg); reg_addr 209 drivers/memstick/core/ms_block.c msb->reg_addr.w_offset = offsetof(struct ms_register, id); reg_addr 210 drivers/memstick/core/ms_block.c msb->reg_addr.w_length = sizeof(struct ms_id_register); reg_addr 211 drivers/memstick/core/ms_block.c msb->reg_addr.r_offset = offsetof(struct ms_register, id); reg_addr 212 drivers/memstick/core/ms_block.c msb->reg_addr.r_length = sizeof(struct ms_id_register); reg_addr 286 drivers/memstick/core/ms_block.c if (msb->reg_addr.r_offset != offset || reg_addr 287 drivers/memstick/core/ms_block.c msb->reg_addr.r_length != len || !msb->addr_valid) { reg_addr 289 drivers/memstick/core/ms_block.c msb->reg_addr.r_offset = offset; reg_addr 290 drivers/memstick/core/ms_block.c msb->reg_addr.r_length = len; reg_addr 294 drivers/memstick/core/ms_block.c &msb->reg_addr, sizeof(msb->reg_addr)); reg_addr 307 drivers/memstick/core/ms_block.c if (msb->reg_addr.w_offset != offset || reg_addr 308 drivers/memstick/core/ms_block.c msb->reg_addr.w_length != len || !msb->addr_valid) { reg_addr 310 drivers/memstick/core/ms_block.c msb->reg_addr.w_offset = offset; reg_addr 311 drivers/memstick/core/ms_block.c msb->reg_addr.w_length = len; reg_addr 315 drivers/memstick/core/ms_block.c &msb->reg_addr, sizeof(msb->reg_addr)); reg_addr 197 drivers/memstick/core/ms_block.h struct ms_register_addr reg_addr; reg_addr 1127 drivers/memstick/core/mspro_block.c card->reg_addr.r_offset = offsetof(struct mspro_register, status); reg_addr 1128 drivers/memstick/core/mspro_block.c card->reg_addr.r_length = sizeof(struct ms_status_register); reg_addr 1129 drivers/memstick/core/mspro_block.c card->reg_addr.w_offset = offsetof(struct mspro_register, param); reg_addr 1130 drivers/memstick/core/mspro_block.c card->reg_addr.w_length = sizeof(struct mspro_param_register); reg_addr 341 drivers/misc/cardreader/rtsx_pcr.c u8 cmd_type, u16 reg_addr, u8 mask, u8 data) reg_addr 348 drivers/misc/cardreader/rtsx_pcr.c val |= (u32)(reg_addr & 0x3FFF) << 16; reg_addr 212 drivers/misc/cardreader/rtsx_usb.c void rtsx_usb_add_cmd(struct rtsx_ucr *ucr, u8 cmd_type, u16 reg_addr, reg_addr 221 drivers/misc/cardreader/rtsx_usb.c (u8)((reg_addr >> 8) & 0x3F); reg_addr 222 drivers/misc/cardreader/rtsx_usb.c ucr->cmd_buf[i++] = (u8)reg_addr; reg_addr 146 drivers/misc/pch_phub.c void __iomem *reg_addr = chip->pch_phub_base_address + reg_addr_offset; reg_addr 147 drivers/misc/pch_phub.c iowrite32(((ioread32(reg_addr) & ~mask)) | data, reg_addr); reg_addr 26 drivers/mux/adgs1408.c u8 reg_addr, u8 reg_data) reg_addr 30 drivers/mux/adgs1408.c tx_buf[0] = reg_addr; reg_addr 1133 drivers/net/dsa/microchip/ksz9477.c u8 dev_addr, u16 reg_addr, u16 val) reg_addr 1137 drivers/net/dsa/microchip/ksz9477.c ksz_pwrite16(dev, port, REG_PORT_PHY_MMD_INDEX_DATA, reg_addr); reg_addr 131 drivers/net/dsa/sja1105/sja1105.h sja1105_spi_rw_mode_t rw, u64 reg_addr, reg_addr 134 drivers/net/dsa/sja1105/sja1105.h sja1105_spi_rw_mode_t rw, u64 reg_addr, reg_addr 70 drivers/net/dsa/sja1105/sja1105_spi.c sja1105_spi_rw_mode_t rw, u64 reg_addr, reg_addr 83 drivers/net/dsa/sja1105/sja1105_spi.c msg.address = reg_addr; reg_addr 116 drivers/net/dsa/sja1105/sja1105_spi.c sja1105_spi_rw_mode_t rw, u64 reg_addr, reg_addr 129 drivers/net/dsa/sja1105/sja1105_spi.c rc = sja1105_spi_send_packed_buf(priv, rw, reg_addr, packed_buf, reg_addr 1755 drivers/net/ethernet/amd/amd8111e.c unsigned long reg_addr,reg_len; reg_addr 1793 drivers/net/ethernet/amd/amd8111e.c reg_addr = pci_resource_start(pdev, 0); reg_addr 1815 drivers/net/ethernet/amd/amd8111e.c lp->mmio = devm_ioremap(&pdev->dev, reg_addr, reg_len); reg_addr 395 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data) reg_addr 397 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c return atl1c_read_phy_core(hw, false, 0, reg_addr, phy_data); reg_addr 406 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data) reg_addr 408 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c return atl1c_write_phy_core(hw, false, 0, reg_addr, phy_data); reg_addr 413 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c u16 reg_addr, u16 *phy_data) reg_addr 415 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c return atl1c_read_phy_core(hw, true, dev_addr, reg_addr, phy_data); reg_addr 420 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c u16 reg_addr, u16 phy_data) reg_addr 422 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c return atl1c_write_phy_core(hw, true, dev_addr, reg_addr, phy_data); reg_addr 425 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c int atl1c_read_phy_dbg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data) reg_addr 429 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c err = atl1c_write_phy_reg(hw, MII_DBG_ADDR, reg_addr); reg_addr 438 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c int atl1c_write_phy_dbg(struct atl1c_hw *hw, u16 reg_addr, u16 phy_data) reg_addr 442 drivers/net/ethernet/atheros/atl1c/atl1c_hw.c err = atl1c_write_phy_reg(hw, MII_DBG_ADDR, reg_addr); reg_addr 32 drivers/net/ethernet/atheros/atl1c/atl1c_hw.h int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data); reg_addr 33 drivers/net/ethernet/atheros/atl1c/atl1c_hw.h int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data); reg_addr 48 drivers/net/ethernet/atheros/atl1c/atl1c_hw.h u16 reg_addr, u16 *phy_data); reg_addr 50 drivers/net/ethernet/atheros/atl1c/atl1c_hw.h u16 reg_addr, u16 phy_data); reg_addr 51 drivers/net/ethernet/atheros/atl1c/atl1c_hw.h int atl1c_read_phy_dbg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data); reg_addr 52 drivers/net/ethernet/atheros/atl1c/atl1c_hw.h int atl1c_write_phy_dbg(struct atl1c_hw *hw, u16 reg_addr, u16 phy_data); reg_addr 200 drivers/net/ethernet/atheros/atl1e/atl1e_hw.c int atl1e_read_phy_reg(struct atl1e_hw *hw, u16 reg_addr, u16 *phy_data) reg_addr 205 drivers/net/ethernet/atheros/atl1e/atl1e_hw.c val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | reg_addr 234 drivers/net/ethernet/atheros/atl1e/atl1e_hw.c int atl1e_write_phy_reg(struct atl1e_hw *hw, u32 reg_addr, u16 phy_data) reg_addr 240 drivers/net/ethernet/atheros/atl1e/atl1e_hw.c (reg_addr&MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | reg_addr 27 drivers/net/ethernet/atheros/atl1e/atl1e_hw.h s32 atl1e_read_phy_reg(struct atl1e_hw *hw, u16 reg_addr, u16 *phy_data); reg_addr 28 drivers/net/ethernet/atheros/atl1e/atl1e_hw.h s32 atl1e_write_phy_reg(struct atl1e_hw *hw, u32 reg_addr, u16 phy_data); reg_addr 1477 drivers/net/ethernet/atheros/atl1e/atl1e_main.c u16 reg_addr; reg_addr 1483 drivers/net/ethernet/atheros/atl1e/atl1e_main.c reg_addr = reg_addr 1485 drivers/net/ethernet/atheros/atl1e/atl1e_main.c AT_WRITE_REGB(&adapter->hw, reg_addr, 1); reg_addr 342 drivers/net/ethernet/atheros/atlx/atl1.c static s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data) reg_addr 347 drivers/net/ethernet/atheros/atlx/atl1.c val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | reg_addr 589 drivers/net/ethernet/atheros/atlx/atl1.c static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data) reg_addr 595 drivers/net/ethernet/atheros/atlx/atl1.c (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | reg_addr 2491 drivers/net/ethernet/atheros/atlx/atl2.c static s32 atl2_read_phy_reg(struct atl2_hw *hw, u16 reg_addr, u16 *phy_data) reg_addr 2496 drivers/net/ethernet/atheros/atlx/atl2.c val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | reg_addr 2526 drivers/net/ethernet/atheros/atlx/atl2.c static s32 atl2_write_phy_reg(struct atl2_hw *hw, u32 reg_addr, u16 phy_data) reg_addr 2532 drivers/net/ethernet/atheros/atlx/atl2.c (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | reg_addr 74 drivers/net/ethernet/atheros/atlx/atl2.h static s32 atl2_read_phy_reg(struct atl2_hw *hw, u16 reg_addr, u16 *phy_data); reg_addr 75 drivers/net/ethernet/atheros/atlx/atl2.h static s32 atl2_write_phy_reg(struct atl2_hw *hw, u32 reg_addr, u16 phy_data); reg_addr 31 drivers/net/ethernet/atheros/atlx/atlx.c static s32 atlx_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data); reg_addr 67 drivers/net/ethernet/broadcom/bnx2x/bnx2x_dump.h static const struct reg_addr page_read_regs_e2[] = { reg_addr 76 drivers/net/ethernet/broadcom/bnx2x/bnx2x_dump.h static const struct reg_addr page_read_regs_e3[] = { reg_addr 80 drivers/net/ethernet/broadcom/bnx2x/bnx2x_dump.h static const struct reg_addr reg_addrs[] = { reg_addr 1901 drivers/net/ethernet/broadcom/bnx2x/bnx2x_dump.h static const struct reg_addr idle_reg_addrs[] = { reg_addr 785 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c static const struct reg_addr *__bnx2x_get_page_read_ar(struct bnx2x *bp) reg_addr 806 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c const struct reg_addr *reg_info) reg_addr 863 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c const struct reg_addr *read_addr = __bnx2x_get_page_read_ar(bp); reg_addr 215 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h u32 reg_addr, reg_bit_map, vnic; reg_addr 236 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h reg_addr = BNX2X_VOQ_Q_REG_ADDR(curr_cos, pf_q_num); reg_addr 237 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h reg_bit_map = REG_RD(bp, reg_addr); reg_addr 238 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h REG_WR(bp, reg_addr, reg_bit_map & (~q_bit_map)); reg_addr 241 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h reg_addr = BNX2X_VOQ_Q_REG_ADDR(new_cos, pf_q_num); reg_addr 242 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h reg_bit_map = REG_RD(bp, reg_addr); reg_addr 243 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h REG_WR(bp, reg_addr, reg_bit_map | q_bit_map); reg_addr 249 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h reg_addr = BNX2X_Q_CMDQ_REG_ADDR(pf_q_num); reg_addr 250 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h reg_bit_map = REG_RD(bp, reg_addr); reg_addr 255 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h REG_WR(bp, reg_addr, reg_bit_map); reg_addr 4003 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c u32 reg_addr; reg_addr 4085 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c reg_addr = (HC_REG_COMMAND_REG + port*32 + reg_addr 4088 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c reg_addr = (BAR_IGU_INTMEM + IGU_CMD_ATTN_BIT_SET_UPPER*8); reg_addr 4091 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c (bp->common.int_block == INT_BLOCK_HC) ? "HC" : "IGU", reg_addr); reg_addr 4092 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c REG_WR(bp, reg_addr, asserted); reg_addr 5096 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c u32 reg_addr; reg_addr 5160 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c reg_addr = (HC_REG_COMMAND_REG + port*32 + reg_addr 5163 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c reg_addr = (BAR_IGU_INTMEM + IGU_CMD_ATTN_BIT_CLR_UPPER*8); reg_addr 5167 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c (bp->common.int_block == INT_BLOCK_HC) ? "HC" : "IGU", reg_addr); reg_addr 5168 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c REG_WR(bp, reg_addr, val); reg_addr 5173 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c reg_addr = port ? MISC_REG_AEU_MASK_ATTN_FUNC_1 : reg_addr 5177 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c aeu_mask = REG_RD(bp, reg_addr); reg_addr 5184 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c REG_WR(bp, reg_addr, aeu_mask); reg_addr 7707 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : reg_addr 7709 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c val = REG_RD(bp, reg_addr); reg_addr 7711 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c REG_WR(bp, reg_addr, val); reg_addr 9350 drivers/net/ethernet/broadcom/bnxt/bnxt.c req.reg_addr = cpu_to_le16(reg & 0x1f); reg_addr 9355 drivers/net/ethernet/broadcom/bnxt/bnxt.c req.reg_addr = cpu_to_le16(reg); reg_addr 9377 drivers/net/ethernet/broadcom/bnxt/bnxt.c req.reg_addr = cpu_to_le16(reg & 0x1f); reg_addr 9382 drivers/net/ethernet/broadcom/bnxt/bnxt.c req.reg_addr = cpu_to_le16(reg); reg_addr 3284 drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h __le16 reg_addr; reg_addr 3311 drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h __le16 reg_addr; reg_addr 310 drivers/net/ethernet/brocade/bna/bnad_debugfs.c void __iomem *rb, *reg_addr; reg_addr 348 drivers/net/ethernet/brocade/bna/bnad_debugfs.c reg_addr = rb + addr; reg_addr 352 drivers/net/ethernet/brocade/bna/bnad_debugfs.c *regbuf = readl(reg_addr); reg_addr 354 drivers/net/ethernet/brocade/bna/bnad_debugfs.c reg_addr += sizeof(u32); reg_addr 370 drivers/net/ethernet/brocade/bna/bnad_debugfs.c void __iomem *reg_addr; reg_addr 396 drivers/net/ethernet/brocade/bna/bnad_debugfs.c reg_addr = (bfa_ioc_bar0(ioc)) + addr; reg_addr 398 drivers/net/ethernet/brocade/bna/bnad_debugfs.c writel(val, reg_addr); reg_addr 789 drivers/net/ethernet/cavium/thunder/nic_main.c u64 reg_addr; reg_addr 793 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr = NIC_PF_VNIC_0_127_RX_STAT_0_13 | reg_addr 796 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, reg_addr, 0); reg_addr 802 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr = NIC_PF_VNIC_0_127_TX_STAT_0_4 | reg_addr 805 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, reg_addr, 0); reg_addr 812 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr = (vf << NIC_QS_ID_SHIFT) | reg_addr 815 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr |= NIC_PF_QSET_0_127_RQ_0_7_STAT_0_1; reg_addr 816 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, reg_addr, 0); reg_addr 819 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr |= NIC_PF_QSET_0_127_SQ_0_7_STAT_0_1; reg_addr 820 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, reg_addr, 0); reg_addr 958 drivers/net/ethernet/cavium/thunder/nic_main.c u64 reg_addr; reg_addr 980 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr = NIC_PF_QSET_0_127_CFG | reg_addr 989 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, reg_addr, cfg); reg_addr 992 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr = NIC_PF_QSET_0_127_RQ_0_7_CFG | reg_addr 995 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, reg_addr, mbx.rq.cfg); reg_addr 1007 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr = NIC_PF_QSET_0_127_RQ_0_7_BP_CFG | reg_addr 1010 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, reg_addr, mbx.rq.cfg); reg_addr 1016 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr = NIC_PF_QSET_0_127_RQ_0_7_DROP_CFG | reg_addr 1019 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, reg_addr, mbx.rq.cfg); reg_addr 1022 drivers/net/ethernet/cavium/thunder/nic_main.c reg_addr = NIC_PF_QSET_0_127_SQ_0_7_CFG | reg_addr 1025 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, reg_addr, mbx.sq.cfg); reg_addr 46 drivers/net/ethernet/chelsio/cxgb/cphy.h u16 reg_addr); reg_addr 48 drivers/net/ethernet/chelsio/cxgb/cphy.h u16 reg_addr, u16 val); reg_addr 284 drivers/net/ethernet/chelsio/cxgb/subr.c u16 reg_addr) reg_addr 287 drivers/net/ethernet/chelsio/cxgb/subr.c u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); reg_addr 301 drivers/net/ethernet/chelsio/cxgb/subr.c u16 reg_addr, u16 val) reg_addr 304 drivers/net/ethernet/chelsio/cxgb/subr.c u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); reg_addr 326 drivers/net/ethernet/chelsio/cxgb/subr.c u16 reg_addr) reg_addr 336 drivers/net/ethernet/chelsio/cxgb/subr.c __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, reg_addr); reg_addr 353 drivers/net/ethernet/chelsio/cxgb/subr.c int mmd_addr, u16 reg_addr, u16 val) reg_addr 362 drivers/net/ethernet/chelsio/cxgb/subr.c __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, reg_addr); reg_addr 270 drivers/net/ethernet/chelsio/cxgb3/adapter.h static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr) reg_addr 272 drivers/net/ethernet/chelsio/cxgb3/adapter.h u32 val = readl(adapter->regs + reg_addr); reg_addr 274 drivers/net/ethernet/chelsio/cxgb3/adapter.h CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val); reg_addr 278 drivers/net/ethernet/chelsio/cxgb3/adapter.h static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val) reg_addr 280 drivers/net/ethernet/chelsio/cxgb3/adapter.h CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val); reg_addr 281 drivers/net/ethernet/chelsio/cxgb3/adapter.h writel(val, adapter->regs + reg_addr); reg_addr 79 drivers/net/ethernet/chelsio/cxgb3/ael1002.c unsigned short reg_addr; reg_addr 90 drivers/net/ethernet/chelsio/cxgb3/ael1002.c err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr, reg_addr 94 drivers/net/ethernet/chelsio/cxgb3/ael1002.c rv->reg_addr, rv->clear_bits, reg_addr 158 drivers/net/ethernet/chelsio/cxgb3/common.h u16 reg_addr); reg_addr 160 drivers/net/ethernet/chelsio/cxgb3/common.h u16 reg_addr, u16 val); reg_addr 598 drivers/net/ethernet/chelsio/cxgb3/common.h #define XGM_REG(reg_addr, idx) \ reg_addr 599 drivers/net/ethernet/chelsio/cxgb3/common.h ((reg_addr) + (idx) * (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR)) reg_addr 602 drivers/net/ethernet/chelsio/cxgb3/common.h unsigned int reg_addr; reg_addr 88 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c t3_write_reg(adapter, p->reg_addr + offset, p->val); reg_addr 210 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c u16 reg_addr) reg_addr 215 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr); reg_addr 229 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c u16 reg_addr, u16 val) reg_addr 234 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr); reg_addr 257 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c int reg_addr) reg_addr 263 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c t3_write_reg(adapter, A_MI1_DATA, reg_addr); reg_addr 273 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c u16 reg_addr) reg_addr 280 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c ret = mi1_wr_addr(adapter, phy_addr, mmd_addr, reg_addr); reg_addr 293 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c u16 reg_addr, u16 val) reg_addr 300 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c ret = mi1_wr_addr(adapter, phy_addr, mmd_addr, reg_addr); reg_addr 56 drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h u32 reg_addr; reg_addr 1383 drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c t4_write_reg(padap, qbase->reg_addr, func); reg_addr 1427 drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c sge_qbase->reg_addr = t6_sge_qbase_index_array[0]; reg_addr 1297 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) reg_addr 1299 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h return readl(adap->regs + reg_addr); reg_addr 1302 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h static inline void t4_write_reg(struct adapter *adap, u32 reg_addr, u32 val) reg_addr 1304 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h writel(val, adap->regs + reg_addr); reg_addr 1320 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h static inline u64 t4_read_reg64(struct adapter *adap, u32 reg_addr) reg_addr 1322 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h return readq(adap->regs + reg_addr); reg_addr 1325 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h static inline void t4_write_reg64(struct adapter *adap, u32 reg_addr, u64 val) reg_addr 1327 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h writeq(val, adap->regs + reg_addr); reg_addr 5353 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c static void t4_tp_indirect_rw(struct adapter *adap, u32 reg_addr, u32 reg_data, reg_addr 5360 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c switch (reg_addr) { reg_addr 5382 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_read_indirect(adap, reg_addr, reg_data, buff, nregs, reg_addr 5385 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_write_indirect(adap, reg_addr, reg_data, buff, nregs, reg_addr 39 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MYPF_REG(reg_addr) (MYPF_BASE + (reg_addr)) reg_addr 42 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PF0_REG(reg_addr) (PF0_BASE + (reg_addr)) reg_addr 52 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MYPORT_REG(reg_addr) (MYPORT_BASE + (reg_addr)) reg_addr 55 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PORT0_REG(reg_addr) (PORT0_BASE + (reg_addr)) reg_addr 64 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCIE_MEM_ACCESS_REG(reg_addr, idx) ((reg_addr) + (idx) * 8) reg_addr 65 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCIE_MAILBOX_REG(reg_addr, idx) ((reg_addr) + (idx) * 8) reg_addr 66 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MC_BIST_STATUS_REG(reg_addr, idx) ((reg_addr) + (idx) * 4) reg_addr 67 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDC_BIST_STATUS_REG(reg_addr, idx) ((reg_addr) + (idx) * 4) reg_addr 69 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCIE_FW_REG(reg_addr, idx) ((reg_addr) + (idx) * 4) reg_addr 429 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr) reg_addr 431 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h return readl(adapter->regs + reg_addr); reg_addr 442 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val) reg_addr 444 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h writel(val, adapter->regs + reg_addr); reg_addr 467 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr) reg_addr 469 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h return readq(adapter->regs + reg_addr); reg_addr 480 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h static inline void t4_write_reg64(struct adapter *adapter, u32 reg_addr, reg_addr 483 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h writeq(val, adapter->regs + reg_addr); reg_addr 306 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c u32 reg_addr; reg_addr 315 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG; reg_addr 317 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_XGE_RESET_DREQ_REG; reg_addr 319 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c dsaf_write_sub(dsaf_dev, reg_addr, reg_val); reg_addr 342 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c u32 reg_addr; reg_addr 345 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_DSAF_RESET_REQ_REG; reg_addr 347 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_DSAF_RESET_DREQ_REG; reg_addr 349 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c dsaf_write_sub(dsaf_dev, reg_addr, msk); reg_addr 455 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c u32 reg_addr; reg_addr 460 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG; reg_addr 462 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG; reg_addr 464 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c dsaf_write_sub(dsaf_dev, reg_addr, reg_val); reg_addr 477 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c u32 reg_addr; reg_addr 485 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_REQ_REG; reg_addr 487 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_DREQ_REG; reg_addr 493 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG; reg_addr 495 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG; reg_addr 498 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c dsaf_write_sub(dsaf_dev, reg_addr, reg_val); reg_addr 584 drivers/net/ethernet/hisilicon/hns3/hns3_enet.h u8 __iomem *reg_addr = READ_ONCE(base); reg_addr 586 drivers/net/ethernet/hisilicon/hns3/hns3_enet.h writel(value, reg_addr + reg); reg_addr 1079 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h u8 __iomem *reg_addr = READ_ONCE(base); reg_addr 1081 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h return readl(reg_addr + reg); reg_addr 263 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h u8 __iomem *reg_addr = READ_ONCE(base); reg_addr 265 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h return readl(reg_addr + reg); reg_addr 416 drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c u32 reg_addr, val; reg_addr 419 drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c reg_addr = HINIC_CSR_API_CMD_CHAIN_REQ_ADDR(chain->chain_type); reg_addr 420 drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c val = hinic_hwif_read_reg(hwif, reg_addr); reg_addr 425 drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c hinic_hwif_write_reg(hwif, reg_addr, val); reg_addr 429 drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c val = hinic_hwif_read_reg(hwif, reg_addr); reg_addr 52 drivers/net/ethernet/intel/e1000/e1000_hw.c static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, reg_addr 54 drivers/net/ethernet/intel/e1000/e1000_hw.c static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, reg_addr 2792 drivers/net/ethernet/intel/e1000/e1000_hw.c s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data) reg_addr 2800 drivers/net/ethernet/intel/e1000/e1000_hw.c (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { reg_addr 2802 drivers/net/ethernet/intel/e1000/e1000_hw.c (u16) reg_addr); reg_addr 2807 drivers/net/ethernet/intel/e1000/e1000_hw.c ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr, reg_addr 2815 drivers/net/ethernet/intel/e1000/e1000_hw.c static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, reg_addr 2822 drivers/net/ethernet/intel/e1000/e1000_hw.c if (reg_addr > MAX_PHY_REG_ADDRESS) { reg_addr 2823 drivers/net/ethernet/intel/e1000/e1000_hw.c e_dbg("PHY Address %d is out of range\n", reg_addr); reg_addr 2833 drivers/net/ethernet/intel/e1000/e1000_hw.c mdic = ((reg_addr << E1000_MDIC_REG_SHIFT) | reg_addr 2862 drivers/net/ethernet/intel/e1000/e1000_hw.c mdic = ((reg_addr << E1000_MDIC_REG_SHIFT) | reg_addr 2906 drivers/net/ethernet/intel/e1000/e1000_hw.c mdic = ((reg_addr) | (phy_addr << 5) | reg_addr 2929 drivers/net/ethernet/intel/e1000/e1000_hw.c s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 phy_data) reg_addr 2937 drivers/net/ethernet/intel/e1000/e1000_hw.c (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { reg_addr 2939 drivers/net/ethernet/intel/e1000/e1000_hw.c (u16)reg_addr); reg_addr 2946 drivers/net/ethernet/intel/e1000/e1000_hw.c ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr, reg_addr 2953 drivers/net/ethernet/intel/e1000/e1000_hw.c static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, reg_addr 2960 drivers/net/ethernet/intel/e1000/e1000_hw.c if (reg_addr > MAX_PHY_REG_ADDRESS) { reg_addr 2961 drivers/net/ethernet/intel/e1000/e1000_hw.c e_dbg("PHY Address %d is out of range\n", reg_addr); reg_addr 2973 drivers/net/ethernet/intel/e1000/e1000_hw.c (reg_addr << E1000_MDIC_REG_SHIFT) | reg_addr 2995 drivers/net/ethernet/intel/e1000/e1000_hw.c (reg_addr << E1000_MDIC_REG_SHIFT) | reg_addr 3029 drivers/net/ethernet/intel/e1000/e1000_hw.c mdic = ((PHY_TURNAROUND) | (reg_addr << 2) | (phy_addr << 7) | reg_addr 281 drivers/net/ethernet/intel/e1000/e1000_hw.h s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 * phy_data); reg_addr 282 drivers/net/ethernet/intel/e1000/e1000_hw.h s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 data); reg_addr 2069 drivers/net/ethernet/intel/e1000e/ich8lan.c u16 word_addr, reg_data, reg_addr, phy_page = 0; reg_addr 2154 drivers/net/ethernet/intel/e1000e/ich8lan.c 1, ®_addr); reg_addr 2159 drivers/net/ethernet/intel/e1000e/ich8lan.c if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) { reg_addr 2164 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_addr &= PHY_REG_MASK; reg_addr 2165 drivers/net/ethernet/intel/e1000e/ich8lan.c reg_addr |= phy_page; reg_addr 2167 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy_locked(hw, (u32)reg_addr, reg_data); reg_addr 2974 drivers/net/ethernet/intel/i40e/i40e_common.c u32 reg_addr, u64 *reg_val, reg_addr 2987 drivers/net/ethernet/intel/i40e/i40e_common.c cmd_resp->address = cpu_to_le32(reg_addr); reg_addr 3009 drivers/net/ethernet/intel/i40e/i40e_common.c u32 reg_addr, u64 reg_val, reg_addr 3019 drivers/net/ethernet/intel/i40e/i40e_common.c cmd->address = cpu_to_le32(reg_addr); reg_addr 5215 drivers/net/ethernet/intel/i40e/i40e_common.c u32 reg_addr, u32 *reg_val, reg_addr 5228 drivers/net/ethernet/intel/i40e/i40e_common.c cmd_resp->address = cpu_to_le32(reg_addr); reg_addr 5243 drivers/net/ethernet/intel/i40e/i40e_common.c u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr) reg_addr 5255 drivers/net/ethernet/intel/i40e/i40e_common.c status = i40e_aq_rx_ctl_read_register(hw, reg_addr, &val, NULL); reg_addr 5265 drivers/net/ethernet/intel/i40e/i40e_common.c val = rd32(hw, reg_addr); reg_addr 5281 drivers/net/ethernet/intel/i40e/i40e_common.c u32 reg_addr, u32 reg_val, reg_addr 5291 drivers/net/ethernet/intel/i40e/i40e_common.c cmd->address = cpu_to_le32(reg_addr); reg_addr 5305 drivers/net/ethernet/intel/i40e/i40e_common.c void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val) reg_addr 5316 drivers/net/ethernet/intel/i40e/i40e_common.c status = i40e_aq_rx_ctl_write_register(hw, reg_addr, reg_addr 5327 drivers/net/ethernet/intel/i40e/i40e_common.c wr32(hw, reg_addr, reg_val); reg_addr 5343 drivers/net/ethernet/intel/i40e/i40e_common.c u32 reg_addr, u32 reg_val, reg_addr 5356 drivers/net/ethernet/intel/i40e/i40e_common.c cmd->reg_address = cpu_to_le32(reg_addr); reg_addr 5377 drivers/net/ethernet/intel/i40e/i40e_common.c u32 reg_addr, u32 *reg_val, reg_addr 5390 drivers/net/ethernet/intel/i40e/i40e_common.c cmd->reg_address = cpu_to_le32(reg_addr); reg_addr 69 drivers/net/ethernet/intel/i40e/i40e_prototype.h u32 reg_addr, u64 reg_val, reg_addr 72 drivers/net/ethernet/intel/i40e/i40e_prototype.h u32 reg_addr, u64 *reg_val, reg_addr 405 drivers/net/ethernet/intel/i40e/i40e_prototype.h u32 reg_addr, u32 *reg_val, reg_addr 407 drivers/net/ethernet/intel/i40e/i40e_prototype.h u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr); reg_addr 409 drivers/net/ethernet/intel/i40e/i40e_prototype.h u32 reg_addr, u32 reg_val, reg_addr 411 drivers/net/ethernet/intel/i40e/i40e_prototype.h void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val); reg_addr 414 drivers/net/ethernet/intel/i40e/i40e_prototype.h u32 reg_addr, u32 reg_val, reg_addr 418 drivers/net/ethernet/intel/i40e/i40e_prototype.h u32 reg_addr, u32 *reg_val, reg_addr 146 drivers/net/ethernet/intel/ixgbe/ixgbe_common.h u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); reg_addr 148 drivers/net/ethernet/intel/ixgbe/ixgbe_common.h if (ixgbe_removed(reg_addr)) reg_addr 150 drivers/net/ethernet/intel/ixgbe/ixgbe_common.h writel(value, reg_addr + reg); reg_addr 165 drivers/net/ethernet/intel/ixgbe/ixgbe_common.h u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); reg_addr 167 drivers/net/ethernet/intel/ixgbe/ixgbe_common.h if (ixgbe_removed(reg_addr)) reg_addr 169 drivers/net/ethernet/intel/ixgbe/ixgbe_common.h writeq(value, reg_addr + reg); reg_addr 293 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c u8 __iomem *reg_addr; reg_addr 297 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c reg_addr = READ_ONCE(hw->hw_addr); reg_addr 298 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c if (ixgbe_removed(reg_addr)) reg_addr 306 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c value = readl(reg_addr + IXGBE_STATUS); reg_addr 315 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c value = readl(reg_addr + reg); reg_addr 334 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); reg_addr 337 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c if (ixgbe_removed(reg_addr)) reg_addr 345 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY); reg_addr 360 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c value = readl(reg_addr + reg); reg_addr 471 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, reg_addr 477 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | reg_addr 505 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | reg_addr 547 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 554 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type, reg_addr 572 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 581 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | reg_addr 610 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | reg_addr 645 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 652 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c status = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type, reg_addr 128 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 130 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 132 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 134 drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 350 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c static s32 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 356 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c static s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 691 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c static s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 706 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) | reg_addr 791 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c static s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 803 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c write_cmd.address = cpu_to_be16(reg_addr); reg_addr 817 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c static s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 833 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c hic.cmd.address = cpu_to_be16(reg_addr); reg_addr 1388 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c static s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 1403 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) | reg_addr 3755 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c static s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 3764 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); reg_addr 3781 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c static s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, reg_addr 3790 drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c status = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type, phy_data); reg_addr 151 drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); reg_addr 154 drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c if (IXGBE_REMOVED(reg_addr)) reg_addr 156 drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c value = readl(reg_addr + reg); reg_addr 162 drivers/net/ethernet/intel/ixgbevf/vf.h u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); reg_addr 164 drivers/net/ethernet/intel/ixgbevf/vf.h if (IXGBE_REMOVED(reg_addr)) reg_addr 166 drivers/net/ethernet/intel/ixgbevf/vf.h writel(value, reg_addr + reg); reg_addr 2330 drivers/net/ethernet/qlogic/qed/qed_debug.c u32 reg_addr; reg_addr 2338 drivers/net/ethernet/qlogic/qed/qed_debug.c reg_addr = s_storm_defs[storm_id].sem_fast_mem_addr + reg_addr 2340 drivers/net/ethernet/qlogic/qed/qed_debug.c qed_wr(p_hwfn, p_ptt, reg_addr, stall ? 1 : 0); reg_addr 257 drivers/net/ethernet/qlogic/qed/qed_hw.c u32 __iomem *reg_addr; reg_addr 272 drivers/net/ethernet/qlogic/qed/qed_hw.c reg_addr = (u32 __iomem *)REG_ADDR(p_hwfn, hw_offset); reg_addr 275 drivers/net/ethernet/qlogic/qed/qed_hw.c DIRECT_REG_WR(reg_addr++, *host_addr++); reg_addr 278 drivers/net/ethernet/qlogic/qed/qed_hw.c *host_addr++ = DIRECT_REG_RD(reg_addr++); reg_addr 863 drivers/net/ethernet/qlogic/qed/qed_sriov.c u32 reg_addr, val; reg_addr 871 drivers/net/ethernet/qlogic/qed/qed_sriov.c reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4; reg_addr 873 drivers/net/ethernet/qlogic/qed/qed_sriov.c qed_wr(p_hwfn, p_ptt, reg_addr, val); reg_addr 1083 drivers/net/ethernet/realtek/r8169_main.c static void rtl_patchphy(struct rtl8169_private *tp, int reg_addr, int value) reg_addr 1085 drivers/net/ethernet/realtek/r8169_main.c rtl_writephy(tp, reg_addr, rtl_readphy(tp, reg_addr) | value); reg_addr 1088 drivers/net/ethernet/realtek/r8169_main.c static void rtl_w0w1_phy(struct rtl8169_private *tp, int reg_addr, int p, int m) reg_addr 1092 drivers/net/ethernet/realtek/r8169_main.c val = rtl_readphy(tp, reg_addr); reg_addr 1093 drivers/net/ethernet/realtek/r8169_main.c rtl_writephy(tp, reg_addr, (val & ~m) | p); reg_addr 1101 drivers/net/ethernet/realtek/r8169_main.c static void rtl_ephy_write(struct rtl8169_private *tp, int reg_addr, int value) reg_addr 1104 drivers/net/ethernet/realtek/r8169_main.c (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT); reg_addr 1111 drivers/net/ethernet/realtek/r8169_main.c static u16 rtl_ephy_read(struct rtl8169_private *tp, int reg_addr) reg_addr 1113 drivers/net/ethernet/realtek/r8169_main.c RTL_W32(tp, EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT); reg_addr 1350 drivers/net/ethernet/realtek/r8169_main.c static u8 rtl8168d_efuse_read(struct rtl8169_private *tp, int reg_addr) reg_addr 1352 drivers/net/ethernet/realtek/r8169_main.c RTL_W32(tp, EFUSEAR, (reg_addr & EFUSEAR_REG_MASK) << EFUSEAR_REG_SHIFT); reg_addr 330 drivers/net/ethernet/socionext/netsec.c static void netsec_write(struct netsec_priv *priv, u32 reg_addr, u32 val) reg_addr 332 drivers/net/ethernet/socionext/netsec.c writel(val, priv->ioaddr + reg_addr); reg_addr 335 drivers/net/ethernet/socionext/netsec.c static u32 netsec_read(struct netsec_priv *priv, u32 reg_addr) reg_addr 337 drivers/net/ethernet/socionext/netsec.c return readl(priv->ioaddr + reg_addr); reg_addr 465 drivers/net/ethernet/socionext/netsec.c static int netsec_phy_read(struct mii_bus *bus, int phy_addr, int reg_addr); reg_addr 498 drivers/net/ethernet/socionext/netsec.c static int netsec_phy_read(struct mii_bus *bus, int phy_addr, int reg_addr) reg_addr 506 drivers/net/ethernet/socionext/netsec.c reg_addr << NETSEC_GMAC_GAR_REG_SHIFT_GR | reg_addr 677 drivers/net/phy/phy_device.c int phy_reg, reg_addr; reg_addr 679 drivers/net/phy/phy_device.c reg_addr = MII_ADDR_C45 | dev_addr << 16 | MDIO_DEVS2; reg_addr 680 drivers/net/phy/phy_device.c phy_reg = mdiobus_read(bus, addr, reg_addr); reg_addr 685 drivers/net/phy/phy_device.c reg_addr = MII_ADDR_C45 | dev_addr << 16 | MDIO_DEVS1; reg_addr 686 drivers/net/phy/phy_device.c phy_reg = mdiobus_read(bus, addr, reg_addr); reg_addr 713 drivers/net/phy/phy_device.c int i, reg_addr; reg_addr 749 drivers/net/phy/phy_device.c reg_addr = MII_ADDR_C45 | i << 16 | MII_PHYSID1; reg_addr 750 drivers/net/phy/phy_device.c phy_reg = mdiobus_read(bus, addr, reg_addr); reg_addr 755 drivers/net/phy/phy_device.c reg_addr = MII_ADDR_C45 | i << 16 | MII_PHYSID2; reg_addr 756 drivers/net/phy/phy_device.c phy_reg = mdiobus_read(bus, addr, reg_addr); reg_addr 1144 drivers/net/usb/r8152.c static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value) reg_addr 1146 drivers/net/usb/r8152.c ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value); reg_addr 1149 drivers/net/usb/r8152.c static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr) reg_addr 1151 drivers/net/usb/r8152.c return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2); reg_addr 644 drivers/net/wireless/ath/ath10k/core.h u32 reg_addr; reg_addr 639 drivers/net/wireless/ath/ath10k/debug.c u32 reg_addr; reg_addr 642 drivers/net/wireless/ath/ath10k/debug.c reg_addr = ar->debug.reg_addr; reg_addr 645 drivers/net/wireless/ath/ath10k/debug.c len += scnprintf(buf + len, sizeof(buf) - len, "0x%x\n", reg_addr); reg_addr 655 drivers/net/wireless/ath/ath10k/debug.c u32 reg_addr; reg_addr 658 drivers/net/wireless/ath/ath10k/debug.c ret = kstrtou32_from_user(user_buf, count, 0, ®_addr); reg_addr 662 drivers/net/wireless/ath/ath10k/debug.c if (!IS_ALIGNED(reg_addr, 4)) reg_addr 666 drivers/net/wireless/ath/ath10k/debug.c ar->debug.reg_addr = reg_addr; reg_addr 687 drivers/net/wireless/ath/ath10k/debug.c u32 reg_addr, reg_val; reg_addr 698 drivers/net/wireless/ath/ath10k/debug.c reg_addr = ar->debug.reg_addr; reg_addr 700 drivers/net/wireless/ath/ath10k/debug.c reg_val = ath10k_hif_read32(ar, reg_addr); reg_addr 701 drivers/net/wireless/ath/ath10k/debug.c len = scnprintf(buf, sizeof(buf), "0x%08x:0x%08x\n", reg_addr, reg_val); reg_addr 716 drivers/net/wireless/ath/ath10k/debug.c u32 reg_addr, reg_val; reg_addr 727 drivers/net/wireless/ath/ath10k/debug.c reg_addr = ar->debug.reg_addr; reg_addr 733 drivers/net/wireless/ath/ath10k/debug.c ath10k_hif_write32(ar, reg_addr, reg_val); reg_addr 879 drivers/net/wireless/ath/ath6kl/debug.c static bool ath6kl_dbg_is_diag_reg_valid(u32 reg_addr) reg_addr 884 drivers/net/wireless/ath/ath6kl/debug.c if (reg_addr >= diag_reg[i].reg_start && reg_addr 885 drivers/net/wireless/ath/ath6kl/debug.c reg_addr <= diag_reg[i].reg_end) reg_addr 914 drivers/net/wireless/ath/ath6kl/debug.c unsigned long reg_addr; reg_addr 916 drivers/net/wireless/ath/ath6kl/debug.c if (kstrtoul_from_user(user_buf, count, 0, ®_addr)) reg_addr 919 drivers/net/wireless/ath/ath6kl/debug.c if ((reg_addr % 4) != 0) reg_addr 922 drivers/net/wireless/ath/ath6kl/debug.c if (reg_addr && !ath6kl_dbg_is_diag_reg_valid(reg_addr)) reg_addr 925 drivers/net/wireless/ath/ath6kl/debug.c ar->debug.dbgfs_diag_reg = reg_addr; reg_addr 1084 drivers/net/wireless/ath/ath6kl/debug.c u32 reg_addr, reg_val; reg_addr 1097 drivers/net/wireless/ath/ath6kl/debug.c if (kstrtou32(token, 0, ®_addr)) reg_addr 1100 drivers/net/wireless/ath/ath6kl/debug.c if (!ath6kl_dbg_is_diag_reg_valid(reg_addr)) reg_addr 1106 drivers/net/wireless/ath/ath6kl/debug.c ar->debug.diag_reg_addr_wr = reg_addr; reg_addr 966 drivers/net/wireless/ath/ath6kl/sdio.c static int ath6kl_set_addrwin_reg(struct ath6kl *ar, u32 reg_addr, u32 addr) reg_addr 989 drivers/net/wireless/ath/ath6kl/sdio.c status = ath6kl_sdio_read_write_sync(ar, reg_addr + i, addr_val, reg_addr 997 drivers/net/wireless/ath/ath6kl/sdio.c __func__, addr, reg_addr); reg_addr 1007 drivers/net/wireless/ath/ath6kl/sdio.c status = ath6kl_sdio_read_write_sync(ar, reg_addr, (u8 *)(&addr), reg_addr 1012 drivers/net/wireless/ath/ath6kl/sdio.c __func__, addr, reg_addr); reg_addr 3841 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c u32 reg_addr; reg_addr 3844 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c reg_addr = core->base + SD_REG(intstatus); reg_addr 3845 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL); reg_addr 3900 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c int reg_addr; reg_addr 4001 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol); reg_addr 4002 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err); reg_addr 4008 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err); reg_addr 1432 drivers/net/wireless/intel/iwlwifi/mvm/utils.c u32 reg_addr = DEVICE_SYSTEM_TIME_REG; reg_addr 1436 drivers/net/wireless/intel/iwlwifi/mvm/utils.c reg_addr = mvm->trans->cfg->gp2_reg_addr; reg_addr 1438 drivers/net/wireless/intel/iwlwifi/mvm/utils.c return iwl_read_prph(mvm->trans, reg_addr); reg_addr 909 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static u8 halbtc_read_1byte(void *bt_context, u32 reg_addr) reg_addr 914 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c return rtl_read_byte(rtlpriv, reg_addr); reg_addr 917 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static u16 halbtc_read_2byte(void *bt_context, u32 reg_addr) reg_addr 922 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c return rtl_read_word(rtlpriv, reg_addr); reg_addr 925 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static u32 halbtc_read_4byte(void *bt_context, u32 reg_addr) reg_addr 930 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c return rtl_read_dword(rtlpriv, reg_addr); reg_addr 933 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static void halbtc_write_1byte(void *bt_context, u32 reg_addr, u32 data) reg_addr 938 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_write_byte(rtlpriv, reg_addr, data); reg_addr 941 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static void halbtc_bitmask_write_1byte(void *bt_context, u32 reg_addr, reg_addr 950 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c original_value = rtl_read_byte(rtlpriv, reg_addr); reg_addr 959 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_write_byte(rtlpriv, reg_addr, data); reg_addr 962 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static void halbtc_write_2byte(void *bt_context, u32 reg_addr, u16 data) reg_addr 967 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_write_word(rtlpriv, reg_addr, data); reg_addr 970 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static void halbtc_write_4byte(void *bt_context, u32 reg_addr, u32 data) reg_addr 976 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_write_dword(rtlpriv, reg_addr, data); reg_addr 979 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static void halbtc_write_local_reg_1byte(void *btc_context, u32 reg_addr, reg_addr 988 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_write_byte(rtlpriv, reg_addr, data); reg_addr 990 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_write_byte(rtlpriv, reg_addr, data); reg_addr 993 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static void halbtc_set_bbreg(void *bt_context, u32 reg_addr, u32 bit_mask, reg_addr 999 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_set_bbreg(rtlpriv->mac80211.hw, reg_addr, bit_mask, data); reg_addr 1002 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static u32 halbtc_get_bbreg(void *bt_context, u32 reg_addr, u32 bit_mask) reg_addr 1007 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c return rtl_get_bbreg(rtlpriv->mac80211.hw, reg_addr, bit_mask); reg_addr 1010 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static void halbtc_set_rfreg(void *bt_context, u8 rf_path, u32 reg_addr, reg_addr 1016 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_set_rfreg(rtlpriv->mac80211.hw, rf_path, reg_addr, bit_mask, data); reg_addr 1019 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static u32 halbtc_get_rfreg(void *bt_context, u8 rf_path, u32 reg_addr, reg_addr 1025 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c return rtl_get_rfreg(rtlpriv->mac80211.hw, rf_path, reg_addr, bit_mask); reg_addr 691 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u8 (*btc_read_1byte)(void *btc_context, u32 reg_addr); reg_addr 692 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h void (*btc_write_1byte)(void *btc_context, u32 reg_addr, u32 data); reg_addr 693 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h void (*btc_write_1byte_bitmask)(void *btc_context, u32 reg_addr, reg_addr 695 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u16 (*btc_read_2byte)(void *btc_context, u32 reg_addr); reg_addr 696 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h void (*btc_write_2byte)(void *btc_context, u32 reg_addr, u16 data); reg_addr 697 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u32 (*btc_read_4byte)(void *btc_context, u32 reg_addr); reg_addr 698 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h void (*btc_write_4byte)(void *btc_context, u32 reg_addr, u32 data); reg_addr 700 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h void (*btc_write_local_reg_1byte)(void *btc_context, u32 reg_addr, reg_addr 702 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h void (*btc_set_bb_reg)(void *btc_context, u32 reg_addr, reg_addr 704 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u32 (*btc_get_bb_reg)(void *btc_context, u32 reg_addr, reg_addr 706 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h void (*btc_set_rf_reg)(void *btc_context, u8 rf_path, u32 reg_addr, reg_addr 709 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u32 reg_addr, u32 bit_mask); reg_addr 651 drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c u32 reg_addr, u32 bitmask, u32 data) reg_addr 657 drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c if (reg_addr == RTXAGC_RATE18_06) reg_addr 659 drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c else if (reg_addr == RTXAGC_RATE54_24) reg_addr 661 drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c else if (reg_addr == RTXAGC_CCK_MCS32) reg_addr 663 drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c else if (reg_addr == RTXAGC_MCS03_MCS00) reg_addr 665 drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c else if (reg_addr == RTXAGC_MCS07_MCS04) reg_addr 667 drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c else if (reg_addr == RTXAGC_MCS11_MCS08) reg_addr 669 drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c else if (reg_addr == RTXAGC_MCS15_MCS12) reg_addr 1183 drivers/net/wireless/realtek/rtw88/rtw8822b.c static const u16 reg_addr[] = {0xc58, 0xe58}; reg_addr 1197 drivers/net/wireless/realtek/rtw88/rtw8822b.c for (i = 0; i < ARRAY_SIZE(reg_addr); i++) reg_addr 1198 drivers/net/wireless/realtek/rtw88/rtw8822b.c rtw_write8_mask(rtwdev, reg_addr[i], 0xff, pwr); reg_addr 185 drivers/ntb/hw/intel/ntb_hw_gen1.c phys_addr_t reg_addr, unsigned long reg) reg_addr 191 drivers/ntb/hw/intel/ntb_hw_gen1.c *db_addr = reg_addr + reg; reg_addr 277 drivers/ntb/hw/intel/ntb_hw_gen1.c phys_addr_t *spad_addr, phys_addr_t reg_addr, reg_addr 287 drivers/ntb/hw/intel/ntb_hw_gen1.c *spad_addr = reg_addr + reg + (idx << 2); reg_addr 152 drivers/ntb/hw/intel/ntb_hw_gen1.h phys_addr_t reg_addr, unsigned long reg); reg_addr 498 drivers/pinctrl/mediatek/pinctrl-mt2701.c static void mt2701_spec_dir_set(unsigned int *reg_addr, unsigned int pin) reg_addr 501 drivers/pinctrl/mediatek/pinctrl-mt2701.c *reg_addr += 0x10; reg_addr 72 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int reg_addr; reg_addr 76 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset; reg_addr 80 drivers/pinctrl/mediatek/pinctrl-mtk-common.c pctl->devdata->spec_dir_set(®_addr, offset); reg_addr 84 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = CLR_ADDR(reg_addr, pctl); reg_addr 86 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = SET_ADDR(reg_addr, pctl); reg_addr 88 drivers/pinctrl/mediatek/pinctrl-mtk-common.c regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); reg_addr 94 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int reg_addr; reg_addr 98 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset; reg_addr 102 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = SET_ADDR(reg_addr, pctl); reg_addr 104 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = CLR_ADDR(reg_addr, pctl); reg_addr 106 drivers/pinctrl/mediatek/pinctrl-mtk-common.c regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); reg_addr 112 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int reg_addr, offset; reg_addr 146 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = SET_ADDR(mtk_get_port(pctl, pin) + offset, pctl); reg_addr 148 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl); reg_addr 150 drivers/pinctrl/mediatek/pinctrl-mtk-common.c regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit); reg_addr 158 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int i, reg_addr, bit; reg_addr 171 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = ies_smt_infos[i].offset + align; reg_addr 173 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = ies_smt_infos[i].offset + (align << 1); reg_addr 176 drivers/pinctrl/mediatek/pinctrl-mtk-common.c regmap_write(regmap, reg_addr, bit); reg_addr 676 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int reg_addr; reg_addr 686 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = ((pin / MAX_GPIO_MODE_PER_REG) << pctl->devdata->port_shf) reg_addr 694 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr, mask, val); reg_addr 794 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int reg_addr; reg_addr 800 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset; reg_addr 804 drivers/pinctrl/mediatek/pinctrl-mtk-common.c pctl->devdata->spec_dir_set(®_addr, offset); reg_addr 806 drivers/pinctrl/mediatek/pinctrl-mtk-common.c regmap_read(pctl->regmap1, reg_addr, &read_val); reg_addr 812 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int reg_addr; reg_addr 817 drivers/pinctrl/mediatek/pinctrl-mtk-common.c reg_addr = mtk_get_port(pctl, offset) + reg_addr 821 drivers/pinctrl/mediatek/pinctrl-mtk-common.c regmap_read(pctl->regmap1, reg_addr, &read_val); reg_addr 240 drivers/pinctrl/mediatek/pinctrl-mtk-common.h void (*spec_dir_set)(unsigned int *reg_addr, unsigned int pin); reg_addr 35 drivers/reset/reset-meson.c void __iomem *reg_addr = data->reg_base + (bank << 2); reg_addr 37 drivers/reset/reset-meson.c writel(BIT(offset), reg_addr); reg_addr 49 drivers/reset/reset-meson.c void __iomem *reg_addr = data->reg_base + LEVEL_OFFSET + (bank << 2); reg_addr 55 drivers/reset/reset-meson.c reg = readl(reg_addr); reg_addr 57 drivers/reset/reset-meson.c writel(reg & ~BIT(offset), reg_addr); reg_addr 59 drivers/reset/reset-meson.c writel(reg | BIT(offset), reg_addr); reg_addr 249 drivers/scsi/bfa/bfad_debugfs.c void __iomem *rb, *reg_addr; reg_addr 293 drivers/scsi/bfa/bfad_debugfs.c reg_addr = rb + addr; reg_addr 297 drivers/scsi/bfa/bfad_debugfs.c *regbuf = readl(reg_addr); reg_addr 299 drivers/scsi/bfa/bfad_debugfs.c reg_addr += sizeof(u32); reg_addr 316 drivers/scsi/bfa/bfad_debugfs.c void __iomem *reg_addr; reg_addr 345 drivers/scsi/bfa/bfad_debugfs.c reg_addr = (bfa_ioc_bar0(ioc)) + addr; reg_addr 347 drivers/scsi/bfa/bfad_debugfs.c writel(val, reg_addr); reg_addr 3484 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c void __iomem *reg_addr = hisi_hba->sgpio_regs + reg_addr 3488 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c writeb(write_data[data_idx], reg_addr); reg_addr 1558 drivers/soc/tegra/pmc.c u32 pmu_addr, ctrl_id, reg_addr, reg_data, pinmux; reg_addr 1582 drivers/soc/tegra/pmc.c if (of_property_read_u32(np, "nvidia,reg-addr", ®_addr)) { reg_addr 1600 drivers/soc/tegra/pmc.c (reg_addr << PMC_SCRATCH54_ADDR_SHIFT); reg_addr 1612 drivers/soc/tegra/pmc.c checksum = reg_addr + reg_data + (value & 0xff) + ((value >> 8) & 0xff) reg_addr 114 drivers/spi/spi-orion.c void __iomem *reg_addr = spi_reg(orion_spi, reg); reg_addr 117 drivers/spi/spi-orion.c val = readl(reg_addr); reg_addr 119 drivers/spi/spi-orion.c writel(val, reg_addr); reg_addr 125 drivers/spi/spi-orion.c void __iomem *reg_addr = spi_reg(orion_spi, reg); reg_addr 128 drivers/spi/spi-orion.c val = readl(reg_addr); reg_addr 130 drivers/spi/spi-orion.c writel(val, reg_addr); reg_addr 69 drivers/staging/most/usb/usb.c u16 reg_addr; reg_addr 900 drivers/staging/most/usb/usb.c const char *name, u16 *reg_addr) reg_addr 906 drivers/staging/most/usb/usb.c *reg_addr = regs[i].reg; reg_addr 913 drivers/staging/most/usb/usb.c #define get_static_reg_addr(regs, name, reg_addr) \ reg_addr 914 drivers/staging/most/usb/usb.c get_stat_reg_addr(regs, ARRAY_SIZE(regs), name, reg_addr) reg_addr 922 drivers/staging/most/usb/usb.c u16 reg_addr; reg_addr 926 drivers/staging/most/usb/usb.c return snprintf(buf, PAGE_SIZE, "%04x\n", dci_obj->reg_addr); reg_addr 929 drivers/staging/most/usb/usb.c reg_addr = dci_obj->reg_addr; reg_addr 930 drivers/staging/most/usb/usb.c else if (get_static_reg_addr(ro_regs, name, ®_addr) && reg_addr 931 drivers/staging/most/usb/usb.c get_static_reg_addr(rw_regs, name, ®_addr)) reg_addr 934 drivers/staging/most/usb/usb.c err = drci_rd_reg(dci_obj->usb_device, reg_addr, &val); reg_addr 945 drivers/staging/most/usb/usb.c u16 reg_addr; reg_addr 955 drivers/staging/most/usb/usb.c dci_obj->reg_addr = val; reg_addr 960 drivers/staging/most/usb/usb.c err = drci_wr_reg(usb_dev, dci_obj->reg_addr, val); reg_addr 963 drivers/staging/most/usb/usb.c else if (!get_static_reg_addr(rw_regs, name, ®_addr)) reg_addr 964 drivers/staging/most/usb/usb.c err = drci_wr_reg(usb_dev, reg_addr, val); reg_addr 110 drivers/staging/rtl8188eu/hal/phy.c u32 reg_addr, u32 bit_mask) reg_addr 114 drivers/staging/rtl8188eu/hal/phy.c original_value = rf_serial_read(adapt, rf_path, reg_addr); reg_addr 120 drivers/staging/rtl8188eu/hal/phy.c u32 reg_addr, u32 bit_mask, u32 data) reg_addr 126 drivers/staging/rtl8188eu/hal/phy.c original_value = rf_serial_read(adapt, rf_path, reg_addr); reg_addr 131 drivers/staging/rtl8188eu/hal/phy.c rf_serial_write(adapt, rf_path, reg_addr, data); reg_addr 15 drivers/staging/rtl8188eu/include/phy.h u32 reg_addr, u32 bit_mask); reg_addr 17 drivers/staging/rtl8188eu/include/phy.h u32 reg_addr, u32 bit_mask, u32 data); reg_addr 67 drivers/staging/rtl8192u/r819xU_phy.c void rtl8192_setBBreg(struct net_device *dev, u32 reg_addr, u32 bitmask, reg_addr 74 drivers/staging/rtl8192u/r819xU_phy.c read_nic_dword(dev, reg_addr, ®); reg_addr 78 drivers/staging/rtl8192u/r819xU_phy.c write_nic_dword(dev, reg_addr, reg); reg_addr 80 drivers/staging/rtl8192u/r819xU_phy.c write_nic_dword(dev, reg_addr, data); reg_addr 93 drivers/staging/rtl8192u/r819xU_phy.c u32 rtl8192_QueryBBReg(struct net_device *dev, u32 reg_addr, u32 bitmask) reg_addr 97 drivers/staging/rtl8192u/r819xU_phy.c read_nic_dword(dev, reg_addr, ®); reg_addr 279 drivers/staging/rtl8192u/r819xU_phy.c u32 reg_addr, u32 bitmask, u32 data) reg_addr 290 drivers/staging/rtl8192u/r819xU_phy.c reg = phy_FwRFSerialRead(dev, e_rfpath, reg_addr); reg_addr 295 drivers/staging/rtl8192u/r819xU_phy.c phy_FwRFSerialWrite(dev, e_rfpath, reg_addr, reg); reg_addr 297 drivers/staging/rtl8192u/r819xU_phy.c phy_FwRFSerialWrite(dev, e_rfpath, reg_addr, data); reg_addr 305 drivers/staging/rtl8192u/r819xU_phy.c reg = rtl8192_phy_RFSerialRead(dev, e_rfpath, reg_addr); reg_addr 310 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_phy_RFSerialWrite(dev, e_rfpath, reg_addr, reg); reg_addr 312 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_phy_RFSerialWrite(dev, e_rfpath, reg_addr, data); reg_addr 328 drivers/staging/rtl8192u/r819xU_phy.c u32 reg_addr, u32 bitmask) reg_addr 337 drivers/staging/rtl8192u/r819xU_phy.c reg = phy_FwRFSerialRead(dev, e_rfpath, reg_addr); reg_addr 340 drivers/staging/rtl8192u/r819xU_phy.c reg = rtl8192_phy_RFSerialRead(dev, e_rfpath, reg_addr); reg_addr 50 drivers/staging/rtl8192u/r819xU_phy.h void rtl8192_setBBreg(struct net_device *dev, u32 reg_addr, reg_addr 52 drivers/staging/rtl8192u/r819xU_phy.h u32 rtl8192_QueryBBReg(struct net_device *dev, u32 reg_addr, u32 bitmask); reg_addr 55 drivers/staging/rtl8192u/r819xU_phy.h u32 reg_addr, u32 bitmask, u32 data); reg_addr 58 drivers/staging/rtl8192u/r819xU_phy.h u32 reg_addr, u32 bitmask); reg_addr 1883 drivers/staging/rts5208/ms.c u16 i, reg_addr, block_size; reg_addr 1976 drivers/staging/rts5208/ms.c for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3; reg_addr 1977 drivers/staging/rts5208/ms.c reg_addr++) reg_addr 1978 drivers/staging/rts5208/ms.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); reg_addr 1980 drivers/staging/rts5208/ms.c for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++) reg_addr 1981 drivers/staging/rts5208/ms.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); reg_addr 2100 drivers/staging/rts5208/ms.c u16 defect_block, reg_addr; reg_addr 2116 drivers/staging/rts5208/ms.c reg_addr = PPBUF_BASE2; reg_addr 2120 drivers/staging/rts5208/ms.c retval = rtsx_read_register(chip, reg_addr++, &val1); reg_addr 2124 drivers/staging/rts5208/ms.c retval = rtsx_read_register(chip, reg_addr++, &val2); reg_addr 2019 drivers/staging/rts5208/rtsx_chip.c u16 reg_addr; reg_addr 2026 drivers/staging/rts5208/rtsx_chip.c reg_addr = PPBUF_BASE2; reg_addr 2031 drivers/staging/rts5208/rtsx_chip.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0); reg_addr 2045 drivers/staging/rts5208/rtsx_chip.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0); reg_addr 2061 drivers/staging/rts5208/rtsx_chip.c u16 reg_addr; reg_addr 2068 drivers/staging/rts5208/rtsx_chip.c reg_addr = PPBUF_BASE2; reg_addr 2073 drivers/staging/rts5208/rtsx_chip.c rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, reg_addr 2087 drivers/staging/rts5208/rtsx_chip.c rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, reg_addr 196 drivers/staging/rts5208/rtsx_transport.c u8 cmd_type, u16 reg_addr, u8 mask, u8 data) reg_addr 202 drivers/staging/rts5208/rtsx_transport.c val |= (u32)(reg_addr & 0x3FFF) << 16; reg_addr 34 drivers/staging/rts5208/rtsx_transport.h void rtsx_add_cmd(struct rtsx_chip *chip, u8 cmd_type, u16 reg_addr, u8 mask, reg_addr 118 drivers/staging/rts5208/sd.c u16 reg_addr; reg_addr 150 drivers/staging/rts5208/sd.c for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr 151 drivers/staging/rts5208/sd.c reg_addr++) reg_addr 152 drivers/staging/rts5208/sd.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); reg_addr 156 drivers/staging/rts5208/sd.c for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr 157 drivers/staging/rts5208/sd.c reg_addr++) reg_addr 158 drivers/staging/rts5208/sd.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); reg_addr 3581 drivers/staging/rts5208/sd.c u16 reg_addr; reg_addr 3610 drivers/staging/rts5208/sd.c for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr 3611 drivers/staging/rts5208/sd.c reg_addr++) reg_addr 3612 drivers/staging/rts5208/sd.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); reg_addr 3616 drivers/staging/rts5208/sd.c for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr 3617 drivers/staging/rts5208/sd.c reg_addr++) reg_addr 3618 drivers/staging/rts5208/sd.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); reg_addr 3702 drivers/staging/rts5208/sd.c u16 reg_addr; reg_addr 3710 drivers/staging/rts5208/sd.c for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr 3711 drivers/staging/rts5208/sd.c reg_addr++) reg_addr 3712 drivers/staging/rts5208/sd.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0); reg_addr 3716 drivers/staging/rts5208/sd.c for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr 3717 drivers/staging/rts5208/sd.c reg_addr++) reg_addr 3718 drivers/staging/rts5208/sd.c rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0); reg_addr 290 drivers/tty/synclink_gt.c unsigned char __iomem * reg_addr; /* memory mapped registers address */ reg_addr 3453 drivers/tty/synclink_gt.c info->reg_addr = ioremap_nocache(info->phys_reg_addr, SLGT_REG_SIZE); reg_addr 3454 drivers/tty/synclink_gt.c if (!info->reg_addr) { reg_addr 3479 drivers/tty/synclink_gt.c if (info->reg_addr) { reg_addr 3480 drivers/tty/synclink_gt.c iounmap(info->reg_addr); reg_addr 3481 drivers/tty/synclink_gt.c info->reg_addr = NULL; reg_addr 3634 drivers/tty/synclink_gt.c port_array[i]->reg_addr = port_array[0]->reg_addr; reg_addr 3819 drivers/tty/synclink_gt.c unsigned long reg_addr = ((unsigned long)info->reg_addr) + addr; \ reg_addr 3821 drivers/tty/synclink_gt.c reg_addr += (info->port_num) * 32; \ reg_addr 3823 drivers/tty/synclink_gt.c reg_addr += (info->port_num) * 16; reg_addr 3828 drivers/tty/synclink_gt.c return readb((void __iomem *)reg_addr); reg_addr 3834 drivers/tty/synclink_gt.c writeb(value, (void __iomem *)reg_addr); reg_addr 3840 drivers/tty/synclink_gt.c return readw((void __iomem *)reg_addr); reg_addr 3846 drivers/tty/synclink_gt.c writew(value, (void __iomem *)reg_addr); reg_addr 3852 drivers/tty/synclink_gt.c return readl((void __iomem *)reg_addr); reg_addr 3858 drivers/tty/synclink_gt.c writel(value, (void __iomem *)reg_addr); reg_addr 4070 drivers/tty/synclink_gt.c if (!info->reg_addr) reg_addr 173 drivers/usb/serial/f81534.c const u16 reg_addr; reg_addr 1360 drivers/usb/serial/f81534.c pins->pin[i].reg_addr, pins->pin[i].reg_mask, reg_addr 2056 drivers/video/fbdev/aty/aty128fb.c unsigned long fb_addr, reg_addr; reg_addr 2079 drivers/video/fbdev/aty/aty128fb.c reg_addr = pci_resource_start(pdev, 2); reg_addr 2080 drivers/video/fbdev/aty/aty128fb.c if (!request_mem_region(reg_addr, pci_resource_len(pdev, 2), reg_addr 2096 drivers/video/fbdev/aty/aty128fb.c info->fix.mmio_start = reg_addr; reg_addr 2114 drivers/video/fbdev/aty/aty128fb.c info->fix.mmio_start = reg_addr; reg_addr 85 drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c static int nec_8048_spi_send(struct spi_device *spi, unsigned char reg_addr, reg_addr 91 drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c cmd = 0x0000 | reg_addr; /* register address write */ reg_addr 254 include/linux/memstick.h struct ms_register_addr reg_addr; reg_addr 461 include/linux/qed/qed_if.h #define DIRECT_REG_WR(reg_addr, val) writel((u32)val, \ reg_addr 462 include/linux/qed/qed_if.h (void __iomem *)(reg_addr)) reg_addr 464 include/linux/qed/qed_if.h #define DIRECT_REG_RD(reg_addr) readl((void __iomem *)(reg_addr)) reg_addr 466 include/linux/qed/qed_if.h #define DIRECT_REG_WR64(reg_addr, val) writeq((u32)val, \ reg_addr 467 include/linux/qed/qed_if.h (void __iomem *)(reg_addr)) reg_addr 1293 include/linux/rtsx_pci.h u8 cmd_type, u16 reg_addr, u8 mask, u8 data); reg_addr 80 include/linux/rtsx_usb.h u16 reg_addr, u8 mask, u8 data); reg_addr 49 sound/arm/pxa2xx-ac97-lib.c volatile u32 *reg_addr; reg_addr 58 sound/arm/pxa2xx-ac97-lib.c reg_addr = slot ? &SMC_REG_BASE : &PMC_REG_BASE; reg_addr 60 sound/arm/pxa2xx-ac97-lib.c reg_addr = slot ? &SAC_REG_BASE : &PAC_REG_BASE; reg_addr 61 sound/arm/pxa2xx-ac97-lib.c reg_addr += (reg >> 1); reg_addr 66 sound/arm/pxa2xx-ac97-lib.c val = (*reg_addr & 0xffff); reg_addr 80 sound/arm/pxa2xx-ac97-lib.c val = (*reg_addr & 0xffff); reg_addr 91 sound/arm/pxa2xx-ac97-lib.c volatile u32 *reg_addr; reg_addr 98 sound/arm/pxa2xx-ac97-lib.c reg_addr = slot ? &SMC_REG_BASE : &PMC_REG_BASE; reg_addr 100 sound/arm/pxa2xx-ac97-lib.c reg_addr = slot ? &SAC_REG_BASE : &PAC_REG_BASE; reg_addr 101 sound/arm/pxa2xx-ac97-lib.c reg_addr += (reg >> 1); reg_addr 105 sound/arm/pxa2xx-ac97-lib.c *reg_addr = val; reg_addr 459 sound/soc/codecs/msm8916-wcd-analog.c u32 coarse, fine, reg_val, reg_addr; reg_addr 486 sound/soc/codecs/msm8916-wcd-analog.c reg_addr = CDC_A_MBHC_BTN0_ZDET_CTL_0; reg_addr 493 sound/soc/codecs/msm8916-wcd-analog.c snd_soc_component_update_bits(component, reg_addr, reg_addr 496 sound/soc/codecs/msm8916-wcd-analog.c reg_addr++; reg_addr 257 sound/sparc/cs4231.c static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr) reg_addr 260 sound/sparc/cs4231.c return readb(reg_addr); reg_addr 262 sound/sparc/cs4231.c return sbus_readb(reg_addr); reg_addr 266 sound/sparc/cs4231.c void __iomem *reg_addr) reg_addr 269 sound/sparc/cs4231.c return writeb(val, reg_addr); reg_addr 271 sound/sparc/cs4231.c return sbus_writeb(val, reg_addr);