read_sysreg 112 arch/arm/include/asm/arch_gicv3.h return read_sysreg(a32); \ read_sysreg 123 arch/arm/include/asm/arch_gicv3.h u64 val = read_sysreg(a32lo); \ read_sysreg 125 arch/arm/include/asm/arch_gicv3.h val |= (u64)read_sysreg(a32hi) << 32; \ read_sysreg 193 arch/arm/include/asm/arch_gicv3.h u32 irqstat = read_sysreg(ICC_IAR1); read_sysreg 208 arch/arm/include/asm/arch_gicv3.h return read_sysreg(ICC_CTLR); read_sysreg 224 arch/arm/include/asm/arch_gicv3.h return read_sysreg(ICC_SRE); read_sysreg 240 arch/arm/include/asm/arch_gicv3.h return read_sysreg(ICC_PMR); read_sysreg 250 arch/arm/include/asm/arch_gicv3.h return read_sysreg(ICC_RPR); read_sysreg 85 arch/arm/include/asm/kvm_hyp.h #define read_sysreg_el0(r) read_sysreg(r##_EL0) read_sysreg 116 arch/arm/include/asm/kvm_hyp.h return !(read_sysreg(HCPTR) & (HCPTR_TCP(11) | HCPTR_TCP(10))); read_sysreg 19 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c0_CSSELR] = read_sysreg(CSSELR); read_sysreg 20 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c1_SCTLR] = read_sysreg(SCTLR); read_sysreg 21 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c1_CPACR] = read_sysreg(CPACR); read_sysreg 22 arch/arm/kvm/hyp/cp15-sr.c *cp15_64(ctxt, c2_TTBR0) = read_sysreg(TTBR0); read_sysreg 23 arch/arm/kvm/hyp/cp15-sr.c *cp15_64(ctxt, c2_TTBR1) = read_sysreg(TTBR1); read_sysreg 24 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c2_TTBCR] = read_sysreg(TTBCR); read_sysreg 25 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c3_DACR] = read_sysreg(DACR); read_sysreg 26 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c5_DFSR] = read_sysreg(DFSR); read_sysreg 27 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c5_IFSR] = read_sysreg(IFSR); read_sysreg 28 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c5_ADFSR] = read_sysreg(ADFSR); read_sysreg 29 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c5_AIFSR] = read_sysreg(AIFSR); read_sysreg 30 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c6_DFAR] = read_sysreg(DFAR); read_sysreg 31 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c6_IFAR] = read_sysreg(IFAR); read_sysreg 32 arch/arm/kvm/hyp/cp15-sr.c *cp15_64(ctxt, c7_PAR) = read_sysreg(PAR); read_sysreg 33 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c10_PRRR] = read_sysreg(PRRR); read_sysreg 34 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c10_NMRR] = read_sysreg(NMRR); read_sysreg 35 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c10_AMAIR0] = read_sysreg(AMAIR0); read_sysreg 36 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c10_AMAIR1] = read_sysreg(AMAIR1); read_sysreg 37 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c12_VBAR] = read_sysreg(VBAR); read_sysreg 38 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c13_CID] = read_sysreg(CID); read_sysreg 39 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c13_TID_URW] = read_sysreg(TID_URW); read_sysreg 40 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c13_TID_URO] = read_sysreg(TID_URO); read_sysreg 41 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c13_TID_PRIV] = read_sysreg(TID_PRIV); read_sysreg 42 arch/arm/kvm/hyp/cp15-sr.c ctxt->cp15[c14_CNTKCTL] = read_sysreg(CNTKCTL); read_sysreg 16 arch/arm/kvm/hyp/s2-setup.c val = read_sysreg(VTCR) & ~VTCR_MASK; read_sysreg 18 arch/arm/kvm/hyp/s2-setup.c val |= read_sysreg(HTCR) & VTCR_HTCR_SH; read_sysreg 29 arch/arm/kvm/hyp/switch.c val = read_sysreg(VFP_FPEXC); read_sysreg 40 arch/arm/kvm/hyp/switch.c val = read_sysreg(HDCR); read_sysreg 57 arch/arm/kvm/hyp/switch.c vcpu->arch.hcr = read_sysreg(HCR); read_sysreg 61 arch/arm/kvm/hyp/switch.c val = read_sysreg(HDCR); read_sysreg 76 arch/arm/kvm/hyp/switch.c write_sysreg(read_sysreg(MIDR), VPIDR); read_sysreg 98 arch/arm/kvm/hyp/switch.c u32 hsr = read_sysreg(HSR); read_sysreg 105 arch/arm/kvm/hyp/switch.c far = read_sysreg(HIFAR); read_sysreg 107 arch/arm/kvm/hyp/switch.c far = read_sysreg(HDFAR); read_sysreg 126 arch/arm/kvm/hyp/switch.c par = read_sysreg(PAR); read_sysreg 130 arch/arm/kvm/hyp/switch.c tmp = read_sysreg(PAR); read_sysreg 138 arch/arm/kvm/hyp/switch.c hpfar = read_sysreg(HPFAR); read_sysreg 221 arch/arm/kvm/hyp/switch.c val = read_sysreg(HDFAR); read_sysreg 225 arch/arm/kvm/hyp/switch.c if (read_sysreg(VTTBR)) { read_sysreg 229 arch/arm/kvm/hyp/switch.c vcpu = (struct kvm_vcpu *)read_sysreg(HTPIDR); read_sysreg 74 arch/arm/mm/pmsa-v7.c return read_sysreg(DRBAR); read_sysreg 98 arch/arm/mm/pmsa-v7.c return read_sysreg(IRBAR); read_sysreg 27 arch/arm/mm/pmsa-v8.c return read_sysreg(PRLAR); read_sysreg 32 arch/arm/mm/pmsa-v8.c return read_sysreg(PRBAR); read_sysreg 115 arch/arm/vdso/vgettimeofday.c cycle_now = read_sysreg(CNTVCT); read_sysreg 69 arch/arm64/include/asm/arch_timer.h return read_sysreg(cntp_tval_el0); read_sysreg 74 arch/arm64/include/asm/arch_timer.h return read_sysreg(cntv_tval_el0); read_sysreg 79 arch/arm64/include/asm/arch_timer.h return read_sysreg(cntpct_el0); read_sysreg 84 arch/arm64/include/asm/arch_timer.h return read_sysreg(cntvct_el0); read_sysreg 135 arch/arm64/include/asm/arch_timer.h return read_sysreg(cntp_ctl_el0); read_sysreg 142 arch/arm64/include/asm/arch_timer.h return read_sysreg(cntv_ctl_el0); read_sysreg 153 arch/arm64/include/asm/arch_timer.h return read_sysreg(cntfrq_el0); read_sysreg 158 arch/arm64/include/asm/arch_timer.h return read_sysreg(cntkctl_el1); read_sysreg 201 arch/arm64/include/asm/arch_timer.h cnt = read_sysreg(cntpct_el0); read_sysreg 221 arch/arm64/include/asm/arch_timer.h cnt = read_sysreg(cntvct_el0); read_sysreg 114 arch/arm64/include/asm/cache.h u64 clidr = read_sysreg(clidr_el1); read_sysreg 43 arch/arm64/include/asm/daifflags.h flags = read_sysreg(daif); read_sysreg 70 arch/arm64/include/asm/daifflags.h !(read_sysreg(daif) & PSR_I_BIT)); read_sysreg 20 arch/arm64/include/asm/dcc.h return read_sysreg(mdccsr_el0); read_sysreg 25 arch/arm64/include/asm/dcc.h char c = read_sysreg(dbgdtrrx_el0); read_sysreg 53 arch/arm64/include/asm/efi.h ((void)((state_flags) = read_sysreg(daif))) read_sysreg 43 arch/arm64/include/asm/hardirq.h nmi_ctx->hcr = read_sysreg(hcr_el2); \ read_sysreg 100 arch/arm64/include/asm/hw_breakpoint.h VAL = read_sysreg(dbg##REG##N##_el1);\ read_sysreg 82 arch/arm64/include/asm/kvm_asm.h __ptr += read_sysreg(tpidr_el2); \ read_sysreg 91 arch/arm64/include/asm/mmu_context.h tcr = read_sysreg(tcr_el1); read_sysreg 837 arch/arm64/include/asm/sysreg.h u64 __scs_val = read_sysreg(sysreg); \ read_sysreg 113 arch/arm64/include/asm/uaccess.h ttbr = read_sysreg(ttbr1_el1); read_sysreg 137 arch/arm64/include/asm/uaccess.h ttbr1 = read_sysreg(ttbr1_el1); read_sysreg 83 arch/arm64/include/asm/virt.h return read_sysreg(CurrentEL) == CurrentEL_EL2; read_sysreg 35 arch/arm64/kernel/cacheinfo.c clidr = read_sysreg(clidr_el1); read_sysreg 1088 arch/arm64/kernel/cpufeature.c u64 tcr = read_sysreg(tcr_el1) | TCR_HD; read_sysreg 1167 arch/arm64/kernel/cpufeature.c write_sysreg(read_sysreg(tpidr_el1), tpidr_el2); read_sysreg 48 arch/arm64/kernel/debug-monitors.c return read_sysreg(mdscr_el1); read_sysreg 810 arch/arm64/kernel/fpsimd.c write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1); read_sysreg 75 arch/arm64/kernel/irq.c WARN_ON(read_sysreg(daif) & PSR_A_BIT); read_sysreg 374 arch/arm64/kernel/perf_event.c return read_sysreg(pmcr_el0); read_sysreg 410 arch/arm64/kernel/perf_event.c return read_sysreg(pmxevcntr_el0); read_sysreg 435 arch/arm64/kernel/perf_event.c value = read_sysreg(pmccntr_el0); read_sysreg 599 arch/arm64/kernel/perf_event.c value = read_sysreg(pmovsclr_el0); read_sysreg 970 arch/arm64/kernel/perf_event.c dfr0 = read_sysreg(id_aa64dfr0_el1); read_sysreg 985 arch/arm64/kernel/perf_event.c pmceid[0] = pmceid_raw[0] = read_sysreg(pmceid0_el0); read_sysreg 986 arch/arm64/kernel/perf_event.c pmceid[1] = pmceid_raw[1] = read_sysreg(pmceid1_el0); read_sysreg 82 arch/arm64/kernel/process.c daif_bits = read_sysreg(daif); read_sysreg 387 arch/arm64/kernel/process.c *task_user_tls(p) = read_sysreg(tpidr_el0); read_sysreg 428 arch/arm64/kernel/process.c *task_user_tls(current) = read_sysreg(tpidr_el0); read_sysreg 191 arch/arm64/kernel/sdei.c u64 elr = read_sysreg(elr_el1); read_sysreg 192 arch/arm64/kernel/sdei.c u32 kernel_mode = read_sysreg(CurrentEL) | 1; /* +SPSel */ read_sysreg 193 arch/arm64/kernel/sdei.c unsigned long vbar = read_sysreg(vbar_el1); read_sysreg 214 arch/arm64/kernel/sdei.c if (elr != read_sysreg(elr_el1)) { read_sysreg 182 arch/arm64/kernel/smp.c cpuflags = read_sysreg(daif); read_sysreg 78 arch/arm64/kernel/syscall.c reg = read_sysreg(mdscr_el1); read_sysreg 826 arch/arm64/kernel/traps.c unsigned int esr = read_sysreg(esr_el1); read_sysreg 827 arch/arm64/kernel/traps.c unsigned long far = read_sysreg(far_el1); read_sysreg 74 arch/arm64/kvm/fpsimd.c if (read_sysreg(cpacr_el1) & CPACR_EL1_ZEN_EL0EN) read_sysreg 15 arch/arm64/kvm/hyp/debug-sr.c #define read_debug(r,n) read_sysreg(r##n##_el1) read_sysreg 96 arch/arm64/kvm/hyp/debug-sr.c if (!cpuid_feature_extract_unsigned_field(read_sysreg(id_aa64dfr0_el1), read_sysreg 139 arch/arm64/kvm/hyp/debug-sr.c aa64dfr0 = read_sysreg(id_aa64dfr0_el1); read_sysreg 148 arch/arm64/kvm/hyp/debug-sr.c ctxt->sys_regs[MDCCINT_EL1] = read_sysreg(mdccint_el1); read_sysreg 158 arch/arm64/kvm/hyp/debug-sr.c aa64dfr0 = read_sysreg(id_aa64dfr0_el1); read_sysreg 223 arch/arm64/kvm/hyp/debug-sr.c return read_sysreg(mdcr_el2); read_sysreg 52 arch/arm64/kvm/hyp/switch.c vcpu->arch.ctxt.sys_regs[FPEXC32_EL2] = read_sysreg(fpexc32_el2); read_sysreg 98 arch/arm64/kvm/hyp/switch.c val = read_sysreg(cpacr_el1); read_sysreg 168 arch/arm64/kvm/hyp/switch.c u64 mdcr_el2 = read_sysreg(mdcr_el2); read_sysreg 190 arch/arm64/kvm/hyp/switch.c vcpu->arch.hcr_el2 |= read_sysreg(hcr_el2) & HCR_VSE; read_sysreg 206 arch/arm64/kvm/hyp/switch.c u64 mdcr_el2 = read_sysreg(mdcr_el2); read_sysreg 259 arch/arm64/kvm/hyp/switch.c par = read_sysreg(par_el1); read_sysreg 263 arch/arm64/kvm/hyp/switch.c tmp = read_sysreg(par_el1); read_sysreg 305 arch/arm64/kvm/hyp/switch.c hpfar = read_sysreg(hpfar_el2); read_sysreg 345 arch/arm64/kvm/hyp/switch.c u64 reg = read_sysreg(cpacr_el1) | CPACR_EL1_FPEN; read_sysreg 352 arch/arm64/kvm/hyp/switch.c write_sysreg(read_sysreg(cptr_el2) & ~(u64)CPTR_EL2_TFP, read_sysreg 387 arch/arm64/kvm/hyp/switch.c if (!(read_sysreg(hcr_el2) & HCR_RW)) read_sysreg 745 arch/arm64/kvm/hyp/switch.c if (read_sysreg(vttbr_el2)) { read_sysreg 761 arch/arm64/kvm/hyp/switch.c read_sysreg(esr_el2), read_sysreg_el2(SYS_FAR), read_sysreg 762 arch/arm64/kvm/hyp/switch.c read_sysreg(hpfar_el2), par, vcpu); read_sysreg 777 arch/arm64/kvm/hyp/switch.c read_sysreg(hpfar_el2), par, vcpu); read_sysreg 785 arch/arm64/kvm/hyp/switch.c u64 par = read_sysreg(par_el1); read_sysreg 28 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1); read_sysreg 34 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->gp_regs.regs.sp = read_sysreg(sp_el0); read_sysreg 39 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->sys_regs[TPIDR_EL0] = read_sysreg(tpidr_el0); read_sysreg 40 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->sys_regs[TPIDRRO_EL0] = read_sysreg(tpidrro_el0); read_sysreg 45 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1); read_sysreg 47 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1); read_sysreg 61 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->sys_regs[PAR_EL1] = read_sysreg(par_el1); read_sysreg 62 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1); read_sysreg 64 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->gp_regs.sp_el1 = read_sysreg(sp_el1); read_sysreg 201 arch/arm64/kvm/hyp/sysreg-sr.c spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt); read_sysreg 202 arch/arm64/kvm/hyp/sysreg-sr.c spsr[KVM_SPSR_UND] = read_sysreg(spsr_und); read_sysreg 203 arch/arm64/kvm/hyp/sysreg-sr.c spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq); read_sysreg 204 arch/arm64/kvm/hyp/sysreg-sr.c spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq); read_sysreg 206 arch/arm64/kvm/hyp/sysreg-sr.c sysreg[DACR32_EL2] = read_sysreg(dacr32_el2); read_sysreg 207 arch/arm64/kvm/hyp/sysreg-sr.c sysreg[IFSR32_EL2] = read_sysreg(ifsr32_el2); read_sysreg 210 arch/arm64/kvm/hyp/sysreg-sr.c sysreg[DBGVCR32_EL2] = read_sysreg(dbgvcr32_el2); read_sysreg 57 arch/arm64/kvm/hyp/tlb.c val = read_sysreg(hcr_el2); read_sysreg 21 arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c return !!(read_sysreg(SCTLR_EL1) & SCTLR_ELx_EE); read_sysreg 58 arch/arm64/kvm/pmu.c return read_sysreg(pmevtyper##idx##_el0) read_sysreg 107 arch/arm64/kvm/pmu.c return read_sysreg(pmccfiltr_el0); read_sysreg 157 arch/arm64/kvm/regmap.c return read_sysreg(spsr_abt); read_sysreg 159 arch/arm64/kvm/regmap.c return read_sysreg(spsr_und); read_sysreg 161 arch/arm64/kvm/regmap.c return read_sysreg(spsr_irq); read_sysreg 163 arch/arm64/kvm/regmap.c return read_sysreg(spsr_fiq); read_sysreg 170 arch/arm64/kvm/sys_regs.c ccsidr = read_sysreg(ccsidr_el1); read_sysreg 350 arch/arm64/kvm/sys_regs.c p->regval = read_sysreg(dbgauthstatus_el1); read_sysreg 603 arch/arm64/kvm/sys_regs.c u64 amair = read_sysreg(amair_el1); read_sysreg 628 arch/arm64/kvm/sys_regs.c pmcr = read_sysreg(pmcr_el0); read_sysreg 735 arch/arm64/kvm/sys_regs.c pmceid = read_sysreg(pmceid0_el0); read_sysreg 737 arch/arm64/kvm/sys_regs.c pmceid = read_sysreg(pmceid1_el0); read_sysreg 1276 arch/arm64/kvm/sys_regs.c p->regval = read_sysreg(clidr_el1); read_sysreg 2396 arch/arm64/kvm/sys_regs.c ((struct sys_reg_desc *)r)->val = read_sysreg(reg); \ read_sysreg 36 arch/arm64/kvm/sys_regs_generic_v8.c __vcpu_sys_reg(vcpu, ACTLR_EL1) = read_sysreg(actlr_el1); read_sysreg 268 arch/arm64/mm/fault.c par = read_sysreg(par_el1); read_sysreg 217 drivers/clocksource/arm_arch_timer.c _old = read_sysreg(reg); \ read_sysreg 218 drivers/clocksource/arm_arch_timer.c _new = read_sysreg(reg); \ read_sysreg 263 drivers/clocksource/arm_arch_timer.c _old = read_sysreg(reg); \ read_sysreg 264 drivers/clocksource/arm_arch_timer.c _new = read_sysreg(reg); \ read_sysreg 321 drivers/clocksource/arm_arch_timer.c old = read_sysreg(cntpct_el0); read_sysreg 322 drivers/clocksource/arm_arch_timer.c new = read_sysreg(cntpct_el0); read_sysreg 330 drivers/clocksource/arm_arch_timer.c old = read_sysreg(cntvct_el0); read_sysreg 331 drivers/clocksource/arm_arch_timer.c new = read_sysreg(cntvct_el0); read_sysreg 349 drivers/clocksource/arm_arch_timer.c _val = read_sysreg(reg); \ read_sysreg 369 drivers/clocksource/arm_arch_timer.c return read_sysreg(cntp_cval_el0) - sun50i_a64_read_cntpct_el0(); read_sysreg 374 drivers/clocksource/arm_arch_timer.c return read_sysreg(cntv_cval_el0) - sun50i_a64_read_cntvct_el0(); read_sysreg 1100 virt/kvm/arm/arch_timer.c val = read_sysreg(cnthctl_el2); read_sysreg 28 virt/kvm/arm/hyp/timer-sr.c val = read_sysreg(cnthctl_el2); read_sysreg 45 virt/kvm/arm/hyp/timer-sr.c val = read_sysreg(cnthctl_el2);