rdmsrl_safe 278 arch/x86/events/amd/power.c if (rdmsrl_safe(MSR_F15H_CU_MAX_PWR_ACCUMULATOR, &max_cu_acc_power)) { rdmsrl_safe 206 arch/x86/events/core.c ret = rdmsrl_safe(reg, &val); rdmsrl_safe 220 arch/x86/events/core.c ret = rdmsrl_safe(reg, &val); rdmsrl_safe 249 arch/x86/events/core.c if (rdmsrl_safe(reg, &val)) rdmsrl_safe 253 arch/x86/events/core.c ret |= rdmsrl_safe(reg, &val_new); rdmsrl_safe 4086 arch/x86/events/intel/core.c if (rdmsrl_safe(msr, &val_old)) rdmsrl_safe 4098 arch/x86/events/intel/core.c rdmsrl_safe(msr, &val_new)) rdmsrl_safe 584 arch/x86/events/intel/rapl.c if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &msr_rapl_power_unit_bits)) rdmsrl_safe 32 arch/x86/events/probe.c if (rdmsrl_safe(msr[bit].msr, &val)) rdmsrl_safe 126 arch/x86/include/asm/apic.h if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) rdmsrl_safe 393 arch/x86/include/asm/msr.h return rdmsrl_safe(msr_no, q); rdmsrl_safe 505 arch/x86/kernel/cpu/amd.c if (!rdmsrl_safe(MSR_K8_TSEG_ADDR, &tseg)) { rdmsrl_safe 572 arch/x86/kernel/cpu/amd.c if (!rdmsrl_safe(MSR_AMD64_LS_CFG, &x86_amd_ls_cfg_base)) { rdmsrl_safe 876 arch/x86/kernel/cpu/amd.c if (!rdmsrl_safe(MSR_F15H_IC_CFG, &value) && !(value & 0x1E)) { rdmsrl_safe 214 arch/x86/kernel/cpu/hygon.c if (!rdmsrl_safe(MSR_K8_TSEG_ADDR, &tseg)) { rdmsrl_safe 252 arch/x86/kernel/cpu/hygon.c if (!rdmsrl_safe(MSR_AMD64_LS_CFG, &x86_amd_ls_cfg_base)) { rdmsrl_safe 631 arch/x86/kernel/cpu/intel.c if (!rdmsrl_safe(MSR_PLATFORM_INFO, &msr)) { rdmsrl_safe 641 arch/x86/kernel/cpu/intel.c if (rdmsrl_safe(MSR_MISC_FEATURES_ENABLES, &msr)) rdmsrl_safe 404 arch/x86/kernel/cpu/mce/core.c if (rdmsrl_safe(msr, &v)) { rdmsrl_safe 488 arch/x86/kernel/cpu/mce/intel.c if (rdmsrl_safe(MSR_PPIN_CTL, &val)) rdmsrl_safe 499 arch/x86/kernel/cpu/mce/intel.c rdmsrl_safe(MSR_PPIN_CTL, &val); rdmsrl_safe 159 arch/x86/kvm/cpuid.c rdmsrl_safe(MSR_EFER, &efer); rdmsrl_safe 7616 arch/x86/kvm/vmx/vmx.c rdmsrl_safe(MSR_EFER, &host_efer); rdmsrl_safe 277 arch/x86/kvm/x86.c rdmsrl_safe(msr, &value); rdmsrl_safe 1407 arch/x86/kvm/x86.c rdmsrl_safe(msr->index, &msr->data); rdmsrl_safe 44 arch/x86/lib/msr.c err = rdmsrl_safe(msr, &val); rdmsrl_safe 43 arch/x86/power/cpu.c msr->valid = !rdmsrl_safe(msr->info.msr_no, &msr->info.reg.q); rdmsrl_safe 126 arch/x86/power/cpu.c ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, rdmsrl_safe 41 drivers/acpi/acpi_lpit.c err = rdmsrl_safe(residency_info_ffh.gaddr.address, counter); rdmsrl_safe 128 drivers/cpufreq/amd_freq_sensitivity.c if (rdmsrl_safe(MSR_AMD64_FREQ_SENSITIVITY_ACTUAL, &val)) rdmsrl_safe 1429 drivers/cpufreq/intel_pstate.c err = rdmsrl_safe(MSR_CONFIG_TDP_CONTROL, &tdp_ctrl); rdmsrl_safe 1435 drivers/cpufreq/intel_pstate.c err = rdmsrl_safe(tdp_msr, &tdp_ratio); rdmsrl_safe 1472 drivers/cpufreq/intel_pstate.c err = rdmsrl_safe(MSR_TURBO_ACTIVATION_RATIO, &tar); rdmsrl_safe 2298 drivers/gpu/drm/i915/i915_debugfs.c if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &power)) rdmsrl_safe 151 drivers/hwmon/fam15h_power.c rdmsrl_safe(MSR_F15H_CU_PWR_ACCUMULATOR, &data->cu_acc_power[cu]); rdmsrl_safe 152 drivers/hwmon/fam15h_power.c rdmsrl_safe(MSR_F15H_PTSC, &data->cpu_sw_pwr_ptsc[cu]); rdmsrl_safe 432 drivers/hwmon/fam15h_power.c if (rdmsrl_safe(MSR_F15H_CU_MAX_PWR_ACCUMULATOR, &tmp)) { rdmsrl_safe 742 drivers/platform/x86/intel_pmc_core.c if (rdmsrl_safe(map[index].bit_mask, &pcstate_count)) rdmsrl_safe 943 drivers/platform/x86/intel_pmc_core.c if (rdmsrl_safe(MSR_PKG_C10_RESIDENCY, &pmcdev->pc10_counter)) rdmsrl_safe 958 drivers/platform/x86/intel_pmc_core.c if (rdmsrl_safe(MSR_PKG_C10_RESIDENCY, &pc10_counter)) rdmsrl_safe 319 drivers/platform/x86/intel_speed_select_if/isst_if_common.c ret = rdmsrl_safe(MSR_CPU_BUS_NUMBER, &data); rdmsrl_safe 329 drivers/platform/x86/intel_speed_select_if/isst_if_common.c ret = rdmsrl_safe(MSR_THREAD_ID_INFO, &data); rdmsrl_safe 183 drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c ret = rdmsrl_safe(MSR_OS_MAILBOX_INTERFACE, &data); rdmsrl_safe 187 drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c ret = rdmsrl_safe(MSR_OS_MAILBOX_DATA, &data); rdmsrl_safe 51 drivers/platform/x86/intel_turbo_max_3.c ret = rdmsrl_safe(MSR_OC_MAILBOX, &value); rdmsrl_safe 105 drivers/powercap/intel_rapl_msr.c ra->err = rdmsrl_safe(msr, &val); rdmsrl_safe 149 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val); rdmsrl_safe 165 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val); rdmsrl_safe 188 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c err = rdmsrl_safe(MSR_PLATFORM_INFO, &val); rdmsrl_safe 237 drivers/thermal/intel/intel_powerclamp.c if (!rdmsrl_safe(info->msr_index, &val)) rdmsrl_safe 253 drivers/thermal/intel/intel_powerclamp.c if (!rdmsrl_safe(info->msr_index, &val))