rdmsr 1347 arch/x86/events/intel/p4.c rdmsr(MSR_IA32_MISC_ENABLE, low, high); rdmsr 62 arch/x86/hyperv/hv_apic.c rdmsr(HV_X64_MSR_EOI, reg_val, hi); rdmsr 65 arch/x86/hyperv/hv_apic.c rdmsr(HV_X64_MSR_TPR, reg_val, hi); rdmsr 354 arch/x86/include/asm/msr.h rdmsr(msr_no, *l, *h); rdmsr 1277 arch/x86/kernel/apic/apic.c rdmsr(MSR_IA32_APICBASE, l, h); rdmsr 2007 arch/x86/kernel/apic/apic.c rdmsr(MSR_IA32_APICBASE, l, h); rdmsr 2029 arch/x86/kernel/apic/apic.c rdmsr(MSR_IA32_APICBASE, l, h); rdmsr 2684 arch/x86/kernel/apic/apic.c rdmsr(MSR_IA32_APICBASE, l, h); rdmsr 166 arch/x86/kernel/cpu/amd.c rdmsr(MSR_K6_WHCR, l, h); rdmsr 187 arch/x86/kernel/cpu/amd.c rdmsr(MSR_K6_WHCR, l, h); rdmsr 234 arch/x86/kernel/cpu/amd.c rdmsr(MSR_K7_CLK_CTL, l, h); rdmsr 38 arch/x86/kernel/cpu/centaur.c rdmsr(MSR_VIA_FCR, lo, hi); rdmsr 46 arch/x86/kernel/cpu/centaur.c rdmsr(MSR_VIA_RNG, lo, hi); rdmsr 60 arch/x86/kernel/cpu/centaur.c rdmsr(MSR_VIA_FCR, lo, hi); rdmsr 126 arch/x86/kernel/cpu/centaur.c rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high); rdmsr 134 arch/x86/kernel/cpu/centaur.c rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2, rdmsr 218 arch/x86/kernel/cpu/centaur.c rdmsr(MSR_IDT_FCR1, lo, hi); rdmsr 280 arch/x86/kernel/cpu/common.c rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi); rdmsr 518 arch/x86/kernel/cpu/intel.c rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high); rdmsr 525 arch/x86/kernel/cpu/intel.c rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2, rdmsr 533 arch/x86/kernel/cpu/intel.c rdmsr(MSR_IA32_VMX_EPT_VPID_CAP, rdmsr 694 arch/x86/kernel/cpu/intel.c rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); rdmsr 382 arch/x86/kernel/cpu/mce/amd.c rdmsr(tr->b->address, lo, hi); rdmsr 29 arch/x86/kernel/cpu/mce/p5.c rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi); rdmsr 30 arch/x86/kernel/cpu/mce/p5.c rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi); rdmsr 63 arch/x86/kernel/cpu/mce/p5.c rdmsr(MSR_IA32_P5_MC_ADDR, l, h); rdmsr 64 arch/x86/kernel/cpu/mce/p5.c rdmsr(MSR_IA32_P5_MC_TYPE, l, h); rdmsr 442 arch/x86/kernel/cpu/mce/therm_throt.c rdmsr(MSR_IA32_MISC_ENABLE, l, h); rdmsr 468 arch/x86/kernel/cpu/mce/therm_throt.c rdmsr(MSR_THERM2_CTL, l, h); rdmsr 479 arch/x86/kernel/cpu/mce/therm_throt.c rdmsr(MSR_IA32_THERM_INTERRUPT, l, h); rdmsr 493 arch/x86/kernel/cpu/mce/therm_throt.c rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); rdmsr 512 arch/x86/kernel/cpu/mce/therm_throt.c rdmsr(MSR_IA32_MISC_ENABLE, l, h); rdmsr 38 arch/x86/kernel/cpu/mce/winchip.c rdmsr(MSR_IDT_FCR1, lo, hi); rdmsr 574 arch/x86/kernel/cpu/microcode/amd.c rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); rdmsr 689 arch/x86/kernel/cpu/microcode/amd.c rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); rdmsr 774 arch/x86/kernel/cpu/microcode/intel.c rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); rdmsr 15 arch/x86/kernel/cpu/mtrr/amd.c rdmsr(MSR_K6_UWCCR, low, high); rdmsr 67 arch/x86/kernel/cpu/mtrr/amd.c rdmsr(MSR_K6_UWCCR, regs[0], regs[1]); rdmsr 695 arch/x86/kernel/cpu/mtrr/cleanup.c rdmsr(MSR_MTRRdefType, def, dummy); rdmsr 892 arch/x86/kernel/cpu/mtrr/cleanup.c rdmsr(MSR_MTRRdefType, def, dummy); rdmsr 57 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MSR_K8_SYSCFG, lo, hi); rdmsr 318 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi); rdmsr 319 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi); rdmsr 343 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MSR_MTRRfix64K_00000, p[0], p[1]); rdmsr 346 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MSR_MTRRfix16K_80000 + i, p[2 + i * 2], p[3 + i * 2]); rdmsr 348 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MSR_MTRRfix4K_C0000 + i, p[6 + i * 2], p[7 + i * 2]); rdmsr 471 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MSR_MTRRcap, lo, dummy); rdmsr 479 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MSR_MTRRdefType, lo, dummy); rdmsr 487 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MSR_K8_TOP_MEM2, low, high); rdmsr 543 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(msr, lo, hi); rdmsr 592 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi); rdmsr 602 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi); rdmsr 663 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MTRRphysBase_MSR(index), lo, hi); rdmsr 672 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MTRRphysMask_MSR(index), lo, hi); rdmsr 767 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi); rdmsr 905 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(MSR_MTRRcap, config, dummy); rdmsr 129 arch/x86/kernel/cpu/mtrr/mtrr.c rdmsr(MSR_MTRRcap, config, dummy); rdmsr 207 arch/x86/kernel/cpu/resctrl/core.c rdmsr(MSR_IA32_L3_CBM_BASE, l, h); rdmsr 86 arch/x86/kernel/cpu/transmeta.c rdmsr(0x80860004, cap_mask, uk); rdmsr 36 arch/x86/kernel/cpu/zhaoxin.c rdmsr(MSR_ZHAOXIN_FCR57, lo, hi); rdmsr 45 arch/x86/kernel/cpu/zhaoxin.c rdmsr(MSR_ZHAOXIN_FCR57, lo, hi); rdmsr 96 arch/x86/kernel/cpu/zhaoxin.c rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high); rdmsr 104 arch/x86/kernel/cpu/zhaoxin.c rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2, rdmsr 739 arch/x86/kernel/process.c rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi); rdmsr 175 arch/x86/kernel/tsc_msr.c rdmsr(MSR_PLATFORM_INFO, lo, hi); rdmsr 178 arch/x86/kernel/tsc_msr.c rdmsr(MSR_IA32_PERF_STATUS, lo, hi); rdmsr 183 arch/x86/kernel/tsc_msr.c rdmsr(MSR_FSB_FREQ, lo, hi); rdmsr 4853 arch/x86/kvm/emulate.c II(ImplicitOps | Priv, em_rdmsr, rdmsr), rdmsr 5811 arch/x86/kvm/vmx/nested.c rdmsr(MSR_IA32_VMX_PINBASED_CTLS, rdmsr 5826 arch/x86/kvm/vmx/nested.c rdmsr(MSR_IA32_VMX_EXIT_CTLS, rdmsr 5846 arch/x86/kvm/vmx/nested.c rdmsr(MSR_IA32_VMX_ENTRY_CTLS, rdmsr 5863 arch/x86/kvm/vmx/nested.c rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, rdmsr 5901 arch/x86/kvm/vmx/nested.c rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2, rdmsr 5979 arch/x86/kvm/vmx/nested.c rdmsr(MSR_IA32_VMX_MISC, rdmsr 2292 arch/x86/kvm/vmx/vmx.c rdmsr(msr, vmx_msr_low, vmx_msr_high); rdmsr 2468 arch/x86/kvm/vmx/vmx.c rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high); rdmsr 3900 arch/x86/kvm/vmx/vmx.c rdmsr(MSR_IA32_SYSENTER_CS, low32, high32); rdmsr 3906 arch/x86/kvm/vmx/vmx.c rdmsr(MSR_IA32_CR_PAT, low32, high32); rdmsr 19 arch/x86/lib/msr-smp.c rdmsr(rv->msr_no, reg->l, reg->h); rdmsr 534 arch/x86/oprofile/op_model_p4.c rdmsr(ev->bindings[i].escr_address, escr, high); rdmsr 548 arch/x86/oprofile/op_model_p4.c rdmsr(p4_counters[VIRT_CTR(stag, ctr)].cccr_address, rdmsr 578 arch/x86/oprofile/op_model_p4.c rdmsr(MSR_IA32_MISC_ENABLE, low, high); rdmsr 588 arch/x86/oprofile/op_model_p4.c rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); rdmsr 647 arch/x86/oprofile/op_model_p4.c rdmsr(p4_counters[real].cccr_address, low, high); rdmsr 648 arch/x86/oprofile/op_model_p4.c rdmsr(p4_counters[real].counter_address, ctr, high); rdmsr 678 arch/x86/oprofile/op_model_p4.c rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); rdmsr 695 arch/x86/oprofile/op_model_p4.c rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); rdmsr 320 arch/x86/platform/olpc/olpc-xo1-sci.c rdmsr(0x51400020, lo, hi); rdmsr 269 drivers/acpi/processor_perflib.c rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi); rdmsr 113 drivers/ata/pata_cs5535.c rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy); rdmsr 135 drivers/ata/pata_cs5535.c rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy); rdmsr 91 drivers/ata/pata_cs5536.c rdmsr(MSR_IDE_CFG + reg, *val, dummy); rdmsr 76 drivers/char/agp/nvidia-agp.c rdmsr(IORR_BASE0 + 2 * iorr_addr, base_lo, base_hi); rdmsr 77 drivers/char/agp/nvidia-agp.c rdmsr(IORR_MASK0 + 2 * iorr_addr, mask_lo, mask_hi); rdmsr 98 drivers/char/agp/nvidia-agp.c rdmsr(SYSCFG, sys_lo, sys_hi); rdmsr 153 drivers/char/hw_random/via-rng.c rdmsr(MSR_VIA_RNG, lo, hi); rdmsr 177 drivers/char/hw_random/via-rng.c rdmsr(MSR_VIA_RNG, lo, hi); rdmsr 246 drivers/cpufreq/acpi-cpufreq.c rdmsr(MSR_IA32_PERF_CTL, val, dummy); rdmsr 254 drivers/cpufreq/acpi-cpufreq.c rdmsr(MSR_IA32_PERF_CTL, lo, hi); rdmsr 263 drivers/cpufreq/acpi-cpufreq.c rdmsr(MSR_AMD_PERF_CTL, val, dummy); rdmsr 103 drivers/cpufreq/e_powersaver.c rdmsr(MSR_IA32_PERF_STATUS, lo, hi); rdmsr 115 drivers/cpufreq/e_powersaver.c rdmsr(MSR_IA32_PERF_STATUS, lo, hi); rdmsr 119 drivers/cpufreq/e_powersaver.c rdmsr(MSR_IA32_PERF_STATUS, lo, hi); rdmsr 131 drivers/cpufreq/e_powersaver.c rdmsr(MSR_IA32_PERF_STATUS, lo, hi); rdmsr 143 drivers/cpufreq/e_powersaver.c rdmsr(MSR_IA32_PERF_STATUS, lo, hi); rdmsr 199 drivers/cpufreq/e_powersaver.c rdmsr(0x1153, lo, hi); rdmsr 204 drivers/cpufreq/e_powersaver.c rdmsr(0x1154, lo, hi); rdmsr 242 drivers/cpufreq/e_powersaver.c rdmsr(MSR_IA32_PERF_STATUS, lo, hi); rdmsr 123 drivers/cpufreq/longhaul.c rdmsr(MSR_IA32_EBL_CR_POWERON, lo, hi); rdmsr 839 drivers/cpufreq/longhaul.c rdmsr(MSR_VIA_LONGHAUL, lo, hi); rdmsr 39 drivers/cpufreq/longrun.c rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi); rdmsr 46 drivers/cpufreq/longrun.c rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); rdmsr 95 drivers/cpufreq/longrun.c rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi); rdmsr 107 drivers/cpufreq/longrun.c rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); rdmsr 180 drivers/cpufreq/longrun.c rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi); rdmsr 182 drivers/cpufreq/longrun.c rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi); rdmsr 187 drivers/cpufreq/longrun.c rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi); rdmsr 204 drivers/cpufreq/longrun.c rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); rdmsr 91 drivers/cpufreq/powernow-k8.c rdmsr(MSR_FIDVID_STATUS, lo, hi); rdmsr 109 drivers/cpufreq/powernow-k8.c rdmsr(MSR_FIDVID_STATUS, lo, hi); rdmsr 136 drivers/cpufreq/powernow-k8.c rdmsr(MSR_FIDVID_STATUS, lo, hi); rdmsr 294 drivers/cpufreq/powernow-k8.c rdmsr(MSR_FIDVID_STATUS, lo, maxvid); rdmsr 381 drivers/cpufreq/speedstep-centrino.c rdmsr(MSR_IA32_MISC_ENABLE, l, h); rdmsr 389 drivers/cpufreq/speedstep-centrino.c rdmsr(MSR_IA32_MISC_ENABLE, l, h); rdmsr 75 drivers/cpufreq/speedstep-lib.c rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); rdmsr 112 drivers/cpufreq/speedstep-lib.c rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); rdmsr 135 drivers/cpufreq/speedstep-lib.c rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp); rdmsr 160 drivers/cpufreq/speedstep-lib.c rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); rdmsr 189 drivers/cpufreq/speedstep-lib.c rdmsr(0x2c, msr_lo, msr_hi); rdmsr 345 drivers/cpufreq/speedstep-lib.c rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi); rdmsr 358 drivers/cpufreq/speedstep-lib.c rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi); rdmsr 155 drivers/gpio/gpio-cs5535.c rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi); rdmsr 241 drivers/hwmon/hwmon-vid.c rdmsr(0x198, dummy, vid); rdmsr 244 drivers/hwmon/hwmon-vid.c rdmsr(0x1154, brand, dummy); rdmsr 98 drivers/ide/cs5535.c rdmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, dummy); rdmsr 108 drivers/ide/cs5535.c rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy); rdmsr 112 drivers/ide/cs5535.c rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy); rdmsr 63 drivers/ide/cs5536.c rdmsr(MSR_IDE_CFG + reg, *val, dummy); rdmsr 84 drivers/misc/cs5535-mfgpt.c rdmsr(msr, value, dummy); rdmsr 115 drivers/misc/cs5535-mfgpt.c rdmsr(MSR_PIC_ZSEL_LOW, zsel, dummy); rdmsr 129 drivers/misc/cs5535-mfgpt.c rdmsr(MSR_PIC_IRQM_LPC, lpc, dummy); rdmsr 239 drivers/thermal/intel/x86_pkg_temp_thermal.c rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); rdmsr 255 drivers/thermal/intel/x86_pkg_temp_thermal.c rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); rdmsr 367 drivers/thermal/intel/x86_pkg_temp_thermal.c rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, zonedev->msr_pkg_therm_low, rdmsr 28 drivers/video/fbdev/geode/display_gx.c rdmsr(MSR_GLIU_P2D_RO0, lo, hi); rdmsr 129 drivers/video/fbdev/geode/lxfb_ops.c rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi); rdmsr 147 drivers/video/fbdev/geode/lxfb_ops.c rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi); rdmsr 318 drivers/video/fbdev/geode/lxfb_ops.c rdmsr(MSR_GLIU_P2D_RO0, lo, hi); rdmsr 54 include/linux/cs5535.h rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi); rdmsr 80 tools/power/cpupower/debug/i386/centrino-decode.c err = rdmsr(cpu, MSR_IA32_PERF_STATUS, &lo, &hi); rdmsr 537 tools/testing/selftests/kvm/include/x86_64/vmx.h return rdmsr(MSR_IA32_VMX_BASIC); rdmsr 146 tools/testing/selftests/kvm/lib/x86_64/vmx.c cr0 &= rdmsr(MSR_IA32_VMX_CR0_FIXED1); rdmsr 147 tools/testing/selftests/kvm/lib/x86_64/vmx.c cr0 |= rdmsr(MSR_IA32_VMX_CR0_FIXED0); rdmsr 151 tools/testing/selftests/kvm/lib/x86_64/vmx.c cr4 &= rdmsr(MSR_IA32_VMX_CR4_FIXED1); rdmsr 152 tools/testing/selftests/kvm/lib/x86_64/vmx.c cr4 |= rdmsr(MSR_IA32_VMX_CR4_FIXED0); rdmsr 165 tools/testing/selftests/kvm/lib/x86_64/vmx.c feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL); rdmsr 213 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(PIN_BASED_VM_EXEC_CONTROL, rdmsr(MSR_IA32_VMX_TRUE_PINBASED_CTLS)); rdmsr 220 tools/testing/selftests/kvm/lib/x86_64/vmx.c .ad_enabled = !!(rdmsr(MSR_IA32_VMX_EPT_VPID_CAP) & VMX_EPT_VPID_CAP_AD_BITS), rdmsr 231 tools/testing/selftests/kvm/lib/x86_64/vmx.c rdmsr(MSR_IA32_VMX_TRUE_PROCBASED_CTLS) | CPU_BASED_ACTIVATE_SECONDARY_CONTROLS); rdmsr 233 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(CPU_BASED_VM_EXEC_CONTROL, rdmsr(MSR_IA32_VMX_TRUE_PROCBASED_CTLS)); rdmsr 241 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(VM_EXIT_CONTROLS, rdmsr(MSR_IA32_VMX_EXIT_CTLS) | rdmsr 245 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(VM_ENTRY_CONTROLS, rdmsr(MSR_IA32_VMX_ENTRY_CTLS) | rdmsr 279 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(HOST_IA32_PAT, rdmsr(MSR_IA32_CR_PAT)); rdmsr 281 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(HOST_IA32_EFER, rdmsr(MSR_EFER)); rdmsr 284 tools/testing/selftests/kvm/lib/x86_64/vmx.c rdmsr(MSR_CORE_PERF_GLOBAL_CTRL)); rdmsr 286 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(HOST_IA32_SYSENTER_CS, rdmsr(MSR_IA32_SYSENTER_CS)); rdmsr 291 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(HOST_FS_BASE, rdmsr(MSR_FS_BASE)); rdmsr 292 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(HOST_GS_BASE, rdmsr(MSR_GS_BASE)); rdmsr 297 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(HOST_IA32_SYSENTER_ESP, rdmsr(MSR_IA32_SYSENTER_ESP)); rdmsr 298 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmwrite(HOST_IA32_SYSENTER_EIP, rdmsr(MSR_IA32_SYSENTER_EIP)); rdmsr 32 tools/testing/selftests/kvm/x86_64/platform_info_test.c msr_platform_info = rdmsr(MSR_PLATFORM_INFO); rdmsr 63 tools/testing/selftests/kvm/x86_64/smm_test.c uint64_t apicbase = rdmsr(MSR_IA32_APICBASE); rdmsr 67 tools/testing/selftests/kvm/x86_64/vmx_tsc_adjust_test.c adjust = rdmsr(MSR_IA32_TSC_ADJUST);