rdlp              462 drivers/net/ethernet/marvell/mv643xx_eth.c 	while (rdlp(mp, RXQ_COMMAND) & mask)
rdlp              488 drivers/net/ethernet/marvell/mv643xx_eth.c 	while (rdlp(mp, TXQ_COMMAND) & mask)
rdlp             1044 drivers/net/ethernet/marvell/mv643xx_eth.c 	if (rdlp(mp, TXQ_COMMAND) & (1 << txq->index))
rdlp             1047 drivers/net/ethernet/marvell/mv643xx_eth.c 	hw_desc_ptr = rdlp(mp, TXQ_CURRENT_DESC_PTR(txq->index));
rdlp             1206 drivers/net/ethernet/marvell/mv643xx_eth.c 		val = rdlp(mp, off);
rdlp             1217 drivers/net/ethernet/marvell/mv643xx_eth.c 	u32 pscr = rdlp(mp, PORT_SERIAL_CONTROL);
rdlp             1292 drivers/net/ethernet/marvell/mv643xx_eth.c 	rdlp(mp, RX_DISCARD_FRAME_CNT);
rdlp             1293 drivers/net/ethernet/marvell/mv643xx_eth.c 	rdlp(mp, RX_OVERRUN_FRAME_CNT);
rdlp             1332 drivers/net/ethernet/marvell/mv643xx_eth.c 	p->rx_discard += rdlp(mp, RX_DISCARD_FRAME_CNT);
rdlp             1333 drivers/net/ethernet/marvell/mv643xx_eth.c 	p->rx_overrun += rdlp(mp, RX_OVERRUN_FRAME_CNT);
rdlp             1359 drivers/net/ethernet/marvell/mv643xx_eth.c 	u32 val = rdlp(mp, SDMA_CONFIG);
rdlp             1383 drivers/net/ethernet/marvell/mv643xx_eth.c 	val = rdlp(mp, SDMA_CONFIG);
rdlp             1403 drivers/net/ethernet/marvell/mv643xx_eth.c 	temp = (rdlp(mp, TX_FIFO_URGENT_THRESHOLD) & 0x3fff0) >> 4;
rdlp             1511 drivers/net/ethernet/marvell/mv643xx_eth.c 	port_status = rdlp(mp, PORT_STATUS);
rdlp             1761 drivers/net/ethernet/marvell/mv643xx_eth.c 	unsigned int mac_h = rdlp(mp, MAC_ADDR_HIGH);
rdlp             1762 drivers/net/ethernet/marvell/mv643xx_eth.c 	unsigned int mac_l = rdlp(mp, MAC_ADDR_LOW);
rdlp             1809 drivers/net/ethernet/marvell/mv643xx_eth.c 	port_config = rdlp(mp, PORT_CONFIG) & ~UNICAST_PROMISCUOUS_MODE;
rdlp             2146 drivers/net/ethernet/marvell/mv643xx_eth.c 	int_cause = rdlp(mp, INT_CAUSE) & mp->int_mask;
rdlp             2153 drivers/net/ethernet/marvell/mv643xx_eth.c 		int_cause_ext = rdlp(mp, INT_CAUSE_EXT);
rdlp             2159 drivers/net/ethernet/marvell/mv643xx_eth.c 				~(rdlp(mp, TXQ_COMMAND) & 0xff);
rdlp             2196 drivers/net/ethernet/marvell/mv643xx_eth.c 	port_status = rdlp(mp, PORT_STATUS);
rdlp             2334 drivers/net/ethernet/marvell/mv643xx_eth.c 	pscr = rdlp(mp, PORT_SERIAL_CONTROL);
rdlp             2424 drivers/net/ethernet/marvell/mv643xx_eth.c 	rdlp(mp, INT_CAUSE_EXT);
rdlp             2495 drivers/net/ethernet/marvell/mv643xx_eth.c 		u32 ps = rdlp(mp, PORT_STATUS);
rdlp             2503 drivers/net/ethernet/marvell/mv643xx_eth.c 	data = rdlp(mp, PORT_SERIAL_CONTROL);
rdlp             2517 drivers/net/ethernet/marvell/mv643xx_eth.c 	rdlp(mp, INT_MASK);
rdlp             2608 drivers/net/ethernet/marvell/mv643xx_eth.c 	rdlp(mp, INT_MASK);
rdlp             3037 drivers/net/ethernet/marvell/mv643xx_eth.c 	pscr = rdlp(mp, PORT_SERIAL_CONTROL);
rdlp             3119 drivers/net/ethernet/marvell/mv643xx_eth.c 		     rdlp(mp, PORT_SERIAL_CONTROL1) & ~CLK125_BYPASS_EN);
rdlp             3257 drivers/net/ethernet/marvell/mv643xx_eth.c 	rdlp(mp, INT_MASK);