rdl               194 drivers/net/ethernet/cirrus/ep93xx_eth.c 		if ((rdl(ep, REG_MIISTS) & REG_MIISTS_BUSY) == 0)
rdl               203 drivers/net/ethernet/cirrus/ep93xx_eth.c 		data = rdl(ep, REG_MIIDATA);
rdl               218 drivers/net/ethernet/cirrus/ep93xx_eth.c 		if ((rdl(ep, REG_MIISTS) & REG_MIISTS_BUSY) == 0)
rdl               426 drivers/net/ethernet/cirrus/ep93xx_eth.c 	status = rdl(ep, REG_INTSTSC);
rdl               540 drivers/net/ethernet/cirrus/ep93xx_eth.c 		if ((rdl(ep, REG_SELFCTL) & REG_SELFCTL_RESET) == 0)
rdl               585 drivers/net/ethernet/cirrus/ep93xx_eth.c 		if ((rdl(ep, REG_BMSTS) & REG_BMSTS_RX_ACTIVE) != 0)
rdl               621 drivers/net/ethernet/cirrus/ep93xx_eth.c 		if ((rdl(ep, REG_SELFCTL) & REG_SELFCTL_RESET) == 0)
rdl              1281 drivers/net/ethernet/marvell/mv643xx_eth.c 	return rdl(mp, MIB_COUNTERS(mp->port_num) + offset);
rdl              2909 drivers/net/ethernet/marvell/mv643xx_eth.c 	data = rdl(mp, PHY_ADDR);
rdl              2919 drivers/net/ethernet/marvell/mv643xx_eth.c 	data = rdl(mp, PHY_ADDR);
rdl               293 drivers/net/ethernet/marvell/pxa168_eth.c 		while ((rdl(pep, SDMA_CMD) & (SDMA_CMD_AR | SDMA_CMD_AT))
rdl               567 drivers/net/ethernet/marvell/pxa168_eth.c 	val = rdl(pep, PORT_CONFIG);
rdl               589 drivers/net/ethernet/marvell/pxa168_eth.c 	unsigned int mac_h = rdl(pep, MAC_ADDR_HIGH);
rdl               590 drivers/net/ethernet/marvell/pxa168_eth.c 	unsigned int mac_l = rdl(pep, MAC_ADDR_LOW);
rdl               654 drivers/net/ethernet/marvell/pxa168_eth.c 	val = rdl(pep, PORT_CONFIG);
rdl               659 drivers/net/ethernet/marvell/pxa168_eth.c 	val = rdl(pep, SDMA_CMD);
rdl               676 drivers/net/ethernet/marvell/pxa168_eth.c 	val = rdl(pep, SDMA_CMD);
rdl               685 drivers/net/ethernet/marvell/pxa168_eth.c 	val = rdl(pep, PORT_CONFIG);
rdl               846 drivers/net/ethernet/marvell/pxa168_eth.c 	icr = rdl(pep, INT_CAUSE);
rdl               933 drivers/net/ethernet/marvell/pxa168_eth.c 	u32 cfg, cfg_o = rdl(pep, PORT_CONFIG);
rdl               934 drivers/net/ethernet/marvell/pxa168_eth.c 	u32 cfgext, cfgext_o = rdl(pep, PORT_CONFIG_EXT);
rdl              1293 drivers/net/ethernet/marvell/pxa168_eth.c 	for (i = 0; rdl(pep, SMI) & SMI_BUSY; i++) {
rdl              1314 drivers/net/ethernet/marvell/pxa168_eth.c 	for (i = 0; !((val = rdl(pep, SMI)) & SMI_R_VALID); i++) {
rdl                87 drivers/usb/host/ehci-orion.c 	wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
rdl                88 drivers/usb/host/ehci-orion.c 	while (rdl(USB_CMD) & USB_CMD_RESET);
rdl                94 drivers/usb/host/ehci-orion.c 	wrl(USB_IPG, (rdl(USB_IPG) & ~0x7f00) | 0xc00);
rdl               100 drivers/usb/host/ehci-orion.c 	wrl(USB_PHY_PWR_CTRL, (rdl(USB_PHY_PWR_CTRL) & ~0xc0)| 0x40);
rdl               106 drivers/usb/host/ehci-orion.c 	wrl(USB_PHY_TX_CTRL, (rdl(USB_PHY_TX_CTRL) & ~0x78) | 0x202040);
rdl               113 drivers/usb/host/ehci-orion.c 	wrl(USB_PHY_RX_CTRL, (rdl(USB_PHY_RX_CTRL) & ~0xc2003f0) | 0xc0000010);
rdl               119 drivers/usb/host/ehci-orion.c 	wrl(USB_PHY_IVREF_CTRL, (rdl(USB_PHY_IVREF_CTRL) & ~0x80003 ) | 0x32);
rdl               125 drivers/usb/host/ehci-orion.c 	wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000);
rdl               130 drivers/usb/host/ehci-orion.c 	wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN);
rdl               131 drivers/usb/host/ehci-orion.c 	wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
rdl               132 drivers/usb/host/ehci-orion.c 	while (rdl(USB_CMD) & USB_CMD_RESET);