rd_reg32 3547 drivers/crypto/caam/caamalg.c cha_vid = rd_reg32(&priv->ctrl->perfmon.cha_id_ls); rd_reg32 3551 drivers/crypto/caam/caamalg.c cha_inst = rd_reg32(&priv->ctrl->perfmon.cha_num_ls); rd_reg32 3561 drivers/crypto/caam/caamalg.c aes_rn = rd_reg32(&priv->ctrl->perfmon.cha_rev_ls) & rd_reg32 3567 drivers/crypto/caam/caamalg.c aesa = rd_reg32(&priv->ctrl->vreg.aesa); rd_reg32 3568 drivers/crypto/caam/caamalg.c mdha = rd_reg32(&priv->ctrl->vreg.mdha); rd_reg32 3573 drivers/crypto/caam/caamalg.c des_inst = rd_reg32(&priv->ctrl->vreg.desa) & CHA_VER_NUM_MASK; rd_reg32 3576 drivers/crypto/caam/caamalg.c ccha_inst = rd_reg32(&priv->ctrl->vreg.ccha) & CHA_VER_NUM_MASK; rd_reg32 3577 drivers/crypto/caam/caamalg.c ptha_inst = rd_reg32(&priv->ctrl->vreg.ptha) & CHA_VER_NUM_MASK; rd_reg32 3578 drivers/crypto/caam/caamalg.c arc4_inst = rd_reg32(&priv->ctrl->vreg.afha) & CHA_VER_NUM_MASK; rd_reg32 2565 drivers/crypto/caam/caamalg_qi.c cha_vid = rd_reg32(&priv->ctrl->perfmon.cha_id_ls); rd_reg32 2569 drivers/crypto/caam/caamalg_qi.c cha_inst = rd_reg32(&priv->ctrl->perfmon.cha_num_ls); rd_reg32 2577 drivers/crypto/caam/caamalg_qi.c aesa = rd_reg32(&priv->ctrl->vreg.aesa); rd_reg32 2578 drivers/crypto/caam/caamalg_qi.c mdha = rd_reg32(&priv->ctrl->vreg.mdha); rd_reg32 2583 drivers/crypto/caam/caamalg_qi.c des_inst = rd_reg32(&priv->ctrl->vreg.desa) & CHA_VER_NUM_MASK; rd_reg32 1994 drivers/crypto/caam/caamhash.c md_vid = (rd_reg32(&priv->ctrl->perfmon.cha_id_ls) & rd_reg32 1996 drivers/crypto/caam/caamhash.c md_inst = (rd_reg32(&priv->ctrl->perfmon.cha_num_ls) & rd_reg32 1999 drivers/crypto/caam/caamhash.c u32 mdha = rd_reg32(&priv->ctrl->vreg.mdha); rd_reg32 1096 drivers/crypto/caam/caampkc.c pk_inst = (rd_reg32(&priv->ctrl->perfmon.cha_num_ls) & rd_reg32 1099 drivers/crypto/caam/caampkc.c pk_inst = rd_reg32(&priv->ctrl->vreg.pkha) & CHA_VER_NUM_MASK; rd_reg32 323 drivers/crypto/caam/caamrng.c rng_inst = (rd_reg32(&priv->ctrl->perfmon.cha_num_ls) & rd_reg32 326 drivers/crypto/caam/caamrng.c rng_inst = rd_reg32(&priv->ctrl->vreg.rng) & CHA_VER_NUM_MASK; rd_reg32 108 drivers/crypto/caam/ctrl.c while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) && rd_reg32 117 drivers/crypto/caam/ctrl.c while (!(rd_reg32(&ctrl->deco_rq) & DECORR_DEN0) && rd_reg32 143 drivers/crypto/caam/ctrl.c deco_dbg_reg = rd_reg32(&deco->desc_dbg); rd_reg32 149 drivers/crypto/caam/ctrl.c deco_state = (rd_reg32(&deco->dbg_exec) & rd_reg32 163 drivers/crypto/caam/ctrl.c *status = rd_reg32(&deco->op_status_hi) & rd_reg32 236 drivers/crypto/caam/ctrl.c rdsta_val = rd_reg32(&ctrl->r4tst[0].rdsta) & RDSTA_IFMASK; rd_reg32 371 drivers/crypto/caam/ctrl.c val = (rd_reg32(&r4tst->rtsdctl) & RTSDCTL_ENT_DLY_MASK) rd_reg32 376 drivers/crypto/caam/ctrl.c val = rd_reg32(&r4tst->rtsdctl); rd_reg32 385 drivers/crypto/caam/ctrl.c val = rd_reg32(&r4tst->rtmctl); rd_reg32 420 drivers/crypto/caam/ctrl.c ccbvid = rd_reg32(&ctrl->perfmon.ccb_id); rd_reg32 425 drivers/crypto/caam/ctrl.c id_ms = rd_reg32(&ctrl->perfmon.caam_id_ms); rd_reg32 620 drivers/crypto/caam/ctrl.c caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) & rd_reg32 622 drivers/crypto/caam/ctrl.c comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms); rd_reg32 623 drivers/crypto/caam/ctrl.c if (comp_params & CTPR_MS_PS && rd_reg32(&ctrl->mcr) & MCFGR_LONG_PTR) rd_reg32 698 drivers/crypto/caam/ctrl.c scfgr = rd_reg32(&ctrl->scfgr); rd_reg32 785 drivers/crypto/caam/ctrl.c rng_vid = (rd_reg32(&ctrl->perfmon.cha_id_ls) & rd_reg32 788 drivers/crypto/caam/ctrl.c rng_vid = (rd_reg32(&ctrl->vreg.rng) & CHA_VER_VID_MASK) >> rd_reg32 798 drivers/crypto/caam/ctrl.c rd_reg32(&ctrl->r4tst[0].rdsta); rd_reg32 809 drivers/crypto/caam/ctrl.c rd_reg32(&ctrl->r4tst[0].rdsta) & rd_reg32 858 drivers/crypto/caam/ctrl.c caam_id = (u64)rd_reg32(&ctrl->perfmon.caam_id_ms) << 32 | rd_reg32 859 drivers/crypto/caam/ctrl.c (u64)rd_reg32(&ctrl->perfmon.caam_id_ls); rd_reg32 78 drivers/crypto/caam/jr.c while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) == rd_reg32 82 drivers/crypto/caam/jr.c if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) != rd_reg32 91 drivers/crypto/caam/jr.c while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout) rd_reg32 164 drivers/crypto/caam/jr.c irqstate = rd_reg32(&jrp->rregs->jrintstatus); rd_reg32 203 drivers/crypto/caam/jr.c (outring_used = rd_reg32(&jrp->rregs->outring_used))) { rd_reg32 413 drivers/crypto/caam/jr.c jrp->inpring_avail = rd_reg32(&jrp->rregs->inpring_avail); rd_reg32 435 drivers/tty/synclink_gt.c static __u32 rd_reg32(struct slgt_info *info, unsigned int addr); rd_reg32 2182 drivers/tty/synclink_gt.c unsigned int status = rd_reg32(info, RDCSR); rd_reg32 2208 drivers/tty/synclink_gt.c unsigned int status = rd_reg32(info, TDCSR); rd_reg32 2342 drivers/tty/synclink_gt.c while((gsr = rd_reg32(info, GSR) & 0xffffff00)) { rd_reg32 2363 drivers/tty/synclink_gt.c while ((changed = rd_reg32(info, IOSR)) != 0) { rd_reg32 2366 drivers/tty/synclink_gt.c state = rd_reg32(info, IOVR); rd_reg32 2952 drivers/tty/synclink_gt.c data = rd_reg32(info, IODR); rd_reg32 2958 drivers/tty/synclink_gt.c data = rd_reg32(info, IOVR); rd_reg32 2976 drivers/tty/synclink_gt.c gpio.state = rd_reg32(info, IOVR); rd_reg32 2978 drivers/tty/synclink_gt.c gpio.dir = rd_reg32(info, IODR); rd_reg32 3060 drivers/tty/synclink_gt.c if ((gpio.smask &= ~rd_reg32(info, IODR)) == 0) rd_reg32 3066 drivers/tty/synclink_gt.c wr_reg32(info, IOER, rd_reg32(info, IOER) | gpio.smask); rd_reg32 3068 drivers/tty/synclink_gt.c state = rd_reg32(info, IOVR); rd_reg32 3870 drivers/tty/synclink_gt.c if (!(rd_reg32(info, RDCSR) & BIT0)) rd_reg32 3883 drivers/tty/synclink_gt.c if (!(rd_reg32(info, TDCSR) & BIT0)) rd_reg32 4214 drivers/tty/synclink_gt.c if ((rd_reg32(info, JCR) & BIT8) && info->params.data_rate && rd_reg32 4800 drivers/tty/synclink_gt.c if (count && (rd_reg32(info, TDCSR) & BIT0)) rd_reg32 4840 drivers/tty/synclink_gt.c reg_value = rd_reg32(info, TDCSR); rd_reg32 4944 drivers/tty/synclink_gt.c info->gpio_present = (rd_reg32(info, JCR) & BIT5) ? 1 : 0;