rd 193 arch/arm/include/asm/assembler.h .macro badr\c, rd, sym rd 205 arch/arm/include/asm/assembler.h .macro get_thread_info, rd rd 12 arch/arm/include/asm/vfpmacros.h .macro VFPFMRX, rd, sysreg, cond rd 16 arch/arm/include/asm/vfpmacros.h .macro VFPFMXR, sysreg, rd, cond rd 51 arch/arm/mach-tegra/sleep.h .macro cpu_to_halt_reg rd, rcpu rd 60 arch/arm/mach-tegra/sleep.h .macro cpu_to_csr_reg rd, rcpu rd 69 arch/arm/mach-tegra/sleep.h .macro cpu_id, rd rd 342 arch/arm/mm/alignment.c unsigned int rd = RD_BITS(instr); rd 357 arch/arm/mm/alignment.c regs->uregs[rd] = val; rd 359 arch/arm/mm/alignment.c put16_unaligned_check(regs->uregs[rd], addr); rd 375 arch/arm/mm/alignment.c regs->uregs[rd] = val; rd 378 arch/arm/mm/alignment.c put16t_unaligned_check(regs->uregs[rd], addr); rd 391 arch/arm/mm/alignment.c unsigned int rd = RD_BITS(instr); rd 399 arch/arm/mm/alignment.c } else if (((rd & 1) == 1) || (rd == 14)) rd 403 arch/arm/mm/alignment.c rd2 = rd + 1; rd 414 arch/arm/mm/alignment.c regs->uregs[rd] = val; rd 418 arch/arm/mm/alignment.c put32_unaligned_check(regs->uregs[rd], addr); rd 434 arch/arm/mm/alignment.c regs->uregs[rd] = val; rd 438 arch/arm/mm/alignment.c put32t_unaligned_check(regs->uregs[rd], addr); rd 453 arch/arm/mm/alignment.c unsigned int rd = RD_BITS(instr); rd 463 arch/arm/mm/alignment.c regs->uregs[rd] = val; rd 465 arch/arm/mm/alignment.c put32_unaligned_check(regs->uregs[rd], addr); rd 474 arch/arm/mm/alignment.c regs->uregs[rd] = val; rd 477 arch/arm/mm/alignment.c put32t_unaligned_check(regs->uregs[rd], addr); rd 502 arch/arm/mm/alignment.c unsigned int rd, rn, correction, nr_regs, regbits; rd 550 arch/arm/mm/alignment.c for (regbits = REGMASK_BITS(instr), rd = 0; regbits; rd 551 arch/arm/mm/alignment.c regbits >>= 1, rd += 1) rd 556 arch/arm/mm/alignment.c regs->uregs[rd] = val; rd 558 arch/arm/mm/alignment.c put32t_unaligned_check(regs->uregs[rd], eaddr); rd 563 arch/arm/mm/alignment.c for (regbits = REGMASK_BITS(instr), rd = 0; regbits; rd 564 arch/arm/mm/alignment.c regbits >>= 1, rd += 1) rd 569 arch/arm/mm/alignment.c regs->uregs[rd] = val; rd 571 arch/arm/mm/alignment.c put32_unaligned_check(regs->uregs[rd], eaddr); rd 414 arch/arm/net/bpf_jit_32.c static inline void emit_mov_i_no8m(const u8 rd, u32 val, struct jit_ctx *ctx) rd 417 arch/arm/net/bpf_jit_32.c emit(ARM_LDR_I(rd, ARM_PC, imm_offset(val, ctx)), ctx); rd 419 arch/arm/net/bpf_jit_32.c emit(ARM_MOVW(rd, val & 0xffff), ctx); rd 421 arch/arm/net/bpf_jit_32.c emit(ARM_MOVT(rd, val >> 16), ctx); rd 425 arch/arm/net/bpf_jit_32.c static inline void emit_mov_i(const u8 rd, u32 val, struct jit_ctx *ctx) rd 430 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_I(rd, imm12), ctx); rd 432 arch/arm/net/bpf_jit_32.c emit_mov_i_no8m(rd, val, ctx); rd 465 arch/arm/net/bpf_jit_32.c static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op) rd 472 arch/arm/net/bpf_jit_32.c emit(ARM_UDIV(rd, rm, rn), ctx); rd 475 arch/arm/net/bpf_jit_32.c emit(ARM_MLS(rd, rn, ARM_IP, rm), ctx); rd 504 arch/arm/net/bpf_jit_32.c if (rd != ARM_R0) rd 505 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_R(rd, ARM_R0), ctx); rd 602 arch/arm/net/bpf_jit_32.c const s8 *rd = is_stacked(dst_lo) ? tmp : dst; rd 604 arch/arm/net/bpf_jit_32.c emit_mov_i(rd[1], (u32)val, ctx); rd 605 arch/arm/net/bpf_jit_32.c emit_mov_i(rd[0], val >> 32, ctx); rd 607 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg64(dst, rd, ctx); rd 703 arch/arm/net/bpf_jit_32.c s8 rn, rd; rd 706 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg32(dst, tmp[0], ctx); rd 708 arch/arm/net/bpf_jit_32.c emit_alu_r(rd, rn, is64, hi, op, ctx); rd 709 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg32(dst, rd, ctx); rd 718 arch/arm/net/bpf_jit_32.c const s8 *rd; rd 720 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 727 arch/arm/net/bpf_jit_32.c emit_alu_r(rd[1], rs[1], true, false, op, ctx); rd 728 arch/arm/net/bpf_jit_32.c emit_alu_r(rd[0], rs[0], true, true, op, ctx); rd 735 arch/arm/net/bpf_jit_32.c emit_alu_r(rd[1], rs, true, false, op, ctx); rd 737 arch/arm/net/bpf_jit_32.c emit_a32_mov_i(rd[0], 0, ctx); rd 740 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg64(dst, rd, ctx); rd 786 arch/arm/net/bpf_jit_32.c s8 rd; rd 788 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg32(dst, tmp[0], ctx); rd 793 arch/arm/net/bpf_jit_32.c emit(ARM_LSL_I(rd, rd, val), ctx); rd 796 arch/arm/net/bpf_jit_32.c emit(ARM_LSR_I(rd, rd, val), ctx); rd 799 arch/arm/net/bpf_jit_32.c emit(ARM_RSB_I(rd, rd, val), ctx); rd 803 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg32(dst, rd, ctx); rd 810 arch/arm/net/bpf_jit_32.c const s8 *rd; rd 813 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 816 arch/arm/net/bpf_jit_32.c emit(ARM_RSBS_I(rd[1], rd[1], 0), ctx); rd 817 arch/arm/net/bpf_jit_32.c emit(ARM_RSC_I(rd[0], rd[0], 0), ctx); rd 819 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg64(dst, rd, ctx); rd 827 arch/arm/net/bpf_jit_32.c const s8 *rd; rd 832 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 837 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SR(ARM_LR, rd[0], SRTYPE_ASL, rt), ctx); rd 838 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SR(ARM_LR, ARM_LR, rd[1], SRTYPE_ASL, ARM_IP), ctx); rd 839 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SR(ARM_IP, ARM_LR, rd[1], SRTYPE_LSR, tmp2[0]), ctx); rd 840 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SR(ARM_LR, rd[1], SRTYPE_ASL, rt), ctx); rd 851 arch/arm/net/bpf_jit_32.c const s8 *rd; rd 856 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 861 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SR(ARM_LR, rd[1], SRTYPE_LSR, rt), ctx); rd 862 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SR(ARM_LR, ARM_LR, rd[0], SRTYPE_ASL, ARM_IP), ctx); rd 864 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SR(ARM_LR, ARM_LR, rd[0], SRTYPE_ASR, tmp2[0]), ctx); rd 865 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SR(ARM_IP, rd[0], SRTYPE_ASR, rt), ctx); rd 876 arch/arm/net/bpf_jit_32.c const s8 *rd; rd 881 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 886 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SR(ARM_LR, rd[1], SRTYPE_LSR, rt), ctx); rd 887 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SR(ARM_LR, ARM_LR, rd[0], SRTYPE_ASL, ARM_IP), ctx); rd 888 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SR(ARM_LR, ARM_LR, rd[0], SRTYPE_LSR, tmp2[0]), ctx); rd 889 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SR(ARM_IP, rd[0], SRTYPE_LSR, rt), ctx); rd 900 arch/arm/net/bpf_jit_32.c const s8 *rd; rd 903 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 907 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(tmp2[0], rd[0], SRTYPE_ASL, val), ctx); rd 908 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SI(rd[0], tmp2[0], rd[1], SRTYPE_LSR, 32 - val), ctx); rd 909 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(rd[1], rd[1], SRTYPE_ASL, val), ctx); rd 912 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_R(rd[0], rd[1]), ctx); rd 914 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(rd[0], rd[1], SRTYPE_ASL, val - 32), ctx); rd 915 arch/arm/net/bpf_jit_32.c emit(ARM_EOR_R(rd[1], rd[1], rd[1]), ctx); rd 918 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg64(dst, rd, ctx); rd 926 arch/arm/net/bpf_jit_32.c const s8 *rd; rd 929 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 937 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(tmp2[1], rd[1], SRTYPE_LSR, val), ctx); rd 938 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SI(rd[1], tmp2[1], rd[0], SRTYPE_ASL, 32 - val), ctx); rd 939 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(rd[0], rd[0], SRTYPE_LSR, val), ctx); rd 941 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_R(rd[1], rd[0]), ctx); rd 942 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_I(rd[0], 0), ctx); rd 944 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(rd[1], rd[0], SRTYPE_LSR, val - 32), ctx); rd 945 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_I(rd[0], 0), ctx); rd 948 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg64(dst, rd, ctx); rd 956 arch/arm/net/bpf_jit_32.c const s8 *rd; rd 959 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 967 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(tmp2[1], rd[1], SRTYPE_LSR, val), ctx); rd 968 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SI(rd[1], tmp2[1], rd[0], SRTYPE_ASL, 32 - val), ctx); rd 969 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(rd[0], rd[0], SRTYPE_ASR, val), ctx); rd 971 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_R(rd[1], rd[0]), ctx); rd 972 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(rd[0], rd[0], SRTYPE_ASR, 31), ctx); rd 974 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(rd[1], rd[0], SRTYPE_ASR, val - 32), ctx); rd 975 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_SI(rd[0], rd[0], SRTYPE_ASR, 31), ctx); rd 978 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg64(dst, rd, ctx); rd 985 arch/arm/net/bpf_jit_32.c const s8 *rd, *rt; rd 988 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 992 arch/arm/net/bpf_jit_32.c emit(ARM_MUL(ARM_IP, rd[1], rt[0]), ctx); rd 993 arch/arm/net/bpf_jit_32.c emit(ARM_MUL(ARM_LR, rd[0], rt[1]), ctx); rd 996 arch/arm/net/bpf_jit_32.c emit(ARM_UMULL(ARM_IP, rd[0], rd[1], rt[1]), ctx); rd 997 arch/arm/net/bpf_jit_32.c emit(ARM_ADD_R(rd[0], ARM_LR, rd[0]), ctx); rd 1000 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg32(dst_hi, rd[0], ctx); rd 1027 arch/arm/net/bpf_jit_32.c s8 rd; rd 1029 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg32(dst, tmp[1], ctx); rd 1033 arch/arm/net/bpf_jit_32.c emit(ARM_ADD_R(tmp[0], tmp[0], rd), ctx); rd 1034 arch/arm/net/bpf_jit_32.c rd = tmp[0]; rd 1040 arch/arm/net/bpf_jit_32.c emit(ARM_STRB_I(src_lo, rd, off), ctx); rd 1044 arch/arm/net/bpf_jit_32.c emit(ARM_STRH_I(src_lo, rd, off), ctx); rd 1048 arch/arm/net/bpf_jit_32.c emit(ARM_STR_I(src_lo, rd, off), ctx); rd 1052 arch/arm/net/bpf_jit_32.c emit(ARM_STR_I(src_lo, rd, off), ctx); rd 1053 arch/arm/net/bpf_jit_32.c emit(ARM_STR_I(src_hi, rd, off + 4), ctx); rd 1062 arch/arm/net/bpf_jit_32.c const s8 *rd = is_stacked(dst_lo) ? tmp : dst; rd 1070 arch/arm/net/bpf_jit_32.c } else if (rd[1] == rm) { rd 1077 arch/arm/net/bpf_jit_32.c emit(ARM_LDRB_I(rd[1], rm, off), ctx); rd 1079 arch/arm/net/bpf_jit_32.c emit_a32_mov_i(rd[0], 0, ctx); rd 1083 arch/arm/net/bpf_jit_32.c emit(ARM_LDRH_I(rd[1], rm, off), ctx); rd 1085 arch/arm/net/bpf_jit_32.c emit_a32_mov_i(rd[0], 0, ctx); rd 1089 arch/arm/net/bpf_jit_32.c emit(ARM_LDR_I(rd[1], rm, off), ctx); rd 1091 arch/arm/net/bpf_jit_32.c emit_a32_mov_i(rd[0], 0, ctx); rd 1095 arch/arm/net/bpf_jit_32.c emit(ARM_LDR_I(rd[1], rm, off), ctx); rd 1096 arch/arm/net/bpf_jit_32.c emit(ARM_LDR_I(rd[0], rm, off + 4), ctx); rd 1099 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg64(dst, rd, ctx); rd 1103 arch/arm/net/bpf_jit_32.c static inline void emit_ar_r(const u8 rd, const u8 rt, const u8 rm, rd 1110 arch/arm/net/bpf_jit_32.c emit(ARM_AND_R(ARM_LR, rd, rm), ctx); rd 1123 arch/arm/net/bpf_jit_32.c emit(ARM_CMP_R(rd, rm), ctx); rd 1134 arch/arm/net/bpf_jit_32.c emit(ARM_SBCS_R(ARM_IP, rm, rd), ctx); rd 1140 arch/arm/net/bpf_jit_32.c emit(ARM_SBCS_R(ARM_IP, rd, rm), ctx); rd 1227 arch/arm/net/bpf_jit_32.c static inline void emit_rev16(const u8 rd, const u8 rn, struct jit_ctx *ctx) rd 1235 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_SI(rd, tmp2[0], tmp2[1], SRTYPE_LSL, 8), ctx); rd 1237 arch/arm/net/bpf_jit_32.c emit(ARM_REV16(rd, rn), ctx); rd 1242 arch/arm/net/bpf_jit_32.c static inline void emit_rev32(const u8 rd, const u8 rn, struct jit_ctx *ctx) rd 1257 arch/arm/net/bpf_jit_32.c emit(ARM_ORR_R(rd, ARM_IP, tmp2[0]), ctx); rd 1260 arch/arm/net/bpf_jit_32.c emit(ARM_REV(rd, rn), ctx); rd 1356 arch/arm/net/bpf_jit_32.c const s8 *rd, *rs; rd 1546 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 1551 arch/arm/net/bpf_jit_32.c emit_rev16(rd[1], rd[1], ctx); rd 1554 arch/arm/net/bpf_jit_32.c emit_rev32(rd[1], rd[1], ctx); rd 1557 arch/arm/net/bpf_jit_32.c emit_rev32(ARM_LR, rd[1], ctx); rd 1558 arch/arm/net/bpf_jit_32.c emit_rev32(rd[1], rd[0], ctx); rd 1559 arch/arm/net/bpf_jit_32.c emit(ARM_MOV_R(rd[0], ARM_LR), ctx); rd 1569 arch/arm/net/bpf_jit_32.c emit(ARM_AND_R(rd[1], rd[1], tmp2[1]), ctx); rd 1571 arch/arm/net/bpf_jit_32.c emit(ARM_UXTH(rd[1], rd[1]), ctx); rd 1574 arch/arm/net/bpf_jit_32.c emit(ARM_EOR_R(rd[0], rd[0], rd[0]), ctx); rd 1579 arch/arm/net/bpf_jit_32.c emit(ARM_EOR_R(rd[0], rd[0], rd[0]), ctx); rd 1586 arch/arm/net/bpf_jit_32.c arm_bpf_put_reg64(dst, rd, ctx); rd 1714 arch/arm/net/bpf_jit_32.c rd = arm_bpf_get_reg64(dst, tmp, ctx); rd 1717 arch/arm/net/bpf_jit_32.c emit_ar_r(rd[0], rd[1], rm, rn, ctx, BPF_OP(code), rd 159 arch/arm/net/bpf_jit_32.h #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm)) rd 161 arch/arm/net/bpf_jit_32.h #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm)) rd 165 arch/arm/net/bpf_jit_32.h #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm) rd 166 arch/arm/net/bpf_jit_32.h #define ARM_ADDS_R(rd, rn, rm) _AL3_R(ARM_INST_ADDS, rd, rn, rm) rd 167 arch/arm/net/bpf_jit_32.h #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm) rd 168 arch/arm/net/bpf_jit_32.h #define ARM_ADDS_I(rd, rn, imm) _AL3_I(ARM_INST_ADDS, rd, rn, imm) rd 169 arch/arm/net/bpf_jit_32.h #define ARM_ADC_R(rd, rn, rm) _AL3_R(ARM_INST_ADC, rd, rn, rm) rd 170 arch/arm/net/bpf_jit_32.h #define ARM_ADC_I(rd, rn, imm) _AL3_I(ARM_INST_ADC, rd, rn, imm) rd 172 arch/arm/net/bpf_jit_32.h #define ARM_AND_R(rd, rn, rm) _AL3_R(ARM_INST_AND, rd, rn, rm) rd 173 arch/arm/net/bpf_jit_32.h #define ARM_ANDS_R(rd, rn, rm) _AL3_R(ARM_INST_ANDS, rd, rn, rm) rd 174 arch/arm/net/bpf_jit_32.h #define ARM_AND_I(rd, rn, imm) _AL3_I(ARM_INST_AND, rd, rn, imm) rd 176 arch/arm/net/bpf_jit_32.h #define ARM_BIC_R(rd, rn, rm) _AL3_R(ARM_INST_BIC, rd, rn, rm) rd 177 arch/arm/net/bpf_jit_32.h #define ARM_BIC_I(rd, rn, imm) _AL3_I(ARM_INST_BIC, rd, rn, imm) rd 186 arch/arm/net/bpf_jit_32.h #define ARM_EOR_R(rd, rn, rm) _AL3_R(ARM_INST_EOR, rd, rn, rm) rd 187 arch/arm/net/bpf_jit_32.h #define ARM_EOR_I(rd, rn, imm) _AL3_I(ARM_INST_EOR, rd, rn, imm) rd 206 arch/arm/net/bpf_jit_32.h #define ARM_LSL_R(rd, rn, rm) (_AL3_R(ARM_INST_LSL, rd, 0, rn) | (rm) << 8) rd 207 arch/arm/net/bpf_jit_32.h #define ARM_LSL_I(rd, rn, imm) (_AL3_I(ARM_INST_LSL, rd, 0, rn) | (imm) << 7) rd 209 arch/arm/net/bpf_jit_32.h #define ARM_LSR_R(rd, rn, rm) (_AL3_R(ARM_INST_LSR, rd, 0, rn) | (rm) << 8) rd 210 arch/arm/net/bpf_jit_32.h #define ARM_LSR_I(rd, rn, imm) (_AL3_I(ARM_INST_LSR, rd, 0, rn) | (imm) << 7) rd 211 arch/arm/net/bpf_jit_32.h #define ARM_ASR_R(rd, rn, rm) (_AL3_R(ARM_INST_ASR, rd, 0, rn) | (rm) << 8) rd 212 arch/arm/net/bpf_jit_32.h #define ARM_ASR_I(rd, rn, imm) (_AL3_I(ARM_INST_ASR, rd, 0, rn) | (imm) << 7) rd 214 arch/arm/net/bpf_jit_32.h #define ARM_MOV_R(rd, rm) _AL3_R(ARM_INST_MOV, rd, 0, rm) rd 215 arch/arm/net/bpf_jit_32.h #define ARM_MOVS_R(rd, rm) _AL3_R(ARM_INST_MOVS, rd, 0, rm) rd 216 arch/arm/net/bpf_jit_32.h #define ARM_MOV_I(rd, imm) _AL3_I(ARM_INST_MOV, rd, 0, imm) rd 217 arch/arm/net/bpf_jit_32.h #define ARM_MOV_SR(rd, rm, type, rs) \ rd 218 arch/arm/net/bpf_jit_32.h (_AL3_SR(ARM_MOV_R(rd, rm)) | (type) << 5 | (rs) << 8) rd 219 arch/arm/net/bpf_jit_32.h #define ARM_MOV_SI(rd, rm, type, imm6) \ rd 220 arch/arm/net/bpf_jit_32.h (ARM_MOV_R(rd, rm) | (type) << 5 | (imm6) << 7) rd 222 arch/arm/net/bpf_jit_32.h #define ARM_MOVW(rd, imm) \ rd 223 arch/arm/net/bpf_jit_32.h (ARM_INST_MOVW | ((imm) >> 12) << 16 | (rd) << 12 | ((imm) & 0x0fff)) rd 225 arch/arm/net/bpf_jit_32.h #define ARM_MOVT(rd, imm) \ rd 226 arch/arm/net/bpf_jit_32.h (ARM_INST_MOVT | ((imm) >> 12) << 16 | (rd) << 12 | ((imm) & 0x0fff)) rd 228 arch/arm/net/bpf_jit_32.h #define ARM_MUL(rd, rm, rn) (ARM_INST_MUL | (rd) << 16 | (rm) << 8 | (rn)) rd 233 arch/arm/net/bpf_jit_32.h #define ARM_ORR_R(rd, rn, rm) _AL3_R(ARM_INST_ORR, rd, rn, rm) rd 234 arch/arm/net/bpf_jit_32.h #define ARM_ORR_I(rd, rn, imm) _AL3_I(ARM_INST_ORR, rd, rn, imm) rd 235 arch/arm/net/bpf_jit_32.h #define ARM_ORR_SR(rd, rn, rm, type, rs) \ rd 236 arch/arm/net/bpf_jit_32.h (_AL3_SR(ARM_ORR_R(rd, rn, rm)) | (type) << 5 | (rs) << 8) rd 237 arch/arm/net/bpf_jit_32.h #define ARM_ORRS_R(rd, rn, rm) _AL3_R(ARM_INST_ORRS, rd, rn, rm) rd 238 arch/arm/net/bpf_jit_32.h #define ARM_ORRS_SR(rd, rn, rm, type, rs) \ rd 239 arch/arm/net/bpf_jit_32.h (_AL3_SR(ARM_ORRS_R(rd, rn, rm)) | (type) << 5 | (rs) << 8) rd 240 arch/arm/net/bpf_jit_32.h #define ARM_ORR_SI(rd, rn, rm, type, imm6) \ rd 241 arch/arm/net/bpf_jit_32.h (ARM_ORR_R(rd, rn, rm) | (type) << 5 | (imm6) << 7) rd 242 arch/arm/net/bpf_jit_32.h #define ARM_ORRS_SI(rd, rn, rm, type, imm6) \ rd 243 arch/arm/net/bpf_jit_32.h (ARM_ORRS_R(rd, rn, rm) | (type) << 5 | (imm6) << 7) rd 245 arch/arm/net/bpf_jit_32.h #define ARM_REV(rd, rm) (ARM_INST_REV | (rd) << 12 | (rm)) rd 246 arch/arm/net/bpf_jit_32.h #define ARM_REV16(rd, rm) (ARM_INST_REV16 | (rd) << 12 | (rm)) rd 248 arch/arm/net/bpf_jit_32.h #define ARM_RSB_I(rd, rn, imm) _AL3_I(ARM_INST_RSB, rd, rn, imm) rd 249 arch/arm/net/bpf_jit_32.h #define ARM_RSBS_I(rd, rn, imm) _AL3_I(ARM_INST_RSBS, rd, rn, imm) rd 250 arch/arm/net/bpf_jit_32.h #define ARM_RSC_I(rd, rn, imm) _AL3_I(ARM_INST_RSC, rd, rn, imm) rd 252 arch/arm/net/bpf_jit_32.h #define ARM_SUB_R(rd, rn, rm) _AL3_R(ARM_INST_SUB, rd, rn, rm) rd 253 arch/arm/net/bpf_jit_32.h #define ARM_SUBS_R(rd, rn, rm) _AL3_R(ARM_INST_SUBS, rd, rn, rm) rd 254 arch/arm/net/bpf_jit_32.h #define ARM_RSB_R(rd, rn, rm) _AL3_R(ARM_INST_RSB, rd, rn, rm) rd 255 arch/arm/net/bpf_jit_32.h #define ARM_SBC_R(rd, rn, rm) _AL3_R(ARM_INST_SBC, rd, rn, rm) rd 256 arch/arm/net/bpf_jit_32.h #define ARM_SBCS_R(rd, rn, rm) _AL3_R(ARM_INST_SBCS, rd, rn, rm) rd 257 arch/arm/net/bpf_jit_32.h #define ARM_SUB_I(rd, rn, imm) _AL3_I(ARM_INST_SUB, rd, rn, imm) rd 258 arch/arm/net/bpf_jit_32.h #define ARM_SUBS_I(rd, rn, imm) _AL3_I(ARM_INST_SUBS, rd, rn, imm) rd 259 arch/arm/net/bpf_jit_32.h #define ARM_SBC_I(rd, rn, imm) _AL3_I(ARM_INST_SBC, rd, rn, imm) rd 264 arch/arm/net/bpf_jit_32.h #define ARM_UDIV(rd, rn, rm) (ARM_INST_UDIV | (rd) << 16 | (rn) | (rm) << 8) rd 269 arch/arm/net/bpf_jit_32.h #define ARM_MLS(rd, rn, rm, ra) (ARM_INST_MLS | (rd) << 16 | (rn) | (rm) << 8 \ rd 271 arch/arm/net/bpf_jit_32.h #define ARM_UXTH(rd, rm) (ARM_INST_UXTH | (rd) << 12 | (rm)) rd 94 arch/arm/probes/decode-arm.c int rd = (insn >> 12) & 0xf; rd 96 arch/arm/probes/decode-arm.c regs->uregs[rd] = regs->ARM_cpsr & mask; rd 159 arch/arm/probes/kprobes/actions-arm.c int rd = (insn >> 12) & 0xf; rd 164 arch/arm/probes/kprobes/actions-arm.c register unsigned long rdv asm("r0") = regs->uregs[rd]; rd 182 arch/arm/probes/kprobes/actions-arm.c if (rd == 15) rd 185 arch/arm/probes/kprobes/actions-arm.c regs->uregs[rd] = rdv; rd 193 arch/arm/probes/kprobes/actions-arm.c int rd = (insn >> 12) & 0xf; rd 197 arch/arm/probes/kprobes/actions-arm.c register unsigned long rdv asm("r0") = regs->uregs[rd]; rd 212 arch/arm/probes/kprobes/actions-arm.c regs->uregs[rd] = rdv; rd 221 arch/arm/probes/kprobes/actions-arm.c int rd = (insn >> 16) & 0xf; rd 226 arch/arm/probes/kprobes/actions-arm.c register unsigned long rdv asm("r2") = regs->uregs[rd]; rd 242 arch/arm/probes/kprobes/actions-arm.c regs->uregs[rd] = rdv; rd 250 arch/arm/probes/kprobes/actions-arm.c int rd = (insn >> 12) & 0xf; rd 253 arch/arm/probes/kprobes/actions-arm.c register unsigned long rdv asm("r0") = regs->uregs[rd]; rd 263 arch/arm/probes/kprobes/actions-arm.c regs->uregs[rd] = rdv; rd 47 arch/arm/probes/kprobes/actions-thumb.c int rd = (insn >> 8) & 0xf; rd 49 arch/arm/probes/kprobes/actions-thumb.c regs->uregs[rd] = regs->ARM_cpsr & mask; rd 214 arch/arm/probes/kprobes/actions-thumb.c int rd = (insn >> 8) & 0xf; rd 218 arch/arm/probes/kprobes/actions-thumb.c register unsigned long rdv asm("r1") = regs->uregs[rd]; rd 233 arch/arm/probes/kprobes/actions-thumb.c regs->uregs[rd] = rdv; rd 242 arch/arm/probes/kprobes/actions-thumb.c int rd = (insn >> 8) & 0xf; rd 244 arch/arm/probes/kprobes/actions-thumb.c register unsigned long rdv asm("r1") = regs->uregs[rd]; rd 254 arch/arm/probes/kprobes/actions-thumb.c regs->uregs[rd] = rdv; rd 261 arch/arm/probes/kprobes/actions-thumb.c int rd = (insn >> 8) & 0xf; rd 264 arch/arm/probes/kprobes/actions-thumb.c register unsigned long rdv asm("r1") = regs->uregs[rd]; rd 274 arch/arm/probes/kprobes/actions-thumb.c regs->uregs[rd] = rdv; rd 186 arch/arm64/include/asm/assembler.h .macro regs_to_64, rd, lbits, hbits rd 188 arch/arm64/include/asm/assembler.h .macro regs_to_64, rd, hbits, lbits rd 268 arch/arm64/include/asm/assembler.h .macro vma_vm_mm, rd, rn rd 275 arch/arm64/include/asm/assembler.h .macro mmid, rd, rn rd 527 arch/arm64/include/asm/assembler.h .macro get_current_task, rd rd 111 arch/arm64/kernel/module-plts.c int rd; rd 120 arch/arm64/kernel/module-plts.c rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD, rd 126 arch/arm64/kernel/module-plts.c plt[i] = __get_adrp_add_pair(val, (u64)&plt[i], rd); rd 41 arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c int rd; rd 64 arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c rd = kvm_vcpu_dabt_get_rd(vcpu); rd 69 arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c u32 data = vcpu_get_reg(vcpu, rd); rd 81 arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c vcpu_set_reg(vcpu, rd, data); rd 433 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 435 arch/arm64/kvm/sys_regs.c u64 *dbg_reg = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg]; rd 442 arch/arm64/kvm/sys_regs.c trace_trap_reg(__func__, rd->reg, p->is_write, *dbg_reg); rd 447 arch/arm64/kvm/sys_regs.c static int set_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 450 arch/arm64/kvm/sys_regs.c __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg]; rd 457 arch/arm64/kvm/sys_regs.c static int get_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 460 arch/arm64/kvm/sys_regs.c __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg]; rd 468 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 470 arch/arm64/kvm/sys_regs.c vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg] = rd->val; rd 475 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 477 arch/arm64/kvm/sys_regs.c u64 *dbg_reg = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg]; rd 484 arch/arm64/kvm/sys_regs.c trace_trap_reg(__func__, rd->reg, p->is_write, *dbg_reg); rd 489 arch/arm64/kvm/sys_regs.c static int set_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 492 arch/arm64/kvm/sys_regs.c __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg]; rd 500 arch/arm64/kvm/sys_regs.c static int get_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 503 arch/arm64/kvm/sys_regs.c __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg]; rd 511 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 513 arch/arm64/kvm/sys_regs.c vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg] = rd->val; rd 518 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 520 arch/arm64/kvm/sys_regs.c u64 *dbg_reg = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg]; rd 527 arch/arm64/kvm/sys_regs.c trace_trap_reg(__func__, rd->reg, p->is_write, rd 528 arch/arm64/kvm/sys_regs.c vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg]); rd 533 arch/arm64/kvm/sys_regs.c static int set_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 536 arch/arm64/kvm/sys_regs.c __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg]; rd 543 arch/arm64/kvm/sys_regs.c static int get_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 546 arch/arm64/kvm/sys_regs.c __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg]; rd 554 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 556 arch/arm64/kvm/sys_regs.c vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg] = rd->val; rd 561 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 563 arch/arm64/kvm/sys_regs.c u64 *dbg_reg = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg]; rd 570 arch/arm64/kvm/sys_regs.c trace_trap_reg(__func__, rd->reg, p->is_write, *dbg_reg); rd 575 arch/arm64/kvm/sys_regs.c static int set_wcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 578 arch/arm64/kvm/sys_regs.c __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg]; rd 585 arch/arm64/kvm/sys_regs.c static int get_wcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 588 arch/arm64/kvm/sys_regs.c __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg]; rd 596 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 598 arch/arm64/kvm/sys_regs.c vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg] = rd->val; rd 1008 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 1024 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 1127 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 1137 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 1156 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 1159 arch/arm64/kvm/sys_regs.c return write_to_read_only(vcpu, p, rd); rd 1166 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd, rd 1179 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd, rd 1182 arch/arm64/kvm/sys_regs.c const u64 id = sys_reg_to_index(rd); rd 1208 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd, void __user *uaddr, rd 1211 arch/arm64/kvm/sys_regs.c const u64 id = sys_reg_to_index(rd); rd 1212 arch/arm64/kvm/sys_regs.c const u64 val = read_id_reg(vcpu, rd, raz); rd 1218 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd, void __user *uaddr, rd 1221 arch/arm64/kvm/sys_regs.c const u64 id = sys_reg_to_index(rd); rd 1230 arch/arm64/kvm/sys_regs.c if (val != read_id_reg(vcpu, rd, raz)) rd 1236 arch/arm64/kvm/sys_regs.c static int get_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 1239 arch/arm64/kvm/sys_regs.c return __get_id_reg(vcpu, rd, uaddr, false); rd 1242 arch/arm64/kvm/sys_regs.c static int set_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 1245 arch/arm64/kvm/sys_regs.c return __set_id_reg(vcpu, rd, uaddr, false); rd 1248 arch/arm64/kvm/sys_regs.c static int get_raz_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 1251 arch/arm64/kvm/sys_regs.c return __get_id_reg(vcpu, rd, uaddr, true); rd 1254 arch/arm64/kvm/sys_regs.c static int set_raz_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 1257 arch/arm64/kvm/sys_regs.c return __set_id_reg(vcpu, rd, uaddr, true); rd 1699 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd) rd 1701 arch/arm64/kvm/sys_regs.c u64 *dbg_reg = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg]; rd 1715 arch/arm64/kvm/sys_regs.c trace_trap_reg(__func__, rd->reg, p->is_write, *dbg_reg); rd 2651 arch/arm64/kvm/sys_regs.c const struct sys_reg_desc *rd, rd 2659 arch/arm64/kvm/sys_regs.c if (!(rd->reg || rd->get_user)) rd 2662 arch/arm64/kvm/sys_regs.c if (sysreg_hidden_from_user(vcpu, rd)) rd 2665 arch/arm64/kvm/sys_regs.c if (!copy_reg_to_user(rd, uind)) rd 52 arch/arm64/kvm/sys_regs.h int (*get_user)(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 54 arch/arm64/kvm/sys_regs.h int (*set_user)(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, rd 59 arch/arm64/kvm/sys_regs.h const struct sys_reg_desc *rd); rd 64 arch/arm64/kvm/va_layout.c static u32 compute_instruction(int n, u32 rd, u32 rn) rd 72 arch/arm64/kvm/va_layout.c rn, rd, va_mask); rd 78 arch/arm64/kvm/va_layout.c rn, rn, rd, rd 83 arch/arm64/kvm/va_layout.c insn = aarch64_insn_gen_add_sub_imm(rd, rn, rd 90 arch/arm64/kvm/va_layout.c insn = aarch64_insn_gen_add_sub_imm(rd, rn, rd 99 arch/arm64/kvm/va_layout.c rn, rn, rd, 64 - tag_lsb); rd 117 arch/arm64/kvm/va_layout.c u32 rd, rn, insn, oinsn; rd 133 arch/arm64/kvm/va_layout.c rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD, oinsn); rd 136 arch/arm64/kvm/va_layout.c insn = compute_instruction(i, rd, rn); rd 186 arch/microblaze/include/asm/page.h #define tophys(rd, rs) addik rd, rs, 0 rd 187 arch/microblaze/include/asm/page.h #define tovirt(rd, rs) addik rd, rs, 0 rd 193 arch/microblaze/include/asm/page.h #define tophys(rd, rs) \ rd 194 arch/microblaze/include/asm/page.h addik rd, rs, (CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START) rd 195 arch/microblaze/include/asm/page.h #define tovirt(rd, rs) \ rd 196 arch/microblaze/include/asm/page.h addik rd, rs, (CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR) rd 204 arch/mips/include/asm/asmmacro.h .macro _EXT rd, rs, p, s rd 208 arch/mips/include/asm/asmmacro.h .macro _EXT rd, rs, p, s rd 233 arch/mips/include/asm/asmmacro.h .macro MFTR rt=0, rd=0, u=0, sel=0 rd 237 arch/mips/include/asm/asmmacro.h .macro MTTR rt=0, rd=0, u=0, sel=0 rd 242 arch/mips/include/asm/asmmacro.h .macro _cfcmsa rd, cs rd 372 arch/mips/include/asm/asmmacro.h .macro _cfcmsa rd, cs rd 331 arch/mips/include/asm/mipsmtregs.h #define mttgpr(rd,v) \ rd 338 arch/mips/include/asm/mipsmtregs.h " # mttgpr $1, " #rd " \n" \ rd 339 arch/mips/include/asm/mipsmtregs.h " .word 0x41810020 | (" #rd " << 11) \n" \ rd 344 arch/mips/include/asm/mipsmtregs.h #define mttc0(rd, sel, v) \ rd 351 arch/mips/include/asm/mipsmtregs.h " # mttc0 %0," #rd ", " #sel " \n" \ rd 352 arch/mips/include/asm/mipsmtregs.h " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" \ rd 359 arch/mips/include/asm/mipsmtregs.h #define mttr(rd, u, sel, v) \ rd 362 arch/mips/include/asm/mipsmtregs.h "mttr %0," #rd ", " #u ", " #sel \ rd 1547 arch/mips/include/asm/mipsregs.h _ASM_MACRO_2R_1S(mthc0, rt, rd, sel, rd 1985 arch/mips/include/asm/mipsregs.h _ASM_MACRO_2R_1S(mtgc0, rt, rd, sel, rd 1988 arch/mips/include/asm/mipsregs.h _ASM_MACRO_2R_1S(dmtgc0, rt, rd, sel, rd 165 arch/mips/include/asm/msa.h _ASM_MACRO_2R(cfcmsa, rd, cs, rd 130 arch/mips/include/asm/octeon/cvmx-asm.h asm ("pop %[rd],%[rs]" : [rd] "=d" (result) : [rs] "d" (input)) rd 132 arch/mips/include/asm/octeon/cvmx-asm.h asm ("dpop %[rd],%[rs]" : [rd] "=d" (result) : [rs] "d" (input)) rd 190 arch/mips/include/asm/pci/bridge.h u32 rd; /* read-only */ rd 199 arch/mips/include/asm/pci/bridge.h u32 rd; /* read-only */ rd 212 arch/mips/include/asm/uasm.h # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd) rd 215 arch/mips/include/asm/uasm.h # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd) rd 216 arch/mips/include/asm/uasm.h # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd) rd 217 arch/mips/include/asm/uasm.h # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd) rd 224 arch/mips/include/asm/uasm.h # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd) rd 228 arch/mips/include/asm/uasm.h # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd) rd 231 arch/mips/include/asm/uasm.h # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd) rd 232 arch/mips/include/asm/uasm.h # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd) rd 233 arch/mips/include/asm/uasm.h # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd) rd 240 arch/mips/include/asm/uasm.h # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd) rd 661 arch/mips/include/uapi/asm/inst.h __BITFIELD_FIELD(unsigned int rd : 5, rd 671 arch/mips/include/uapi/asm/inst.h __BITFIELD_FIELD(unsigned int rd : 5, rd 681 arch/mips/include/uapi/asm/inst.h __BITFIELD_FIELD(unsigned int rd : 5, rd 701 arch/mips/include/uapi/asm/inst.h __BITFIELD_FIELD(unsigned int rd : 5, rd 712 arch/mips/include/uapi/asm/inst.h __BITFIELD_FIELD(unsigned int rd : 5, rd 771 arch/mips/include/uapi/asm/inst.h __BITFIELD_FIELD(unsigned int rd : 5, rd 916 arch/mips/include/uapi/asm/inst.h __BITFIELD_FIELD(unsigned int rd : 5, rd 927 arch/mips/include/uapi/asm/inst.h __BITFIELD_FIELD(unsigned int rd : 5, rd 434 arch/mips/kernel/branch.c regs->regs[insn.r_format.rd] = epc + 8; rd 255 arch/mips/kernel/process.c if (ip->mm_m_format.rd < 0x10) rd 261 arch/mips/kernel/process.c *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32); rd 628 arch/mips/kernel/traps.c static int simulate_rdhwr(struct pt_regs *regs, int rd, int rt) rd 634 arch/mips/kernel/traps.c switch (rd) { rd 666 arch/mips/kernel/traps.c int rd = (opcode & RD) >> 11; rd 669 arch/mips/kernel/traps.c simulate_rdhwr(regs, rd, rt); rd 680 arch/mips/kernel/traps.c int rd = (opcode & MM_RS) >> 16; rd 682 arch/mips/kernel/traps.c simulate_rdhwr(regs, rd, rt); rd 946 arch/mips/kernel/unaligned.c regs->regs[insn.dsp_format.rd] = value; rd 955 arch/mips/kernel/unaligned.c regs->regs[insn.dsp_format.rd] = value; rd 1454 arch/mips/kernel/unaligned.c reg = insn.mm_x_format.rd; rd 1463 arch/mips/kernel/unaligned.c reg = insn.mm_m_format.rd; rd 1482 arch/mips/kernel/unaligned.c reg = insn.mm_m_format.rd; rd 1502 arch/mips/kernel/unaligned.c reg = insn.mm_m_format.rd; rd 1525 arch/mips/kernel/unaligned.c reg = insn.mm_m_format.rd; rd 1547 arch/mips/kernel/unaligned.c reg = insn.mm_m_format.rd; rd 1583 arch/mips/kernel/unaligned.c reg = insn.mm_m_format.rd; rd 1620 arch/mips/kernel/unaligned.c reg = insn.mm_m_format.rd; rd 1661 arch/mips/kernel/unaligned.c reg = insn.mm_m_format.rd; rd 1708 arch/mips/kernel/unaligned.c reg = insn.mm_m_format.rd; rd 101 arch/mips/kvm/dyntrans.c u32 rd, sel; rd 103 arch/mips/kvm/dyntrans.c rd = inst.c0r_format.rd; rd 106 arch/mips/kvm/dyntrans.c if (rd == MIPS_CP0_ERRCTL && sel == 0) { rd 108 arch/mips/kvm/dyntrans.c mfc0_inst.r_format.rd = inst.c0r_format.rt; rd 114 arch/mips/kvm/dyntrans.c offsetof(struct kvm_mips_commpage, cop0.reg[rd][sel]); rd 128 arch/mips/kvm/dyntrans.c u32 rd, sel; rd 130 arch/mips/kvm/dyntrans.c rd = inst.c0r_format.rd; rd 136 arch/mips/kvm/dyntrans.c offsetof(struct kvm_mips_commpage, cop0.reg[rd][sel]); rd 66 arch/mips/kvm/emulate.c arch->gprs[insn.r_format.rd] = epc + 8; rd 1270 arch/mips/kvm/emulate.c u32 rt, rd, sel; rd 1311 arch/mips/kvm/emulate.c rd = inst.c0r_format.rd; rd 1317 arch/mips/kvm/emulate.c cop0->stat[rd][sel]++; rd 1320 arch/mips/kvm/emulate.c if ((rd == MIPS_CP0_COUNT) && (sel == 0)) { rd 1323 arch/mips/kvm/emulate.c } else if ((rd == MIPS_CP0_ERRCTL) && (sel == 0)) { rd 1329 arch/mips/kvm/emulate.c vcpu->arch.gprs[rt] = (s32)cop0->reg[rd][sel]; rd 1337 arch/mips/kvm/emulate.c KVM_TRACE_COP0(rd, sel), rd 1342 arch/mips/kvm/emulate.c vcpu->arch.gprs[rt] = cop0->reg[rd][sel]; rd 1345 arch/mips/kvm/emulate.c KVM_TRACE_COP0(rd, sel), rd 1351 arch/mips/kvm/emulate.c cop0->stat[rd][sel]++; rd 1354 arch/mips/kvm/emulate.c KVM_TRACE_COP0(rd, sel), rd 1357 arch/mips/kvm/emulate.c if ((rd == MIPS_CP0_TLB_INDEX) rd 1365 arch/mips/kvm/emulate.c if ((rd == MIPS_CP0_PRID) && (sel == 1)) { rd 1372 arch/mips/kvm/emulate.c } else if (rd == MIPS_CP0_TLB_HI && sel == 0) { rd 1377 arch/mips/kvm/emulate.c else if ((rd == MIPS_CP0_COUNT) && (sel == 0)) { rd 1380 arch/mips/kvm/emulate.c } else if ((rd == MIPS_CP0_COMPARE) && (sel == 0)) { rd 1386 arch/mips/kvm/emulate.c } else if ((rd == MIPS_CP0_STATUS) && (sel == 0)) { rd 1458 arch/mips/kvm/emulate.c } else if ((rd == MIPS_CP0_CONFIG) && (sel == 5)) { rd 1495 arch/mips/kvm/emulate.c } else if ((rd == MIPS_CP0_CAUSE) && (sel == 0)) { rd 1510 arch/mips/kvm/emulate.c } else if ((rd == MIPS_CP0_HWRENA) && (sel == 0)) { rd 1519 arch/mips/kvm/emulate.c cop0->reg[rd][sel] = vcpu->arch.gprs[rt] & mask; rd 1521 arch/mips/kvm/emulate.c cop0->reg[rd][sel] = vcpu->arch.gprs[rt]; rd 1530 arch/mips/kvm/emulate.c vcpu->arch.pc, rt, rd, sel); rd 1532 arch/mips/kvm/emulate.c KVM_TRACE_COP0(rd, sel), rd 1570 arch/mips/kvm/emulate.c kvm_debug("WRPGPR[%d][%d] = %#lx\n", pss, rd, rd 1572 arch/mips/kvm/emulate.c vcpu->arch.gprs[rd] = vcpu->arch.gprs[rt]; rd 2518 arch/mips/kvm/emulate.c int rd = inst.r_format.rd; rd 2523 arch/mips/kvm/emulate.c if (usermode && !(kvm_read_c0_guest_hwrena(cop0) & BIT(rd))) { rd 2525 arch/mips/kvm/emulate.c rd, opc); rd 2528 arch/mips/kvm/emulate.c switch (rd) { rd 2554 arch/mips/kvm/emulate.c kvm_debug("RDHWR %#x not supported @ %p\n", rd, opc); rd 2558 arch/mips/kvm/emulate.c trace_kvm_hwr(vcpu, KVM_TRACE_RDHWR, KVM_TRACE_HWR(rd, sel), rd 907 arch/mips/kvm/vz.c u32 rt, rd, sel; rd 930 arch/mips/kvm/vz.c rd = inst.c0r_format.rd; rd 937 arch/mips/kvm/vz.c cop0->stat[rd][sel]++; rd 939 arch/mips/kvm/vz.c if (rd == MIPS_CP0_COUNT && rd 942 arch/mips/kvm/vz.c } else if (rd == MIPS_CP0_COMPARE && rd 945 arch/mips/kvm/vz.c } else if (rd == MIPS_CP0_LLADDR && rd 952 arch/mips/kvm/vz.c } else if (rd == MIPS_CP0_LLADDR && rd 961 arch/mips/kvm/vz.c } else if ((rd == MIPS_CP0_PRID && rd 965 arch/mips/kvm/vz.c (rd == MIPS_CP0_STATUS && rd 968 arch/mips/kvm/vz.c (rd == MIPS_CP0_CONFIG && rd 970 arch/mips/kvm/vz.c (rd == MIPS_CP0_LLADDR && rd 974 arch/mips/kvm/vz.c (rd == MIPS_CP0_ERRCTL && rd 976 arch/mips/kvm/vz.c val = cop0->reg[rd][sel]; rd 991 arch/mips/kvm/vz.c KVM_TRACE_COP0(rd, sel), val); rd 997 arch/mips/kvm/vz.c cop0->stat[rd][sel]++; rd 1002 arch/mips/kvm/vz.c KVM_TRACE_COP0(rd, sel), val); rd 1004 arch/mips/kvm/vz.c if (rd == MIPS_CP0_COUNT && rd 1008 arch/mips/kvm/vz.c } else if (rd == MIPS_CP0_COMPARE && rd 1013 arch/mips/kvm/vz.c } else if (rd == MIPS_CP0_LLADDR && rd 1022 arch/mips/kvm/vz.c } else if (rd == MIPS_CP0_LLADDR && rd 1034 arch/mips/kvm/vz.c } else if (rd == MIPS_CP0_LLADDR && rd 1039 arch/mips/kvm/vz.c } else if (rd == MIPS_CP0_ERRCTL && rd 1139 arch/mips/kvm/vz.c int rd, rt, sel; rd 1173 arch/mips/kvm/vz.c rd = inst.r_format.rd; rd 1177 arch/mips/kvm/vz.c switch (rd) { rd 1184 arch/mips/kvm/vz.c KVM_TRACE_HWR(rd, sel), 0); rd 1189 arch/mips/kvm/vz.c KVM_TRACE_HWR(rd, sel), arch->gprs[rt]); rd 1232 arch/mips/kvm/vz.c int rd = inst.c0r_format.rd; rd 1237 arch/mips/kvm/vz.c trace_kvm_hwr(vcpu, KVM_TRACE_MTC0, KVM_TRACE_COP0(rd, sel), rd 1240 arch/mips/kvm/vz.c if ((rd == MIPS_CP0_STATUS) && (sel == 0)) { rd 1276 arch/mips/kvm/vz.c } else if ((rd == MIPS_CP0_CAUSE) && (sel == 0)) { rd 1298 arch/mips/kvm/vz.c } else if ((rd == MIPS_CP0_STATUS) && (sel == 1)) { /* IntCtl */ rd 1300 arch/mips/kvm/vz.c } else if ((rd == MIPS_CP0_CONFIG) && (sel == 5)) { rd 172 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.rd = 0; rd 257 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.rd = insn.mm_fp4_format.rt; rd 437 arch/mips/math-emu/cp1emu.c if (insn.r_format.rd != 0) { rd 438 arch/mips/math-emu/cp1emu.c regs->regs[insn.r_format.rd] = rd 352 arch/openrisc/kernel/traps.c unsigned int ra, rd; rd 363 arch/openrisc/kernel/traps.c rd = (insn >> 21) & 0x1f; rd 388 arch/openrisc/kernel/traps.c regs->gpr[rd] = value; rd 474 arch/powerpc/include/asm/ppc_asm.h #define toreal(rd) rd 475 arch/powerpc/include/asm/ppc_asm.h #define fromreal(rd) rd 483 arch/powerpc/include/asm/ppc_asm.h #define tophys(rd,rs) \ rd 484 arch/powerpc/include/asm/ppc_asm.h addis rd,rs,0 rd 486 arch/powerpc/include/asm/ppc_asm.h #define tovirt(rd,rs) \ rd 487 arch/powerpc/include/asm/ppc_asm.h addis rd,rs,0 rd 490 arch/powerpc/include/asm/ppc_asm.h #define toreal(rd) /* we can access c000... in real mode */ rd 491 arch/powerpc/include/asm/ppc_asm.h #define fromreal(rd) rd 493 arch/powerpc/include/asm/ppc_asm.h #define tophys(rd,rs) \ rd 494 arch/powerpc/include/asm/ppc_asm.h clrldi rd,rs,2 rd 496 arch/powerpc/include/asm/ppc_asm.h #define tovirt(rd,rs) \ rd 497 arch/powerpc/include/asm/ppc_asm.h rotldi rd,rs,16; \ rd 498 arch/powerpc/include/asm/ppc_asm.h ori rd,rd,((KERNELBASE>>48)&0xFFFF);\ rd 499 arch/powerpc/include/asm/ppc_asm.h rotldi rd,rd,48 rd 501 arch/powerpc/include/asm/ppc_asm.h #define toreal(rd) tophys(rd,rd) rd 502 arch/powerpc/include/asm/ppc_asm.h #define fromreal(rd) tovirt(rd,rd) rd 504 arch/powerpc/include/asm/ppc_asm.h #define tophys(rd, rs) addis rd, rs, -PAGE_OFFSET@h rd 505 arch/powerpc/include/asm/ppc_asm.h #define tovirt(rd, rs) addis rd, rs, PAGE_OFFSET@h rd 1332 arch/powerpc/kernel/traps.c u32 rd; rd 1344 arch/powerpc/kernel/traps.c rd = (instword >> 21) & 0x1f; rd 1345 arch/powerpc/kernel/traps.c regs->gpr[rd] = mfspr(SPRN_PVR); rd 1402 arch/powerpc/kernel/traps.c rd = (instword >> 21) & 0x1f; rd 1403 arch/powerpc/kernel/traps.c regs->gpr[rd] = mfspr(SPRN_DSCR); rd 1413 arch/powerpc/kernel/traps.c rd = (instword >> 21) & 0x1f; rd 1414 arch/powerpc/kernel/traps.c current->thread.dscr = regs->gpr[rd]; rd 1717 arch/powerpc/kernel/traps.c u32 instword, rd; rd 1769 arch/powerpc/kernel/traps.c rd = (instword >> 21) & 0x1f; rd 1770 arch/powerpc/kernel/traps.c current->thread.dscr = regs->gpr[rd]; rd 974 arch/powerpc/lib/sstep.c struct instruction_op *op, int rd, rd 983 arch/powerpc/lib/sstep.c op->reg = rd; rd 1168 arch/powerpc/lib/sstep.c unsigned int opcode, ra, rb, rc, rd, spr, u; rd 1212 arch/powerpc/lib/sstep.c rd = 7 - ((instr >> 23) & 0x7); rd 1214 arch/powerpc/lib/sstep.c rd *= 4; rd 1217 arch/powerpc/lib/sstep.c op->ccval = (regs->ccr & ~(0xfUL << rd)) | (val << rd); rd 1252 arch/powerpc/lib/sstep.c rd = (instr >> 21) & 0x1f; rd 1256 arch/powerpc/lib/sstep.c op->ccval = (regs->ccr & ~(1UL << (31 - rd))) | rd 1257 arch/powerpc/lib/sstep.c (val << (31 - rd)); rd 1288 arch/powerpc/lib/sstep.c rd = (instr >> 21) & 0x1f; rd 1296 arch/powerpc/lib/sstep.c if (rd & trap_compare(regs->gpr[ra], (short) instr)) rd 1301 arch/powerpc/lib/sstep.c if (rd & trap_compare((int)regs->gpr[ra], (short) instr)) rd 1343 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, ~regs->gpr[ra], imm, 1); rd 1350 arch/powerpc/lib/sstep.c if ((rd & 1) == 0) rd 1353 arch/powerpc/lib/sstep.c do_cmp_unsigned(regs, op, val, imm, rd >> 2); rd 1360 arch/powerpc/lib/sstep.c if ((rd & 1) == 0) rd 1363 arch/powerpc/lib/sstep.c do_cmp_signed(regs, op, val, imm, rd >> 2); rd 1368 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0); rd 1373 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0); rd 1405 arch/powerpc/lib/sstep.c val = DATA32(regs->gpr[rd]); rd 1413 arch/powerpc/lib/sstep.c val = DATA32(regs->gpr[rd]); rd 1421 arch/powerpc/lib/sstep.c val = DATA32(regs->gpr[rd]); rd 1426 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] | (unsigned short) instr; rd 1431 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] | (imm << 16); rd 1435 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] ^ (unsigned short) instr; rd 1440 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] ^ (imm << 16); rd 1444 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] & (unsigned short) instr; rd 1450 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] & (imm << 16); rd 1457 arch/powerpc/lib/sstep.c val = regs->gpr[rd]; rd 1507 arch/powerpc/lib/sstep.c if (rd == 0x1f || rd 1508 arch/powerpc/lib/sstep.c (rd & trap_compare((int)regs->gpr[ra], rd 1514 arch/powerpc/lib/sstep.c if (rd & trap_compare(regs->gpr[ra], regs->gpr[rb])) rd 1522 arch/powerpc/lib/sstep.c op->reg = rd; rd 1528 arch/powerpc/lib/sstep.c op->reg = rd; rd 1536 arch/powerpc/lib/sstep.c op->reg = rd; rd 1560 arch/powerpc/lib/sstep.c val = regs->gpr[rd]; rd 1573 arch/powerpc/lib/sstep.c op->reg = rd; rd 1583 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd]; rd 1597 arch/powerpc/lib/sstep.c if ((rd & 1) == 0) { rd 1603 arch/powerpc/lib/sstep.c do_cmp_signed(regs, op, val, val2, rd >> 2); rd 1610 arch/powerpc/lib/sstep.c if ((rd & 1) == 0) { rd 1616 arch/powerpc/lib/sstep.c do_cmp_unsigned(regs, op, val, val2, rd >> 2); rd 1620 arch/powerpc/lib/sstep.c do_cmpb(regs, op, regs->gpr[rd], regs->gpr[rb]); rd 1627 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, ~regs->gpr[ra], rd 1637 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, regs->gpr[ra], rd 1665 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, ~regs->gpr[ra], rd 1670 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, regs->gpr[ra], rd 1675 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, ~regs->gpr[ra], 0L, rd 1680 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, regs->gpr[ra], 0L, rd 1685 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, ~regs->gpr[ra], -1L, rd 1694 arch/powerpc/lib/sstep.c add_with_carry(regs, op, rd, regs->gpr[ra], -1L, rd 1781 arch/powerpc/lib/sstep.c val = (unsigned int) regs->gpr[rd]; rd 1786 arch/powerpc/lib/sstep.c val = regs->gpr[rd]; rd 1791 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] & regs->gpr[rb]; rd 1795 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] & ~regs->gpr[rb]; rd 1799 arch/powerpc/lib/sstep.c do_popcnt(regs, op, regs->gpr[rd], 8); rd 1803 arch/powerpc/lib/sstep.c op->val = ~(regs->gpr[rd] | regs->gpr[rb]); rd 1807 arch/powerpc/lib/sstep.c do_prty(regs, op, regs->gpr[rd], 32); rd 1811 arch/powerpc/lib/sstep.c do_prty(regs, op, regs->gpr[rd], 64); rd 1815 arch/powerpc/lib/sstep.c do_bpermd(regs, op, regs->gpr[rd], regs->gpr[rb]); rd 1819 arch/powerpc/lib/sstep.c op->val = ~(regs->gpr[rd] ^ regs->gpr[rb]); rd 1823 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] ^ regs->gpr[rb]; rd 1827 arch/powerpc/lib/sstep.c do_popcnt(regs, op, regs->gpr[rd], 32); rd 1831 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] | ~regs->gpr[rb]; rd 1835 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] | regs->gpr[rb]; rd 1839 arch/powerpc/lib/sstep.c op->val = ~(regs->gpr[rd] & regs->gpr[rb]); rd 1843 arch/powerpc/lib/sstep.c do_popcnt(regs, op, regs->gpr[rd], 64); rd 1849 arch/powerpc/lib/sstep.c val = (unsigned int) regs->gpr[rd]; rd 1856 arch/powerpc/lib/sstep.c val = regs->gpr[rd]; rd 1861 arch/powerpc/lib/sstep.c op->val = (signed short) regs->gpr[rd]; rd 1865 arch/powerpc/lib/sstep.c op->val = (signed char) regs->gpr[rd]; rd 1869 arch/powerpc/lib/sstep.c op->val = (signed int) regs->gpr[rd]; rd 1879 arch/powerpc/lib/sstep.c op->val = (regs->gpr[rd] << sh) & 0xffffffffUL; rd 1887 arch/powerpc/lib/sstep.c op->val = (regs->gpr[rd] & 0xffffffffUL) >> sh; rd 1895 arch/powerpc/lib/sstep.c ival = (signed int) regs->gpr[rd]; rd 1908 arch/powerpc/lib/sstep.c ival = (signed int) regs->gpr[rd]; rd 1922 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] << sh; rd 1930 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd] >> sh; rd 1938 arch/powerpc/lib/sstep.c ival = (signed long int) regs->gpr[rd]; rd 1952 arch/powerpc/lib/sstep.c ival = (signed long int) regs->gpr[rd]; rd 1968 arch/powerpc/lib/sstep.c val = (signed int) regs->gpr[rd]; rd 1993 arch/powerpc/lib/sstep.c op->reg = rd; rd 1999 arch/powerpc/lib/sstep.c op->reg = rd; rd 2020 arch/powerpc/lib/sstep.c op->reg = rd; rd 2021 arch/powerpc/lib/sstep.c op->val = regs->gpr[rd]; rd 2064 arch/powerpc/lib/sstep.c if (!((rd & 1) || rd == ra || rd == rb)) rd 2069 arch/powerpc/lib/sstep.c if (!(rd & 1)) rd 2243 arch/powerpc/lib/sstep.c op->val = byterev_8(regs->gpr[rd]); rd 2253 arch/powerpc/lib/sstep.c op->val = byterev_4(regs->gpr[rd]); rd 2269 arch/powerpc/lib/sstep.c op->val = byterev_2(regs->gpr[rd]); rd 2274 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2280 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2286 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2292 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2301 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2313 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2320 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2327 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2336 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2348 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2355 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2361 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2368 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2374 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2380 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2387 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2394 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2401 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2407 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2414 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2420 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2427 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2434 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2441 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2447 arch/powerpc/lib/sstep.c op->reg = rd | ((instr & 1) << 5); rd 2500 arch/powerpc/lib/sstep.c if (ra >= rd) rd 2502 arch/powerpc/lib/sstep.c op->type = MKOP(LOAD_MULTI, 0, 4 * (32 - rd)); rd 2507 arch/powerpc/lib/sstep.c op->type = MKOP(STORE_MULTI, 0, 4 * (32 - rd)); rd 2539 arch/powerpc/lib/sstep.c if (!((rd & 1) || (rd == ra))) rd 2550 arch/powerpc/lib/sstep.c if (rd & 1) rd 2555 arch/powerpc/lib/sstep.c op->reg = rd + 32; rd 2561 arch/powerpc/lib/sstep.c op->reg = rd + 32; rd 2599 arch/powerpc/lib/sstep.c op->reg = rd + 32; rd 2608 arch/powerpc/lib/sstep.c op->reg = rd + 32; rd 2617 arch/powerpc/lib/sstep.c op->reg = rd + 32; rd 2626 arch/powerpc/lib/sstep.c op->reg = rd + 32; rd 2646 arch/powerpc/lib/sstep.c if (!(rd & 1)) rd 2677 arch/powerpc/lib/sstep.c op->reg = rd; rd 2850 arch/powerpc/lib/sstep.c int i, rd, nb; rd 2994 arch/powerpc/lib/sstep.c rd = op->reg; rd 3006 arch/powerpc/lib/sstep.c regs->gpr[rd] = v32; rd 3009 arch/powerpc/lib/sstep.c rd = (rd + 1) & 0x1f; rd 3065 arch/powerpc/lib/sstep.c rd = op->reg; rd 3067 arch/powerpc/lib/sstep.c unsigned int v32 = regs->gpr[rd]; rd 3079 arch/powerpc/lib/sstep.c rd = (rd + 1) & 0x1f; rd 900 arch/powerpc/platforms/pseries/hotplug-cpu.c struct of_reconfig_data *rd = data; rd 905 arch/powerpc/platforms/pseries/hotplug-cpu.c err = pseries_add_processor(rd->dn); rd 908 arch/powerpc/platforms/pseries/hotplug-cpu.c pseries_remove_processor(rd->dn); rd 1033 arch/powerpc/platforms/pseries/hotplug-memory.c struct of_reconfig_data *rd = data; rd 1038 arch/powerpc/platforms/pseries/hotplug-memory.c err = pseries_add_mem_node(rd->dn); rd 1041 arch/powerpc/platforms/pseries/hotplug-memory.c err = pseries_remove_mem_node(rd->dn); rd 1044 arch/powerpc/platforms/pseries/hotplug-memory.c if (!strcmp(rd->prop->name, "ibm,dynamic-memory")) rd 1045 arch/powerpc/platforms/pseries/hotplug-memory.c err = pseries_update_drconf_memory(rd); rd 1276 arch/powerpc/platforms/pseries/iommu.c struct of_reconfig_data *rd = data; rd 1277 arch/powerpc/platforms/pseries/iommu.c struct device_node *np = rd->dn; rd 244 arch/powerpc/platforms/pseries/setup.c struct of_reconfig_data *rd = data; rd 245 arch/powerpc/platforms/pseries/setup.c struct device_node *parent, *np = rd->dn; rd 935 arch/powerpc/sysdev/fsl_pci.c unsigned int rd, ra, rb, d; rd 937 arch/powerpc/sysdev/fsl_pci.c rd = get_rt(inst); rd 947 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xffffffff; rd 951 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xffffffff; rd 956 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xff; rd 960 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xff; rd 966 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xffff; rd 970 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xffff; rd 975 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = ~0UL; rd 979 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = ~0UL; rd 989 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xffffffff; rd 993 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xffffffff; rd 998 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xff; rd 1002 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xff; rd 1007 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xffff; rd 1011 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = 0xffff; rd 1016 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = ~0UL; rd 1020 arch/powerpc/sysdev/fsl_pci.c regs->gpr[rd] = ~0UL; rd 167 arch/riscv/net/bpf_jit_comp.c static u32 rv_r_insn(u8 funct7, u8 rs2, u8 rs1, u8 funct3, u8 rd, u8 opcode) rd 170 arch/riscv/net/bpf_jit_comp.c (rd << 7) | opcode; rd 173 arch/riscv/net/bpf_jit_comp.c static u32 rv_i_insn(u16 imm11_0, u8 rs1, u8 funct3, u8 rd, u8 opcode) rd 175 arch/riscv/net/bpf_jit_comp.c return (imm11_0 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) | rd 196 arch/riscv/net/bpf_jit_comp.c static u32 rv_u_insn(u32 imm31_12, u8 rd, u8 opcode) rd 198 arch/riscv/net/bpf_jit_comp.c return (imm31_12 << 12) | (rd << 7) | opcode; rd 201 arch/riscv/net/bpf_jit_comp.c static u32 rv_uj_insn(u32 imm20_1, u8 rd, u8 opcode) rd 208 arch/riscv/net/bpf_jit_comp.c return (imm << 12) | (rd << 7) | opcode; rd 212 arch/riscv/net/bpf_jit_comp.c u8 funct3, u8 rd, u8 opcode) rd 216 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(funct7, rs2, rs1, funct3, rd, opcode); rd 219 arch/riscv/net/bpf_jit_comp.c static u32 rv_addiw(u8 rd, u8 rs1, u16 imm11_0) rd 221 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 0, rd, 0x1b); rd 224 arch/riscv/net/bpf_jit_comp.c static u32 rv_addi(u8 rd, u8 rs1, u16 imm11_0) rd 226 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 0, rd, 0x13); rd 229 arch/riscv/net/bpf_jit_comp.c static u32 rv_addw(u8 rd, u8 rs1, u8 rs2) rd 231 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0, rs2, rs1, 0, rd, 0x3b); rd 234 arch/riscv/net/bpf_jit_comp.c static u32 rv_add(u8 rd, u8 rs1, u8 rs2) rd 236 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0, rs2, rs1, 0, rd, 0x33); rd 239 arch/riscv/net/bpf_jit_comp.c static u32 rv_subw(u8 rd, u8 rs1, u8 rs2) rd 241 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x3b); rd 244 arch/riscv/net/bpf_jit_comp.c static u32 rv_sub(u8 rd, u8 rs1, u8 rs2) rd 246 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x33); rd 249 arch/riscv/net/bpf_jit_comp.c static u32 rv_and(u8 rd, u8 rs1, u8 rs2) rd 251 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0, rs2, rs1, 7, rd, 0x33); rd 254 arch/riscv/net/bpf_jit_comp.c static u32 rv_or(u8 rd, u8 rs1, u8 rs2) rd 256 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0, rs2, rs1, 6, rd, 0x33); rd 259 arch/riscv/net/bpf_jit_comp.c static u32 rv_xor(u8 rd, u8 rs1, u8 rs2) rd 261 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0, rs2, rs1, 4, rd, 0x33); rd 264 arch/riscv/net/bpf_jit_comp.c static u32 rv_mulw(u8 rd, u8 rs1, u8 rs2) rd 266 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(1, rs2, rs1, 0, rd, 0x3b); rd 269 arch/riscv/net/bpf_jit_comp.c static u32 rv_mul(u8 rd, u8 rs1, u8 rs2) rd 271 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(1, rs2, rs1, 0, rd, 0x33); rd 274 arch/riscv/net/bpf_jit_comp.c static u32 rv_divuw(u8 rd, u8 rs1, u8 rs2) rd 276 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(1, rs2, rs1, 5, rd, 0x3b); rd 279 arch/riscv/net/bpf_jit_comp.c static u32 rv_divu(u8 rd, u8 rs1, u8 rs2) rd 281 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(1, rs2, rs1, 5, rd, 0x33); rd 284 arch/riscv/net/bpf_jit_comp.c static u32 rv_remuw(u8 rd, u8 rs1, u8 rs2) rd 286 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(1, rs2, rs1, 7, rd, 0x3b); rd 289 arch/riscv/net/bpf_jit_comp.c static u32 rv_remu(u8 rd, u8 rs1, u8 rs2) rd 291 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(1, rs2, rs1, 7, rd, 0x33); rd 294 arch/riscv/net/bpf_jit_comp.c static u32 rv_sllw(u8 rd, u8 rs1, u8 rs2) rd 296 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0, rs2, rs1, 1, rd, 0x3b); rd 299 arch/riscv/net/bpf_jit_comp.c static u32 rv_sll(u8 rd, u8 rs1, u8 rs2) rd 301 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0, rs2, rs1, 1, rd, 0x33); rd 304 arch/riscv/net/bpf_jit_comp.c static u32 rv_srlw(u8 rd, u8 rs1, u8 rs2) rd 306 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0, rs2, rs1, 5, rd, 0x3b); rd 309 arch/riscv/net/bpf_jit_comp.c static u32 rv_srl(u8 rd, u8 rs1, u8 rs2) rd 311 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0, rs2, rs1, 5, rd, 0x33); rd 314 arch/riscv/net/bpf_jit_comp.c static u32 rv_sraw(u8 rd, u8 rs1, u8 rs2) rd 316 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x3b); rd 319 arch/riscv/net/bpf_jit_comp.c static u32 rv_sra(u8 rd, u8 rs1, u8 rs2) rd 321 arch/riscv/net/bpf_jit_comp.c return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x33); rd 324 arch/riscv/net/bpf_jit_comp.c static u32 rv_lui(u8 rd, u32 imm31_12) rd 326 arch/riscv/net/bpf_jit_comp.c return rv_u_insn(imm31_12, rd, 0x37); rd 329 arch/riscv/net/bpf_jit_comp.c static u32 rv_slli(u8 rd, u8 rs1, u16 imm11_0) rd 331 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 1, rd, 0x13); rd 334 arch/riscv/net/bpf_jit_comp.c static u32 rv_andi(u8 rd, u8 rs1, u16 imm11_0) rd 336 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 7, rd, 0x13); rd 339 arch/riscv/net/bpf_jit_comp.c static u32 rv_ori(u8 rd, u8 rs1, u16 imm11_0) rd 341 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 6, rd, 0x13); rd 344 arch/riscv/net/bpf_jit_comp.c static u32 rv_xori(u8 rd, u8 rs1, u16 imm11_0) rd 346 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 4, rd, 0x13); rd 349 arch/riscv/net/bpf_jit_comp.c static u32 rv_slliw(u8 rd, u8 rs1, u16 imm11_0) rd 351 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 1, rd, 0x1b); rd 354 arch/riscv/net/bpf_jit_comp.c static u32 rv_srliw(u8 rd, u8 rs1, u16 imm11_0) rd 356 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 5, rd, 0x1b); rd 359 arch/riscv/net/bpf_jit_comp.c static u32 rv_srli(u8 rd, u8 rs1, u16 imm11_0) rd 361 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 5, rd, 0x13); rd 364 arch/riscv/net/bpf_jit_comp.c static u32 rv_sraiw(u8 rd, u8 rs1, u16 imm11_0) rd 366 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x1b); rd 369 arch/riscv/net/bpf_jit_comp.c static u32 rv_srai(u8 rd, u8 rs1, u16 imm11_0) rd 371 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x13); rd 374 arch/riscv/net/bpf_jit_comp.c static u32 rv_jal(u8 rd, u32 imm20_1) rd 376 arch/riscv/net/bpf_jit_comp.c return rv_uj_insn(imm20_1, rd, 0x6f); rd 379 arch/riscv/net/bpf_jit_comp.c static u32 rv_jalr(u8 rd, u8 rs1, u16 imm11_0) rd 381 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 0, rd, 0x67); rd 434 arch/riscv/net/bpf_jit_comp.c static u32 rv_lbu(u8 rd, u16 imm11_0, u8 rs1) rd 436 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 4, rd, 0x03); rd 439 arch/riscv/net/bpf_jit_comp.c static u32 rv_lhu(u8 rd, u16 imm11_0, u8 rs1) rd 441 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 5, rd, 0x03); rd 444 arch/riscv/net/bpf_jit_comp.c static u32 rv_lwu(u8 rd, u16 imm11_0, u8 rs1) rd 446 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 6, rd, 0x03); rd 449 arch/riscv/net/bpf_jit_comp.c static u32 rv_ld(u8 rd, u16 imm11_0, u8 rs1) rd 451 arch/riscv/net/bpf_jit_comp.c return rv_i_insn(imm11_0, rs1, 3, rd, 0x03); rd 454 arch/riscv/net/bpf_jit_comp.c static u32 rv_amoadd_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl) rd 456 arch/riscv/net/bpf_jit_comp.c return rv_amo_insn(0, aq, rl, rs2, rs1, 2, rd, 0x2f); rd 459 arch/riscv/net/bpf_jit_comp.c static u32 rv_amoadd_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl) rd 461 arch/riscv/net/bpf_jit_comp.c return rv_amo_insn(0, aq, rl, rs2, rs1, 3, rd, 0x2f); rd 514 arch/riscv/net/bpf_jit_comp.c static void emit_imm(u8 rd, s64 val, struct rv_jit_context *ctx) rd 531 arch/riscv/net/bpf_jit_comp.c emit(rv_lui(rd, upper), ctx); rd 534 arch/riscv/net/bpf_jit_comp.c emit(rv_addi(rd, RV_REG_ZERO, lower), ctx); rd 538 arch/riscv/net/bpf_jit_comp.c emit(rv_addiw(rd, rd, lower), ctx); rd 546 arch/riscv/net/bpf_jit_comp.c emit_imm(rd, upper, ctx); rd 548 arch/riscv/net/bpf_jit_comp.c emit(rv_slli(rd, rd, shift), ctx); rd 550 arch/riscv/net/bpf_jit_comp.c emit(rv_addi(rd, rd, lower), ctx); rd 675 arch/riscv/net/bpf_jit_comp.c static void init_regs(u8 *rd, u8 *rs, const struct bpf_insn *insn, rd 687 arch/riscv/net/bpf_jit_comp.c *rd = bpf_to_rv_reg(insn->dst_reg, ctx); rd 703 arch/riscv/net/bpf_jit_comp.c static void emit_zext_32_rd_rs(u8 *rd, u8 *rs, struct rv_jit_context *ctx) rd 705 arch/riscv/net/bpf_jit_comp.c emit(rv_addi(RV_REG_T2, *rd, 0), ctx); rd 709 arch/riscv/net/bpf_jit_comp.c *rd = RV_REG_T2; rd 713 arch/riscv/net/bpf_jit_comp.c static void emit_sext_32_rd_rs(u8 *rd, u8 *rs, struct rv_jit_context *ctx) rd 715 arch/riscv/net/bpf_jit_comp.c emit(rv_addiw(RV_REG_T2, *rd, 0), ctx); rd 717 arch/riscv/net/bpf_jit_comp.c *rd = RV_REG_T2; rd 721 arch/riscv/net/bpf_jit_comp.c static void emit_zext_32_rd_t1(u8 *rd, struct rv_jit_context *ctx) rd 723 arch/riscv/net/bpf_jit_comp.c emit(rv_addi(RV_REG_T2, *rd, 0), ctx); rd 726 arch/riscv/net/bpf_jit_comp.c *rd = RV_REG_T2; rd 729 arch/riscv/net/bpf_jit_comp.c static void emit_sext_32_rd(u8 *rd, struct rv_jit_context *ctx) rd 731 arch/riscv/net/bpf_jit_comp.c emit(rv_addiw(RV_REG_T2, *rd, 0), ctx); rd 732 arch/riscv/net/bpf_jit_comp.c *rd = RV_REG_T2; rd 742 arch/riscv/net/bpf_jit_comp.c u8 rd = -1, rs = -1, code = insn->code; rd 746 arch/riscv/net/bpf_jit_comp.c init_regs(&rd, &rs, insn, ctx); rd 754 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 757 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_addi(rd, rs, 0) : rv_addiw(rd, rs, 0), ctx); rd 759 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 765 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_add(rd, rd, rs) : rv_addw(rd, rd, rs), ctx); rd 767 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 771 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_sub(rd, rd, rs) : rv_subw(rd, rd, rs), ctx); rd 773 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 777 arch/riscv/net/bpf_jit_comp.c emit(rv_and(rd, rd, rs), ctx); rd 779 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 783 arch/riscv/net/bpf_jit_comp.c emit(rv_or(rd, rd, rs), ctx); rd 785 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 789 arch/riscv/net/bpf_jit_comp.c emit(rv_xor(rd, rd, rs), ctx); rd 791 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 795 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_mul(rd, rd, rs) : rv_mulw(rd, rd, rs), ctx); rd 797 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 801 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_divu(rd, rd, rs) : rv_divuw(rd, rd, rs), ctx); rd 803 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 807 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_remu(rd, rd, rs) : rv_remuw(rd, rd, rs), ctx); rd 809 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 813 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_sll(rd, rd, rs) : rv_sllw(rd, rd, rs), ctx); rd 815 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 819 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_srl(rd, rd, rs) : rv_srlw(rd, rd, rs), ctx); rd 821 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 825 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_sra(rd, rd, rs) : rv_sraw(rd, rd, rs), ctx); rd 827 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 833 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_sub(rd, RV_REG_ZERO, rd) : rd 834 arch/riscv/net/bpf_jit_comp.c rv_subw(rd, RV_REG_ZERO, rd), ctx); rd 836 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 844 arch/riscv/net/bpf_jit_comp.c emit(rv_slli(rd, rd, shift), ctx); rd 845 arch/riscv/net/bpf_jit_comp.c emit(rv_srli(rd, rd, shift), ctx); rd 851 arch/riscv/net/bpf_jit_comp.c emit(rv_andi(RV_REG_T1, rd, 0xff), ctx); rd 854 arch/riscv/net/bpf_jit_comp.c emit(rv_srli(rd, rd, 8), ctx); rd 858 arch/riscv/net/bpf_jit_comp.c emit(rv_andi(RV_REG_T1, rd, 0xff), ctx); rd 861 arch/riscv/net/bpf_jit_comp.c emit(rv_srli(rd, rd, 8), ctx); rd 863 arch/riscv/net/bpf_jit_comp.c emit(rv_andi(RV_REG_T1, rd, 0xff), ctx); rd 866 arch/riscv/net/bpf_jit_comp.c emit(rv_srli(rd, rd, 8), ctx); rd 870 arch/riscv/net/bpf_jit_comp.c emit(rv_andi(RV_REG_T1, rd, 0xff), ctx); rd 873 arch/riscv/net/bpf_jit_comp.c emit(rv_srli(rd, rd, 8), ctx); rd 875 arch/riscv/net/bpf_jit_comp.c emit(rv_andi(RV_REG_T1, rd, 0xff), ctx); rd 878 arch/riscv/net/bpf_jit_comp.c emit(rv_srli(rd, rd, 8), ctx); rd 880 arch/riscv/net/bpf_jit_comp.c emit(rv_andi(RV_REG_T1, rd, 0xff), ctx); rd 883 arch/riscv/net/bpf_jit_comp.c emit(rv_srli(rd, rd, 8), ctx); rd 885 arch/riscv/net/bpf_jit_comp.c emit(rv_andi(RV_REG_T1, rd, 0xff), ctx); rd 888 arch/riscv/net/bpf_jit_comp.c emit(rv_srli(rd, rd, 8), ctx); rd 890 arch/riscv/net/bpf_jit_comp.c emit(rv_andi(RV_REG_T1, rd, 0xff), ctx); rd 893 arch/riscv/net/bpf_jit_comp.c emit(rv_addi(rd, RV_REG_T2, 0), ctx); rd 899 arch/riscv/net/bpf_jit_comp.c emit_imm(rd, imm, ctx); rd 901 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 908 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_addi(rd, rd, imm) : rd 909 arch/riscv/net/bpf_jit_comp.c rv_addiw(rd, rd, imm), ctx); rd 912 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_add(rd, rd, RV_REG_T1) : rd 913 arch/riscv/net/bpf_jit_comp.c rv_addw(rd, rd, RV_REG_T1), ctx); rd 916 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 921 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_addi(rd, rd, -imm) : rd 922 arch/riscv/net/bpf_jit_comp.c rv_addiw(rd, rd, -imm), ctx); rd 925 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_sub(rd, rd, RV_REG_T1) : rd 926 arch/riscv/net/bpf_jit_comp.c rv_subw(rd, rd, RV_REG_T1), ctx); rd 929 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 934 arch/riscv/net/bpf_jit_comp.c emit(rv_andi(rd, rd, imm), ctx); rd 937 arch/riscv/net/bpf_jit_comp.c emit(rv_and(rd, rd, RV_REG_T1), ctx); rd 940 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 945 arch/riscv/net/bpf_jit_comp.c emit(rv_ori(rd, rd, imm), ctx); rd 948 arch/riscv/net/bpf_jit_comp.c emit(rv_or(rd, rd, RV_REG_T1), ctx); rd 951 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 956 arch/riscv/net/bpf_jit_comp.c emit(rv_xori(rd, rd, imm), ctx); rd 959 arch/riscv/net/bpf_jit_comp.c emit(rv_xor(rd, rd, RV_REG_T1), ctx); rd 962 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 967 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_mul(rd, rd, RV_REG_T1) : rd 968 arch/riscv/net/bpf_jit_comp.c rv_mulw(rd, rd, RV_REG_T1), ctx); rd 970 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 975 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_divu(rd, rd, RV_REG_T1) : rd 976 arch/riscv/net/bpf_jit_comp.c rv_divuw(rd, rd, RV_REG_T1), ctx); rd 978 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 983 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_remu(rd, rd, RV_REG_T1) : rd 984 arch/riscv/net/bpf_jit_comp.c rv_remuw(rd, rd, RV_REG_T1), ctx); rd 986 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 990 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_slli(rd, rd, imm) : rv_slliw(rd, rd, imm), ctx); rd 992 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 996 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_srli(rd, rd, imm) : rv_srliw(rd, rd, imm), ctx); rd 998 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 1002 arch/riscv/net/bpf_jit_comp.c emit(is64 ? rv_srai(rd, rd, imm) : rv_sraiw(rd, rd, imm), ctx); rd 1004 arch/riscv/net/bpf_jit_comp.c emit_zext_32(rd, ctx); rd 1025 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_rs(&rd, &rs, ctx); rd 1026 arch/riscv/net/bpf_jit_comp.c emit(rv_beq(rd, rs, rvoff >> 1), ctx); rd 1033 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_rs(&rd, &rs, ctx); rd 1034 arch/riscv/net/bpf_jit_comp.c emit(rv_bltu(rs, rd, rvoff >> 1), ctx); rd 1041 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_rs(&rd, &rs, ctx); rd 1042 arch/riscv/net/bpf_jit_comp.c emit(rv_bltu(rd, rs, rvoff >> 1), ctx); rd 1049 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_rs(&rd, &rs, ctx); rd 1050 arch/riscv/net/bpf_jit_comp.c emit(rv_bgeu(rd, rs, rvoff >> 1), ctx); rd 1057 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_rs(&rd, &rs, ctx); rd 1058 arch/riscv/net/bpf_jit_comp.c emit(rv_bgeu(rs, rd, rvoff >> 1), ctx); rd 1065 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_rs(&rd, &rs, ctx); rd 1066 arch/riscv/net/bpf_jit_comp.c emit(rv_bne(rd, rs, rvoff >> 1), ctx); rd 1073 arch/riscv/net/bpf_jit_comp.c emit_sext_32_rd_rs(&rd, &rs, ctx); rd 1074 arch/riscv/net/bpf_jit_comp.c emit(rv_blt(rs, rd, rvoff >> 1), ctx); rd 1081 arch/riscv/net/bpf_jit_comp.c emit_sext_32_rd_rs(&rd, &rs, ctx); rd 1082 arch/riscv/net/bpf_jit_comp.c emit(rv_blt(rd, rs, rvoff >> 1), ctx); rd 1089 arch/riscv/net/bpf_jit_comp.c emit_sext_32_rd_rs(&rd, &rs, ctx); rd 1090 arch/riscv/net/bpf_jit_comp.c emit(rv_bge(rd, rs, rvoff >> 1), ctx); rd 1097 arch/riscv/net/bpf_jit_comp.c emit_sext_32_rd_rs(&rd, &rs, ctx); rd 1098 arch/riscv/net/bpf_jit_comp.c emit(rv_bge(rs, rd, rvoff >> 1), ctx); rd 1105 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_rs(&rd, &rs, ctx); rd 1106 arch/riscv/net/bpf_jit_comp.c emit(rv_and(RV_REG_T1, rd, rs), ctx); rd 1117 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_t1(&rd, ctx); rd 1118 arch/riscv/net/bpf_jit_comp.c emit(rv_beq(rd, RV_REG_T1, rvoff >> 1), ctx); rd 1126 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_t1(&rd, ctx); rd 1127 arch/riscv/net/bpf_jit_comp.c emit(rv_bltu(RV_REG_T1, rd, rvoff >> 1), ctx); rd 1135 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_t1(&rd, ctx); rd 1136 arch/riscv/net/bpf_jit_comp.c emit(rv_bltu(rd, RV_REG_T1, rvoff >> 1), ctx); rd 1144 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_t1(&rd, ctx); rd 1145 arch/riscv/net/bpf_jit_comp.c emit(rv_bgeu(rd, RV_REG_T1, rvoff >> 1), ctx); rd 1153 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_t1(&rd, ctx); rd 1154 arch/riscv/net/bpf_jit_comp.c emit(rv_bgeu(RV_REG_T1, rd, rvoff >> 1), ctx); rd 1162 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_t1(&rd, ctx); rd 1163 arch/riscv/net/bpf_jit_comp.c emit(rv_bne(rd, RV_REG_T1, rvoff >> 1), ctx); rd 1171 arch/riscv/net/bpf_jit_comp.c emit_sext_32_rd(&rd, ctx); rd 1172 arch/riscv/net/bpf_jit_comp.c emit(rv_blt(RV_REG_T1, rd, rvoff >> 1), ctx); rd 1180 arch/riscv/net/bpf_jit_comp.c emit_sext_32_rd(&rd, ctx); rd 1181 arch/riscv/net/bpf_jit_comp.c emit(rv_blt(rd, RV_REG_T1, rvoff >> 1), ctx); rd 1189 arch/riscv/net/bpf_jit_comp.c emit_sext_32_rd(&rd, ctx); rd 1190 arch/riscv/net/bpf_jit_comp.c emit(rv_bge(rd, RV_REG_T1, rvoff >> 1), ctx); rd 1198 arch/riscv/net/bpf_jit_comp.c emit_sext_32_rd(&rd, ctx); rd 1199 arch/riscv/net/bpf_jit_comp.c emit(rv_bge(RV_REG_T1, rd, rvoff >> 1), ctx); rd 1207 arch/riscv/net/bpf_jit_comp.c emit_zext_32_rd_t1(&rd, ctx); rd 1208 arch/riscv/net/bpf_jit_comp.c emit(rv_and(RV_REG_T1, rd, RV_REG_T1), ctx); rd 1236 arch/riscv/net/bpf_jit_comp.c rd = bpf_to_rv_reg(BPF_REG_0, ctx); rd 1237 arch/riscv/net/bpf_jit_comp.c emit(rv_addi(rd, RV_REG_A0, 0), ctx); rd 1264 arch/riscv/net/bpf_jit_comp.c emit_imm(rd, imm64, ctx); rd 1271 arch/riscv/net/bpf_jit_comp.c emit(rv_lbu(rd, off, rs), ctx); rd 1277 arch/riscv/net/bpf_jit_comp.c emit(rv_lbu(rd, 0, RV_REG_T1), ctx); rd 1283 arch/riscv/net/bpf_jit_comp.c emit(rv_lhu(rd, off, rs), ctx); rd 1289 arch/riscv/net/bpf_jit_comp.c emit(rv_lhu(rd, 0, RV_REG_T1), ctx); rd 1295 arch/riscv/net/bpf_jit_comp.c emit(rv_lwu(rd, off, rs), ctx); rd 1301 arch/riscv/net/bpf_jit_comp.c emit(rv_lwu(rd, 0, RV_REG_T1), ctx); rd 1307 arch/riscv/net/bpf_jit_comp.c emit(rv_ld(rd, off, rs), ctx); rd 1313 arch/riscv/net/bpf_jit_comp.c emit(rv_ld(rd, 0, RV_REG_T1), ctx); rd 1320 arch/riscv/net/bpf_jit_comp.c emit(rv_sb(rd, off, RV_REG_T1), ctx); rd 1325 arch/riscv/net/bpf_jit_comp.c emit(rv_add(RV_REG_T2, RV_REG_T2, rd), ctx); rd 1332 arch/riscv/net/bpf_jit_comp.c emit(rv_sh(rd, off, RV_REG_T1), ctx); rd 1337 arch/riscv/net/bpf_jit_comp.c emit(rv_add(RV_REG_T2, RV_REG_T2, rd), ctx); rd 1343 arch/riscv/net/bpf_jit_comp.c emit(rv_sw(rd, off, RV_REG_T1), ctx); rd 1348 arch/riscv/net/bpf_jit_comp.c emit(rv_add(RV_REG_T2, RV_REG_T2, rd), ctx); rd 1354 arch/riscv/net/bpf_jit_comp.c emit(rv_sd(rd, off, RV_REG_T1), ctx); rd 1359 arch/riscv/net/bpf_jit_comp.c emit(rv_add(RV_REG_T2, RV_REG_T2, rd), ctx); rd 1366 arch/riscv/net/bpf_jit_comp.c emit(rv_sb(rd, off, rs), ctx); rd 1371 arch/riscv/net/bpf_jit_comp.c emit(rv_add(RV_REG_T1, RV_REG_T1, rd), ctx); rd 1376 arch/riscv/net/bpf_jit_comp.c emit(rv_sh(rd, off, rs), ctx); rd 1381 arch/riscv/net/bpf_jit_comp.c emit(rv_add(RV_REG_T1, RV_REG_T1, rd), ctx); rd 1386 arch/riscv/net/bpf_jit_comp.c emit(rv_sw(rd, off, rs), ctx); rd 1391 arch/riscv/net/bpf_jit_comp.c emit(rv_add(RV_REG_T1, RV_REG_T1, rd), ctx); rd 1396 arch/riscv/net/bpf_jit_comp.c emit(rv_sd(rd, off, rs), ctx); rd 1401 arch/riscv/net/bpf_jit_comp.c emit(rv_add(RV_REG_T1, RV_REG_T1, rd), ctx); rd 1410 arch/riscv/net/bpf_jit_comp.c emit(rv_addi(RV_REG_T1, rd, off), ctx); rd 1413 arch/riscv/net/bpf_jit_comp.c emit(rv_add(RV_REG_T1, RV_REG_T1, rd), ctx); rd 1416 arch/riscv/net/bpf_jit_comp.c rd = RV_REG_T1; rd 1420 arch/riscv/net/bpf_jit_comp.c rv_amoadd_w(RV_REG_ZERO, rs, rd, 0, 0) : rd 1421 arch/riscv/net/bpf_jit_comp.c rv_amoadd_d(RV_REG_ZERO, rs, rd, 0, 0), ctx); rd 57 arch/sparc/include/asm/backoff.h 88: rd %ccr, %g0; \ rd 58 arch/sparc/include/asm/backoff.h rd %ccr, %g0; \ rd 59 arch/sparc/include/asm/backoff.h rd %ccr, %g0; \ rd 13 arch/sparc/include/asm/head_32.h rd %psr, %l0; b label; rd %wim, %l3; nop; rd 16 arch/sparc/include/asm/head_32.h #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7; rd 17 arch/sparc/include/asm/head_32.h #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7; rd 21 arch/sparc/include/asm/head_32.h rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3; rd 38 arch/sparc/include/asm/head_32.h rd %psr, %l0; rd 42 arch/sparc/include/asm/head_32.h rd %psr,%l0; \ rd 50 arch/sparc/include/asm/head_32.h rd %psr,%l0; \ rd 59 arch/sparc/include/asm/head_32.h b getcc_trap_handler; rd %psr, %l0; nop; nop; rd 63 arch/sparc/include/asm/head_32.h b setcc_trap_handler; rd %psr, %l0; nop; nop; rd 67 arch/sparc/include/asm/head_32.h rd %psr, %i0; jmp %l2; rett %l2 + 4; nop; rd 73 arch/sparc/include/asm/head_32.h mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3; rd 79 arch/sparc/include/asm/head_32.h rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0; rd 82 arch/sparc/include/asm/head_32.h rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0; rd 150 arch/sparc/include/asm/ttable.h rd %pc, %g7; \ rd 162 arch/sparc/include/asm/ttable.h rd %pc, %g7; \ rd 176 arch/sparc/include/asm/ttable.h rd %pc, %g7; \ rd 227 arch/sparc/include/asm/ttable.h rd %pc, %g7; \ rd 201 arch/sparc/include/asm/uaccess_64.h unsigned int rd); rd 16 arch/sparc/include/asm/visasm.h rd %fprs, %o5; \ rd 38 arch/sparc/include/asm/visasm.h rd %fprs, %o5; \ rd 78 arch/sparc/include/asm/winmacro.h rd %y, %scratch; \ rd 108 arch/sparc/include/asm/winmacro.h 661: rd %tbr, %idreg; \ rd 119 arch/sparc/include/asm/winmacro.h rd %asr17, %idreg; \ rd 248 arch/sparc/kernel/kprobes.c unsigned long rd = ((insn >> 25) & 0x1f); rd 250 arch/sparc/kernel/kprobes.c if (rd <= 15) { rd 251 arch/sparc/kernel/kprobes.c slot = ®s->u_regs[rd]; rd 256 arch/sparc/kernel/kprobes.c rd -= 16; rd 259 arch/sparc/kernel/kprobes.c slot += rd; rd 72 arch/sparc/kernel/unaligned_32.c unsigned int rd) rd 74 arch/sparc/kernel/unaligned_32.c if(rs2 >= 16 || rs1 >= 16 || rd >= 16) { rd 140 arch/sparc/kernel/unaligned_32.c unsigned int rd = (insn >> 25) & 0x1f; rd 143 arch/sparc/kernel/unaligned_32.c maybe_flush_windows(rs1, 0, rd); rd 146 arch/sparc/kernel/unaligned_32.c maybe_flush_windows(rs1, rs2, rd); rd 156 arch/sparc/kernel/unaligned_32.c unsigned int rd = (insn >> 25) & 0x1f; rd 159 arch/sparc/kernel/unaligned_32.c maybe_flush_windows(rs1, 0, rd); rd 162 arch/sparc/kernel/unaligned_32.c maybe_flush_windows(rs1, rs2, rd); rd 105 arch/sparc/kernel/unaligned_64.c unsigned int rd, int from_kernel) rd 107 arch/sparc/kernel/unaligned_64.c if (rs2 >= 16 || rs1 >= 16 || rd >= 16) { rd 170 arch/sparc/kernel/unaligned_64.c unsigned int insn, unsigned int rd) rd 178 arch/sparc/kernel/unaligned_64.c maybe_flush_windows(rs1, 0, rd, from_kernel); rd 181 arch/sparc/kernel/unaligned_64.c maybe_flush_windows(rs1, rs2, rd, from_kernel); rd 399 arch/sparc/kernel/unaligned_64.c int ret, rd = ((insn >> 25) & 0x1f); rd 404 arch/sparc/kernel/unaligned_64.c maybe_flush_windows(0, 0, rd, from_kernel); rd 407 arch/sparc/kernel/unaligned_64.c maybe_flush_windows(0, insn & 0x1f, rd, from_kernel); rd 411 arch/sparc/kernel/unaligned_64.c if (rd < 16) { rd 412 arch/sparc/kernel/unaligned_64.c if (rd) rd 413 arch/sparc/kernel/unaligned_64.c regs->u_regs[rd] = ret; rd 420 arch/sparc/kernel/unaligned_64.c put_user(ret, &win32->locals[rd - 16]); rd 424 arch/sparc/kernel/unaligned_64.c put_user(ret, &win->locals[rd - 16]); rd 572 arch/sparc/kernel/unaligned_64.c int rd = ((insn >> 25) & 0x1f); rd 578 arch/sparc/kernel/unaligned_64.c maybe_flush_windows(0, 0, rd, from_kernel); rd 579 arch/sparc/kernel/unaligned_64.c reg = fetch_reg_addr(rd, regs); rd 580 arch/sparc/kernel/unaligned_64.c if (from_kernel || rd < 16) { rd 135 arch/sparc/kernel/uprobes.c unsigned long rd = ((insn >> 25) & 0x1f); rd 137 arch/sparc/kernel/uprobes.c if (rd <= 15) { rd 138 arch/sparc/kernel/uprobes.c slot = ®s->u_regs[rd]; rd 144 arch/sparc/kernel/uprobes.c rd -= 16; rd 147 arch/sparc/kernel/uprobes.c (unsigned long __user *) (fp + STACK_BIAS) + rd; rd 151 arch/sparc/kernel/uprobes.c __user *) fp + rd; rd 141 arch/sparc/kernel/visemul.c unsigned int rd, int from_kernel) rd 143 arch/sparc/kernel/visemul.c if (rs2 >= 16 || rs1 >= 16 || rd >= 16) { rd 204 arch/sparc/kernel/visemul.c static void store_reg(struct pt_regs *regs, unsigned long val, unsigned long rd) rd 206 arch/sparc/kernel/visemul.c if (rd < 16) { rd 207 arch/sparc/kernel/visemul.c unsigned long *rd_kern = __fetch_reg_addr_kern(rd, regs); rd 211 arch/sparc/kernel/visemul.c unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs); rd 451 arch/sparc/kernel/visemul.c unsigned long rs1, rs2, *rd, rd_val; rd 456 arch/sparc/kernel/visemul.c rd = fpd_regaddr(f, RD(insn)); rd 458 arch/sparc/kernel/visemul.c rd_val = *rd; rd 474 arch/sparc/kernel/visemul.c *rd = rd_val; rd 284 arch/sparc/math-emu/math_32.c argp rs1 = NULL, rs2 = NULL, rd = NULL; rd 419 arch/sparc/math-emu/math_32.c rd = (void *)&fregs[freg]; rd 452 arch/sparc/math-emu/math_32.c case FMOVS: rd->s = rs2->s; break; rd 453 arch/sparc/math-emu/math_32.c case FABSS: rd->s = rs2->s & 0x7fffffff; break; rd 454 arch/sparc/math-emu/math_32.c case FNEGS: rd->s = rs2->s ^ 0x80000000; break; rd 506 arch/sparc/math-emu/math_32.c case 1: rd->s = IR; break; rd 507 arch/sparc/math-emu/math_32.c case 5: FP_PACK_SP (rd, SR); break; rd 508 arch/sparc/math-emu/math_32.c case 6: FP_PACK_DP (rd, DR); break; rd 509 arch/sparc/math-emu/math_32.c case 7: FP_PACK_QP (rd, QR); break; rd 359 arch/sparc/math-emu/math_64.c argp rs1 = NULL, rs2 = NULL, rd = NULL; rd 416 arch/sparc/math-emu/math_64.c case 1: rd = (argp)&f->regs[freg]; rd 457 arch/sparc/math-emu/math_64.c case FMOVQ: rd->q[0] = rs2->q[0]; rd->q[1] = rs2->q[1]; break; rd 458 arch/sparc/math-emu/math_64.c case FABSQ: rd->q[0] = rs2->q[0] & 0x7fffffffffffffffUL; rd->q[1] = rs2->q[1]; break; rd 459 arch/sparc/math-emu/math_64.c case FNEGQ: rd->q[0] = rs2->q[0] ^ 0x8000000000000000UL; rd->q[1] = rs2->q[1]; break; rd 507 arch/sparc/math-emu/math_64.c case 1: rd->s = IR; break; rd 508 arch/sparc/math-emu/math_64.c case 2: rd->d = XR; break; rd 509 arch/sparc/math-emu/math_64.c case 5: FP_PACK_SP (rd, SR); break; rd 510 arch/sparc/math-emu/math_64.c case 6: FP_PACK_DP (rd, DR); break; rd 511 arch/sparc/math-emu/math_64.c case 7: FP_PACK_QP (rd, QR); break; rd 215 arch/unicore32/mm/alignment.c unsigned int rd = RD_BITS(instr); rd 229 arch/unicore32/mm/alignment.c regs->uregs[rd] = val; rd 231 arch/unicore32/mm/alignment.c put16_unaligned_check(regs->uregs[rd], addr); rd 250 arch/unicore32/mm/alignment.c unsigned int rd = RD_BITS(instr); rd 256 arch/unicore32/mm/alignment.c get32_unaligned_check(regs->uregs[rd], addr); rd 258 arch/unicore32/mm/alignment.c put32_unaligned_check(regs->uregs[rd], addr); rd 263 arch/unicore32/mm/alignment.c get32t_unaligned_check(regs->uregs[rd], addr); rd 265 arch/unicore32/mm/alignment.c put32t_unaligned_check(regs->uregs[rd], addr); rd 289 arch/unicore32/mm/alignment.c unsigned int rd, rn, pc_correction, reg_correction, nr_regs, regbits; rd 328 arch/unicore32/mm/alignment.c for (regbits = REGMASK_BITS(instr), rd = 0; regbits; rd 329 arch/unicore32/mm/alignment.c regbits >>= 1, rd += 1) rd 333 arch/unicore32/mm/alignment.c uregs[rd + reg_correction], eaddr); rd 336 arch/unicore32/mm/alignment.c uregs[rd + reg_correction], eaddr); rd 98 arch/xtensa/platforms/iss/console.c int rd = 1; rd 104 arch/xtensa/platforms/iss/console.c rd = simc_read(0, &c, 1); rd 105 arch/xtensa/platforms/iss/console.c if (rd <= 0) rd 113 arch/xtensa/platforms/iss/console.c if (rd) rd 594 crypto/serpent_generic.c u32 rs[4], rd[4]; rd 601 crypto/serpent_generic.c serpent_encrypt(tfm, (u8 *)rd, (u8 *)rs); rd 603 crypto/serpent_generic.c d[0] = swab32(rd[3]); rd 604 crypto/serpent_generic.c d[1] = swab32(rd[2]); rd 605 crypto/serpent_generic.c d[2] = swab32(rd[1]); rd 606 crypto/serpent_generic.c d[3] = swab32(rd[0]); rd 614 crypto/serpent_generic.c u32 rs[4], rd[4]; rd 621 crypto/serpent_generic.c serpent_decrypt(tfm, (u8 *)rd, (u8 *)rs); rd 623 crypto/serpent_generic.c d[0] = swab32(rd[3]); rd 624 crypto/serpent_generic.c d[1] = swab32(rd[2]); rd 625 crypto/serpent_generic.c d[2] = swab32(rd[1]); rd 626 crypto/serpent_generic.c d[3] = swab32(rd[0]); rd 21 drivers/clk/samsung/clk-exynos5-subcmu.c struct exynos5_subcmu_reg_dump *rd, rd 24 drivers/clk/samsung/clk-exynos5-subcmu.c for (; num_regs > 0; --num_regs, ++rd) { rd 25 drivers/clk/samsung/clk-exynos5-subcmu.c rd->save = readl(base + rd->offset); rd 26 drivers/clk/samsung/clk-exynos5-subcmu.c writel((rd->save & ~rd->mask) | rd->value, base + rd->offset); rd 27 drivers/clk/samsung/clk-exynos5-subcmu.c rd->save &= rd->mask; rd 32 drivers/clk/samsung/clk-exynos5-subcmu.c struct exynos5_subcmu_reg_dump *rd, rd 35 drivers/clk/samsung/clk-exynos5-subcmu.c for (; num_regs > 0; --num_regs, ++rd) rd 36 drivers/clk/samsung/clk-exynos5-subcmu.c writel((readl(base + rd->offset) & ~rd->mask) | rd->save, rd 37 drivers/clk/samsung/clk-exynos5-subcmu.c base + rd->offset); rd 24 drivers/clk/samsung/clk.c struct samsung_clk_reg_dump *rd, rd 27 drivers/clk/samsung/clk.c for (; num_regs > 0; --num_regs, ++rd) rd 28 drivers/clk/samsung/clk.c rd->value = readl(base + rd->offset); rd 32 drivers/clk/samsung/clk.c const struct samsung_clk_reg_dump *rd, rd 35 drivers/clk/samsung/clk.c for (; num_regs > 0; --num_regs, ++rd) rd 36 drivers/clk/samsung/clk.c writel(rd->value, base + rd->offset); rd 43 drivers/clk/samsung/clk.c struct samsung_clk_reg_dump *rd; rd 46 drivers/clk/samsung/clk.c rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL); rd 47 drivers/clk/samsung/clk.c if (!rd) rd 51 drivers/clk/samsung/clk.c rd[i].offset = rdump[i]; rd 53 drivers/clk/samsung/clk.c return rd; rd 377 drivers/clk/samsung/clk.h struct samsung_clk_reg_dump *rd, rd 380 drivers/clk/samsung/clk.h const struct samsung_clk_reg_dump *rd, rd 51 drivers/clk/versatile/icst.c unsigned int i = 0, rd, best = (unsigned int)-1; rd 74 drivers/clk/versatile/icst.c for (rd = p->rd_min; rd <= p->rd_max; rd++) { rd 79 drivers/clk/versatile/icst.c fref_div = (2 * p->ref) / rd; rd 92 drivers/clk/versatile/icst.c vco.r = rd - 2; rd 966 drivers/clocksource/arm_arch_timer.c u64 (*rd)(void); rd 971 drivers/clocksource/arm_arch_timer.c rd = arch_counter_get_cntvct_stable; rd 973 drivers/clocksource/arm_arch_timer.c rd = arch_counter_get_cntvct; rd 976 drivers/clocksource/arm_arch_timer.c rd = arch_counter_get_cntpct_stable; rd 978 drivers/clocksource/arm_arch_timer.c rd = arch_counter_get_cntpct; rd 981 drivers/clocksource/arm_arch_timer.c arch_timer_read_counter = rd; rd 65 drivers/dma/dw-edma/dw-edma-v0-core.c return &__dw_regs(dw)->type.unroll.ch[ch].rd; rd 259 drivers/dma/dw-edma/dw-edma-v0-debugfs.c dw_edma_debugfs_regs_ch(®s->type.unroll.ch[i].rd, ch_dir); rd 261 drivers/dma/dw-edma/dw-edma-v0-debugfs.c lim[1][i].start = ®s->type.unroll.ch[i].rd; rd 42 drivers/dma/dw-edma/dw-edma-v0-regs.h struct dw_edma_v0_ch_regs rd; /* 0x300 */ rd 86 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c u32 xin_id, bool rd, u32 limit) rd 93 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c if (rd) rd 107 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c u32 xin_id, bool rd) rd 115 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c if (rd) rd 27 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h u32 xin_id, bool rd, u32 limit); rd 37 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h u32 xin_id, bool rd); rd 385 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c ot_params.rd = true; rd 80 drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c tbl = params->rd ? &vbif->cap->dynamic_ot_rd_tbl : rd 113 drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c if (vbif->cap->default_ot_wr_limit && !params->rd) rd 115 drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c else if (vbif->cap->default_ot_rd_limit && params->rd) rd 130 drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c params->xin_id, params->rd); rd 181 drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c if (vbif->ops.set_write_gather_en && !params->rd) rd 194 drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c vbif->ops.set_limit_conf(vbif, params->xin_id, params->rd, ot_lim); rd 16 drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h bool rd; rd 1002 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c struct hdmi_hdcp_reg_data *rd; rd 1009 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c rd = ®_data[i]; rd 1011 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c rd->off, (u8 *)&data[i], (u16)sizeof(data[i])); rd 1013 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c pr_err("%s: Read %s failed\n", __func__, rd->name); rd 1017 drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c DBG("%s =%x", rd->name, data[i]); rd 170 drivers/gpu/drm/msm/msm_drv.h struct msm_rd_state *rd; /* debugfs to dump all submits */ rd 391 drivers/gpu/drm/msm/msm_drv.h void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, rd 398 drivers/gpu/drm/msm/msm_drv.h static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, rd 747 drivers/gpu/drm/msm/msm_gpu.c msm_rd_dump_submit(priv->rd, submit, NULL); rd 101 drivers/gpu/drm/msm/msm_rd.c static void rd_write(struct msm_rd_state *rd, const void *buf, int sz) rd 103 drivers/gpu/drm/msm/msm_rd.c struct circ_buf *fifo = &rd->fifo; rd 110 drivers/gpu/drm/msm/msm_rd.c wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0 || !rd->open); rd 111 drivers/gpu/drm/msm/msm_rd.c if (!rd->open) rd 118 drivers/gpu/drm/msm/msm_rd.c n = min(sz, circ_space_to_end(&rd->fifo)); rd 125 drivers/gpu/drm/msm/msm_rd.c wake_up_all(&rd->fifo_event); rd 129 drivers/gpu/drm/msm/msm_rd.c static void rd_write_section(struct msm_rd_state *rd, rd 132 drivers/gpu/drm/msm/msm_rd.c rd_write(rd, &type, 4); rd 133 drivers/gpu/drm/msm/msm_rd.c rd_write(rd, &sz, 4); rd 134 drivers/gpu/drm/msm/msm_rd.c rd_write(rd, buf, sz); rd 140 drivers/gpu/drm/msm/msm_rd.c struct msm_rd_state *rd = file->private_data; rd 141 drivers/gpu/drm/msm/msm_rd.c struct circ_buf *fifo = &rd->fifo; rd 145 drivers/gpu/drm/msm/msm_rd.c mutex_lock(&rd->read_lock); rd 147 drivers/gpu/drm/msm/msm_rd.c ret = wait_event_interruptible(rd->fifo_event, rd 148 drivers/gpu/drm/msm/msm_rd.c circ_count(&rd->fifo) > 0); rd 156 drivers/gpu/drm/msm/msm_rd.c n = min_t(int, sz, circ_count_to_end(&rd->fifo)); rd 165 drivers/gpu/drm/msm/msm_rd.c wake_up_all(&rd->fifo_event); rd 168 drivers/gpu/drm/msm/msm_rd.c mutex_unlock(&rd->read_lock); rd 176 drivers/gpu/drm/msm/msm_rd.c struct msm_rd_state *rd = inode->i_private; rd 177 drivers/gpu/drm/msm/msm_rd.c struct drm_device *dev = rd->dev; rd 186 drivers/gpu/drm/msm/msm_rd.c if (rd->open || !gpu) { rd 191 drivers/gpu/drm/msm/msm_rd.c file->private_data = rd; rd 192 drivers/gpu/drm/msm/msm_rd.c rd->open = true; rd 200 drivers/gpu/drm/msm/msm_rd.c rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id)); rd 209 drivers/gpu/drm/msm/msm_rd.c struct msm_rd_state *rd = inode->i_private; rd 211 drivers/gpu/drm/msm/msm_rd.c rd->open = false; rd 212 drivers/gpu/drm/msm/msm_rd.c wake_up_all(&rd->fifo_event); rd 227 drivers/gpu/drm/msm/msm_rd.c static void rd_cleanup(struct msm_rd_state *rd) rd 229 drivers/gpu/drm/msm/msm_rd.c if (!rd) rd 232 drivers/gpu/drm/msm/msm_rd.c mutex_destroy(&rd->read_lock); rd 233 drivers/gpu/drm/msm/msm_rd.c kfree(rd); rd 238 drivers/gpu/drm/msm/msm_rd.c struct msm_rd_state *rd; rd 240 drivers/gpu/drm/msm/msm_rd.c rd = kzalloc(sizeof(*rd), GFP_KERNEL); rd 241 drivers/gpu/drm/msm/msm_rd.c if (!rd) rd 244 drivers/gpu/drm/msm/msm_rd.c rd->dev = minor->dev; rd 245 drivers/gpu/drm/msm/msm_rd.c rd->fifo.buf = rd->buf; rd 247 drivers/gpu/drm/msm/msm_rd.c mutex_init(&rd->read_lock); rd 249 drivers/gpu/drm/msm/msm_rd.c init_waitqueue_head(&rd->fifo_event); rd 251 drivers/gpu/drm/msm/msm_rd.c debugfs_create_file(name, S_IFREG | S_IRUGO, minor->debugfs_root, rd, rd 254 drivers/gpu/drm/msm/msm_rd.c return rd; rd 260 drivers/gpu/drm/msm/msm_rd.c struct msm_rd_state *rd; rd 264 drivers/gpu/drm/msm/msm_rd.c if (priv->rd) rd 267 drivers/gpu/drm/msm/msm_rd.c rd = rd_init(minor, "rd"); rd 268 drivers/gpu/drm/msm/msm_rd.c if (IS_ERR(rd)) { rd 269 drivers/gpu/drm/msm/msm_rd.c ret = PTR_ERR(rd); rd 273 drivers/gpu/drm/msm/msm_rd.c priv->rd = rd; rd 275 drivers/gpu/drm/msm/msm_rd.c rd = rd_init(minor, "hangrd"); rd 276 drivers/gpu/drm/msm/msm_rd.c if (IS_ERR(rd)) { rd 277 drivers/gpu/drm/msm/msm_rd.c ret = PTR_ERR(rd); rd 281 drivers/gpu/drm/msm/msm_rd.c priv->hangrd = rd; rd 292 drivers/gpu/drm/msm/msm_rd.c rd_cleanup(priv->rd); rd 293 drivers/gpu/drm/msm/msm_rd.c priv->rd = NULL; rd 299 drivers/gpu/drm/msm/msm_rd.c static void snapshot_buf(struct msm_rd_state *rd, rd 318 drivers/gpu/drm/msm/msm_rd.c rd_write_section(rd, RD_GPUADDR, rd 331 drivers/gpu/drm/msm/msm_rd.c rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size); rd 343 drivers/gpu/drm/msm/msm_rd.c void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, rd 351 drivers/gpu/drm/msm/msm_rd.c if (!rd->open) rd 366 drivers/gpu/drm/msm/msm_rd.c rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4)); rd 381 drivers/gpu/drm/msm/msm_rd.c rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4)); rd 385 drivers/gpu/drm/msm/msm_rd.c snapshot_buf(rd, submit, i, 0, 0); rd 393 drivers/gpu/drm/msm/msm_rd.c snapshot_buf(rd, submit, submit->cmd[i].idx, rd 406 drivers/gpu/drm/msm/msm_rd.c rd_write_section(rd, RD_CMDSTREAM_ADDR, rd 107 drivers/gpu/drm/nouveau/nvif/object.c struct nvif_ioctl_rd_v0 rd; rd 110 drivers/gpu/drm/nouveau/nvif/object.c .rd.size = size, rd 111 drivers/gpu/drm/nouveau/nvif/object.c .rd.addr = addr, rd 118 drivers/gpu/drm/nouveau/nvif/object.c return args.rd.data; rd 69 drivers/gpu/drm/udl/udl_dmabuf.c struct scatterlist *rd, *wr; rd 107 drivers/gpu/drm/udl/udl_dmabuf.c rd = obj->sg->sgl; rd 110 drivers/gpu/drm/udl/udl_dmabuf.c sg_set_page(wr, sg_page(rd), rd->length, rd->offset); rd 111 drivers/gpu/drm/udl/udl_dmabuf.c rd = sg_next(rd); rd 760 drivers/hid/hid-lg.c u8 *rd, int size) rd 765 drivers/hid/hid-lg.c return lg4ff_raw_event(hdev, report, rd, size, drv_data); rd 327 drivers/hid/hid-lg4ff.c u8 *rd, int size, struct lg_drv_data *drv_data) rd 339 drivers/hid/hid-lg4ff.c rd[5] = rd[3]; rd 340 drivers/hid/hid-lg4ff.c rd[6] = 0x7F; rd 346 drivers/hid/hid-lg4ff.c rd[4] = rd[3]; rd 347 drivers/hid/hid-lg4ff.c rd[5] = 0x7F; rd 350 drivers/hid/hid-lg4ff.c rd[5] = rd[4]; rd 351 drivers/hid/hid-lg4ff.c rd[6] = 0x7F; rd 369 drivers/hid/hid-lg4ff.c rd[offset] = (0xFF + rd[offset] - rd[offset+1]) >> 1; rd 370 drivers/hid/hid-lg4ff.c rd[offset+1] = 0x7F; rd 11 drivers/hid/hid-lg4ff.h u8 *rd, int size, struct lg_drv_data *drv_data); rd 18 drivers/hid/hid-lg4ff.h u8 *rd, int size, struct lg_drv_data *drv_data) { return 0; } rd 890 drivers/hid/hid-sony.c static void sixaxis_parse_report(struct sony_sc *sc, u8 *rd, int size) rd 905 drivers/hid/hid-sony.c if (rd[offset] >= 0xee) { rd 907 drivers/hid/hid-sony.c battery_charging = !(rd[offset] & 0x01); rd 910 drivers/hid/hid-sony.c u8 index = rd[offset] <= 5 ? rd[offset] : 5; rd 926 drivers/hid/hid-sony.c val = ((rd[offset+1] << 8) | rd[offset]) - 511; rd 930 drivers/hid/hid-sony.c val = 511 - ((rd[offset+5] << 8) | rd[offset+4]); rd 933 drivers/hid/hid-sony.c val = 511 - ((rd[offset+3] << 8) | rd[offset+2]); rd 940 drivers/hid/hid-sony.c static void dualshock4_parse_report(struct sony_sc *sc, u8 *rd, int size) rd 955 drivers/hid/hid-sony.c input_report_key(sc->touchpad, BTN_LEFT, rd[offset+2] & 0x2); rd 971 drivers/hid/hid-sony.c if (rd[0] == 17) { rd 975 drivers/hid/hid-sony.c input_report_abs(input_dev, ABS_X, rd[offset]); rd 976 drivers/hid/hid-sony.c input_report_abs(input_dev, ABS_Y, rd[offset+1]); rd 977 drivers/hid/hid-sony.c input_report_abs(input_dev, ABS_RX, rd[offset+2]); rd 978 drivers/hid/hid-sony.c input_report_abs(input_dev, ABS_RY, rd[offset+3]); rd 980 drivers/hid/hid-sony.c value = rd[offset+4] & 0xf; rd 986 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_WEST, rd[offset+4] & 0x10); rd 987 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_SOUTH, rd[offset+4] & 0x20); rd 988 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_EAST, rd[offset+4] & 0x40); rd 989 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_NORTH, rd[offset+4] & 0x80); rd 991 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_TL, rd[offset+5] & 0x1); rd 992 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_TR, rd[offset+5] & 0x2); rd 993 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_TL2, rd[offset+5] & 0x4); rd 994 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_TR2, rd[offset+5] & 0x8); rd 995 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_SELECT, rd[offset+5] & 0x10); rd 996 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_START, rd[offset+5] & 0x20); rd 997 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_THUMBL, rd[offset+5] & 0x40); rd 998 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_THUMBR, rd[offset+5] & 0x80); rd 1000 drivers/hid/hid-sony.c input_report_key(input_dev, BTN_MODE, rd[offset+6] & 0x1); rd 1002 drivers/hid/hid-sony.c input_report_abs(input_dev, ABS_Z, rd[offset+7]); rd 1003 drivers/hid/hid-sony.c input_report_abs(input_dev, ABS_RZ, rd[offset+8]); rd 1010 drivers/hid/hid-sony.c timestamp = get_unaligned_le16(&rd[offset]); rd 1029 drivers/hid/hid-sony.c int raw_data = (short)((rd[offset+1] << 8) | rd[offset]); rd 1051 drivers/hid/hid-sony.c cable_state = (rd[offset] >> 4) & 0x01; rd 1052 drivers/hid/hid-sony.c battery_capacity = rd[offset] & 0x0F; rd 1085 drivers/hid/hid-sony.c if (rd[offset] > 0 && rd[offset] <= max_touch_data) rd 1086 drivers/hid/hid-sony.c num_touch_data = rd[offset]; rd 1107 drivers/hid/hid-sony.c x = rd[offset+1] | ((rd[offset+2] & 0xF) << 8); rd 1108 drivers/hid/hid-sony.c y = ((rd[offset+2] & 0xF0) >> 4) | (rd[offset+3] << 4); rd 1110 drivers/hid/hid-sony.c active = !(rd[offset] >> 7); rd 1126 drivers/hid/hid-sony.c static void nsg_mrxu_parse_report(struct sony_sc *sc, u8 *rd, int size) rd 1151 drivers/hid/hid-sony.c input_report_key(sc->touchpad, BTN_LEFT, rd[offset] & 0x0F); rd 1152 drivers/hid/hid-sony.c active = (rd[offset] >> 4); rd 1153 drivers/hid/hid-sony.c relx = (s8) rd[offset+5]; rd 1154 drivers/hid/hid-sony.c rely = ((s8) rd[offset+10]) * -1; rd 1162 drivers/hid/hid-sony.c x = rd[offset] | ((rd[offset+1] & 0x0F) << 8); rd 1163 drivers/hid/hid-sony.c y = ((rd[offset+1] & 0xF0) >> 4) | (rd[offset+2] << 4); rd 1169 drivers/hid/hid-sony.c contactx = rd[offset+3] & 0x0F; rd 1170 drivers/hid/hid-sony.c contacty = rd[offset+3] >> 4; rd 1201 drivers/hid/hid-sony.c u8 *rd, int size) rd 1209 drivers/hid/hid-sony.c if ((sc->quirks & SIXAXIS_CONTROLLER) && rd[0] == 0x01 && size == 49) { rd 1218 drivers/hid/hid-sony.c if (rd[1] == 0xff) rd 1221 drivers/hid/hid-sony.c swap(rd[41], rd[42]); rd 1222 drivers/hid/hid-sony.c swap(rd[43], rd[44]); rd 1223 drivers/hid/hid-sony.c swap(rd[45], rd[46]); rd 1224 drivers/hid/hid-sony.c swap(rd[47], rd[48]); rd 1226 drivers/hid/hid-sony.c sixaxis_parse_report(sc, rd, size); rd 1227 drivers/hid/hid-sony.c } else if ((sc->quirks & MOTION_CONTROLLER_BT) && rd[0] == 0x01 && size == 49) { rd 1228 drivers/hid/hid-sony.c sixaxis_parse_report(sc, rd, size); rd 1229 drivers/hid/hid-sony.c } else if ((sc->quirks & NAVIGATION_CONTROLLER) && rd[0] == 0x01 && rd 1231 drivers/hid/hid-sony.c sixaxis_parse_report(sc, rd, size); rd 1232 drivers/hid/hid-sony.c } else if ((sc->quirks & DUALSHOCK4_CONTROLLER_USB) && rd[0] == 0x01 && rd 1234 drivers/hid/hid-sony.c dualshock4_parse_report(sc, rd, size); rd 1235 drivers/hid/hid-sony.c } else if (((sc->quirks & DUALSHOCK4_CONTROLLER_BT) && rd[0] == 0x11 && rd 1243 drivers/hid/hid-sony.c crc = ~crc32_le(crc, rd, DS4_INPUT_REPORT_0x11_SIZE-4); rd 1244 drivers/hid/hid-sony.c report_crc = get_unaligned_le32(&rd[DS4_INPUT_REPORT_0x11_SIZE-4]); rd 1251 drivers/hid/hid-sony.c dualshock4_parse_report(sc, rd, size); rd 1252 drivers/hid/hid-sony.c } else if ((sc->quirks & DUALSHOCK4_DONGLE) && rd[0] == 0x01 && rd 1262 drivers/hid/hid-sony.c bool connected = (rd[31] & 0x04) ? false : true; rd 1307 drivers/hid/hid-sony.c dualshock4_parse_report(sc, rd, size); rd 1309 drivers/hid/hid-sony.c } else if ((sc->quirks & NSG_MRXU_REMOTE) && rd[0] == 0x02) { rd 1310 drivers/hid/hid-sony.c nsg_mrxu_parse_report(sc, rd, size); rd 99 drivers/i2c/busses/i2c-au1550.c do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q) rd 116 drivers/i2c/busses/i2c-au1550.c if (rd) rd 497 drivers/i2c/busses/i2c-ocores.c u32 rd; rd 502 drivers/i2c/busses/i2c-ocores.c rd = ioread32be(i2c->base + (rreg << i2c->reg_shift)); rd 504 drivers/i2c/busses/i2c-ocores.c return (u8)(rd >> 8); rd 506 drivers/i2c/busses/i2c-ocores.c return (u8)rd; rd 112 drivers/i2c/busses/i2c-pasemi.c u32 rd; rd 127 drivers/i2c/busses/i2c-pasemi.c rd = RXFIFO_RD(smbus); rd 128 drivers/i2c/busses/i2c-pasemi.c if (rd & MRXFIFO_EMPTY) { rd 132 drivers/i2c/busses/i2c-pasemi.c msg->buf[i] = rd & MRXFIFO_DATA_M; rd 171 drivers/i2c/busses/i2c-pasemi.c unsigned int rd; rd 220 drivers/i2c/busses/i2c-pasemi.c rd = RXFIFO_RD(smbus); rd 221 drivers/i2c/busses/i2c-pasemi.c len = min_t(u8, (rd & MRXFIFO_DATA_M), rd 252 drivers/i2c/busses/i2c-pasemi.c rd = RXFIFO_RD(smbus); rd 253 drivers/i2c/busses/i2c-pasemi.c len = min_t(u8, (rd & MRXFIFO_DATA_M), rd 273 drivers/i2c/busses/i2c-pasemi.c rd = RXFIFO_RD(smbus); rd 274 drivers/i2c/busses/i2c-pasemi.c if (rd & MRXFIFO_EMPTY) { rd 278 drivers/i2c/busses/i2c-pasemi.c data->byte = rd & MRXFIFO_DATA_M; rd 282 drivers/i2c/busses/i2c-pasemi.c rd = RXFIFO_RD(smbus); rd 283 drivers/i2c/busses/i2c-pasemi.c if (rd & MRXFIFO_EMPTY) { rd 287 drivers/i2c/busses/i2c-pasemi.c data->word = rd & MRXFIFO_DATA_M; rd 288 drivers/i2c/busses/i2c-pasemi.c rd = RXFIFO_RD(smbus); rd 289 drivers/i2c/busses/i2c-pasemi.c if (rd & MRXFIFO_EMPTY) { rd 293 drivers/i2c/busses/i2c-pasemi.c data->word |= (rd & MRXFIFO_DATA_M) << 8; rd 299 drivers/i2c/busses/i2c-pasemi.c rd = RXFIFO_RD(smbus); rd 300 drivers/i2c/busses/i2c-pasemi.c if (rd & MRXFIFO_EMPTY) { rd 304 drivers/i2c/busses/i2c-pasemi.c data->block[i] = rd & MRXFIFO_DATA_M; rd 248 drivers/i2c/busses/i2c-zx2967.c int rd = i2c->msg_rd; rd 253 drivers/i2c/busses/i2c-zx2967.c if (rd) { rd 271 drivers/i2c/busses/i2c-zx2967.c return rd ? zx2967_i2c_empty_rx_fifo(i2c, bytes) : 0; rd 232 drivers/i2c/i2c-core-of.c struct of_reconfig_data *rd = arg; rd 236 drivers/i2c/i2c-core-of.c switch (of_reconfig_get_state_change(action, rd)) { rd 238 drivers/i2c/i2c-core-of.c adap = of_find_i2c_adapter_by_node(rd->dn->parent); rd 242 drivers/i2c/i2c-core-of.c if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) { rd 247 drivers/i2c/i2c-core-of.c client = of_i2c_register_device(adap, rd->dn); rd 250 drivers/i2c/i2c-core-of.c rd->dn); rd 252 drivers/i2c/i2c-core-of.c of_node_clear_flag(rd->dn, OF_POPULATED); rd 259 drivers/i2c/i2c-core-of.c if (!of_node_check_flag(rd->dn, OF_POPULATED)) rd 263 drivers/i2c/i2c-core-of.c client = of_find_i2c_device_by_node(rd->dn); rd 104 drivers/iio/common/ms_sensors/ms_sensors_i2c.c int ms_sensors_convert_and_read(void *cli, u8 conv, u8 rd, rd 118 drivers/iio/common/ms_sensors/ms_sensors_i2c.c if (rd != MS_SENSORS_NO_READ_CMD) rd 119 drivers/iio/common/ms_sensors/ms_sensors_i2c.c ret = i2c_smbus_read_i2c_block_data(client, rd, 3, (u8 *)&buf); rd 45 drivers/iio/common/ms_sensors/ms_sensors_i2c.h int ms_sensors_convert_and_read(void *cli, u8 conv, u8 rd, rd 34 drivers/iio/temperature/tsys01.c int (*convert_and_read)(void *cli, u8 conv, u8 rd, rd 1127 drivers/md/dm-raid.c struct raid_dev *rd; rd 1316 drivers/md/dm-raid.c rd = rs->dev + value; rd 1317 drivers/md/dm-raid.c clear_bit(In_sync, &rd->rdev.flags); rd 1318 drivers/md/dm-raid.c clear_bit(Faulty, &rd->rdev.flags); rd 1319 drivers/md/dm-raid.c rd->rdev.recovery_offset = 0; rd 224 drivers/media/common/videobuf2/videobuf2-dma-contig.c struct scatterlist *rd, *wr; rd 243 drivers/media/common/videobuf2/videobuf2-dma-contig.c rd = buf->sgt_base->sgl; rd 246 drivers/media/common/videobuf2/videobuf2-dma-contig.c sg_set_page(wr, sg_page(rd), rd->length, rd->offset); rd 247 drivers/media/common/videobuf2/videobuf2-dma-contig.c rd = sg_next(rd); rd 368 drivers/media/common/videobuf2/videobuf2-dma-sg.c struct scatterlist *rd, *wr; rd 387 drivers/media/common/videobuf2/videobuf2-dma-sg.c rd = buf->dma_sgt->sgl; rd 390 drivers/media/common/videobuf2/videobuf2-dma-sg.c sg_set_page(wr, sg_page(rd), rd->length, rd->offset); rd 391 drivers/media/common/videobuf2/videobuf2-dma-sg.c rd = sg_next(rd); rd 342 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_AS_IRQ_PENDING), rd 343 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_LOCK2_VALUE))) < 0 && as_count++ < 100) rd 450 drivers/media/dvb-frontends/dib3000mb.c if (!rd(DIB3000MB_REG_TPS_LOCK)) rd 453 drivers/media/dvb-frontends/dib3000mb.c dds_val = ((rd(DIB3000MB_REG_DDS_VALUE_MSB) & 0xff) << 16) + rd(DIB3000MB_REG_DDS_VALUE_LSB); rd 454 drivers/media/dvb-frontends/dib3000mb.c deb_getf("DDS_VAL: %x %x %x\n", dds_val, rd(DIB3000MB_REG_DDS_VALUE_MSB), rd(DIB3000MB_REG_DDS_VALUE_LSB)); rd 462 drivers/media/dvb-frontends/dib3000mb.c dds_val = ((rd(DIB3000MB_REG_DDS_FREQ_MSB) & 0xff) << 16) + rd(DIB3000MB_REG_DDS_FREQ_LSB); rd 463 drivers/media/dvb-frontends/dib3000mb.c deb_getf("DDS_FREQ: %x %x %x\n", dds_val, rd(DIB3000MB_REG_DDS_FREQ_MSB), rd(DIB3000MB_REG_DDS_FREQ_LSB)); rd 478 drivers/media/dvb-frontends/dib3000mb.c switch ((tps_val = rd(DIB3000MB_REG_TPS_QAM))) { rd 497 drivers/media/dvb-frontends/dib3000mb.c if (rd(DIB3000MB_REG_TPS_HRCH)) { rd 501 drivers/media/dvb-frontends/dib3000mb.c switch ((tps_val = rd(DIB3000MB_REG_TPS_VIT_ALPHA))) { rd 524 drivers/media/dvb-frontends/dib3000mb.c tps_val = rd(DIB3000MB_REG_TPS_CODE_RATE_LP); rd 531 drivers/media/dvb-frontends/dib3000mb.c tps_val = rd(DIB3000MB_REG_TPS_CODE_RATE_HP); rd 561 drivers/media/dvb-frontends/dib3000mb.c switch ((tps_val = rd(DIB3000MB_REG_TPS_GUARD_TIME))) { rd 584 drivers/media/dvb-frontends/dib3000mb.c switch ((tps_val = rd(DIB3000MB_REG_TPS_FFT))) { rd 609 drivers/media/dvb-frontends/dib3000mb.c if (rd(DIB3000MB_REG_AGC_LOCK)) rd 611 drivers/media/dvb-frontends/dib3000mb.c if (rd(DIB3000MB_REG_CARRIER_LOCK)) rd 613 drivers/media/dvb-frontends/dib3000mb.c if (rd(DIB3000MB_REG_VIT_LCK)) rd 615 drivers/media/dvb-frontends/dib3000mb.c if (rd(DIB3000MB_REG_TS_SYNC_LOCK)) rd 621 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_TPS_LOCK), rd 622 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_TPS_QAM), rd 623 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_TPS_HRCH), rd 624 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_TPS_VIT_ALPHA), rd 625 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_TPS_CODE_RATE_HP), rd 626 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_TPS_CODE_RATE_LP), rd 627 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_TPS_GUARD_TIME), rd 628 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_TPS_FFT), rd 629 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_TPS_CELL_ID)); rd 639 drivers/media/dvb-frontends/dib3000mb.c *ber = ((rd(DIB3000MB_REG_BER_MSB) << 16) | rd(DIB3000MB_REG_BER_LSB)); rd 648 drivers/media/dvb-frontends/dib3000mb.c *strength = rd(DIB3000MB_REG_SIGNAL_POWER) * 0xffff / 0x170; rd 655 drivers/media/dvb-frontends/dib3000mb.c short sigpow = rd(DIB3000MB_REG_SIGNAL_POWER); rd 656 drivers/media/dvb-frontends/dib3000mb.c int icipow = ((rd(DIB3000MB_REG_NOISE_POWER_MSB) & 0xff) << 16) | rd 657 drivers/media/dvb-frontends/dib3000mb.c rd(DIB3000MB_REG_NOISE_POWER_LSB); rd 666 drivers/media/dvb-frontends/dib3000mb.c *unc = rd(DIB3000MB_REG_PACKET_ERROR_RATE); rd 758 drivers/media/dvb-frontends/dib3000mb.c if (rd(DIB3000_REG_MANUFACTOR_ID) != DIB3000_I2C_ID_DIBCOM) rd 761 drivers/media/dvb-frontends/dib3000mb.c if (rd(DIB3000_REG_DEVICE_ID) != DIB3000MB_DEVICE_ID) rd 26 drivers/media/dvb-frontends/dib3000mb_priv.h #define set_or(reg,val) wr(reg,rd(reg) | val) rd 28 drivers/media/dvb-frontends/dib3000mb_priv.h #define set_and(reg,val) wr(reg,rd(reg) & val) rd 233 drivers/media/dvb-frontends/mb86a20s.c u8 i2c_addr, struct regdata *rd, int size) rd 238 drivers/media/dvb-frontends/mb86a20s.c rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg, rd 239 drivers/media/dvb-frontends/mb86a20s.c rd[i].data); rd 218 drivers/media/dvb-frontends/s921.c struct regdata *rd, int size) rd 223 drivers/media/dvb-frontends/s921.c rc = s921_i2c_writereg(state, i2c_addr, rd[i].reg, rd[i].data); rd 343 drivers/media/pci/bt8xx/bt878.c retval = bttv_read_gpio(bt->bttv_nr, &mp->rd.value); rd 99 drivers/media/pci/bt8xx/dst.c *result = (u8) rd_packet.rd.value; rd 25 drivers/media/pci/bt8xx/dst_priv.h struct dst_gpio_read rd; rd 27 drivers/media/pci/cobalt/cobalt-cpld.c u32 rd; rd 66 drivers/media/pci/cobalt/cobalt-cpld.c rd = cpld_read(cobalt, 0x3c); rd 67 drivers/media/pci/cobalt/cobalt-cpld.c tmp = (rd * 33 * 1000) / (483 * 10); rd 69 drivers/media/pci/cobalt/cobalt-cpld.c rd = cpld_read(cobalt, 0x40); rd 70 drivers/media/pci/cobalt/cobalt-cpld.c tmp = (rd * 74 * 2197) / (27 * 1000); rd 72 drivers/media/pci/cobalt/cobalt-cpld.c rd = cpld_read(cobalt, 0x44); rd 73 drivers/media/pci/cobalt/cobalt-cpld.c tmp = (rd * 74 * 2197) / (47 * 1000); rd 75 drivers/media/pci/cobalt/cobalt-cpld.c rd = cpld_read(cobalt, 0x48); rd 76 drivers/media/pci/cobalt/cobalt-cpld.c tmp = (rd * 57 * 2197) / (47 * 1000); rd 78 drivers/media/pci/cobalt/cobalt-cpld.c rd = cpld_read(cobalt, 0x4c); rd 79 drivers/media/pci/cobalt/cobalt-cpld.c tmp = (rd * 2197) / 1000; rd 81 drivers/media/pci/cobalt/cobalt-cpld.c rd = cpld_read(cobalt, 0x50); rd 82 drivers/media/pci/cobalt/cobalt-cpld.c tmp = (rd * 2197) / 1000; rd 84 drivers/media/pci/cobalt/cobalt-cpld.c rd = cpld_read(cobalt, 0x54); rd 85 drivers/media/pci/cobalt/cobalt-cpld.c tmp = (rd * 2197) / 1000; rd 107 drivers/media/pci/pt3/pt3_i2c.c bool rd; rd 111 drivers/media/pci/pt3/pt3_i2c.c rd = !!(msgs[i].flags & I2C_M_RD); rd 113 drivers/media/pci/pt3/pt3_i2c.c put_byte_write(cbuf, msgs[i].addr << 1 | rd); rd 114 drivers/media/pci/pt3/pt3_i2c.c if (rd) rd 51 drivers/media/tuners/qt1010.c qt1010_i2c_oper_t rd[48] = { rd 123 drivers/media/tuners/qt1010.c rd[2].val = reg05; rd 126 drivers/media/tuners/qt1010.c rd[4].val = (freq + QT1010_OFFSET) / FREQ1; rd 129 drivers/media/tuners/qt1010.c if (mod1 < 8000000) rd[6].val = 0x1d; rd 130 drivers/media/tuners/qt1010.c else rd[6].val = 0x1c; rd 133 drivers/media/tuners/qt1010.c if (mod1 < 1*FREQ2) rd[7].val = 0x09; /* +0 MHz */ rd 134 drivers/media/tuners/qt1010.c else if (mod1 < 2*FREQ2) rd[7].val = 0x08; /* +4 MHz */ rd 135 drivers/media/tuners/qt1010.c else if (mod1 < 3*FREQ2) rd[7].val = 0x0f; /* +8 MHz */ rd 136 drivers/media/tuners/qt1010.c else if (mod1 < 4*FREQ2) rd[7].val = 0x0e; /* +12 MHz */ rd 137 drivers/media/tuners/qt1010.c else if (mod1 < 5*FREQ2) rd[7].val = 0x0d; /* +16 MHz */ rd 138 drivers/media/tuners/qt1010.c else if (mod1 < 6*FREQ2) rd[7].val = 0x0c; /* +20 MHz */ rd 139 drivers/media/tuners/qt1010.c else if (mod1 < 7*FREQ2) rd[7].val = 0x0b; /* +24 MHz */ rd 140 drivers/media/tuners/qt1010.c else rd[7].val = 0x0a; /* +28 MHz */ rd 143 drivers/media/tuners/qt1010.c if (mod2 < 2000000) rd[8].val = 0x45; rd 144 drivers/media/tuners/qt1010.c else rd[8].val = 0x44; rd 148 drivers/media/tuners/qt1010.c rd[10].val = tmpval-((mod2/QT1010_STEP)*0x08); rd 151 drivers/media/tuners/qt1010.c rd[13].val = 0xfd; /* TODO: correct value calculation */ rd 154 drivers/media/tuners/qt1010.c rd[14].val = 0x91; /* TODO: correct value calculation */ rd 157 drivers/media/tuners/qt1010.c if (freq < 450000000) rd[15].val = 0xd0; /* 450 MHz */ rd 158 drivers/media/tuners/qt1010.c else if (freq < 482000000) rd[15].val = 0xd1; /* 482 MHz */ rd 159 drivers/media/tuners/qt1010.c else if (freq < 514000000) rd[15].val = 0xd4; /* 514 MHz */ rd 160 drivers/media/tuners/qt1010.c else if (freq < 546000000) rd[15].val = 0xd7; /* 546 MHz */ rd 161 drivers/media/tuners/qt1010.c else if (freq < 610000000) rd[15].val = 0xda; /* 610 MHz */ rd 162 drivers/media/tuners/qt1010.c else rd[15].val = 0xd0; rd 165 drivers/media/tuners/qt1010.c rd[35].val = (reg05 & 0xf0); rd 174 drivers/media/tuners/qt1010.c rd[40].val = (priv->reg1f_init_val + 0x0e + tmpval); rd 183 drivers/media/tuners/qt1010.c rd[41].val = (priv->reg20_init_val + 0x0d + tmpval); rd 186 drivers/media/tuners/qt1010.c rd[43].val = priv->reg25_init_val; rd 189 drivers/media/tuners/qt1010.c rd[45].val = 0x92; /* TODO: correct value calculation */ rd 195 drivers/media/tuners/qt1010.c freq, rd[2].val, rd[4].val, rd[6].val, rd[7].val, \ rd 196 drivers/media/tuners/qt1010.c rd[8].val, rd[10].val, rd[13].val, rd[14].val, \ rd 197 drivers/media/tuners/qt1010.c rd[15].val, rd[35].val, rd[40].val, rd[41].val, \ rd 198 drivers/media/tuners/qt1010.c rd[43].val, rd[45].val); rd 200 drivers/media/tuners/qt1010.c for (i = 0; i < ARRAY_SIZE(rd); i++) { rd 201 drivers/media/tuners/qt1010.c if (rd[i].oper == QT1010_WR) { rd 202 drivers/media/tuners/qt1010.c err = qt1010_writereg(priv, rd[i].reg, rd[i].val); rd 204 drivers/media/tuners/qt1010.c err = qt1010_readreg(priv, rd[i].reg, &tmpval); rd 54 drivers/memory/samsung/exynos-srom.c struct exynos_srom_reg_dump *rd; rd 57 drivers/memory/samsung/exynos-srom.c rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL); rd 58 drivers/memory/samsung/exynos-srom.c if (!rd) rd 62 drivers/memory/samsung/exynos-srom.c rd[i].offset = rdump[i]; rd 64 drivers/memory/samsung/exynos-srom.c return rd; rd 160 drivers/memory/samsung/exynos-srom.c struct exynos_srom_reg_dump *rd, rd 163 drivers/memory/samsung/exynos-srom.c for (; num_regs > 0; --num_regs, ++rd) rd 164 drivers/memory/samsung/exynos-srom.c rd->value = readl(base + rd->offset); rd 168 drivers/memory/samsung/exynos-srom.c const struct exynos_srom_reg_dump *rd, rd 171 drivers/memory/samsung/exynos-srom.c for (; num_regs > 0; --num_regs, ++rd) rd 172 drivers/memory/samsung/exynos-srom.c writel(rd->value, base + rd->offset); rd 923 drivers/mtd/nand/raw/nand_bbt.c struct nand_bbt_descr *rd, *rd2; rd 934 drivers/mtd/nand/raw/nand_bbt.c rd = NULL; rd 945 drivers/mtd/nand/raw/nand_bbt.c rd = md; rd 948 drivers/mtd/nand/raw/nand_bbt.c rd = td; rd 951 drivers/mtd/nand/raw/nand_bbt.c rd = td; rd 955 drivers/mtd/nand/raw/nand_bbt.c rd = td; rd 958 drivers/mtd/nand/raw/nand_bbt.c rd = md; rd 966 drivers/mtd/nand/raw/nand_bbt.c rd = td; rd 985 drivers/mtd/nand/raw/nand_bbt.c if (rd) { rd 986 drivers/mtd/nand/raw/nand_bbt.c res = read_abs_bbt(this, buf, rd, chipsel); rd 989 drivers/mtd/nand/raw/nand_bbt.c rd->pages[i] = -1; rd 990 drivers/mtd/nand/raw/nand_bbt.c rd->version[i] = 0; rd 3420 drivers/mtd/spi-nor/spi-nor.c const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i]; rd 3423 drivers/mtd/spi-nor/spi-nor.c if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) { rd 3424 drivers/mtd/spi-nor/spi-nor.c params->hwcaps.mask &= ~rd->hwcaps; rd 3428 drivers/mtd/spi-nor/spi-nor.c params->hwcaps.mask |= rd->hwcaps; rd 3429 drivers/mtd/spi-nor/spi-nor.c cmd = spi_nor_hwcaps_read2cmd(rd->hwcaps); rd 3431 drivers/mtd/spi-nor/spi-nor.c half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift; rd 3432 drivers/mtd/spi-nor/spi-nor.c spi_nor_set_read_settings_from_bfpt(read, half, rd->proto); rd 1171 drivers/net/can/grcan.c u32 wr, rd, startrd; rd 1176 drivers/net/can/grcan.c rd = grcan_read_reg(®s->rxrd); rd 1177 drivers/net/can/grcan.c startrd = rd; rd 1181 drivers/net/can/grcan.c if (rd == wr) rd 1193 drivers/net/can/grcan.c slot = dma->rx.buf + rd; rd 1221 drivers/net/can/grcan.c rd = grcan_ring_add(rd, GRCAN_MSG_SIZE, dma->rx.size); rd 1230 drivers/net/can/grcan.c if (likely(rd != startrd)) rd 1231 drivers/net/can/grcan.c grcan_write_reg(®s->rxrd, rd); rd 1642 drivers/net/ethernet/alteon/acenic.c struct rx_desc *rd; rd 1657 drivers/net/ethernet/alteon/acenic.c rd = &ap->rx_std_ring[idx]; rd 1658 drivers/net/ethernet/alteon/acenic.c set_aceaddr(&rd->addr, mapping); rd 1659 drivers/net/ethernet/alteon/acenic.c rd->size = ACE_STD_BUFSIZE; rd 1660 drivers/net/ethernet/alteon/acenic.c rd->idx = idx; rd 1703 drivers/net/ethernet/alteon/acenic.c struct rx_desc *rd; rd 1718 drivers/net/ethernet/alteon/acenic.c rd = &ap->rx_mini_ring[idx]; rd 1719 drivers/net/ethernet/alteon/acenic.c set_aceaddr(&rd->addr, mapping); rd 1720 drivers/net/ethernet/alteon/acenic.c rd->size = ACE_MINI_BUFSIZE; rd 1721 drivers/net/ethernet/alteon/acenic.c rd->idx = idx; rd 1759 drivers/net/ethernet/alteon/acenic.c struct rx_desc *rd; rd 1774 drivers/net/ethernet/alteon/acenic.c rd = &ap->rx_jumbo_ring[idx]; rd 1775 drivers/net/ethernet/alteon/acenic.c set_aceaddr(&rd->addr, mapping); rd 1776 drivers/net/ethernet/alteon/acenic.c rd->size = ACE_JUMBO_BUFSIZE; rd 1777 drivers/net/ethernet/alteon/acenic.c rd->idx = idx; rd 276 drivers/net/ethernet/amd/7990.c volatile struct lance_rx_desc *rd; rd 298 drivers/net/ethernet/amd/7990.c for (rd = &ib->brx_ring[lp->rx_new]; /* For each Rx ring we own... */ rd 299 drivers/net/ethernet/amd/7990.c !((bits = rd->rmd1_bits) & LE_R1_OWN); rd 300 drivers/net/ethernet/amd/7990.c rd = &ib->brx_ring[lp->rx_new]) { rd 322 drivers/net/ethernet/amd/7990.c int len = (rd->mblength & 0xfff) - 4; rd 327 drivers/net/ethernet/amd/7990.c rd->mblength = 0; rd 328 drivers/net/ethernet/amd/7990.c rd->rmd1_bits = LE_R1_OWN; rd 345 drivers/net/ethernet/amd/7990.c rd->mblength = 0; rd 346 drivers/net/ethernet/amd/7990.c rd->rmd1_bits = LE_R1_OWN; rd 250 drivers/net/ethernet/amd/a2065.c volatile struct lance_rx_desc *rd; rd 270 drivers/net/ethernet/amd/a2065.c for (rd = &ib->brx_ring[lp->rx_new]; rd 271 drivers/net/ethernet/amd/a2065.c !((bits = rd->rmd1_bits) & LE_R1_OWN); rd 272 drivers/net/ethernet/amd/a2065.c rd = &ib->brx_ring[lp->rx_new]) { rd 294 drivers/net/ethernet/amd/a2065.c int len = (rd->mblength & 0xfff) - 4; rd 299 drivers/net/ethernet/amd/a2065.c rd->mblength = 0; rd 300 drivers/net/ethernet/amd/a2065.c rd->rmd1_bits = LE_R1_OWN; rd 317 drivers/net/ethernet/amd/a2065.c rd->mblength = 0; rd 318 drivers/net/ethernet/amd/a2065.c rd->rmd1_bits = LE_R1_OWN; rd 241 drivers/net/ethernet/amd/declance.c #define rds_ptr(rd, rt, type) \ rd 242 drivers/net/ethernet/amd/declance.c ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) rd 560 drivers/net/ethernet/amd/declance.c volatile u16 *rd; rd 584 drivers/net/ethernet/amd/declance.c for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); rd 585 drivers/net/ethernet/amd/declance.c !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); rd 586 drivers/net/ethernet/amd/declance.c rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { rd 608 drivers/net/ethernet/amd/declance.c len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; rd 613 drivers/net/ethernet/amd/declance.c *rds_ptr(rd, mblength, lp->type) = 0; rd 614 drivers/net/ethernet/amd/declance.c *rds_ptr(rd, rmd1, lp->type) = rd 634 drivers/net/ethernet/amd/declance.c *rds_ptr(rd, mblength, lp->type) = 0; rd 635 drivers/net/ethernet/amd/declance.c *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; rd 636 drivers/net/ethernet/amd/declance.c *rds_ptr(rd, rmd1, lp->type) = rd 512 drivers/net/ethernet/amd/sunlance.c struct lance_rx_desc *rd; rd 517 drivers/net/ethernet/amd/sunlance.c for (rd = &ib->brx_ring [entry]; rd 518 drivers/net/ethernet/amd/sunlance.c !((bits = rd->rmd1_bits) & LE_R1_OWN); rd 519 drivers/net/ethernet/amd/sunlance.c rd = &ib->brx_ring [entry]) { rd 535 drivers/net/ethernet/amd/sunlance.c len = (rd->mblength & 0xfff) - 4; rd 540 drivers/net/ethernet/amd/sunlance.c rd->mblength = 0; rd 541 drivers/net/ethernet/amd/sunlance.c rd->rmd1_bits = LE_R1_OWN; rd 559 drivers/net/ethernet/amd/sunlance.c rd->mblength = 0; rd 560 drivers/net/ethernet/amd/sunlance.c rd->rmd1_bits = LE_R1_OWN; rd 681 drivers/net/ethernet/amd/sunlance.c struct lance_rx_desc __iomem *rd; rd 687 drivers/net/ethernet/amd/sunlance.c for (rd = &ib->brx_ring [entry]; rd 688 drivers/net/ethernet/amd/sunlance.c !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN); rd 689 drivers/net/ethernet/amd/sunlance.c rd = &ib->brx_ring [entry]) { rd 705 drivers/net/ethernet/amd/sunlance.c len = (sbus_readw(&rd->mblength) & 0xfff) - 4; rd 710 drivers/net/ethernet/amd/sunlance.c sbus_writew(0, &rd->mblength); rd 711 drivers/net/ethernet/amd/sunlance.c sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); rd 727 drivers/net/ethernet/amd/sunlance.c sbus_writew(0, &rd->mblength); rd 728 drivers/net/ethernet/amd/sunlance.c sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); rd 316 drivers/net/ethernet/apm/xgene/xgene_enet_hw.c void __iomem *addr, *rd, *cmd, *cmd_done; rd 329 drivers/net/ethernet/apm/xgene/xgene_enet_hw.c rd = pdata->mcx_mac_addr + MAC_READ_REG_OFFSET; rd 343 drivers/net/ethernet/apm/xgene/xgene_enet_hw.c rd_data = ioread32(rd); rd 352 drivers/net/ethernet/apm/xgene/xgene_enet_hw.c void __iomem *addr, *rd, *cmd, *cmd_done; rd 357 drivers/net/ethernet/apm/xgene/xgene_enet_hw.c rd = pdata->mcx_stats_addr + STAT_READ_REG_OFFSET; rd 372 drivers/net/ethernet/apm/xgene/xgene_enet_hw.c rd_data = ioread32(rd); rd 101 drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c static bool xgene_enet_rd_indirect(void __iomem *addr, void __iomem *rd, rd 118 drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c *rd_data = ioread32(rd); rd 127 drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c void __iomem *addr, *rd, *cmd, *cmd_done; rd 131 drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c rd = pdata->pcs_addr + PCS_READ_REG_OFFSET; rd 135 drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c success = xgene_enet_rd_indirect(addr, rd, cmd, cmd_done, rd_addr, rd_data); rd 226 drivers/net/ethernet/apple/bmac.c volatile struct dbdma_regs __iomem *rd = bp->rx_dma; rd 229 drivers/net/ethernet/apple/bmac.c if (rd) rd 230 drivers/net/ethernet/apple/bmac.c dbdma_reset(rd); rd 403 drivers/net/ethernet/apple/bmac.c volatile struct dbdma_regs __iomem *rd = bp->rx_dma; rd 407 drivers/net/ethernet/apple/bmac.c dbdma_continue(rd); rd 474 drivers/net/ethernet/apple/bmac.c volatile struct dbdma_regs __iomem *rd = bp->rx_dma; rd 483 drivers/net/ethernet/apple/bmac.c rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ rd 608 drivers/net/ethernet/apple/bmac.c volatile struct dbdma_regs __iomem *rd = bp->rx_dma; rd 632 drivers/net/ethernet/apple/bmac.c dbdma_reset(rd); rd 633 drivers/net/ethernet/apple/bmac.c out_le32(&rd->cmdptr, virt_to_bus(bp->rx_cmds)); rd 678 drivers/net/ethernet/apple/bmac.c volatile struct dbdma_regs __iomem *rd = bp->rx_dma; rd 737 drivers/net/ethernet/apple/bmac.c dbdma_continue(rd); rd 1390 drivers/net/ethernet/apple/bmac.c volatile struct dbdma_regs __iomem *rd = bp->rx_dma; rd 1407 drivers/net/ethernet/apple/bmac.c rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ rd 1474 drivers/net/ethernet/apple/bmac.c volatile struct dbdma_regs __iomem *rd = bp->rx_dma; rd 1502 drivers/net/ethernet/apple/bmac.c cp = bus_to_virt(le32_to_cpu(rd->cmdptr)); rd 1503 drivers/net/ethernet/apple/bmac.c out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); rd 1505 drivers/net/ethernet/apple/bmac.c out_le32(&rd->cmdptr, virt_to_bus(cp)); rd 1506 drivers/net/ethernet/apple/bmac.c out_le32(&rd->control, DBDMA_SET(RUN|WAKE)); rd 432 drivers/net/ethernet/apple/mace.c volatile struct dbdma_regs __iomem *rd = mp->rx_dma; rd 472 drivers/net/ethernet/apple/mace.c out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ rd 473 drivers/net/ethernet/apple/mace.c out_le32(&rd->cmdptr, virt_to_bus(mp->rx_cmds)); rd 474 drivers/net/ethernet/apple/mace.c out_le32(&rd->control, (RUN << 16) | RUN); rd 502 drivers/net/ethernet/apple/mace.c volatile struct dbdma_regs __iomem *rd = mp->rx_dma; rd 510 drivers/net/ethernet/apple/mace.c rd->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ rd 809 drivers/net/ethernet/apple/mace.c volatile struct dbdma_regs __iomem *rd = mp->rx_dma; rd 831 drivers/net/ethernet/apple/mace.c cp = bus_to_virt(le32_to_cpu(rd->cmdptr)); rd 832 drivers/net/ethernet/apple/mace.c dbdma_reset(rd); rd 834 drivers/net/ethernet/apple/mace.c out_le32(&rd->cmdptr, virt_to_bus(cp)); rd 835 drivers/net/ethernet/apple/mace.c out_le32(&rd->control, (RUN << 16) | RUN); rd 878 drivers/net/ethernet/apple/mace.c volatile struct dbdma_regs __iomem *rd = mp->rx_dma; rd 969 drivers/net/ethernet/apple/mace.c if ((le32_to_cpu(rd->status) & ACTIVE) != 0) { rd 970 drivers/net/ethernet/apple/mace.c out_le32(&rd->control, (PAUSE << 16) | PAUSE); rd 971 drivers/net/ethernet/apple/mace.c while ((in_le32(&rd->status) & ACTIVE) != 0) rd 978 drivers/net/ethernet/apple/mace.c out_le32(&rd->control, ((RUN|WAKE) << 16) | (RUN|WAKE)); rd 1279 drivers/net/ethernet/hisilicon/hns/hns_enet.c struct hns_nic_ring_data *rd; rd 1285 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd = &priv->ring_data[i]; rd 1287 drivers/net/ethernet/hisilicon/hns/hns_enet.c if (rd->ring->irq_init_flag == RCB_IRQ_INITED) rd 1290 drivers/net/ethernet/hisilicon/hns/hns_enet.c snprintf(rd->ring->ring_name, RCB_RING_NAME_LEN, rd 1292 drivers/net/ethernet/hisilicon/hns/hns_enet.c (is_tx_ring(rd->ring) ? "tx" : "rx"), rd->queue_index); rd 1294 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->ring->ring_name[RCB_RING_NAME_LEN - 1] = '\0'; rd 1296 drivers/net/ethernet/hisilicon/hns/hns_enet.c ret = request_irq(rd->ring->irq, rd 1297 drivers/net/ethernet/hisilicon/hns/hns_enet.c hns_irq_handle, 0, rd->ring->ring_name, rd); rd 1300 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->ring->irq); rd 1303 drivers/net/ethernet/hisilicon/hns/hns_enet.c disable_irq(rd->ring->irq); rd 1306 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->ring, &rd->mask); rd 1309 drivers/net/ethernet/hisilicon/hns/hns_enet.c irq_set_affinity_hint(rd->ring->irq, rd 1310 drivers/net/ethernet/hisilicon/hns/hns_enet.c &rd->mask); rd 1312 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->ring->irq_init_flag = RCB_IRQ_INITED; rd 1619 drivers/net/ethernet/hisilicon/hns/hns_enet.c struct hns_nic_ring_data *rd; rd 1682 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd = &tx_ring_data(priv, skb->queue_mapping); rd 1683 drivers/net/ethernet/hisilicon/hns/hns_enet.c hns_nic_net_xmit_hw(ndev, skb, rd); rd 1689 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd = &rx_ring_data(priv, i); rd 1690 drivers/net/ethernet/hisilicon/hns/hns_enet.c if (rd->poll_one(rd, fetch_num, rd 1699 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd = &tx_ring_data(priv, rd 1701 drivers/net/ethernet/hisilicon/hns/hns_enet.c if (rd->poll_one(rd, fetch_num, NULL)) rd 2104 drivers/net/ethernet/hisilicon/hns/hns_enet.c struct hns_nic_ring_data *rd; rd 2120 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd = &priv->ring_data[i]; rd 2121 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->queue_index = i; rd 2122 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->ring = &h->qs[i]->tx_ring; rd 2123 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->poll_one = hns_nic_tx_poll_one; rd 2124 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->fini_process = is_ver1 ? hns_nic_tx_fini_pro : rd 2127 drivers/net/ethernet/hisilicon/hns/hns_enet.c netif_napi_add(priv->netdev, &rd->napi, rd 2129 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->ring->irq_init_flag = RCB_IRQ_NOT_INITED; rd 2132 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd = &priv->ring_data[i]; rd 2133 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->queue_index = i - h->q_num; rd 2134 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->ring = &h->qs[i - h->q_num]->rx_ring; rd 2135 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->poll_one = hns_nic_rx_poll_one; rd 2136 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->ex_process = hns_nic_rx_up_pro; rd 2137 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->fini_process = is_ver1 ? hns_nic_rx_fini_pro : rd 2140 drivers/net/ethernet/hisilicon/hns/hns_enet.c netif_napi_add(priv->netdev, &rd->napi, rd 2142 drivers/net/ethernet/hisilicon/hns/hns_enet.c rd->ring->irq_init_flag = RCB_IRQ_NOT_INITED; rd 187 drivers/net/ethernet/korina.c struct dma_desc *rd) rd 189 drivers/net/ethernet/korina.c korina_start_dma(lp->rx_dma_regs, CPHYSADDR(rd)); rd 193 drivers/net/ethernet/korina.c struct dma_desc *rd) rd 195 drivers/net/ethernet/korina.c korina_chain_dma(lp->rx_dma_regs, CPHYSADDR(rd)); rd 354 drivers/net/ethernet/korina.c struct dma_desc *rd = &lp->rd_ring[lp->rx_next_done]; rd 360 drivers/net/ethernet/korina.c dma_cache_inv((u32)rd, sizeof(*rd)); rd 366 drivers/net/ethernet/korina.c devcs = rd->devcs; rd 368 drivers/net/ethernet/korina.c if ((KORINA_RBSIZE - (u32)DMA_COUNT(rd->control)) == 0) rd 425 drivers/net/ethernet/korina.c rd->devcs = 0; rd 429 drivers/net/ethernet/korina.c rd->ca = CPHYSADDR(skb_new->data); rd 431 drivers/net/ethernet/korina.c rd->ca = CPHYSADDR(skb->data); rd 433 drivers/net/ethernet/korina.c rd->control = DMA_COUNT(KORINA_RBSIZE) | rd 440 drivers/net/ethernet/korina.c dma_cache_wback((u32)rd, sizeof(*rd)); rd 441 drivers/net/ethernet/korina.c rd = &lp->rd_ring[lp->rx_next_done]; rd 452 drivers/net/ethernet/korina.c rd->devcs = 0; rd 454 drivers/net/ethernet/korina.c rd->ca = CPHYSADDR(skb->data); rd 455 drivers/net/ethernet/korina.c dma_cache_wback((u32)rd, sizeof(*rd)); rd 456 drivers/net/ethernet/korina.c korina_chain_rx(lp, rd); rd 438 drivers/net/ethernet/marvell/pxa168_eth.c u32 rd, u32 skip, int del) rd 453 drivers/net/ethernet/marvell/pxa168_eth.c | (skip << SKIP) | (rd << HASH_ENTRY_RECEIVE_DISCARD_BIT) rd 938 drivers/net/ethernet/marvell/skge.c struct skge_rx_desc *rd = e->desc; rd 947 drivers/net/ethernet/marvell/skge.c rd->dma_lo = lower_32_bits(map); rd 948 drivers/net/ethernet/marvell/skge.c rd->dma_hi = upper_32_bits(map); rd 950 drivers/net/ethernet/marvell/skge.c rd->csum1_start = ETH_HLEN; rd 951 drivers/net/ethernet/marvell/skge.c rd->csum2_start = ETH_HLEN; rd 952 drivers/net/ethernet/marvell/skge.c rd->csum1 = 0; rd 953 drivers/net/ethernet/marvell/skge.c rd->csum2 = 0; rd 957 drivers/net/ethernet/marvell/skge.c rd->control = BMU_OWN | BMU_STF | BMU_IRQ_EOF | BMU_TCP_CHECK | bufsize; rd 969 drivers/net/ethernet/marvell/skge.c struct skge_rx_desc *rd = e->desc; rd 971 drivers/net/ethernet/marvell/skge.c rd->csum2 = 0; rd 972 drivers/net/ethernet/marvell/skge.c rd->csum2_start = ETH_HLEN; rd 976 drivers/net/ethernet/marvell/skge.c rd->control = BMU_OWN | BMU_STF | BMU_IRQ_EOF | BMU_TCP_CHECK | size; rd 989 drivers/net/ethernet/marvell/skge.c struct skge_rx_desc *rd = e->desc; rd 990 drivers/net/ethernet/marvell/skge.c rd->control = 0; rd 3206 drivers/net/ethernet/marvell/skge.c struct skge_rx_desc *rd = e->desc; rd 3211 drivers/net/ethernet/marvell/skge.c control = rd->control; rd 3215 drivers/net/ethernet/marvell/skge.c skb = skge_rx_get(dev, e, control, rd->status, rd->csum2); rd 1359 drivers/net/ethernet/micrel/ks8851.c unsigned rd; rd 1361 drivers/net/ethernet/micrel/ks8851.c rd = ks8851_rdreg16(ks, KS_MBIR); rd 1363 drivers/net/ethernet/micrel/ks8851.c if ((rd & both_done) != both_done) { rd 1368 drivers/net/ethernet/micrel/ks8851.c if (rd & MBIR_TXMBFA) { rd 1373 drivers/net/ethernet/micrel/ks8851.c if (rd & MBIR_RXMBFA) { rd 1132 drivers/net/ethernet/micrel/ks8851_mll.c unsigned rd; rd 1134 drivers/net/ethernet/micrel/ks8851_mll.c rd = ks_rdreg16(ks, KS_MBIR); rd 1136 drivers/net/ethernet/micrel/ks8851_mll.c if ((rd & both_done) != both_done) { rd 1141 drivers/net/ethernet/micrel/ks8851_mll.c if (rd & MBIR_TXMBFA) { rd 1146 drivers/net/ethernet/micrel/ks8851_mll.c if (rd & MBIR_RXMBFA) { rd 31 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c u32 rd[4]; rd 1310 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c ms->rd[0] = QLCNIC_MS_RDDATA_LO; rd 1312 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c ms->rd[1] = QLCNIC_MS_RDDATA_HI; rd 1315 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c ms->rd[2] = QLCNIC_MS_RDDATA_ULO; rd 1316 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c ms->rd[3] = QLCNIC_MS_RDDATA_UHI; rd 1319 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c ms->rd[0] = QLCNIC_MS_RDDATA_ULO; rd 1321 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c ms->rd[1] = QLCNIC_MS_RDDATA_UHI; rd 1324 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c ms->rd[2] = QLCNIC_MS_RDDATA_LO; rd 1325 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c ms->rd[3] = QLCNIC_MS_RDDATA_HI; rd 1377 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c qlcnic_ind_wr(adapter, ms.wd[0], qlcnic_ind_rd(adapter, ms.rd[0])); rd 1378 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c qlcnic_ind_wr(adapter, ms.wd[1], qlcnic_ind_rd(adapter, ms.rd[1])); rd 1452 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c temp = qlcnic_ind_rd(adapter, ms.rd[3]); rd 1454 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c val |= qlcnic_ind_rd(adapter, ms.rd[2]); rd 341 drivers/net/ethernet/seeq/sgiseeq.c struct sgiseeq_rx_desc *rd; rd 349 drivers/net/ethernet/seeq/sgiseeq.c rd = &sp->rx_desc[sp->rx_new]; rd 350 drivers/net/ethernet/seeq/sgiseeq.c dma_sync_desc_cpu(dev, rd); rd 351 drivers/net/ethernet/seeq/sgiseeq.c while (!(rd->rdma.cntinfo & HPCDMA_OWN)) { rd 352 drivers/net/ethernet/seeq/sgiseeq.c len = PKT_BUF_SZ - (rd->rdma.cntinfo & HPCDMA_BCNT) - 3; rd 353 drivers/net/ethernet/seeq/sgiseeq.c dma_unmap_single(dev->dev.parent, rd->rdma.pbuf, rd 355 drivers/net/ethernet/seeq/sgiseeq.c pkt_status = rd->skb->data[len]; rd 359 drivers/net/ethernet/seeq/sgiseeq.c if (!ether_addr_equal(rd->skb->data + 6, dev->dev_addr)) { rd 361 drivers/net/ethernet/seeq/sgiseeq.c skb = rd->skb; rd 372 drivers/net/ethernet/seeq/sgiseeq.c skb_copy_to_linear_data(skb, rd->skb->data, len); rd 374 drivers/net/ethernet/seeq/sgiseeq.c newskb = rd->skb; rd 388 drivers/net/ethernet/seeq/sgiseeq.c newskb = rd->skb; rd 392 drivers/net/ethernet/seeq/sgiseeq.c newskb = rd->skb; rd 394 drivers/net/ethernet/seeq/sgiseeq.c rd->skb = newskb; rd 395 drivers/net/ethernet/seeq/sgiseeq.c rd->rdma.pbuf = dma_map_single(dev->dev.parent, rd 400 drivers/net/ethernet/seeq/sgiseeq.c rd->rdma.cntinfo = RCNTINFO_INIT; rd 402 drivers/net/ethernet/seeq/sgiseeq.c dma_sync_desc_dev(dev, rd); rd 403 drivers/net/ethernet/seeq/sgiseeq.c rd = &sp->rx_desc[sp->rx_new]; rd 404 drivers/net/ethernet/seeq/sgiseeq.c dma_sync_desc_cpu(dev, rd); rd 5892 drivers/net/ethernet/sun/niu.c u64 rd, wr, val; rd 5895 drivers/net/ethernet/sun/niu.c rd = nr64_ipp(IPP_DFIFO_RD_PTR); rd 5898 drivers/net/ethernet/sun/niu.c while (--limit >= 0 && (rd != wr)) { rd 5899 drivers/net/ethernet/sun/niu.c rd = nr64_ipp(IPP_DFIFO_RD_PTR); rd 5903 drivers/net/ethernet/sun/niu.c (rd != 0 && wr != 1)) { rd 1516 drivers/net/ethernet/via/via-velocity.c struct rx_desc *rd = &(vptr->rx.ring[idx]); rd 1536 drivers/net/ethernet/via/via-velocity.c *((u32 *) & (rd->rdesc0)) = 0; rd 1537 drivers/net/ethernet/via/via-velocity.c rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN; rd 1538 drivers/net/ethernet/via/via-velocity.c rd->pa_low = cpu_to_le32(rd_info->skb_dma); rd 1539 drivers/net/ethernet/via/via-velocity.c rd->pa_high = 0; rd 1549 drivers/net/ethernet/via/via-velocity.c struct rx_desc *rd = vptr->rx.ring + dirty; rd 1552 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc0.len & OWNED_BY_NIC) rd 1587 drivers/net/ethernet/via/via-velocity.c struct rx_desc *rd = vptr->rx.ring + i; rd 1589 drivers/net/ethernet/via/via-velocity.c memset(rd, 0, sizeof(*rd)); rd 1956 drivers/net/ethernet/via/via-velocity.c static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb) rd 1960 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc1.CSM & CSM_IPKT) { rd 1961 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc1.CSM & CSM_IPOK) { rd 1962 drivers/net/ethernet/via/via-velocity.c if ((rd->rdesc1.CSM & CSM_TCPKT) || rd 1963 drivers/net/ethernet/via/via-velocity.c (rd->rdesc1.CSM & CSM_UDPKT)) { rd 1964 drivers/net/ethernet/via/via-velocity.c if (!(rd->rdesc1.CSM & CSM_TUPOK)) rd 2033 drivers/net/ethernet/via/via-velocity.c struct rx_desc *rd = &(vptr->rx.ring[idx]); rd 2034 drivers/net/ethernet/via/via-velocity.c int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff; rd 2037 drivers/net/ethernet/via/via-velocity.c if (unlikely(rd->rdesc0.RSR & (RSR_STP | RSR_EDP | RSR_RL))) { rd 2038 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) rd 2044 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc0.RSR & RSR_MAR) rd 2052 drivers/net/ethernet/via/via-velocity.c velocity_rx_csum(rd, skb); rd 2067 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc0.RSR & RSR_DETAG) { rd 2068 drivers/net/ethernet/via/via-velocity.c u16 vid = swab16(le16_to_cpu(rd->rdesc1.PQTAG)); rd 2095 drivers/net/ethernet/via/via-velocity.c struct rx_desc *rd = vptr->rx.ring + rd_curr; rd 2100 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc0.len & OWNED_BY_NIC) rd 2108 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) { rd 2112 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc0.RSR & RSR_CRC) rd 2114 drivers/net/ethernet/via/via-velocity.c if (rd->rdesc0.RSR & RSR_FAE) rd 2120 drivers/net/ethernet/via/via-velocity.c rd->size |= RX_INTEN; rd 444 drivers/net/hamradio/hdlcdrv.c s->hdlcrx.hbuf.rd = s->hdlcrx.hbuf.wr = 0; rd 448 drivers/net/hamradio/hdlcdrv.c s->hdlctx.hbuf.rd = s->hdlctx.hbuf.wr = 0; rd 576 drivers/net/hamradio/hdlcdrv.c if (s->bitbuf_channel.rd == s->bitbuf_channel.wr) rd 579 drivers/net/hamradio/hdlcdrv.c s->bitbuf_channel.buffer[s->bitbuf_channel.rd]; rd 580 drivers/net/hamradio/hdlcdrv.c s->bitbuf_channel.rd = (s->bitbuf_channel.rd+1) % rd 589 drivers/net/hamradio/hdlcdrv.c if (s->bitbuf_hdlc.rd == s->bitbuf_hdlc.wr) rd 592 drivers/net/hamradio/hdlcdrv.c s->bitbuf_hdlc.buffer[s->bitbuf_hdlc.rd]; rd 593 drivers/net/hamradio/hdlcdrv.c s->bitbuf_hdlc.rd = (s->bitbuf_hdlc.rd+1) % rd 641 drivers/net/hamradio/hdlcdrv.c s->hdlcrx.hbuf.rd = s->hdlcrx.hbuf.wr = 0; rd 646 drivers/net/hamradio/hdlcdrv.c s->hdlctx.hbuf.rd = s->hdlctx.hbuf.wr = 0; rd 656 drivers/net/hamradio/hdlcdrv.c s->bitbuf_channel.rd = s->bitbuf_channel.wr = 0; rd 659 drivers/net/hamradio/hdlcdrv.c s->bitbuf_hdlc.rd = s->bitbuf_hdlc.wr = 0; rd 27 drivers/net/phy/mdio-xgene.c void __iomem *addr, *rd, *cmd, *cmd_done; rd 32 drivers/net/phy/mdio-xgene.c rd = pdata->mac_csr_addr + MAC_READ_REG_OFFSET; rd 44 drivers/net/phy/mdio-xgene.c rd_data = ioread32(rd); rd 334 drivers/net/vxlan.c struct vxlan_rdst *rd, int type) rd 344 drivers/net/vxlan.c err = vxlan_fdb_info(skb, vxlan, fdb, 0, 0, type, 0, rd); rd 361 drivers/net/vxlan.c const struct vxlan_rdst *rd, rd 367 drivers/net/vxlan.c fdb_info->remote_ip = rd->remote_ip; rd 368 drivers/net/vxlan.c fdb_info->remote_port = rd->remote_port; rd 369 drivers/net/vxlan.c fdb_info->remote_vni = rd->remote_vni; rd 370 drivers/net/vxlan.c fdb_info->remote_ifindex = rd->remote_ifindex; rd 373 drivers/net/vxlan.c fdb_info->offloaded = rd->offloaded; rd 379 drivers/net/vxlan.c struct vxlan_rdst *rd, rd 387 drivers/net/vxlan.c if (WARN_ON(!rd)) rd 392 drivers/net/vxlan.c vxlan_fdb_switchdev_notifier_info(vxlan, fdb, rd, NULL, &info); rd 399 drivers/net/vxlan.c struct vxlan_rdst *rd, int type, bool swdev_notify, rd 407 drivers/net/vxlan.c err = vxlan_fdb_switchdev_call_notifiers(vxlan, fdb, rd, rd 413 drivers/net/vxlan.c vxlan_fdb_switchdev_call_notifiers(vxlan, fdb, rd, rd 419 drivers/net/vxlan.c __vxlan_fdb_notify(vxlan, fdb, rd, type); rd 524 drivers/net/vxlan.c struct vxlan_rdst *rd; rd 526 drivers/net/vxlan.c list_for_each_entry(rd, &f->remotes, list) { rd 527 drivers/net/vxlan.c if (vxlan_addr_equal(&rd->remote_ip, ip) && rd 528 drivers/net/vxlan.c rd->remote_port == port && rd 529 drivers/net/vxlan.c rd->remote_vni == vni && rd 530 drivers/net/vxlan.c rd->remote_ifindex == ifindex) rd 531 drivers/net/vxlan.c return rd; rd 649 drivers/net/vxlan.c struct vxlan_rdst *rd; rd 651 drivers/net/vxlan.c rd = vxlan_fdb_find_rdst(f, ip, port, vni, ifindex); rd 652 drivers/net/vxlan.c if (rd) rd 655 drivers/net/vxlan.c rd = list_first_entry_or_null(&f->remotes, struct vxlan_rdst, list); rd 656 drivers/net/vxlan.c if (!rd) rd 659 drivers/net/vxlan.c *oldrd = *rd; rd 660 drivers/net/vxlan.c dst_cache_reset(&rd->dst_cache); rd 661 drivers/net/vxlan.c rd->remote_ip = *ip; rd 662 drivers/net/vxlan.c rd->remote_port = port; rd 663 drivers/net/vxlan.c rd->remote_vni = vni; rd 664 drivers/net/vxlan.c rd->remote_ifindex = ifindex; rd 665 drivers/net/vxlan.c rd->offloaded = false; rd 674 drivers/net/vxlan.c struct vxlan_rdst *rd; rd 676 drivers/net/vxlan.c rd = vxlan_fdb_find_rdst(f, ip, port, vni, ifindex); rd 677 drivers/net/vxlan.c if (rd) rd 680 drivers/net/vxlan.c rd = kmalloc(sizeof(*rd), GFP_ATOMIC); rd 681 drivers/net/vxlan.c if (rd == NULL) rd 684 drivers/net/vxlan.c if (dst_cache_init(&rd->dst_cache, GFP_ATOMIC)) { rd 685 drivers/net/vxlan.c kfree(rd); rd 689 drivers/net/vxlan.c rd->remote_ip = *ip; rd 690 drivers/net/vxlan.c rd->remote_port = port; rd 691 drivers/net/vxlan.c rd->offloaded = false; rd 692 drivers/net/vxlan.c rd->remote_vni = vni; rd 693 drivers/net/vxlan.c rd->remote_ifindex = ifindex; rd 695 drivers/net/vxlan.c list_add_tail_rcu(&rd->list, &f->remotes); rd 697 drivers/net/vxlan.c *rdp = rd; rd 829 drivers/net/vxlan.c struct vxlan_rdst *rd = NULL; rd 842 drivers/net/vxlan.c rc = vxlan_fdb_append(f, ip, port, vni, ifindex, &rd); rd 855 drivers/net/vxlan.c struct vxlan_rdst *rd, *nd; rd 857 drivers/net/vxlan.c list_for_each_entry_safe(rd, nd, &f->remotes, list) { rd 858 drivers/net/vxlan.c dst_cache_destroy(&rd->dst_cache); rd 859 drivers/net/vxlan.c kfree(rd); rd 874 drivers/net/vxlan.c struct vxlan_rdst *rd; rd 880 drivers/net/vxlan.c list_for_each_entry(rd, &f->remotes, list) rd 881 drivers/net/vxlan.c vxlan_fdb_notify(vxlan, f, rd, RTM_DELNEIGH, rd 890 drivers/net/vxlan.c struct vxlan_rdst *rd = container_of(head, struct vxlan_rdst, rcu); rd 892 drivers/net/vxlan.c dst_cache_destroy(&rd->dst_cache); rd 893 drivers/net/vxlan.c kfree(rd); rd 906 drivers/net/vxlan.c struct vxlan_rdst *rd = NULL; rd 943 drivers/net/vxlan.c rc = vxlan_fdb_append(f, ip, port, vni, ifindex, &rd); rd 954 drivers/net/vxlan.c if (rd == NULL) rd 955 drivers/net/vxlan.c rd = first_remote_rtnl(f); rd 957 drivers/net/vxlan.c err = vxlan_fdb_notify(vxlan, f, rd, RTM_NEWNEIGH, rd 967 drivers/net/vxlan.c *rd = oldrd; rd 969 drivers/net/vxlan.c list_del_rcu(&rd->list); rd 970 drivers/net/vxlan.c call_rcu(&rd->rcu, vxlan_dst_free); rd 1044 drivers/net/vxlan.c struct vxlan_rdst *rd, bool swdev_notify) rd 1046 drivers/net/vxlan.c list_del_rcu(&rd->list); rd 1047 drivers/net/vxlan.c vxlan_fdb_notify(vxlan, f, rd, RTM_DELNEIGH, swdev_notify, NULL); rd 1048 drivers/net/vxlan.c call_rcu(&rd->rcu, vxlan_dst_free); rd 1163 drivers/net/vxlan.c struct vxlan_rdst *rd = NULL; rd 1171 drivers/net/vxlan.c rd = vxlan_fdb_find_rdst(f, &ip, port, vni, ifindex); rd 1172 drivers/net/vxlan.c if (!rd) rd 1179 drivers/net/vxlan.c if (rd && !list_is_singular(&f->remotes)) { rd 1180 drivers/net/vxlan.c vxlan_fdb_dst_destroy(vxlan, f, rd, swdev_notify); rd 1229 drivers/net/vxlan.c struct vxlan_rdst *rd; rd 1231 drivers/net/vxlan.c list_for_each_entry_rcu(rd, &f->remotes, list) { rd 1239 drivers/net/vxlan.c NLM_F_MULTI, rd); rd 1352 drivers/net/wimax/i2400m/rx.c struct i2400m_roq_log *rd; rd 1361 drivers/net/wimax/i2400m/rx.c rd = kcalloc(I2400M_RO_CIN + 1, sizeof(*i2400m->rx_roq[0].log), rd 1363 drivers/net/wimax/i2400m/rx.c if (rd == NULL) { rd 1370 drivers/net/wimax/i2400m/rx.c i2400m->rx_roq[itr].log = &rd[itr]; rd 8613 drivers/net/wireless/ath/ath10k/mac.c static int ath10k_mac_get_wrdd_regulatory(struct ath10k *ar, u16 *rd) rd 8652 drivers/net/wireless/ath/ath10k/mac.c *rd = ath_regd_find_country_by_name(alpha2); rd 8653 drivers/net/wireless/ath/ath10k/mac.c if (*rd == 0xffff) rd 8656 drivers/net/wireless/ath/ath10k/mac.c *rd |= COUNTRY_ERD_FLAG; rd 8663 drivers/net/wireless/ath/ath10k/mac.c u16 rd; rd 8665 drivers/net/wireless/ath/ath10k/mac.c ret = ath10k_mac_get_wrdd_regulatory(ar, &rd); rd 8669 drivers/net/wireless/ath/ath10k/mac.c rd = ar->hw_eeprom_rd; rd 8672 drivers/net/wireless/ath/ath10k/mac.c ar->ath_common.regulatory.current_rd = rd; rd 63 drivers/net/wireless/ath/ath10k/wmi-ops.h struct sk_buff *(*gen_pdev_set_rd)(struct ath10k *ar, u16 rd, u16 rd2g, rd 495 drivers/net/wireless/ath/ath10k/wmi-ops.h ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g, rd 504 drivers/net/wireless/ath/ath10k/wmi-ops.h skb = ar->wmi.ops->gen_pdev_set_rd(ar, rd, rd2g, rd5g, ctl2g, ctl5g, rd 1594 drivers/net/wireless/ath/ath10k/wmi-tlv.c u16 rd, u16 rd2g, u16 rd5g, rd 1610 drivers/net/wireless/ath/ath10k/wmi-tlv.c cmd->regd = __cpu_to_le32(rd); rd 6320 drivers/net/wireless/ath/ath10k/wmi.c ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g, rd 6332 drivers/net/wireless/ath/ath10k/wmi.c cmd->reg_domain = __cpu_to_le32(rd); rd 6340 drivers/net/wireless/ath/ath10k/wmi.c rd, rd2g, rd5g, ctl2g, ctl5g); rd 6345 drivers/net/wireless/ath/ath10k/wmi.c ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd 6357 drivers/net/wireless/ath/ath10k/wmi.c cmd->reg_domain = __cpu_to_le32(rd); rd 6366 drivers/net/wireless/ath/ath10k/wmi.c rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); rd 1071 drivers/net/wireless/ath/ath5k/debug.c struct ath5k_hw_all_rx_desc *rd = &ds->ud.ds_rx; rd 1076 drivers/net/wireless/ath/ath5k/debug.c rd->rx_ctl.rx_control_0, rd->rx_ctl.rx_control_1, rd 1077 drivers/net/wireless/ath/ath5k/debug.c rd->rx_stat.rx_status_0, rd->rx_stat.rx_status_1, rd 552 drivers/net/wireless/ath/regd.c u16 rd = ath_regd_get_eepromRD(reg); rd 555 drivers/net/wireless/ath/regd.c if (rd & COUNTRY_ERD_FLAG) { rd 557 drivers/net/wireless/ath/regd.c u16 cc = rd & ~COUNTRY_ERD_FLAG; rd 566 drivers/net/wireless/ath/regd.c if (rd != CTRY_DEFAULT) rd 570 drivers/net/wireless/ath/regd.c if (regDomainPairs[i].reg_domain == rd) rd 574 drivers/net/wireless/ath/regd.c "ath: invalid regulatory domain/country code 0x%x\n", rd); rd 605 drivers/net/wireless/ath/regd.c static u16 ath_regd_get_default_country(u16 rd) rd 607 drivers/net/wireless/ath/regd.c if (rd & COUNTRY_ERD_FLAG) { rd 609 drivers/net/wireless/ath/regd.c u16 cc = rd & ~COUNTRY_ERD_FLAG; rd 1853 drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c struct brcmf_skb_reorder_data *rd; rd 1910 drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c rd = (struct brcmf_skb_reorder_data *)skb->cb; rd 1911 drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c rd->reorder = data; rd 105 drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h struct brcmf_skb_reorder_data *rd; rd 107 drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h rd = (struct brcmf_skb_reorder_data *)skb->cb; rd 108 drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h return !!rd->reorder; rd 1334 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c struct brcmf_sdio_hdrinfo *rd, rd 1362 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c (roundup(len, bus->blocksize) != rd->len)) { rd 1366 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (type == BRCMF_SDIO_FT_SUB && len > rd->len) { rd 1370 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = len; rd 1377 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = 0; rd 1381 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT; rd 1382 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL && rd 1387 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = 0; rd 1390 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) { rd 1392 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = 0; rd 1395 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL && rd 1396 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->channel != SDPCM_EVENT_CHANNEL) { rd 1398 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = 0; rd 1401 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->dat_offset = brcmf_sdio_getdatoffset(header); rd 1402 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) { rd 1406 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = 0; rd 1409 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (rd->seq_num != rx_seq) { rd 1410 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num); rd 1412 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->seq_num = rx_seq; rd 1417 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT; rd 1418 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) { rd 1420 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (rd->channel != SDPCM_GLOM_CHANNEL) rd 1422 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len_nxtfrm = 0; rd 1826 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new; rd 1834 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c for (rd->seq_num = bus->rx_seq, rxleft = maxframes; rd 1836 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->seq_num++, rxleft--) { rd 1843 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c cnt = brcmf_sdio_rxglom(bus, rd->seq_num); rd 1845 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->seq_num += cnt - 1; rd 1850 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len_left = rd->len; rd 1853 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (!rd->len) { rd 1870 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd, rd 1879 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (rd->channel == SDPCM_CONTROL_CHANNEL) { rd 1881 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len, rd 1882 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->dat_offset); rd 1884 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = rd->len_nxtfrm << 4; rd 1885 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len_nxtfrm = 0; rd 1887 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->channel = SDPCM_EVENT_CHANNEL; rd 1891 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len_left = rd->len > BRCMF_FIRSTREAD ? rd 1892 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len - BRCMF_FIRSTREAD : 0; rd 1896 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c brcmf_sdio_pad(bus, &pad, &rd->len_left); rd 1898 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read + rd 1904 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c RETRYCHAN(rd->channel)); rd 1909 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c pkt_align(pkt, rd->len_left, bus->head_align); rd 1917 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len, rd->channel, ret); rd 1921 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c RETRYCHAN(rd->channel)); rd 1932 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd_new.seq_num = rd->seq_num; rd 1936 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = 0; rd 1943 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (rd->len != roundup(rd_new.len, 16)) { rd 1945 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len, rd 1947 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = 0; rd 1954 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len_nxtfrm = rd_new.len_nxtfrm; rd 1955 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->channel = rd_new.channel; rd 1956 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->dat_offset = rd_new.dat_offset; rd 1968 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = 0; rd 1978 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c pkt->data, rd->len, "Rx Data:\n"); rd 1981 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c if (rd->channel == SDPCM_GLOM_CHANNEL) { rd 1984 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len); rd 1986 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c pkt->data, rd->len, rd 1988 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c __skb_trim(pkt, rd->len); rd 1999 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = rd->len_nxtfrm << 4; rd 2000 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len_nxtfrm = 0; rd 2002 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->channel = SDPCM_EVENT_CHANNEL; rd 2007 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c __skb_trim(pkt, rd->len); rd 2008 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c skb_pull(pkt, rd->dat_offset); rd 2012 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c else if (rd->channel == SDPCM_EVENT_CHANNEL) rd 2019 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len = rd->len_nxtfrm << 4; rd 2020 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->len_nxtfrm = 0; rd 2022 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->channel = SDPCM_EVENT_CHANNEL; rd 2033 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c rd->seq_num--; rd 2034 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c bus->rx_seq = rd->seq_num; rd 1154 drivers/net/wireless/quantenna/qtnfmac/cfg80211.c regdomain_is_known = isalpha(mac->rd->alpha2[0]) && rd 1155 drivers/net/wireless/quantenna/qtnfmac/cfg80211.c isalpha(mac->rd->alpha2[1]); rd 1160 drivers/net/wireless/quantenna/qtnfmac/cfg80211.c if (mac->rd->alpha2[0] == '9' && mac->rd->alpha2[1] == '9') { rd 1163 drivers/net/wireless/quantenna/qtnfmac/cfg80211.c wiphy_apply_custom_regulatory(wiphy, mac->rd); rd 1189 drivers/net/wireless/quantenna/qtnfmac/cfg80211.c ret = regulatory_set_wiphy_regd(wiphy, mac->rd); rd 1191 drivers/net/wireless/quantenna/qtnfmac/cfg80211.c ret = regulatory_hint(wiphy, mac->rd->alpha2); rd 1016 drivers/net/wireless/quantenna/qtnfmac/commands.c mac->rd = kzalloc(struct_size(mac->rd, reg_rules, resp->n_reg_rules), rd 1018 drivers/net/wireless/quantenna/qtnfmac/commands.c if (!mac->rd) rd 1021 drivers/net/wireless/quantenna/qtnfmac/commands.c mac->rd->n_reg_rules = resp->n_reg_rules; rd 1022 drivers/net/wireless/quantenna/qtnfmac/commands.c mac->rd->alpha2[0] = resp->alpha2[0]; rd 1023 drivers/net/wireless/quantenna/qtnfmac/commands.c mac->rd->alpha2[1] = resp->alpha2[1]; rd 1027 drivers/net/wireless/quantenna/qtnfmac/commands.c mac->rd->dfs_region = NL80211_DFS_FCC; rd 1030 drivers/net/wireless/quantenna/qtnfmac/commands.c mac->rd->dfs_region = NL80211_DFS_ETSI; rd 1033 drivers/net/wireless/quantenna/qtnfmac/commands.c mac->rd->dfs_region = NL80211_DFS_JP; rd 1037 drivers/net/wireless/quantenna/qtnfmac/commands.c mac->rd->dfs_region = NL80211_DFS_UNSET; rd 1174 drivers/net/wireless/quantenna/qtnfmac/commands.c rule = &mac->rd->reg_rules[rule_idx++]; rd 531 drivers/net/wireless/quantenna/qtnfmac/core.c kfree(mac->rd); rd 532 drivers/net/wireless/quantenna/qtnfmac/core.c mac->rd = NULL; rd 117 drivers/net/wireless/quantenna/qtnfmac/core.h struct ieee80211_regdomain *rd; rd 177 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c struct rt2x00_async_read_data *rd = urb->context; rd 178 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c if (rd->callback(rd->rt2x00dev, urb->status, le32_to_cpu(rd->reg))) { rd 179 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c usb_anchor_urb(urb, rd->rt2x00dev->anchor); rd 182 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c kfree(rd); rd 185 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c kfree(rd); rd 194 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c struct rt2x00_async_read_data *rd; rd 196 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rd = kmalloc(sizeof(*rd), GFP_ATOMIC); rd 197 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c if (!rd) rd 202 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c kfree(rd); rd 206 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rd->rt2x00dev = rt2x00dev; rd 207 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rd->callback = callback; rd 208 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rd->cr.bRequestType = USB_VENDOR_REQUEST_IN; rd 209 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rd->cr.bRequest = USB_MULTI_READ; rd 210 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rd->cr.wValue = 0; rd 211 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rd->cr.wIndex = cpu_to_le16(offset); rd 212 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rd->cr.wLength = cpu_to_le16(sizeof(u32)); rd 215 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c (unsigned char *)(&rd->cr), &rd->reg, sizeof(rd->reg), rd 216 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rt2x00usb_register_read_async_cb, rd); rd 220 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c kfree(rd); rd 1649 drivers/net/wireless/zydas/zd1211rw/zd_usb.c struct reg_data *rd = ®s->regs[i]; rd 1650 drivers/net/wireless/zydas/zd1211rw/zd_usb.c if (rd->addr != req->addr[i]) { rd 1653 drivers/net/wireless/zydas/zd1211rw/zd_usb.c le16_to_cpu(rd->addr), rd 1687 drivers/net/wireless/zydas/zd1211rw/zd_usb.c struct reg_data *rd = ®s->regs[i]; rd 1688 drivers/net/wireless/zydas/zd1211rw/zd_usb.c values[i] = le16_to_cpu(rd->value); rd 235 drivers/of/dynamic.c struct of_reconfig_data rd; rd 238 drivers/of/dynamic.c memset(&rd, 0, sizeof(rd)); rd 239 drivers/of/dynamic.c rd.dn = np; rd 249 drivers/of/dynamic.c of_reconfig_notify(OF_RECONFIG_ATTACH_NODE, &rd); rd 287 drivers/of/dynamic.c struct of_reconfig_data rd; rd 291 drivers/of/dynamic.c memset(&rd, 0, sizeof(rd)); rd 292 drivers/of/dynamic.c rd.dn = np; rd 302 drivers/of/dynamic.c of_reconfig_notify(OF_RECONFIG_DETACH_NODE, &rd); rd 534 drivers/of/dynamic.c struct of_reconfig_data rd; rd 546 drivers/of/dynamic.c memset(&rd, 0, sizeof(rd)); rd 547 drivers/of/dynamic.c rd.dn = ce->np; rd 548 drivers/of/dynamic.c ret = of_reconfig_notify(ce->action, &rd); rd 315 drivers/of/of_reserved_mem.c struct rmem_assigned_device *rd; rd 338 drivers/of/of_reserved_mem.c rd = kmalloc(sizeof(struct rmem_assigned_device), GFP_KERNEL); rd 339 drivers/of/of_reserved_mem.c if (!rd) rd 344 drivers/of/of_reserved_mem.c rd->dev = dev; rd 345 drivers/of/of_reserved_mem.c rd->rmem = rmem; rd 348 drivers/of/of_reserved_mem.c list_add(&rd->list, &of_rmem_assigned_device_list); rd 353 drivers/of/of_reserved_mem.c kfree(rd); rd 369 drivers/of/of_reserved_mem.c struct rmem_assigned_device *rd; rd 373 drivers/of/of_reserved_mem.c list_for_each_entry(rd, &of_rmem_assigned_device_list, list) { rd 374 drivers/of/of_reserved_mem.c if (rd->dev == dev) { rd 375 drivers/of/of_reserved_mem.c rmem = rd->rmem; rd 376 drivers/of/of_reserved_mem.c list_del(&rd->list); rd 377 drivers/of/of_reserved_mem.c kfree(rd); rd 660 drivers/of/platform.c struct of_reconfig_data *rd = arg; rd 664 drivers/of/platform.c switch (of_reconfig_get_state_change(action, rd)) { rd 667 drivers/of/platform.c if (!of_node_check_flag(rd->dn->parent, OF_POPULATED_BUS)) rd 671 drivers/of/platform.c if (of_node_check_flag(rd->dn, OF_POPULATED)) rd 675 drivers/of/platform.c pdev_parent = of_find_device_by_node(rd->dn->parent); rd 676 drivers/of/platform.c pdev = of_platform_device_create(rd->dn, NULL, rd 682 drivers/of/platform.c __func__, rd->dn); rd 691 drivers/of/platform.c if (!of_node_check_flag(rd->dn, OF_POPULATED)) rd 695 drivers/of/platform.c pdev = of_find_device_by_node(rd->dn); rd 343 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-cmd-sent, 0x04), rd 351 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-rda-cmd-sent, 0x0c), rd 353 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(in-rd-collision, 0x0e), rd 358 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(mcu-rd-request, 0x13), rd 359 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(mcu-hp-rd-request, 0x14), rd 361 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(mcu-rd-proceed-all, 0x16), rd 362 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(mcu-rd-proceed-cancel, 0x17), rd 363 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(mcu-rd-response, 0x18), rd 364 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(mcu-rd-proceed-speculative-all, 0x19), rd 365 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(mcu-rd-proceed-speculative-cancel, 0x1a), rd 437 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-req-buf-alloc-rd, 0x02), rd 442 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-cp-rd-req, 0x07), rd 445 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(ba-rd-req, 0x0a), rd 447 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-rd-shared-req-issued, 0x10), rd 448 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-rd-exclusive-req-issued, 0x11), rd 454 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-ptl-rd-req, 0x17), rd 460 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-rd-shared-snoop, 0x21), rd 461 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-rd-shared-snoop-hit, 0x22), rd 462 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-rd-exclusive-snoop, 0x23), rd 463 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-rd-exclusive-snoop-hit, 0x24), rd 464 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-rd-wr-invalid-snoop, 0x25), rd 465 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-rd-wr-invalid-snoop-hit, 0x26), rd 479 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-axi0-rd-req, 0x01), rd 481 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(pa-axi1-rd-req, 0x03), rd 484 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(ba-axi-rd-req, 0x08), rd 493 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-req-recv, 0x02), rd 494 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-req-recv-2, 0x03), rd 497 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-req-sent-to-mcu, 0x06), rd 498 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-req-sent-to-mcu-2, 0x07), rd 499 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-req-sent-to-spec-mcu, 0x08), rd 500 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-req-sent-to-spec-mcu-2, 0x09), rd 501 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(glbl-ack-recv-for-rd-sent-to-spec-mcu, 0x0a), rd 502 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(glbl-ack-go-recv-for-rd-sent-to-spec-mcu, 0x0b), rd 503 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(glbl-ack-nogo-recv-for-rd-sent-to-spec-mcu, 0x0c), rd 504 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(glbl-ack-go-recv-any-rd-req, 0x0d), rd 505 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(glbl-ack-go-recv-any-rd-req-2, 0x0e), rd 508 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-gack-recv, 0x11), rd 510 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(cancel-rd-gack, 0x13), rd 514 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(mcb-mcu-rd-intf-stall, 0x17), rd 515 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(csw-rd-intf-blocked, 0x18), rd 534 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-sent, 0x03), rd 542 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-rda-sent, 0x0b), rd 555 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-retry, 0x18), rd 572 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(rd-enq, 0x29), rd 95 drivers/powercap/intel_rapl_common.c void (*set_floor_freq)(struct rapl_domain *rd, bool mode); rd 131 drivers/powercap/intel_rapl_common.c static int rapl_read_data_raw(struct rapl_domain *rd, rd 134 drivers/powercap/intel_rapl_common.c static int rapl_write_data_raw(struct rapl_domain *rd, rd 137 drivers/powercap/intel_rapl_common.c static u64 rapl_unit_xlate(struct rapl_domain *rd, rd 154 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 161 drivers/powercap/intel_rapl_common.c rd = power_zone_to_rapl_domain(power_zone); rd 163 drivers/powercap/intel_rapl_common.c if (!rapl_read_data_raw(rd, ENERGY_COUNTER, true, &energy_now)) { rd 176 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd = power_zone_to_rapl_domain(pcd_dev); rd 178 drivers/powercap/intel_rapl_common.c *energy = rapl_unit_xlate(rd, ENERGY_UNIT, ENERGY_STATUS_MASK, 0); rd 184 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); rd 185 drivers/powercap/intel_rapl_common.c struct rapl_package *rp = rd->rp; rd 190 drivers/powercap/intel_rapl_common.c if (rd->id == RAPL_DOMAIN_PACKAGE) { rd 191 drivers/powercap/intel_rapl_common.c kfree(rd); rd 199 drivers/powercap/intel_rapl_common.c static int find_nr_power_limit(struct rapl_domain *rd) rd 204 drivers/powercap/intel_rapl_common.c if (rd->rpl[i].name) rd 213 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); rd 215 drivers/powercap/intel_rapl_common.c if (rd->state & DOMAIN_STATE_BIOS_LOCKED) rd 219 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, PL1_ENABLE, mode); rd 221 drivers/powercap/intel_rapl_common.c rapl_defaults->set_floor_freq(rd, mode); rd 229 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); rd 232 drivers/powercap/intel_rapl_common.c if (rd->state & DOMAIN_STATE_BIOS_LOCKED) { rd 237 drivers/powercap/intel_rapl_common.c if (rapl_read_data_raw(rd, PL1_ENABLE, true, &val)) { rd 296 drivers/powercap/intel_rapl_common.c static int contraint_to_pl(struct rapl_domain *rd, int cid) rd 301 drivers/powercap/intel_rapl_common.c if ((rd->rpl[i].name) && j++ == cid) { rd 314 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 320 drivers/powercap/intel_rapl_common.c rd = power_zone_to_rapl_domain(power_zone); rd 321 drivers/powercap/intel_rapl_common.c id = contraint_to_pl(rd, cid); rd 327 drivers/powercap/intel_rapl_common.c rp = rd->rp; rd 329 drivers/powercap/intel_rapl_common.c if (rd->state & DOMAIN_STATE_BIOS_LOCKED) { rd 331 drivers/powercap/intel_rapl_common.c "%s locked by BIOS, monitoring only\n", rd->name); rd 336 drivers/powercap/intel_rapl_common.c switch (rd->rpl[id].prim_id) { rd 338 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, POWER_LIMIT1, power_limit); rd 341 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, POWER_LIMIT2, power_limit); rd 356 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 363 drivers/powercap/intel_rapl_common.c rd = power_zone_to_rapl_domain(power_zone); rd 364 drivers/powercap/intel_rapl_common.c id = contraint_to_pl(rd, cid); rd 370 drivers/powercap/intel_rapl_common.c switch (rd->rpl[id].prim_id) { rd 381 drivers/powercap/intel_rapl_common.c if (rapl_read_data_raw(rd, prim, true, &val)) rd 395 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 400 drivers/powercap/intel_rapl_common.c rd = power_zone_to_rapl_domain(power_zone); rd 401 drivers/powercap/intel_rapl_common.c id = contraint_to_pl(rd, cid); rd 407 drivers/powercap/intel_rapl_common.c switch (rd->rpl[id].prim_id) { rd 409 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, TIME_WINDOW1, window); rd 412 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, TIME_WINDOW2, window); rd 426 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 432 drivers/powercap/intel_rapl_common.c rd = power_zone_to_rapl_domain(power_zone); rd 433 drivers/powercap/intel_rapl_common.c id = contraint_to_pl(rd, cid); rd 439 drivers/powercap/intel_rapl_common.c switch (rd->rpl[id].prim_id) { rd 441 drivers/powercap/intel_rapl_common.c ret = rapl_read_data_raw(rd, TIME_WINDOW1, true, &val); rd 444 drivers/powercap/intel_rapl_common.c ret = rapl_read_data_raw(rd, TIME_WINDOW2, true, &val); rd 462 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 465 drivers/powercap/intel_rapl_common.c rd = power_zone_to_rapl_domain(power_zone); rd 466 drivers/powercap/intel_rapl_common.c id = contraint_to_pl(rd, cid); rd 468 drivers/powercap/intel_rapl_common.c return rd->rpl[id].name; rd 475 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 481 drivers/powercap/intel_rapl_common.c rd = power_zone_to_rapl_domain(power_zone); rd 482 drivers/powercap/intel_rapl_common.c switch (rd->rpl[id].prim_id) { rd 493 drivers/powercap/intel_rapl_common.c if (rapl_read_data_raw(rd, prim, true, &val)) rd 517 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd = rp->domains; rd 525 drivers/powercap/intel_rapl_common.c rd->rp = rp; rd 526 drivers/powercap/intel_rapl_common.c rd->name = rapl_domain_names[i]; rd 527 drivers/powercap/intel_rapl_common.c rd->id = i; rd 528 drivers/powercap/intel_rapl_common.c rd->rpl[0].prim_id = PL1_ENABLE; rd 529 drivers/powercap/intel_rapl_common.c rd->rpl[0].name = pl1_name; rd 532 drivers/powercap/intel_rapl_common.c rd->rpl[1].prim_id = PL2_ENABLE; rd 533 drivers/powercap/intel_rapl_common.c rd->rpl[1].name = pl2_name; rd 537 drivers/powercap/intel_rapl_common.c rd->regs[j] = rp->priv->regs[i][j]; rd 540 drivers/powercap/intel_rapl_common.c rd->domain_energy_unit = rd 542 drivers/powercap/intel_rapl_common.c if (rd->domain_energy_unit) rd 544 drivers/powercap/intel_rapl_common.c rd->domain_energy_unit); rd 546 drivers/powercap/intel_rapl_common.c rd++; rd 550 drivers/powercap/intel_rapl_common.c static u64 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type type, rd 554 drivers/powercap/intel_rapl_common.c struct rapl_package *rp = rd->rp; rd 564 drivers/powercap/intel_rapl_common.c if (rd->domain_energy_unit) rd 565 drivers/powercap/intel_rapl_common.c units = rd->domain_energy_unit; rd 638 drivers/powercap/intel_rapl_common.c static int rapl_read_data_raw(struct rapl_domain *rd, rd 649 drivers/powercap/intel_rapl_common.c ra.reg = rd->regs[rp->id]; rd 653 drivers/powercap/intel_rapl_common.c cpu = rd->rp->lead_cpu; rd 656 drivers/powercap/intel_rapl_common.c if (prim == FW_LOCK && rd->rp->priv->limits[rd->id] == 2) { rd 662 drivers/powercap/intel_rapl_common.c *data = rd->rdd.primitives[prim]; rd 668 drivers/powercap/intel_rapl_common.c if (rd->rp->priv->read_raw(cpu, &ra)) { rd 676 drivers/powercap/intel_rapl_common.c *data = rapl_unit_xlate(rd, rp->unit, value, 0); rd 684 drivers/powercap/intel_rapl_common.c static int rapl_write_data_raw(struct rapl_domain *rd, rd 694 drivers/powercap/intel_rapl_common.c cpu = rd->rp->lead_cpu; rd 695 drivers/powercap/intel_rapl_common.c bits = rapl_unit_xlate(rd, rp->unit, value, 1); rd 701 drivers/powercap/intel_rapl_common.c ra.reg = rd->regs[rp->id]; rd 705 drivers/powercap/intel_rapl_common.c ret = rd->rp->priv->write_raw(cpu, &ra); rd 835 drivers/powercap/intel_rapl_common.c static void set_floor_freq_default(struct rapl_domain *rd, bool mode) rd 837 drivers/powercap/intel_rapl_common.c int nr_powerlimit = find_nr_power_limit(rd); rd 842 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, PL1_CLAMP, mode); rd 846 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, PL2_ENABLE, mode); rd 847 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, PL2_CLAMP, mode); rd 851 drivers/powercap/intel_rapl_common.c static void set_floor_freq_atom(struct rapl_domain *rd, bool enable) rd 1019 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 1027 drivers/powercap/intel_rapl_common.c for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { rd 1028 drivers/powercap/intel_rapl_common.c if (rd->id == RAPL_DOMAIN_PACKAGE) { rd 1029 drivers/powercap/intel_rapl_common.c nr_pl = find_nr_power_limit(rd); rd 1031 drivers/powercap/intel_rapl_common.c power_zone = powercap_register_zone(&rd->power_zone, rd 1033 drivers/powercap/intel_rapl_common.c NULL, &zone_ops[rd->id], nr_pl, rd 1051 drivers/powercap/intel_rapl_common.c for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { rd 1052 drivers/powercap/intel_rapl_common.c if (rd->id == RAPL_DOMAIN_PACKAGE) rd 1055 drivers/powercap/intel_rapl_common.c nr_pl = find_nr_power_limit(rd); rd 1056 drivers/powercap/intel_rapl_common.c power_zone = powercap_register_zone(&rd->power_zone, rd 1058 drivers/powercap/intel_rapl_common.c rd->name, rp->power_zone, rd 1059 drivers/powercap/intel_rapl_common.c &zone_ops[rd->id], nr_pl, rd 1064 drivers/powercap/intel_rapl_common.c rp->name, rd->name); rd 1076 drivers/powercap/intel_rapl_common.c while (--rd >= rp->domains) { rd 1077 drivers/powercap/intel_rapl_common.c pr_debug("unregister %s domain %s\n", rp->name, rd->name); rd 1079 drivers/powercap/intel_rapl_common.c &rd->power_zone); rd 1087 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 1104 drivers/powercap/intel_rapl_common.c rd = kzalloc(sizeof(*rd), GFP_KERNEL); rd 1105 drivers/powercap/intel_rapl_common.c if (!rd) rd 1108 drivers/powercap/intel_rapl_common.c rd->name = rapl_domain_names[RAPL_DOMAIN_PLATFORM]; rd 1109 drivers/powercap/intel_rapl_common.c rd->id = RAPL_DOMAIN_PLATFORM; rd 1110 drivers/powercap/intel_rapl_common.c rd->regs[RAPL_DOMAIN_REG_LIMIT] = rd 1112 drivers/powercap/intel_rapl_common.c rd->regs[RAPL_DOMAIN_REG_STATUS] = rd 1114 drivers/powercap/intel_rapl_common.c rd->rpl[0].prim_id = PL1_ENABLE; rd 1115 drivers/powercap/intel_rapl_common.c rd->rpl[0].name = pl1_name; rd 1116 drivers/powercap/intel_rapl_common.c rd->rpl[1].prim_id = PL2_ENABLE; rd 1117 drivers/powercap/intel_rapl_common.c rd->rpl[1].name = pl2_name; rd 1118 drivers/powercap/intel_rapl_common.c rd->rp = rapl_find_package_domain(0, priv); rd 1120 drivers/powercap/intel_rapl_common.c power_zone = powercap_register_zone(&rd->power_zone, priv->control_type, rd 1126 drivers/powercap/intel_rapl_common.c kfree(rd); rd 1130 drivers/powercap/intel_rapl_common.c priv->platform_rapl_domain = rd; rd 1184 drivers/powercap/intel_rapl_common.c static void rapl_detect_powerlimit(struct rapl_domain *rd) rd 1190 drivers/powercap/intel_rapl_common.c if (!rapl_read_data_raw(rd, FW_LOCK, false, &val64)) { rd 1193 drivers/powercap/intel_rapl_common.c rd->rp->name, rd->name); rd 1194 drivers/powercap/intel_rapl_common.c rd->state |= DOMAIN_STATE_BIOS_LOCKED; rd 1199 drivers/powercap/intel_rapl_common.c int prim = rd->rpl[i].prim_id; rd 1201 drivers/powercap/intel_rapl_common.c if (rapl_read_data_raw(rd, prim, false, &val64)) rd 1202 drivers/powercap/intel_rapl_common.c rd->rpl[i].name = NULL; rd 1211 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 1235 drivers/powercap/intel_rapl_common.c for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) rd 1236 drivers/powercap/intel_rapl_common.c rapl_detect_powerlimit(rd); rd 1244 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd, *rd_package = NULL; rd 1248 drivers/powercap/intel_rapl_common.c for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { rd 1249 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, PL1_ENABLE, 0); rd 1250 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, PL1_CLAMP, 0); rd 1251 drivers/powercap/intel_rapl_common.c if (find_nr_power_limit(rd) > 1) { rd 1252 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, PL2_ENABLE, 0); rd 1253 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, PL2_CLAMP, 0); rd 1255 drivers/powercap/intel_rapl_common.c if (rd->id == RAPL_DOMAIN_PACKAGE) { rd 1256 drivers/powercap/intel_rapl_common.c rd_package = rd; rd 1260 drivers/powercap/intel_rapl_common.c rp->name, rd->name); rd 1262 drivers/powercap/intel_rapl_common.c &rd->power_zone); rd 1337 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 1344 drivers/powercap/intel_rapl_common.c rd = power_zone_to_rapl_domain(rp->power_zone); rd 1345 drivers/powercap/intel_rapl_common.c nr_pl = find_nr_power_limit(rd); rd 1347 drivers/powercap/intel_rapl_common.c switch (rd->rpl[i].prim_id) { rd 1349 drivers/powercap/intel_rapl_common.c ret = rapl_read_data_raw(rd, rd 1351 drivers/powercap/intel_rapl_common.c &rd->rpl[i].last_power_limit); rd 1353 drivers/powercap/intel_rapl_common.c rd->rpl[i].last_power_limit = 0; rd 1356 drivers/powercap/intel_rapl_common.c ret = rapl_read_data_raw(rd, rd 1358 drivers/powercap/intel_rapl_common.c &rd->rpl[i].last_power_limit); rd 1360 drivers/powercap/intel_rapl_common.c rd->rpl[i].last_power_limit = 0; rd 1371 drivers/powercap/intel_rapl_common.c struct rapl_domain *rd; rd 1378 drivers/powercap/intel_rapl_common.c rd = power_zone_to_rapl_domain(rp->power_zone); rd 1379 drivers/powercap/intel_rapl_common.c nr_pl = find_nr_power_limit(rd); rd 1381 drivers/powercap/intel_rapl_common.c switch (rd->rpl[i].prim_id) { rd 1383 drivers/powercap/intel_rapl_common.c if (rd->rpl[i].last_power_limit) rd 1384 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, POWER_LIMIT1, rd 1385 drivers/powercap/intel_rapl_common.c rd->rpl[i].last_power_limit); rd 1388 drivers/powercap/intel_rapl_common.c if (rd->rpl[i].last_power_limit) rd 1389 drivers/powercap/intel_rapl_common.c rapl_write_data_raw(rd, POWER_LIMIT2, rd 1390 drivers/powercap/intel_rapl_common.c rd->rpl[i].last_power_limit); rd 66 drivers/reset/reset-pistachio.c struct pistachio_reset_data *rd; rd 70 drivers/reset/reset-pistachio.c rd = container_of(rcdev, struct pistachio_reset_data, rcdev); rd 76 drivers/reset/reset-pistachio.c return regmap_update_bits(rd->periph_regs, PISTACHIO_SOFT_RESET, rd 83 drivers/reset/reset-pistachio.c struct pistachio_reset_data *rd; rd 87 drivers/reset/reset-pistachio.c rd = container_of(rcdev, struct pistachio_reset_data, rcdev); rd 93 drivers/reset/reset-pistachio.c return regmap_update_bits(rd->periph_regs, PISTACHIO_SOFT_RESET, rd 104 drivers/reset/reset-pistachio.c struct pistachio_reset_data *rd; rd 108 drivers/reset/reset-pistachio.c rd = devm_kzalloc(dev, sizeof(*rd), GFP_KERNEL); rd 109 drivers/reset/reset-pistachio.c if (!rd) rd 112 drivers/reset/reset-pistachio.c rd->periph_regs = syscon_node_to_regmap(np->parent); rd 113 drivers/reset/reset-pistachio.c if (IS_ERR(rd->periph_regs)) rd 114 drivers/reset/reset-pistachio.c return PTR_ERR(rd->periph_regs); rd 116 drivers/reset/reset-pistachio.c rd->rcdev.owner = THIS_MODULE; rd 117 drivers/reset/reset-pistachio.c rd->rcdev.nr_resets = PISTACHIO_RESET_MAX + 1; rd 118 drivers/reset/reset-pistachio.c rd->rcdev.ops = &pistachio_reset_ops; rd 119 drivers/reset/reset-pistachio.c rd->rcdev.of_node = np; rd 121 drivers/reset/reset-pistachio.c return devm_reset_controller_register(dev, &rd->rcdev); rd 1065 drivers/s390/net/ctcm_fsms.c int rd = CHANNEL_DIRECTION(ch->flags); rd 1070 drivers/s390/net/ctcm_fsms.c CTCM_FUNTAIL, ch->id, rd == CTCM_READ ? "RX" : "TX"); rd 1076 drivers/s390/net/ctcm_fsms.c if (rd == CTCM_READ) { rd 314 drivers/sbus/char/envctrl.c unsigned char rd; rd 319 drivers/sbus/char/envctrl.c rd = envctrl_i2c_read_data(); rd 321 drivers/sbus/char/envctrl.c return rd; rd 45 drivers/scsi/imm.c unsigned rd:1; /* Read data in data phase */ rd 668 drivers/scsi/imm.c if (dev->rd == 0) { rd 848 drivers/scsi/imm.c dev->rd = (x & 0x10) ? 1 : 0; rd 851 drivers/scsi/imm.c if ((dev->dp) && (dev->rd)) rd 874 drivers/scsi/imm.c if ((dev->dp) && (dev->rd)) { rd 1431 drivers/scsi/mpt3sas/mpt3sas_base.c union reply_descriptor rd; rd 1456 drivers/scsi/mpt3sas/mpt3sas_base.c rd.word = le64_to_cpu(rpf->Words); rd 1457 drivers/scsi/mpt3sas/mpt3sas_base.c if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) rd 3698 drivers/scsi/qla2xxx/qla_mbx.c qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd) rd 3735 drivers/scsi/qla2xxx/qla_mbx.c if (rd) rd 3736 drivers/scsi/qla2xxx/qla_mbx.c *rd = (uint64_t) mcp->mb[9] << 48 | rd 80 drivers/scsi/raid_class.c struct raid_data *rd; rd 84 drivers/scsi/raid_class.c rd = kzalloc(sizeof(*rd), GFP_KERNEL); rd 85 drivers/scsi/raid_class.c if (!rd) rd 88 drivers/scsi/raid_class.c INIT_LIST_HEAD(&rd->component_list); rd 89 drivers/scsi/raid_class.c dev_set_drvdata(cdev, rd); rd 97 drivers/scsi/raid_class.c struct raid_data *rd = dev_get_drvdata(cdev); rd 101 drivers/scsi/raid_class.c list_for_each_entry_safe(rc, next, &rd->component_list, node) { rd 107 drivers/scsi/raid_class.c kfree(rd); rd 179 drivers/scsi/raid_class.c struct raid_data *rd = dev_get_drvdata(dev); \ rd 188 drivers/scsi/raid_class.c name = raid_##states##_name(rd->attr); \ rd 194 drivers/scsi/raid_class.c raid_attr_show_internal(attr, %d, rd->attr, code) \ rd 228 drivers/scsi/raid_class.c struct raid_data *rd = dev_get_drvdata(cdev); rd 239 drivers/scsi/raid_class.c rc->num = rd->component_count++; rd 242 drivers/scsi/raid_class.c list_add_tail(&rc->node, &rd->component_list); rd 252 drivers/scsi/raid_class.c rd->component_count--; rd 478 drivers/soc/fsl/dpio/dpio-service.c struct qbman_release_desc rd; rd 484 drivers/soc/fsl/dpio/dpio-service.c qbman_release_desc_clear(&rd); rd 485 drivers/soc/fsl/dpio/dpio-service.c qbman_release_desc_set_bpid(&rd, bpid); rd 487 drivers/soc/fsl/dpio/dpio-service.c return qbman_swp_release(d->swp, &rd, buffers, num_buffers); rd 1034 drivers/spi/spi-atmel.c u16 rd; /* RD field is the lowest 16 bits of RDR */ rd 1052 drivers/spi/spi-atmel.c rd = spi_readl(as, RDR); rd 1054 drivers/spi/spi-atmel.c *words++ = rd; rd 1056 drivers/spi/spi-atmel.c *bytes++ = rd; rd 509 drivers/spi/spi-bcm-qspi.c u32 rd = 0; rd 513 drivers/spi/spi-bcm-qspi.c rd = bcm_qspi_read(qspi, CHIP_SELECT, 0); rd 514 drivers/spi/spi-bcm-qspi.c wr = (rd & ~0xff) | (1 << cs); rd 515 drivers/spi/spi-bcm-qspi.c if (rd == wr) rd 3687 drivers/spi/spi.c struct of_reconfig_data *rd = arg; rd 3693 drivers/spi/spi.c ctlr = of_find_spi_controller_by_node(rd->dn->parent); rd 3697 drivers/spi/spi.c if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) { rd 3702 drivers/spi/spi.c spi = of_register_spi_device(ctlr, rd->dn); rd 3707 drivers/spi/spi.c __func__, rd->dn); rd 3708 drivers/spi/spi.c of_node_clear_flag(rd->dn, OF_POPULATED); rd 3715 drivers/spi/spi.c if (!of_node_check_flag(rd->dn, OF_POPULATED)) rd 3719 drivers/spi/spi.c spi = of_find_spi_device_by_node(rd->dn); rd 109 drivers/staging/fbtft/fbtft-core.c ret = fbtft_request_one_gpio(par, "rd", 0, &par->gpio.rd); rd 211 drivers/staging/fbtft/fbtft.h struct gpio_desc *rd; rd 136 drivers/staging/vt6655/device_main.c static void device_free_rx_buf(struct vnt_private *priv, struct vnt_rx_desc *rd); rd 751 drivers/staging/vt6655/device_main.c struct vnt_rx_desc *rd; rd 754 drivers/staging/vt6655/device_main.c for (rd = priv->pCurrRD[idx]; rd 755 drivers/staging/vt6655/device_main.c rd->rd0.owner == OWNED_BY_HOST; rd 756 drivers/staging/vt6655/device_main.c rd = rd->next) { rd 760 drivers/staging/vt6655/device_main.c if (!rd->rd_info->skb) rd 763 drivers/staging/vt6655/device_main.c if (vnt_receive_frame(priv, rd)) { rd 764 drivers/staging/vt6655/device_main.c if (!device_alloc_rx_buf(priv, rd)) { rd 770 drivers/staging/vt6655/device_main.c rd->rd0.owner = OWNED_BY_NIC; rd 773 drivers/staging/vt6655/device_main.c priv->pCurrRD[idx] = rd; rd 779 drivers/staging/vt6655/device_main.c struct vnt_rx_desc *rd) rd 781 drivers/staging/vt6655/device_main.c struct vnt_rd_info *rd_info = rd->rd_info; rd 797 drivers/staging/vt6655/device_main.c *((unsigned int *)&rd->rd0) = 0; /* FIX cast */ rd 799 drivers/staging/vt6655/device_main.c rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz); rd 800 drivers/staging/vt6655/device_main.c rd->rd0.owner = OWNED_BY_NIC; rd 801 drivers/staging/vt6655/device_main.c rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz); rd 802 drivers/staging/vt6655/device_main.c rd->buff_addr = cpu_to_le32(rd_info->skb_dma); rd 808 drivers/staging/vt6655/device_main.c struct vnt_rx_desc *rd) rd 810 drivers/staging/vt6655/device_main.c struct vnt_rd_info *rd_info = rd->rd_info; rd 341 drivers/video/fbdev/omap/lcd_mipid.c } *rd, rd_ctrl[7] = { rd 351 drivers/video/fbdev/omap/lcd_mipid.c rd = rd_ctrl; rd 352 drivers/video/fbdev/omap/lcd_mipid.c for (i = 0; i < 3; i++, rd++) rd 353 drivers/video/fbdev/omap/lcd_mipid.c mipid_write(md, rd->cmd, (u8 *)rd->wbuf, rd->wlen); rd 356 drivers/video/fbdev/omap/lcd_mipid.c mipid_read(md, rd->cmd, rbuf, 2); rd 357 drivers/video/fbdev/omap/lcd_mipid.c rd++; rd 359 drivers/video/fbdev/omap/lcd_mipid.c for (i = 0; i < 3; i++, rd++) { rd 361 drivers/video/fbdev/omap/lcd_mipid.c mipid_write(md, rd->cmd, (u8 *)rd->wbuf, rd->wlen); rd 225 fs/hfs/catalog.c struct hfs_readdir_data *rd; rd 253 fs/hfs/catalog.c list_for_each_entry(rd, &HFS_I(dir)->open_dir_list, list) { rd 254 fs/hfs/catalog.c if (fd.tree->keycmp(fd.search_key, (void *)&rd->key) < 0) rd 255 fs/hfs/catalog.c rd->file->f_pos--; rd 56 fs/hfs/dir.c struct hfs_readdir_data *rd; rd 149 fs/hfs/dir.c rd = file->private_data; rd 150 fs/hfs/dir.c if (!rd) { rd 151 fs/hfs/dir.c rd = kmalloc(sizeof(struct hfs_readdir_data), GFP_KERNEL); rd 152 fs/hfs/dir.c if (!rd) { rd 156 fs/hfs/dir.c file->private_data = rd; rd 157 fs/hfs/dir.c rd->file = file; rd 159 fs/hfs/dir.c list_add(&rd->list, &HFS_I(inode)->open_dir_list); rd 166 fs/hfs/dir.c memcpy(&rd->key, &fd.key->cat, sizeof(struct hfs_cat_key)); rd 174 fs/hfs/dir.c struct hfs_readdir_data *rd = file->private_data; rd 175 fs/hfs/dir.c if (rd) { rd 177 fs/hfs/dir.c list_del(&rd->list); rd 179 fs/hfs/dir.c kfree(rd); rd 397 fs/hfsplus/catalog.c struct hfsplus_readdir_data *rd = rd 399 fs/hfsplus/catalog.c if (fd.tree->keycmp(fd.search_key, (void *)&rd->key) < 0) rd 400 fs/hfsplus/catalog.c rd->file->f_pos--; rd 138 fs/hfsplus/dir.c struct hfsplus_readdir_data *rd; rd 264 fs/hfsplus/dir.c rd = file->private_data; rd 265 fs/hfsplus/dir.c if (!rd) { rd 266 fs/hfsplus/dir.c rd = kmalloc(sizeof(struct hfsplus_readdir_data), GFP_KERNEL); rd 267 fs/hfsplus/dir.c if (!rd) { rd 271 fs/hfsplus/dir.c file->private_data = rd; rd 272 fs/hfsplus/dir.c rd->file = file; rd 274 fs/hfsplus/dir.c list_add(&rd->list, &HFSPLUS_I(inode)->open_dir_list); rd 281 fs/hfsplus/dir.c memcpy(&rd->key, fd.key, sizeof(struct hfsplus_cat_key)); rd 290 fs/hfsplus/dir.c struct hfsplus_readdir_data *rd = file->private_data; rd 291 fs/hfsplus/dir.c if (rd) { rd 293 fs/hfsplus/dir.c list_del(&rd->list); rd 295 fs/hfsplus/dir.c kfree(rd); rd 242 fs/hpfs/dnode.c struct dnode *d, *ad, *rd, *nd = NULL; rd 341 fs/hpfs/dnode.c if (!(rd = hpfs_alloc_dnode(i->i_sb, le32_to_cpu(d->up), &rdno, &qbh2))) { rd 351 fs/hpfs/dnode.c rd->root_dnode = 1; rd 352 fs/hpfs/dnode.c rd->up = d->up; rd 373 fs/hpfs/dnode.c set_last_pointer(i->i_sb, rd, dno); rd 375 fs/hpfs/dnode.c d = rd; rd 285 fs/jffs2/dir.c struct jffs2_raw_dirent *rd; rd 379 fs/jffs2/dir.c ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, rd 384 fs/jffs2/dir.c rd = jffs2_alloc_raw_dirent(); rd 385 fs/jffs2/dir.c if (!rd) { rd 395 fs/jffs2/dir.c rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd 396 fs/jffs2/dir.c rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd 397 fs/jffs2/dir.c rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); rd 398 fs/jffs2/dir.c rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); rd 400 fs/jffs2/dir.c rd->pino = cpu_to_je32(dir_i->i_ino); rd 401 fs/jffs2/dir.c rd->version = cpu_to_je32(++dir_f->highest_version); rd 402 fs/jffs2/dir.c rd->ino = cpu_to_je32(inode->i_ino); rd 403 fs/jffs2/dir.c rd->mctime = cpu_to_je32(JFFS2_NOW()); rd 404 fs/jffs2/dir.c rd->nsize = namelen; rd 405 fs/jffs2/dir.c rd->type = DT_LNK; rd 406 fs/jffs2/dir.c rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd 407 fs/jffs2/dir.c rd->name_crc = cpu_to_je32(crc32(0, dentry->d_name.name, namelen)); rd 409 fs/jffs2/dir.c fd = jffs2_write_dirent(c, dir_f, rd, dentry->d_name.name, namelen, ALLOC_NORMAL); rd 415 fs/jffs2/dir.c jffs2_free_raw_dirent(rd); rd 421 fs/jffs2/dir.c dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); rd 423 fs/jffs2/dir.c jffs2_free_raw_dirent(rd); rd 447 fs/jffs2/dir.c struct jffs2_raw_dirent *rd; rd 522 fs/jffs2/dir.c ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, rd 527 fs/jffs2/dir.c rd = jffs2_alloc_raw_dirent(); rd 528 fs/jffs2/dir.c if (!rd) { rd 538 fs/jffs2/dir.c rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd 539 fs/jffs2/dir.c rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd 540 fs/jffs2/dir.c rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); rd 541 fs/jffs2/dir.c rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); rd 543 fs/jffs2/dir.c rd->pino = cpu_to_je32(dir_i->i_ino); rd 544 fs/jffs2/dir.c rd->version = cpu_to_je32(++dir_f->highest_version); rd 545 fs/jffs2/dir.c rd->ino = cpu_to_je32(inode->i_ino); rd 546 fs/jffs2/dir.c rd->mctime = cpu_to_je32(JFFS2_NOW()); rd 547 fs/jffs2/dir.c rd->nsize = namelen; rd 548 fs/jffs2/dir.c rd->type = DT_DIR; rd 549 fs/jffs2/dir.c rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd 550 fs/jffs2/dir.c rd->name_crc = cpu_to_je32(crc32(0, dentry->d_name.name, namelen)); rd 552 fs/jffs2/dir.c fd = jffs2_write_dirent(c, dir_f, rd, dentry->d_name.name, namelen, ALLOC_NORMAL); rd 558 fs/jffs2/dir.c jffs2_free_raw_dirent(rd); rd 564 fs/jffs2/dir.c dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); rd 567 fs/jffs2/dir.c jffs2_free_raw_dirent(rd); rd 614 fs/jffs2/dir.c struct jffs2_raw_dirent *rd; rd 691 fs/jffs2/dir.c ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, rd 696 fs/jffs2/dir.c rd = jffs2_alloc_raw_dirent(); rd 697 fs/jffs2/dir.c if (!rd) { rd 707 fs/jffs2/dir.c rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd 708 fs/jffs2/dir.c rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd 709 fs/jffs2/dir.c rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); rd 710 fs/jffs2/dir.c rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); rd 712 fs/jffs2/dir.c rd->pino = cpu_to_je32(dir_i->i_ino); rd 713 fs/jffs2/dir.c rd->version = cpu_to_je32(++dir_f->highest_version); rd 714 fs/jffs2/dir.c rd->ino = cpu_to_je32(inode->i_ino); rd 715 fs/jffs2/dir.c rd->mctime = cpu_to_je32(JFFS2_NOW()); rd 716 fs/jffs2/dir.c rd->nsize = namelen; rd 719 fs/jffs2/dir.c rd->type = (mode & S_IFMT) >> 12; rd 721 fs/jffs2/dir.c rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd 722 fs/jffs2/dir.c rd->name_crc = cpu_to_je32(crc32(0, dentry->d_name.name, namelen)); rd 724 fs/jffs2/dir.c fd = jffs2_write_dirent(c, dir_f, rd, dentry->d_name.name, namelen, ALLOC_NORMAL); rd 730 fs/jffs2/dir.c jffs2_free_raw_dirent(rd); rd 736 fs/jffs2/dir.c dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); rd 738 fs/jffs2/dir.c jffs2_free_raw_dirent(rd); rd 854 fs/jffs2/gc.c struct jffs2_raw_dirent rd; rd 858 fs/jffs2/gc.c rd.magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd 859 fs/jffs2/gc.c rd.nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd 860 fs/jffs2/gc.c rd.nsize = strlen(fd->name); rd 861 fs/jffs2/gc.c rd.totlen = cpu_to_je32(sizeof(rd) + rd.nsize); rd 862 fs/jffs2/gc.c rd.hdr_crc = cpu_to_je32(crc32(0, &rd, sizeof(struct jffs2_unknown_node)-4)); rd 864 fs/jffs2/gc.c rd.pino = cpu_to_je32(f->inocache->ino); rd 865 fs/jffs2/gc.c rd.version = cpu_to_je32(++f->highest_version); rd 866 fs/jffs2/gc.c rd.ino = cpu_to_je32(fd->ino); rd 870 fs/jffs2/gc.c rd.mctime = cpu_to_je32(JFFS2_F_I_MTIME(f)); rd 872 fs/jffs2/gc.c rd.mctime = cpu_to_je32(0); rd 873 fs/jffs2/gc.c rd.type = fd->type; rd 874 fs/jffs2/gc.c rd.node_crc = cpu_to_je32(crc32(0, &rd, sizeof(rd)-8)); rd 875 fs/jffs2/gc.c rd.name_crc = cpu_to_je32(crc32(0, fd->name, rd.nsize)); rd 877 fs/jffs2/gc.c ret = jffs2_reserve_space_gc(c, sizeof(rd)+rd.nsize, &alloclen, rd 878 fs/jffs2/gc.c JFFS2_SUMMARY_DIRENT_SIZE(rd.nsize)); rd 881 fs/jffs2/gc.c sizeof(rd)+rd.nsize, ret); rd 884 fs/jffs2/gc.c new_fd = jffs2_write_dirent(c, f, &rd, fd->name, rd.nsize, ALLOC_GC); rd 907 fs/jffs2/gc.c struct jffs2_raw_dirent *rd; rd 915 fs/jffs2/gc.c rd = kmalloc(rawlen, GFP_KERNEL); rd 916 fs/jffs2/gc.c if (!rd) rd 946 fs/jffs2/gc.c ret = jffs2_flash_read(c, ref_offset(raw), rawlen, &retlen, (char *)rd); rd 960 fs/jffs2/gc.c if (je16_to_cpu(rd->nodetype) != JFFS2_NODETYPE_DIRENT) rd 964 fs/jffs2/gc.c if (je32_to_cpu(rd->name_crc) != name_crc) rd 968 fs/jffs2/gc.c if (rd->nsize != name_len || !je32_to_cpu(rd->ino)) rd 972 fs/jffs2/gc.c if (memcmp(rd->name, fd->name, name_len)) rd 982 fs/jffs2/gc.c ref_offset(raw), je32_to_cpu(rd->ino)); rd 983 fs/jffs2/gc.c kfree(rd); rd 989 fs/jffs2/gc.c kfree(rd); rd 144 fs/jffs2/nodelist.h #define dirent_node_state(rd) ( (je32_to_cpu((rd)->ino)?REF_PRISTINE:REF_NORMAL) ) rd 402 fs/jffs2/nodelist.h struct jffs2_raw_dirent *rd, const unsigned char *name, rd 587 fs/jffs2/readinode.c struct jffs2_raw_dirent *rd, size_t read, rd 596 fs/jffs2/readinode.c crc = crc32(0, rd, sizeof(*rd) - 8); rd 597 fs/jffs2/readinode.c if (unlikely(crc != je32_to_cpu(rd->node_crc))) { rd 599 fs/jffs2/readinode.c ref_offset(ref), je32_to_cpu(rd->node_crc), crc); rd 610 fs/jffs2/readinode.c if (unlikely(PAD((rd->nsize + sizeof(*rd))) != PAD(je32_to_cpu(rd->totlen)))) { rd 612 fs/jffs2/readinode.c ref_offset(ref), rd->nsize, je32_to_cpu(rd->totlen)); rd 625 fs/jffs2/readinode.c ref->flash_offset = ref_offset(ref) | dirent_node_state(rd); rd 629 fs/jffs2/readinode.c fd = jffs2_alloc_full_dirent(rd->nsize + 1); rd 634 fs/jffs2/readinode.c fd->version = je32_to_cpu(rd->version); rd 635 fs/jffs2/readinode.c fd->ino = je32_to_cpu(rd->ino); rd 636 fs/jffs2/readinode.c fd->type = rd->type; rd 642 fs/jffs2/readinode.c if(fd->version > rii->mctime_ver && je32_to_cpu(rd->mctime)) { rd 644 fs/jffs2/readinode.c rii->latest_mctime = je32_to_cpu(rd->mctime); rd 651 fs/jffs2/readinode.c if (read > sizeof(*rd)) rd 652 fs/jffs2/readinode.c memcpy(&fd->name[0], &rd->name[0], rd 653 fs/jffs2/readinode.c min_t(uint32_t, rd->nsize, (read - sizeof(*rd)) )); rd 656 fs/jffs2/readinode.c if (rd->nsize + sizeof(*rd) > read) { rd 659 fs/jffs2/readinode.c int already = read - sizeof(*rd); rd 662 fs/jffs2/readinode.c rd->nsize - already, &read, &fd->name[already]); rd 663 fs/jffs2/readinode.c if (unlikely(read != rd->nsize - already) && likely(!err)) { rd 666 fs/jffs2/readinode.c rd->nsize - already, read); rd 677 fs/jffs2/readinode.c fd->nhash = full_name_hash(NULL, fd->name, rd->nsize); rd 679 fs/jffs2/readinode.c fd->name[rd->nsize] = '\0'; rd 698 fs/jffs2/readinode.c struct jffs2_raw_inode *rd, int rdlen, rd 709 fs/jffs2/readinode.c crc = crc32(0, rd, sizeof(*rd) - 8); rd 710 fs/jffs2/readinode.c if (unlikely(crc != je32_to_cpu(rd->node_crc))) { rd 712 fs/jffs2/readinode.c ref_offset(ref), je32_to_cpu(rd->node_crc), crc); rd 724 fs/jffs2/readinode.c csize = je32_to_cpu(rd->csize); rd 730 fs/jffs2/readinode.c if (unlikely(je32_to_cpu(rd->offset) > je32_to_cpu(rd->isize)) || rd 731 fs/jffs2/readinode.c unlikely(PAD(je32_to_cpu(rd->csize) + sizeof(*rd)) != PAD(je32_to_cpu(rd->totlen)))) { rd 777 fs/jffs2/readinode.c buf = (unsigned char *)rd + sizeof(*rd); rd 779 fs/jffs2/readinode.c len = min_t(uint32_t, rdlen - sizeof(*rd), csize); rd 786 fs/jffs2/readinode.c if (len >= csize && unlikely(tn->partial_crc != je32_to_cpu(rd->data_crc))) { rd 788 fs/jffs2/readinode.c ref_offset(ref), tn->partial_crc, je32_to_cpu(rd->data_crc)); rd 823 fs/jffs2/readinode.c tn->version = je32_to_cpu(rd->version); rd 824 fs/jffs2/readinode.c tn->fn->ofs = je32_to_cpu(rd->offset); rd 825 fs/jffs2/readinode.c tn->data_crc = je32_to_cpu(rd->data_crc); rd 835 fs/jffs2/readinode.c if (rd->compr == JFFS2_COMPR_ZERO && !je32_to_cpu(rd->dsize) && csize) rd 838 fs/jffs2/readinode.c tn->fn->size = je32_to_cpu(rd->dsize); rd 841 fs/jffs2/readinode.c ref_offset(ref), je32_to_cpu(rd->version), rd 842 fs/jffs2/readinode.c je32_to_cpu(rd->offset), je32_to_cpu(rd->dsize), csize); rd 853 fs/jffs2/readinode.c dbg_readinode2("After adding ver %d:\n", je32_to_cpu(rd->version)); rd 49 fs/jffs2/scan.c struct jffs2_raw_dirent *rd, uint32_t ofs, struct jffs2_summary *s); rd 1043 fs/jffs2/scan.c struct jffs2_raw_dirent *rd, uint32_t ofs, struct jffs2_summary *s) rd 1055 fs/jffs2/scan.c crc = crc32(0, rd, sizeof(*rd)-8); rd 1057 fs/jffs2/scan.c if (crc != je32_to_cpu(rd->node_crc)) { rd 1059 fs/jffs2/scan.c __func__, ofs, je32_to_cpu(rd->node_crc), crc); rd 1061 fs/jffs2/scan.c if ((err = jffs2_scan_dirty_space(c, jeb, PAD(je32_to_cpu(rd->totlen))))) rd 1066 fs/jffs2/scan.c pseudo_random += je32_to_cpu(rd->version); rd 1069 fs/jffs2/scan.c checkedlen = strnlen(rd->name, rd->nsize); rd 1070 fs/jffs2/scan.c if (checkedlen < rd->nsize) { rd 1078 fs/jffs2/scan.c memcpy(&fd->name, rd->name, checkedlen); rd 1081 fs/jffs2/scan.c crc = crc32(0, fd->name, rd->nsize); rd 1082 fs/jffs2/scan.c if (crc != je32_to_cpu(rd->name_crc)) { rd 1084 fs/jffs2/scan.c __func__, ofs, je32_to_cpu(rd->name_crc), crc); rd 1086 fs/jffs2/scan.c fd->name, je32_to_cpu(rd->ino)); rd 1090 fs/jffs2/scan.c if ((err = jffs2_scan_dirty_space(c, jeb, PAD(je32_to_cpu(rd->totlen))))) rd 1094 fs/jffs2/scan.c ic = jffs2_scan_make_ino_cache(c, je32_to_cpu(rd->pino)); rd 1100 fs/jffs2/scan.c fd->raw = jffs2_link_node_ref(c, jeb, ofs | dirent_node_state(rd), rd 1101 fs/jffs2/scan.c PAD(je32_to_cpu(rd->totlen)), ic); rd 1104 fs/jffs2/scan.c fd->version = je32_to_cpu(rd->version); rd 1105 fs/jffs2/scan.c fd->ino = je32_to_cpu(rd->ino); rd 1107 fs/jffs2/scan.c fd->type = rd->type; rd 1111 fs/jffs2/scan.c jffs2_sum_add_dirent_mem(s, rd, ofs - jeb->offset); rd 133 fs/jffs2/summary.c int jffs2_sum_add_dirent_mem(struct jffs2_summary *s, struct jffs2_raw_dirent *rd, rd 137 fs/jffs2/summary.c kmalloc(sizeof(struct jffs2_sum_dirent_mem) + rd->nsize, GFP_KERNEL); rd 142 fs/jffs2/summary.c temp->nodetype = rd->nodetype; rd 143 fs/jffs2/summary.c temp->totlen = rd->totlen; rd 145 fs/jffs2/summary.c temp->pino = rd->pino; rd 146 fs/jffs2/summary.c temp->version = rd->version; rd 147 fs/jffs2/summary.c temp->ino = rd->ino; rd 148 fs/jffs2/summary.c temp->nsize = rd->nsize; rd 149 fs/jffs2/summary.c temp->type = rd->type; rd 152 fs/jffs2/summary.c memcpy(temp->name, rd->name, rd->nsize); rd 186 fs/jffs2/summary.h int jffs2_sum_add_dirent_mem(struct jffs2_summary *s, struct jffs2_raw_dirent *rd, uint32_t ofs); rd 206 fs/jffs2/write.c struct jffs2_raw_dirent *rd, const unsigned char *name, rd 218 fs/jffs2/write.c je32_to_cpu(rd->pino), name, name, je32_to_cpu(rd->ino), rd 219 fs/jffs2/write.c je32_to_cpu(rd->name_crc)); rd 221 fs/jffs2/write.c D1(if(je32_to_cpu(rd->hdr_crc) != crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)) { rd 231 fs/jffs2/write.c je32_to_cpu(rd->pino), name, name, je32_to_cpu(rd->ino), rd 232 fs/jffs2/write.c je32_to_cpu(rd->name_crc)); rd 237 fs/jffs2/write.c vecs[0].iov_base = rd; rd 238 fs/jffs2/write.c vecs[0].iov_len = sizeof(*rd); rd 246 fs/jffs2/write.c fd->version = je32_to_cpu(rd->version); rd 247 fs/jffs2/write.c fd->ino = je32_to_cpu(rd->ino); rd 249 fs/jffs2/write.c fd->type = rd->type; rd 258 fs/jffs2/write.c if ((alloc_mode!=ALLOC_GC) && (je32_to_cpu(rd->version) < f->highest_version)) { rd 262 fs/jffs2/write.c je32_to_cpu(rd->version), f->highest_version); rd 263 fs/jffs2/write.c rd->version = cpu_to_je32(++f->highest_version); rd 264 fs/jffs2/write.c fd->version = je32_to_cpu(rd->version); rd 265 fs/jffs2/write.c rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd 269 fs/jffs2/write.c (alloc_mode==ALLOC_GC)?0:je32_to_cpu(rd->pino)); rd 270 fs/jffs2/write.c if (ret || (retlen != sizeof(*rd) + namelen)) { rd 272 fs/jffs2/write.c sizeof(*rd) + namelen, flash_ofs, ret, retlen); rd 275 fs/jffs2/write.c jffs2_add_physical_node_ref(c, flash_ofs | REF_OBSOLETE, PAD(sizeof(*rd)+namelen), NULL); rd 293 fs/jffs2/write.c ret = jffs2_reserve_space_gc(c, sizeof(*rd) + namelen, &dummy, rd 300 fs/jffs2/write.c ret = jffs2_reserve_space(c, sizeof(*rd) + namelen, &dummy, rd 321 fs/jffs2/write.c fd->raw = jffs2_add_physical_node_ref(c, flash_ofs | dirent_node_state(rd), rd 322 fs/jffs2/write.c PAD(sizeof(*rd)+namelen), f->inocache); rd 445 fs/jffs2/write.c struct jffs2_raw_dirent *rd; rd 492 fs/jffs2/write.c ret = jffs2_reserve_space(c, sizeof(*rd)+qstr->len, &alloclen, rd 501 fs/jffs2/write.c rd = jffs2_alloc_raw_dirent(); rd 502 fs/jffs2/write.c if (!rd) { rd 510 fs/jffs2/write.c rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd 511 fs/jffs2/write.c rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd 512 fs/jffs2/write.c rd->totlen = cpu_to_je32(sizeof(*rd) + qstr->len); rd 513 fs/jffs2/write.c rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); rd 515 fs/jffs2/write.c rd->pino = cpu_to_je32(dir_f->inocache->ino); rd 516 fs/jffs2/write.c rd->version = cpu_to_je32(++dir_f->highest_version); rd 517 fs/jffs2/write.c rd->ino = ri->ino; rd 518 fs/jffs2/write.c rd->mctime = ri->ctime; rd 519 fs/jffs2/write.c rd->nsize = qstr->len; rd 520 fs/jffs2/write.c rd->type = DT_REG; rd 521 fs/jffs2/write.c rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd 522 fs/jffs2/write.c rd->name_crc = cpu_to_je32(crc32(0, qstr->name, qstr->len)); rd 524 fs/jffs2/write.c fd = jffs2_write_dirent(c, dir_f, rd, qstr->name, qstr->len, ALLOC_NORMAL); rd 526 fs/jffs2/write.c jffs2_free_raw_dirent(rd); rd 551 fs/jffs2/write.c struct jffs2_raw_dirent *rd; rd 559 fs/jffs2/write.c rd = jffs2_alloc_raw_dirent(); rd 560 fs/jffs2/write.c if (!rd) rd 563 fs/jffs2/write.c ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, rd 566 fs/jffs2/write.c jffs2_free_raw_dirent(rd); rd 573 fs/jffs2/write.c rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd 574 fs/jffs2/write.c rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd 575 fs/jffs2/write.c rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); rd 576 fs/jffs2/write.c rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); rd 578 fs/jffs2/write.c rd->pino = cpu_to_je32(dir_f->inocache->ino); rd 579 fs/jffs2/write.c rd->version = cpu_to_je32(++dir_f->highest_version); rd 580 fs/jffs2/write.c rd->ino = cpu_to_je32(0); rd 581 fs/jffs2/write.c rd->mctime = cpu_to_je32(time); rd 582 fs/jffs2/write.c rd->nsize = namelen; rd 583 fs/jffs2/write.c rd->type = DT_UNKNOWN; rd 584 fs/jffs2/write.c rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd 585 fs/jffs2/write.c rd->name_crc = cpu_to_je32(crc32(0, name, namelen)); rd 587 fs/jffs2/write.c fd = jffs2_write_dirent(c, dir_f, rd, name, namelen, ALLOC_DELETION); rd 589 fs/jffs2/write.c jffs2_free_raw_dirent(rd); rd 671 fs/jffs2/write.c struct jffs2_raw_dirent *rd; rd 676 fs/jffs2/write.c rd = jffs2_alloc_raw_dirent(); rd 677 fs/jffs2/write.c if (!rd) rd 680 fs/jffs2/write.c ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, rd 683 fs/jffs2/write.c jffs2_free_raw_dirent(rd); rd 690 fs/jffs2/write.c rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd 691 fs/jffs2/write.c rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd 692 fs/jffs2/write.c rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); rd 693 fs/jffs2/write.c rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); rd 695 fs/jffs2/write.c rd->pino = cpu_to_je32(dir_f->inocache->ino); rd 696 fs/jffs2/write.c rd->version = cpu_to_je32(++dir_f->highest_version); rd 697 fs/jffs2/write.c rd->ino = cpu_to_je32(ino); rd 698 fs/jffs2/write.c rd->mctime = cpu_to_je32(time); rd 699 fs/jffs2/write.c rd->nsize = namelen; rd 701 fs/jffs2/write.c rd->type = type; rd 703 fs/jffs2/write.c rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd 704 fs/jffs2/write.c rd->name_crc = cpu_to_je32(crc32(0, name, namelen)); rd 706 fs/jffs2/write.c fd = jffs2_write_dirent(c, dir_f, rd, name, namelen, ALLOC_NORMAL); rd 708 fs/jffs2/write.c jffs2_free_raw_dirent(rd); rd 156 fs/qnx4/inode.c int rd, rl; rd 162 fs/qnx4/inode.c rd = le32_to_cpu(s->RootDir.di_first_xtnt.xtnt_blk) - 1; rd 165 fs/qnx4/inode.c bh = sb_bread(sb, rd + j); /* root dir, first block */ rd 1889 fs/ubifs/lpt.c int ubifs_lpt_init(struct ubifs_info *c, int rd, int wr) rd 1893 fs/ubifs/lpt.c if (rd) { rd 1910 fs/ubifs/lpt.c if (rd) rd 1930 fs/ubifs/ubifs.h int ubifs_lpt_init(struct ubifs_info *c, int rd, int wr); rd 28 include/linux/hdlcdrv.h unsigned rd, wr; rd 34 include/linux/hdlcdrv.h unsigned int rd; rd 164 include/linux/hdlcdrv.h ret = !((HDLCDRV_HDLCBUFFER - 1 + hb->rd - hb->wr) % HDLCDRV_HDLCBUFFER); rd 177 include/linux/hdlcdrv.h ret = (hb->rd == hb->wr); rd 191 include/linux/hdlcdrv.h if (hb->rd == hb->wr) rd 194 include/linux/hdlcdrv.h newr = (hb->rd+1) % HDLCDRV_HDLCBUFFER; rd 195 include/linux/hdlcdrv.h val = hb->buf[hb->rd]; rd 196 include/linux/hdlcdrv.h hb->rd = newr; rd 212 include/linux/hdlcdrv.h if (newp != hb->rd) { rd 1351 include/linux/of.h extern int of_reconfig_notify(unsigned long, struct of_reconfig_data *rd); rd 59 include/linux/raid_class.h struct raid_data *rd; \ rd 61 include/linux/raid_class.h rd = dev_get_drvdata(device); \ rd 62 include/linux/raid_class.h rd->attr = value; \ rd 68 include/linux/raid_class.h struct raid_data *rd; \ rd 70 include/linux/raid_class.h rd = dev_get_drvdata(device); \ rd 71 include/linux/raid_class.h return rd->attr; \ rd 1998 include/linux/sched.h const struct cpumask *sched_trace_rd_span(struct root_domain *rd); rd 32 include/linux/sched/deadline.h extern void dl_clear_root_domain(struct root_domain *rd); rd 5493 include/net/cfg80211.h struct ieee80211_regdomain *rd); rd 5507 include/net/cfg80211.h struct ieee80211_regdomain *rd); rd 625 include/trace/events/sched.h TP_PROTO(struct root_domain *rd, bool overutilized), rd 626 include/trace/events/sched.h TP_ARGS(rd, overutilized)); rd 4916 kernel/sched/core.c cpumask_t *span = rq->rd->span; rd 4924 kernel/sched/core.c rq->rd->dl_bw.bw == 0) { rd 5441 kernel/sched/core.c if (!cpumask_subset(task_rq(p)->rd->span, new_mask)) { rd 6112 kernel/sched/core.c if (dl_task(p) && !cpumask_intersects(task_rq(p)->rd->span, rd 6309 kernel/sched/core.c cpumask_set_cpu(rq->cpu, rq->rd->online); rd 6329 kernel/sched/core.c cpumask_clear_cpu(rq->cpu, rq->rd->online); rd 6411 kernel/sched/core.c if (rq->rd) { rd 6412 kernel/sched/core.c BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span)); rd 6480 kernel/sched/core.c if (rq->rd) { rd 6481 kernel/sched/core.c BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span)); rd 6663 kernel/sched/core.c rq->rd = NULL; rd 51 kernel/sched/deadline.c return &cpu_rq(i)->rd->dl_bw; rd 56 kernel/sched/deadline.c struct root_domain *rd = cpu_rq(i)->rd; rd 61 kernel/sched/deadline.c for_each_cpu_and(i, rd->span, cpu_active_mask) rd 380 kernel/sched/deadline.c return atomic_read(&rq->rd->dlo_count); rd 388 kernel/sched/deadline.c cpumask_set_cpu(rq->cpu, rq->rd->dlo_mask); rd 396 kernel/sched/deadline.c atomic_inc(&rq->rd->dlo_count); rd 404 kernel/sched/deadline.c atomic_dec(&rq->rd->dlo_count); rd 405 kernel/sched/deadline.c cpumask_clear_cpu(rq->cpu, rq->rd->dlo_mask); rd 583 kernel/sched/deadline.c dl_b = &rq->rd->dl_bw; rd 585 kernel/sched/deadline.c __dl_sub(dl_b, p->dl.dl_bw, cpumask_weight(rq->rd->span)); rd 588 kernel/sched/deadline.c dl_b = &later_rq->rd->dl_bw; rd 590 kernel/sched/deadline.c __dl_add(dl_b, p->dl.dl_bw, cpumask_weight(later_rq->rd->span)); rd 1341 kernel/sched/deadline.c cpudl_set(&rq->rd->cpudl, rq->cpu, deadline); rd 1356 kernel/sched/deadline.c cpudl_clear(&rq->rd->cpudl, rq->cpu); rd 1363 kernel/sched/deadline.c cpudl_set(&rq->rd->cpudl, rq->cpu, entry->deadline); rd 1680 kernel/sched/deadline.c !cpudl_find(&rq->rd->cpudl, rq->curr, NULL)) rd 1688 kernel/sched/deadline.c cpudl_find(&rq->rd->cpudl, p, NULL)) rd 1894 kernel/sched/deadline.c if (!cpudl_find(&task_rq(task)->rd->cpudl, task, later_mask)) rd 2151 kernel/sched/deadline.c for_each_cpu(cpu, this_rq->rd->dlo_mask) { rd 2240 kernel/sched/deadline.c src_rd = rq->rd; rd 2270 kernel/sched/deadline.c cpudl_set_freecpu(&rq->rd->cpudl, rq->cpu); rd 2272 kernel/sched/deadline.c cpudl_set(&rq->rd->cpudl, rq->cpu, rq->dl.earliest_dl.curr); rd 2281 kernel/sched/deadline.c cpudl_clear(&rq->rd->cpudl, rq->cpu); rd 2282 kernel/sched/deadline.c cpudl_clear_freecpu(&rq->rd->cpudl, rq->cpu); rd 2304 kernel/sched/deadline.c dl_b = &rq->rd->dl_bw; rd 2307 kernel/sched/deadline.c __dl_add(dl_b, p->dl.dl_bw, cpumask_weight(rq->rd->span)); rd 2315 kernel/sched/deadline.c void dl_clear_root_domain(struct root_domain *rd) rd 2319 kernel/sched/deadline.c raw_spin_lock_irqsave(&rd->dl_bw.lock, flags); rd 2320 kernel/sched/deadline.c rd->dl_bw.total_bw = 0; rd 2321 kernel/sched/deadline.c raw_spin_unlock_irqrestore(&rd->dl_bw.lock, flags); rd 604 kernel/sched/debug.c dl_bw = &cpu_rq(cpu)->rd->dl_bw; rd 5192 kernel/sched/fair.c if (!READ_ONCE(rq->rd->overutilized) && cpu_overutilized(rq->cpu)) { rd 5193 kernel/sched/fair.c WRITE_ONCE(rq->rd->overutilized, SG_OVERUTILIZED); rd 5194 kernel/sched/fair.c trace_sched_overutilized_tp(rq->rd, SG_OVERUTILIZED); rd 6219 kernel/sched/fair.c max_cap = cpu_rq(cpu)->rd->max_cpu_capacity; rd 6363 kernel/sched/fair.c struct root_domain *rd = cpu_rq(smp_processor_id())->rd; rd 6370 kernel/sched/fair.c pd = rcu_dereference(rd->pd); rd 6371 kernel/sched/fair.c if (!pd || READ_ONCE(rd->overutilized)) rd 7903 kernel/sched/fair.c (rq->cpu_capacity_orig < rq->rd->max_cpu_capacity || rd 8307 kernel/sched/fair.c struct root_domain *rd = env->dst_rq->rd; rd 8310 kernel/sched/fair.c WRITE_ONCE(rd->overload, sg_status & SG_OVERLOAD); rd 8313 kernel/sched/fair.c WRITE_ONCE(rd->overutilized, sg_status & SG_OVERUTILIZED); rd 8314 kernel/sched/fair.c trace_sched_overutilized_tp(rd, sg_status & SG_OVERUTILIZED); rd 8316 kernel/sched/fair.c struct root_domain *rd = env->dst_rq->rd; rd 8318 kernel/sched/fair.c WRITE_ONCE(rd->overutilized, SG_OVERUTILIZED); rd 8319 kernel/sched/fair.c trace_sched_overutilized_tp(rd, SG_OVERUTILIZED); rd 8546 kernel/sched/fair.c struct root_domain *rd = env->dst_rq->rd; rd 8548 kernel/sched/fair.c if (rcu_dereference(rd->pd) && !READ_ONCE(rd->overutilized)) rd 9829 kernel/sched/fair.c !READ_ONCE(this_rq->rd->overload)) { rd 10630 kernel/sched/fair.c const struct cpumask *sched_trace_rd_span(struct root_domain *rd) rd 10633 kernel/sched/fair.c return rd ? rd->span : NULL; rd 271 kernel/sched/rt.c return atomic_read(&rq->rd->rto_count); rd 279 kernel/sched/rt.c cpumask_set_cpu(rq->cpu, rq->rd->rto_mask); rd 290 kernel/sched/rt.c atomic_inc(&rq->rd->rto_count); rd 299 kernel/sched/rt.c atomic_dec(&rq->rd->rto_count); rd 300 kernel/sched/rt.c cpumask_clear_cpu(rq->cpu, rq->rd->rto_mask); rd 543 kernel/sched/rt.c return this_rq()->rd->span; rd 642 kernel/sched/rt.c struct root_domain *rd = rq_of_rt_rq(rt_rq)->rd; rd 646 kernel/sched/rt.c weight = cpumask_weight(rd->span); rd 650 kernel/sched/rt.c for_each_cpu(i, rd->span) { rd 693 kernel/sched/rt.c struct root_domain *rd = rq->rd; rd 727 kernel/sched/rt.c for_each_cpu(i, rd->span) { rd 1049 kernel/sched/rt.c cpupri_set(&rq->rd->cpupri, rq->cpu, prio); rd 1065 kernel/sched/rt.c cpupri_set(&rq->rd->cpupri, rq->cpu, rt_rq->highest_prio.curr); rd 1452 kernel/sched/rt.c !cpupri_find(&rq->rd->cpupri, rq->curr, NULL)) rd 1460 kernel/sched/rt.c && cpupri_find(&rq->rd->cpupri, p, NULL)) rd 1649 kernel/sched/rt.c if (!cpupri_find(&task_rq(task)->rd->cpupri, task, lowest_mask)) rd 1922 kernel/sched/rt.c static int rto_next_cpu(struct root_domain *rd) rd 1943 kernel/sched/rt.c cpu = cpumask_next(rd->rto_cpu, rd->rto_mask); rd 1945 kernel/sched/rt.c rd->rto_cpu = cpu; rd 1950 kernel/sched/rt.c rd->rto_cpu = -1; rd 1958 kernel/sched/rt.c next = atomic_read_acquire(&rd->rto_loop_next); rd 1960 kernel/sched/rt.c if (rd->rto_loop == next) rd 1963 kernel/sched/rt.c rd->rto_loop = next; rd 1984 kernel/sched/rt.c atomic_inc(&rq->rd->rto_loop_next); rd 1987 kernel/sched/rt.c if (!rto_start_trylock(&rq->rd->rto_loop_start)) rd 1990 kernel/sched/rt.c raw_spin_lock(&rq->rd->rto_lock); rd 1998 kernel/sched/rt.c if (rq->rd->rto_cpu < 0) rd 1999 kernel/sched/rt.c cpu = rto_next_cpu(rq->rd); rd 2001 kernel/sched/rt.c raw_spin_unlock(&rq->rd->rto_lock); rd 2003 kernel/sched/rt.c rto_start_unlock(&rq->rd->rto_loop_start); rd 2007 kernel/sched/rt.c sched_get_rd(rq->rd); rd 2008 kernel/sched/rt.c irq_work_queue_on(&rq->rd->rto_push_work, cpu); rd 2015 kernel/sched/rt.c struct root_domain *rd = rd 2032 kernel/sched/rt.c raw_spin_lock(&rd->rto_lock); rd 2035 kernel/sched/rt.c cpu = rto_next_cpu(rd); rd 2037 kernel/sched/rt.c raw_spin_unlock(&rd->rto_lock); rd 2040 kernel/sched/rt.c sched_put_rd(rd); rd 2045 kernel/sched/rt.c irq_work_queue_on(&rd->rto_push_work, cpu); rd 2068 kernel/sched/rt.c cpumask_test_cpu(this_rq->cpu, this_rq->rd->rto_mask)) rd 2078 kernel/sched/rt.c for_each_cpu(cpu, this_rq->rd->rto_mask) { rd 2170 kernel/sched/rt.c cpupri_set(&rq->rd->cpupri, rq->cpu, rq->rt.highest_prio.curr); rd 2181 kernel/sched/rt.c cpupri_set(&rq->rd->cpupri, rq->cpu, CPUPRI_INVALID); rd 795 kernel/sched/sched.h extern void rq_attach_root(struct rq *rq, struct root_domain *rd); rd 796 kernel/sched/sched.h extern void sched_get_rd(struct root_domain *rd); rd 797 kernel/sched/sched.h extern void sched_put_rd(struct root_domain *rd); rd 925 kernel/sched/sched.h struct root_domain *rd; rd 1936 kernel/sched/sched.h if (!READ_ONCE(rq->rd->overload)) rd 1937 kernel/sched/sched.h WRITE_ONCE(rq->rd->overload, 1); rd 2227 kernel/sched/sched.h struct root_domain *rd = container_of(dl_b, struct root_domain, dl_bw); rd 2232 kernel/sched/sched.h for_each_cpu_and(i, rd->span, cpu_active_mask) { rd 347 kernel/sched/topology.c struct root_domain *rd = cpu_rq(cpu)->rd; rd 375 kernel/sched/topology.c if (rd->pd) rd 406 kernel/sched/topology.c tmp = rd->pd; rd 407 kernel/sched/topology.c rcu_assign_pointer(rd->pd, pd); rd 415 kernel/sched/topology.c tmp = rd->pd; rd 416 kernel/sched/topology.c rcu_assign_pointer(rd->pd, NULL); rd 428 kernel/sched/topology.c struct root_domain *rd = container_of(rcu, struct root_domain, rcu); rd 430 kernel/sched/topology.c cpupri_cleanup(&rd->cpupri); rd 431 kernel/sched/topology.c cpudl_cleanup(&rd->cpudl); rd 432 kernel/sched/topology.c free_cpumask_var(rd->dlo_mask); rd 433 kernel/sched/topology.c free_cpumask_var(rd->rto_mask); rd 434 kernel/sched/topology.c free_cpumask_var(rd->online); rd 435 kernel/sched/topology.c free_cpumask_var(rd->span); rd 436 kernel/sched/topology.c free_pd(rd->pd); rd 437 kernel/sched/topology.c kfree(rd); rd 440 kernel/sched/topology.c void rq_attach_root(struct rq *rq, struct root_domain *rd) rd 447 kernel/sched/topology.c if (rq->rd) { rd 448 kernel/sched/topology.c old_rd = rq->rd; rd 464 kernel/sched/topology.c atomic_inc(&rd->refcount); rd 465 kernel/sched/topology.c rq->rd = rd; rd 467 kernel/sched/topology.c cpumask_set_cpu(rq->cpu, rd->span); rd 477 kernel/sched/topology.c void sched_get_rd(struct root_domain *rd) rd 479 kernel/sched/topology.c atomic_inc(&rd->refcount); rd 482 kernel/sched/topology.c void sched_put_rd(struct root_domain *rd) rd 484 kernel/sched/topology.c if (!atomic_dec_and_test(&rd->refcount)) rd 487 kernel/sched/topology.c call_rcu(&rd->rcu, free_rootdomain); rd 490 kernel/sched/topology.c static int init_rootdomain(struct root_domain *rd) rd 492 kernel/sched/topology.c if (!zalloc_cpumask_var(&rd->span, GFP_KERNEL)) rd 494 kernel/sched/topology.c if (!zalloc_cpumask_var(&rd->online, GFP_KERNEL)) rd 496 kernel/sched/topology.c if (!zalloc_cpumask_var(&rd->dlo_mask, GFP_KERNEL)) rd 498 kernel/sched/topology.c if (!zalloc_cpumask_var(&rd->rto_mask, GFP_KERNEL)) rd 502 kernel/sched/topology.c rd->rto_cpu = -1; rd 503 kernel/sched/topology.c raw_spin_lock_init(&rd->rto_lock); rd 504 kernel/sched/topology.c init_irq_work(&rd->rto_push_work, rto_push_irq_work_func); rd 507 kernel/sched/topology.c init_dl_bw(&rd->dl_bw); rd 508 kernel/sched/topology.c if (cpudl_init(&rd->cpudl) != 0) rd 511 kernel/sched/topology.c if (cpupri_init(&rd->cpupri) != 0) rd 516 kernel/sched/topology.c cpudl_cleanup(&rd->cpudl); rd 518 kernel/sched/topology.c free_cpumask_var(rd->rto_mask); rd 520 kernel/sched/topology.c free_cpumask_var(rd->dlo_mask); rd 522 kernel/sched/topology.c free_cpumask_var(rd->online); rd 524 kernel/sched/topology.c free_cpumask_var(rd->span); rd 544 kernel/sched/topology.c struct root_domain *rd; rd 546 kernel/sched/topology.c rd = kzalloc(sizeof(*rd), GFP_KERNEL); rd 547 kernel/sched/topology.c if (!rd) rd 550 kernel/sched/topology.c if (init_rootdomain(rd) != 0) { rd 551 kernel/sched/topology.c kfree(rd); rd 555 kernel/sched/topology.c return rd; rd 661 kernel/sched/topology.c cpu_attach_domain(struct sched_domain *sd, struct root_domain *rd, int cpu) rd 698 kernel/sched/topology.c rq_attach_root(rq, rd); rd 709 kernel/sched/topology.c struct root_domain *rd; rd 1225 kernel/sched/topology.c if (!atomic_read(&d->rd->refcount)) rd 1226 kernel/sched/topology.c free_rootdomain(&d->rd->rcu); rd 1249 kernel/sched/topology.c d->rd = alloc_rootdomain(); rd 1250 kernel/sched/topology.c if (!d->rd) rd 2063 kernel/sched/topology.c if (rq->cpu_capacity_orig > READ_ONCE(d.rd->max_cpu_capacity)) rd 2064 kernel/sched/topology.c WRITE_ONCE(d.rd->max_cpu_capacity, rq->cpu_capacity_orig); rd 2066 kernel/sched/topology.c cpu_attach_domain(sd, d.rd, i); rd 2075 kernel/sched/topology.c cpumask_pr_args(cpu_map), rq->rd->max_cpu_capacity); rd 2254 kernel/sched/topology.c struct root_domain *rd; rd 2262 kernel/sched/topology.c rd = cpu_rq(cpumask_any(doms_cur[i]))->rd; rd 2263 kernel/sched/topology.c dl_clear_root_domain(rd); rd 2299 kernel/sched/topology.c cpu_rq(cpumask_first(doms_cur[j]))->rd->pd) { rd 100 kernel/time/sched_clock.c struct clock_read_data *rd; rd 104 kernel/time/sched_clock.c rd = cd.read_data + (seq & 1); rd 106 kernel/time/sched_clock.c cyc = (rd->read_sched_clock() - rd->epoch_cyc) & rd 107 kernel/time/sched_clock.c rd->sched_clock_mask; rd 108 kernel/time/sched_clock.c res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift); rd 124 kernel/time/sched_clock.c static void update_clock_read_data(struct clock_read_data *rd) rd 127 kernel/time/sched_clock.c cd.read_data[1] = *rd; rd 133 kernel/time/sched_clock.c cd.read_data[0] = *rd; rd 146 kernel/time/sched_clock.c struct clock_read_data rd; rd 148 kernel/time/sched_clock.c rd = cd.read_data[0]; rd 151 kernel/time/sched_clock.c ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); rd 153 kernel/time/sched_clock.c rd.epoch_ns = ns; rd 154 kernel/time/sched_clock.c rd.epoch_cyc = cyc; rd 156 kernel/time/sched_clock.c update_clock_read_data(&rd); rd 174 kernel/time/sched_clock.c struct clock_read_data rd; rd 191 kernel/time/sched_clock.c rd = cd.read_data[0]; rd 196 kernel/time/sched_clock.c ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); rd 199 kernel/time/sched_clock.c rd.read_sched_clock = read; rd 200 kernel/time/sched_clock.c rd.sched_clock_mask = new_mask; rd 201 kernel/time/sched_clock.c rd.mult = new_mult; rd 202 kernel/time/sched_clock.c rd.shift = new_shift; rd 203 kernel/time/sched_clock.c rd.epoch_cyc = new_epoch; rd 204 kernel/time/sched_clock.c rd.epoch_ns = ns; rd 206 kernel/time/sched_clock.c update_clock_read_data(&rd); rd 280 kernel/time/sched_clock.c struct clock_read_data *rd = &cd.read_data[0]; rd 284 kernel/time/sched_clock.c rd->read_sched_clock = suspended_sched_clock_read; rd 291 kernel/time/sched_clock.c struct clock_read_data *rd = &cd.read_data[0]; rd 293 kernel/time/sched_clock.c rd->epoch_cyc = cd.actual_read_sched_clock(); rd 295 kernel/time/sched_clock.c rd->read_sched_clock = cd.actual_read_sched_clock; rd 3228 kernel/trace/ring_buffer.c unsigned int rd; rd 3232 kernel/trace/ring_buffer.c rd = atomic_read(&buffer->record_disabled); rd 3233 kernel/trace/ring_buffer.c new_rd = rd | RB_BUFFER_OFF; rd 3234 kernel/trace/ring_buffer.c } while (atomic_cmpxchg(&buffer->record_disabled, rd, new_rd) != rd); rd 3251 kernel/trace/ring_buffer.c unsigned int rd; rd 3255 kernel/trace/ring_buffer.c rd = atomic_read(&buffer->record_disabled); rd 3256 kernel/trace/ring_buffer.c new_rd = rd & ~RB_BUFFER_OFF; rd 3257 kernel/trace/ring_buffer.c } while (atomic_cmpxchg(&buffer->record_disabled, rd, new_rd) != rd); rd 143 net/9p/trans_fd.c struct file *rd; rd 233 net/9p/trans_fd.c ret = vfs_poll(ts->rd, pt); rd 234 net/9p/trans_fd.c if (ts->rd != ts->wr) rd 259 net/9p/trans_fd.c if (!(ts->rd->f_flags & O_NONBLOCK)) rd 262 net/9p/trans_fd.c pos = ts->rd->f_pos; rd 263 net/9p/trans_fd.c ret = kernel_read(ts->rd, v, len, &pos); rd 805 net/9p/trans_fd.c ts->rd = fget(rfd); rd 807 net/9p/trans_fd.c if (!ts->rd || !ts->wr) { rd 808 net/9p/trans_fd.c if (ts->rd) rd 809 net/9p/trans_fd.c fput(ts->rd); rd 841 net/9p/trans_fd.c p->wr = p->rd = file; rd 845 net/9p/trans_fd.c p->rd->f_flags |= O_NONBLOCK; rd 900 net/9p/trans_fd.c if (ts->rd) rd 901 net/9p/trans_fd.c fput(ts->rd); rd 148 net/nfc/digital_technology.c u8 rd[2]; rd 1128 net/nfc/digital_technology.c size -= sizeof(sensf_res->rd); rd 1147 net/nfc/digital_technology.c sensf_res->rd[0] = sensf_req->sc1; rd 1148 net/nfc/digital_technology.c sensf_res->rd[1] = sensf_req->sc2; rd 1151 net/nfc/digital_technology.c sensf_res->rd[0] = DIGITAL_SENSF_RES_RD_AP_B1; rd 1152 net/nfc/digital_technology.c sensf_res->rd[1] = DIGITAL_SENSF_RES_RD_AP_B2; rd 7201 net/wireless/nl80211.c struct ieee80211_regdomain *rd; rd 7224 net/wireless/nl80211.c rd = kzalloc(struct_size(rd, reg_rules, num_rules), GFP_KERNEL); rd 7225 net/wireless/nl80211.c if (!rd) rd 7228 net/wireless/nl80211.c rd->n_reg_rules = num_rules; rd 7229 net/wireless/nl80211.c rd->alpha2[0] = alpha2[0]; rd 7230 net/wireless/nl80211.c rd->alpha2[1] = alpha2[1]; rd 7237 net/wireless/nl80211.c rd->dfs_region = dfs_region; rd 7246 net/wireless/nl80211.c r = parse_reg_rule(tb, &rd->reg_rules[rule_idx]); rd 7259 net/wireless/nl80211.c return set_regdom(rd, REGD_SOURCE_CRDA); rd 7261 net/wireless/nl80211.c kfree(rd); rd 135 net/wireless/reg.c static void print_regdomain(const struct ieee80211_regdomain *rd); rd 334 net/wireless/reg.c static void update_world_regdomain(const struct ieee80211_regdomain *rd) rd 342 net/wireless/reg.c reset_regdomains(false, rd); rd 344 net/wireless/reg.c cfg80211_world_regdom = rd; rd 446 net/wireless/reg.c static void cfg80211_save_user_regdom(const struct ieee80211_regdomain *rd) rd 452 net/wireless/reg.c cfg80211_user_regdom = reg_copy_regd(rd); rd 1147 net/wireless/reg.c reg_get_max_bandwidth_from_range(const struct ieee80211_regdomain *rd, rd 1155 net/wireless/reg.c for (idx = 0; idx < rd->n_reg_rules; idx++) rd 1156 net/wireless/reg.c if (rule == &rd->reg_rules[idx]) rd 1159 net/wireless/reg.c if (idx == rd->n_reg_rules) rd 1166 net/wireless/reg.c tmp = &rd->reg_rules[--no]; rd 1181 net/wireless/reg.c while (no < rd->n_reg_rules - 1) { rd 1182 net/wireless/reg.c tmp = &rd->reg_rules[++no]; rd 1196 net/wireless/reg.c unsigned int reg_get_max_bandwidth(const struct ieee80211_regdomain *rd, rd 1199 net/wireless/reg.c unsigned int bw = reg_get_max_bandwidth_from_range(rd, rule); rd 1238 net/wireless/reg.c static bool is_valid_rd(const struct ieee80211_regdomain *rd) rd 1243 net/wireless/reg.c if (!rd->n_reg_rules) rd 1246 net/wireless/reg.c if (WARN_ON(rd->n_reg_rules > NL80211_MAX_SUPP_REG_RULES)) rd 1249 net/wireless/reg.c for (i = 0; i < rd->n_reg_rules; i++) { rd 1250 net/wireless/reg.c reg_rule = &rd->reg_rules[i]; rd 1491 net/wireless/reg.c struct ieee80211_regdomain *rd; rd 1517 net/wireless/reg.c rd = kzalloc(struct_size(rd, reg_rules, num_rules), GFP_KERNEL); rd 1518 net/wireless/reg.c if (!rd) rd 1534 net/wireless/reg.c add_rule(&intersected_rule, rd->reg_rules, rd 1535 net/wireless/reg.c &rd->n_reg_rules); rd 1539 net/wireless/reg.c rd->alpha2[0] = '9'; rd 1540 net/wireless/reg.c rd->alpha2[1] = '8'; rd 1541 net/wireless/reg.c rd->dfs_region = reg_intersect_dfs_region(rd1->dfs_region, rd 1544 net/wireless/reg.c return rd; rd 3389 net/wireless/reg.c static void print_rd_rules(const struct ieee80211_regdomain *rd) rd 3399 net/wireless/reg.c for (i = 0; i < rd->n_reg_rules; i++) { rd 3400 net/wireless/reg.c reg_rule = &rd->reg_rules[i]; rd 3407 net/wireless/reg.c reg_get_max_bandwidth(rd, reg_rule)); rd 3455 net/wireless/reg.c static void print_regdomain(const struct ieee80211_regdomain *rd) rd 3459 net/wireless/reg.c if (is_intersected_alpha2(rd->alpha2)) { rd 3471 net/wireless/reg.c } else if (is_world_regdom(rd->alpha2)) { rd 3474 net/wireless/reg.c if (is_unknown_alpha2(rd->alpha2)) rd 3479 net/wireless/reg.c rd->alpha2[0], rd->alpha2[1]); rd 3482 net/wireless/reg.c rd->alpha2[0], rd->alpha2[1]); rd 3486 net/wireless/reg.c pr_debug(" DFS Master region: %s", reg_dfs_region_str(rd->dfs_region)); rd 3487 net/wireless/reg.c print_rd_rules(rd); rd 3490 net/wireless/reg.c static void print_regdomain_info(const struct ieee80211_regdomain *rd) rd 3492 net/wireless/reg.c pr_debug("Regulatory domain: %c%c\n", rd->alpha2[0], rd->alpha2[1]); rd 3493 net/wireless/reg.c print_rd_rules(rd); rd 3496 net/wireless/reg.c static int reg_set_rd_core(const struct ieee80211_regdomain *rd) rd 3498 net/wireless/reg.c if (!is_world_regdom(rd->alpha2)) rd 3500 net/wireless/reg.c update_world_regdomain(rd); rd 3504 net/wireless/reg.c static int reg_set_rd_user(const struct ieee80211_regdomain *rd, rd 3509 net/wireless/reg.c if (!regdom_changes(rd->alpha2)) rd 3512 net/wireless/reg.c if (!is_valid_rd(rd)) { rd 3514 net/wireless/reg.c rd->alpha2[0], rd->alpha2[1]); rd 3515 net/wireless/reg.c print_regdomain_info(rd); rd 3520 net/wireless/reg.c reset_regdomains(false, rd); rd 3524 net/wireless/reg.c intersected_rd = regdom_intersect(rd, get_cfg80211_regdom()); rd 3528 net/wireless/reg.c kfree(rd); rd 3529 net/wireless/reg.c rd = NULL; rd 3535 net/wireless/reg.c static int reg_set_rd_driver(const struct ieee80211_regdomain *rd, rd 3543 net/wireless/reg.c if (is_world_regdom(rd->alpha2)) rd 3546 net/wireless/reg.c if (!regdom_changes(rd->alpha2)) rd 3549 net/wireless/reg.c if (!is_valid_rd(rd)) { rd 3551 net/wireless/reg.c rd->alpha2[0], rd->alpha2[1]); rd 3552 net/wireless/reg.c print_regdomain_info(rd); rd 3564 net/wireless/reg.c regd = reg_copy_regd(rd); rd 3569 net/wireless/reg.c reset_regdomains(false, rd); rd 3573 net/wireless/reg.c intersected_rd = regdom_intersect(rd, get_cfg80211_regdom()); rd 3583 net/wireless/reg.c rcu_assign_pointer(request_wiphy->regd, rd); rd 3586 net/wireless/reg.c rd = NULL; rd 3593 net/wireless/reg.c static int reg_set_rd_country_ie(const struct ieee80211_regdomain *rd, rd 3598 net/wireless/reg.c if (!is_alpha2_set(rd->alpha2) && !is_an_alpha2(rd->alpha2) && rd 3599 net/wireless/reg.c !is_unknown_alpha2(rd->alpha2)) rd 3608 net/wireless/reg.c if (!is_valid_rd(rd)) { rd 3610 net/wireless/reg.c rd->alpha2[0], rd->alpha2[1]); rd 3611 net/wireless/reg.c print_regdomain_info(rd); rd 3622 net/wireless/reg.c reset_regdomains(false, rd); rd 3631 net/wireless/reg.c int set_regdom(const struct ieee80211_regdomain *rd, rd 3638 net/wireless/reg.c if (IS_ERR_OR_NULL(rd)) rd 3641 net/wireless/reg.c if (!reg_is_valid_request(rd->alpha2)) { rd 3642 net/wireless/reg.c kfree(rd); rd 3654 net/wireless/reg.c r = reg_set_rd_core(rd); rd 3657 net/wireless/reg.c cfg80211_save_user_regdom(rd); rd 3658 net/wireless/reg.c r = reg_set_rd_user(rd, lr); rd 3662 net/wireless/reg.c r = reg_set_rd_driver(rd, lr); rd 3665 net/wireless/reg.c r = reg_set_rd_country_ie(rd, lr); rd 3669 net/wireless/reg.c kfree(rd); rd 3683 net/wireless/reg.c kfree(rd); rd 3688 net/wireless/reg.c if (WARN_ON(!lr->intersect && rd != get_cfg80211_regdom())) rd 3704 net/wireless/reg.c struct ieee80211_regdomain *rd) rd 3710 net/wireless/reg.c if (WARN_ON(!wiphy || !rd)) rd 3717 net/wireless/reg.c if (WARN(!is_valid_rd(rd), "Invalid regulatory domain detected\n")) { rd 3718 net/wireless/reg.c print_regdomain_info(rd); rd 3722 net/wireless/reg.c regd = reg_copy_regd(rd); rd 3738 net/wireless/reg.c struct ieee80211_regdomain *rd) rd 3740 net/wireless/reg.c int ret = __regulatory_set_wiphy_regd(wiphy, rd); rd 3751 net/wireless/reg.c struct ieee80211_regdomain *rd) rd 3757 net/wireless/reg.c ret = __regulatory_set_wiphy_regd(wiphy, rd); rd 59 net/wireless/reg.h int set_regdom(const struct ieee80211_regdomain *rd, rd 62 net/wireless/reg.h unsigned int reg_get_max_bandwidth(const struct ieee80211_regdomain *rd, rd 952 sound/soc/codecs/tscs42xx.c #define PLL_CTL(f, rt, rd, r1b_l, r9, ra, rb, \ rd 958 sound/soc/codecs/tscs42xx.c {R_PLLCTLD, rd, 0xFF}, \ rd 1245 sound/soc/codecs/wm_adsp.c unsigned int out, rd, wr, vol; rd 1248 sound/soc/codecs/wm_adsp.c rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ; rd 1254 sound/soc/codecs/wm_adsp.c rd = SNDRV_CTL_ELEM_ACCESS_READ; rd 1262 sound/soc/codecs/wm_adsp.c out |= rd; rd 1268 sound/soc/codecs/wm_adsp.c out |= rd | wr | vol; rd 1276 sound/soc/ti/davinci-mcasp.c struct davinci_mcasp_ruledata *rd = rule->private; rd 1282 sound/soc/ti/davinci-mcasp.c slot_width = rd->mcasp->slot_width; rd 1298 sound/soc/ti/davinci-mcasp.c struct davinci_mcasp_ruledata *rd = rule->private; rd 1304 sound/soc/ti/davinci-mcasp.c format_width = rd->mcasp->max_format_width; rd 1327 sound/soc/ti/davinci-mcasp.c struct davinci_mcasp_ruledata *rd = rule->private; rd 1331 sound/soc/ti/davinci-mcasp.c int slots = rd->mcasp->tdm_slots; rd 1335 sound/soc/ti/davinci-mcasp.c if (rd->mcasp->slot_width) rd 1336 sound/soc/ti/davinci-mcasp.c sbits = rd->mcasp->slot_width; rd 1348 sound/soc/ti/davinci-mcasp.c if (rd->mcasp->auxclk_fs_ratio) rd 1350 sound/soc/ti/davinci-mcasp.c rd->mcasp->auxclk_fs_ratio; rd 1352 sound/soc/ti/davinci-mcasp.c sysclk_freq = rd->mcasp->sysclk_freq; rd 1354 sound/soc/ti/davinci-mcasp.c ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq, rd 1366 sound/soc/ti/davinci-mcasp.c dev_dbg(rd->mcasp->dev, rd 1377 sound/soc/ti/davinci-mcasp.c struct davinci_mcasp_ruledata *rd = rule->private; rd 1381 sound/soc/ti/davinci-mcasp.c int slots = rd->mcasp->tdm_slots; rd 1392 sound/soc/ti/davinci-mcasp.c if (rd->mcasp->auxclk_fs_ratio) rd 1394 sound/soc/ti/davinci-mcasp.c rd->mcasp->auxclk_fs_ratio; rd 1396 sound/soc/ti/davinci-mcasp.c sysclk_freq = rd->mcasp->sysclk_freq; rd 1398 sound/soc/ti/davinci-mcasp.c if (rd->mcasp->slot_width) rd 1399 sound/soc/ti/davinci-mcasp.c sbits = rd->mcasp->slot_width; rd 1401 sound/soc/ti/davinci-mcasp.c ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq, rd 1410 sound/soc/ti/davinci-mcasp.c dev_dbg(rd->mcasp->dev, rd 19 sound/soc/uniphier/aio-core.c static u64 rb_cnt(u64 wr, u64 rd, u64 len) rd 21 sound/soc/uniphier/aio-core.c if (rd <= wr) rd 22 sound/soc/uniphier/aio-core.c return wr - rd; rd 24 sound/soc/uniphier/aio-core.c return len - (rd - wr); rd 27 sound/soc/uniphier/aio-core.c static u64 rb_cnt_to_end(u64 wr, u64 rd, u64 len) rd 29 sound/soc/uniphier/aio-core.c if (rd <= wr) rd 30 sound/soc/uniphier/aio-core.c return wr - rd; rd 32 sound/soc/uniphier/aio-core.c return len - rd; rd 35 sound/soc/uniphier/aio-core.c static u64 rb_space(u64 wr, u64 rd, u64 len) rd 37 sound/soc/uniphier/aio-core.c if (rd <= wr) rd 38 sound/soc/uniphier/aio-core.c return len - (wr - rd) - 8; rd 40 sound/soc/uniphier/aio-core.c return rd - wr - 8; rd 43 sound/soc/uniphier/aio-core.c static u64 rb_space_to_end(u64 wr, u64 rd, u64 len) rd 45 sound/soc/uniphier/aio-core.c if (rd > wr) rd 46 sound/soc/uniphier/aio-core.c return rd - wr - 8; rd 47 sound/soc/uniphier/aio-core.c else if (rd > 0) rd 1815 sound/sparc/dbri.c int rd = dbri->pipes[pipe].desc; rd 1818 sound/sparc/dbri.c if (rd < 0 || rd >= DBRI_NO_DESCS) { rd 1823 sound/sparc/dbri.c dbri->pipes[pipe].desc = dbri->next_desc[rd]; rd 1824 sound/sparc/dbri.c status = dbri->dma->desc[rd].word1; rd 1825 sound/sparc/dbri.c dbri->dma->desc[rd].word1 = 0; /* Reset it for next time. */ rd 1833 sound/sparc/dbri.c rd, DBRI_RD_STATUS(status), DBRI_RD_CNT(status)); rd 2058 tools/perf/util/session.c reader__process_events(struct reader *rd, struct perf_session *session, rd 2061 tools/perf/util/session.c u64 data_size = rd->data_size; rd 2069 tools/perf/util/session.c page_offset = page_size * (rd->data_offset / page_size); rd 2071 tools/perf/util/session.c head = rd->data_offset - page_offset; rd 2075 tools/perf/util/session.c data_size += rd->data_offset; rd 2093 tools/perf/util/session.c buf = mmap(NULL, mmap_size, mmap_prot, mmap_flags, rd->fd, rd 2130 tools/perf/util/session.c (skip = rd->process(session, event, file_pos)) < 0) { rd 2169 tools/perf/util/session.c struct reader rd = { rd 2182 tools/perf/util/session.c if (rd.data_size == 0) rd 2185 tools/perf/util/session.c ui_progress__init_size(&prog, rd.data_size, "Processing events..."); rd 2187 tools/perf/util/session.c err = reader__process_events(&rd, session, &prog); rd 440 tools/perf/util/stat.c struct perf_record_stat_round *rd = (struct perf_record_stat_round *)event; rd 443 tools/perf/util/stat.c ret = fprintf(fp, "\n... time %" PRI_lu64 ", type %s\n", rd->time, rd 444 tools/perf/util/stat.c rd->type == PERF_STAT_ROUND_TYPE__FINAL ? "FINAL" : "INTERVAL"); rd 67 tools/testing/selftests/net/psock_tpacket.c struct iovec *rd; rd 239 tools/testing/selftests/net/psock_tpacket.c while (__v1_v2_rx_kernel_ready(ring->rd[frame_num].iov_base, rd 241 tools/testing/selftests/net/psock_tpacket.c ppd.raw = ring->rd[frame_num].iov_base; rd 356 tools/testing/selftests/net/psock_tpacket.c uint8_t *f0 = ring->rd[0].iov_base; rd 361 tools/testing/selftests/net/psock_tpacket.c return ring->rd[n].iov_base; rd 600 tools/testing/selftests/net/psock_tpacket.c pbd = (struct block_desc *) ring->rd[block_num].iov_base; rd 697 tools/testing/selftests/net/psock_tpacket.c ring->rd_len = ring->rd_num * sizeof(*ring->rd); rd 698 tools/testing/selftests/net/psock_tpacket.c ring->rd = malloc(ring->rd_len); rd 699 tools/testing/selftests/net/psock_tpacket.c if (ring->rd == NULL) { rd 719 tools/testing/selftests/net/psock_tpacket.c memset(ring->rd, 0, ring->rd_len); rd 721 tools/testing/selftests/net/psock_tpacket.c ring->rd[i].iov_base = ring->mm_space + (i * ring->flen); rd 722 tools/testing/selftests/net/psock_tpacket.c ring->rd[i].iov_len = ring->flen; rd 754 tools/testing/selftests/net/psock_tpacket.c free(ring->rd); rd 474 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define toreal(rd) rd 475 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define fromreal(rd) rd 483 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define tophys(rd,rs) \ rd 484 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h addis rd,rs,0 rd 486 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define tovirt(rd,rs) \ rd 487 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h addis rd,rs,0 rd 490 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define toreal(rd) /* we can access c000... in real mode */ rd 491 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define fromreal(rd) rd 493 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define tophys(rd,rs) \ rd 494 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h clrldi rd,rs,2 rd 496 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define tovirt(rd,rs) \ rd 497 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h rotldi rd,rs,16; \ rd 498 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h ori rd,rd,((KERNELBASE>>48)&0xFFFF);\ rd 499 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h rotldi rd,rd,48 rd 501 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define toreal(rd) tophys(rd,rd) rd 502 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define fromreal(rd) tovirt(rd,rd) rd 504 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define tophys(rd, rs) addis rd, rs, -PAGE_OFFSET@h rd 505 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define tovirt(rd, rs) addis rd, rs, PAGE_OFFSET@h rd 1735 virt/kvm/arm/vgic/vgic-its.c #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \ rd 1740 virt/kvm/arm/vgic/vgic-its.c .its_read = rd, \ rd 1744 virt/kvm/arm/vgic/vgic-its.c #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\ rd 1749 virt/kvm/arm/vgic/vgic-its.c .its_read = rd, \ rd 448 virt/kvm/arm/vgic/vgic-mmio-v3.c #define REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(off, rd, wr, ur, uw, bpi, acc) \ rd 461 virt/kvm/arm/vgic/vgic-mmio-v3.c .read = rd, \ rd 67 virt/kvm/arm/vgic/vgic-mmio.h #define REGISTER_DESC_WITH_BITS_PER_IRQ(off, rd, wr, ur, uw, bpi, acc) \ rd 73 virt/kvm/arm/vgic/vgic-mmio.h .read = rd, \ rd 79 virt/kvm/arm/vgic/vgic-mmio.h #define REGISTER_DESC_WITH_LENGTH(off, rd, wr, length, acc) \ rd 85 virt/kvm/arm/vgic/vgic-mmio.h .read = rd, \ rd 89 virt/kvm/arm/vgic/vgic-mmio.h #define REGISTER_DESC_WITH_LENGTH_UACCESS(off, rd, wr, urd, uwr, length, acc) \ rd 95 virt/kvm/arm/vgic/vgic-mmio.h .read = rd, \