rc32434_pci        42 arch/mips/pci/ops-rc32434.c 	(rc32434_pci->pcicfga = (0x80000000 | \
rc32434_pci        58 arch/mips/pci/ops-rc32434.c 		rc32434_pci->pcicfgd = *data;
rc32434_pci        60 arch/mips/pci/ops-rc32434.c 		*data = rc32434_pci->pcicfgd;
rc32434_pci       115 arch/mips/pci/pci-rc32434.c 	pcicvalue = rc32434_pci->pcic;
rc32434_pci       126 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcic = pcicdata;	/* Enable the PCI bus Interface */
rc32434_pci       129 arch/mips/pci/pci-rc32434.c 		pcicdata = rc32434_pci->pcis;
rc32434_pci       134 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcis = 0;
rc32434_pci       135 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcism = 0xFFFFFFFF;
rc32434_pci       137 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcidac = 0;	/*
rc32434_pci       141 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcidas = 0;	/* clear the status */
rc32434_pci       142 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcidasm = 0x0000007F;	/* Mask all the interrupts */
rc32434_pci       151 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[0].address = (unsigned int) (PCI_ADDR_START);
rc32434_pci       155 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[0].mapping = (unsigned int) (PCI_ADDR_START);
rc32434_pci       159 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[0].control =
rc32434_pci       161 arch/mips/pci/pci-rc32434.c 	dummyread = rc32434_pci->pcilba[0].control;	/* flush the CPU write Buffers */
rc32434_pci       162 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[1].address = 0x60000000;
rc32434_pci       163 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[1].mapping = 0x60000000;
rc32434_pci       166 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[1].control =
rc32434_pci       168 arch/mips/pci/pci-rc32434.c 	dummyread = rc32434_pci->pcilba[1].control;	/* flush the CPU write Buffers */
rc32434_pci       169 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[2].address = 0x18C00000;
rc32434_pci       170 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[2].mapping = 0x18FFFFFF;
rc32434_pci       173 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[2].control =
rc32434_pci       175 arch/mips/pci/pci-rc32434.c 	dummyread = rc32434_pci->pcilba[2].control;	/* flush the CPU write Buffers */
rc32434_pci       178 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[3].address = 0x18800000;
rc32434_pci       179 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[3].mapping = 0x18800000;
rc32434_pci       180 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcilba[3].control =
rc32434_pci       183 arch/mips/pci/pci-rc32434.c 	dummyread = rc32434_pci->pcilba[3].control;	/* flush the CPU write Buffers */
rc32434_pci       187 arch/mips/pci/pci-rc32434.c 		rc32434_pci->pcicfga = pci_config_addr;
rc32434_pci       188 arch/mips/pci/pci-rc32434.c 		dummyread = rc32434_pci->pcicfga;
rc32434_pci       189 arch/mips/pci/pci-rc32434.c 		rc32434_pci->pcicfgd = korina_cnfg_regs[loopCount];
rc32434_pci       190 arch/mips/pci/pci-rc32434.c 		dummyread = rc32434_pci->pcicfgd;
rc32434_pci       193 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcitc =
rc32434_pci       197 arch/mips/pci/pci-rc32434.c 	pcicntlval = rc32434_pci->pcic;
rc32434_pci       199 arch/mips/pci/pci-rc32434.c 	rc32434_pci->pcic = pcicntlval;
rc32434_pci       200 arch/mips/pci/pci-rc32434.c 	pcicntlval = rc32434_pci->pcic;