r_format 1057 arch/mips/include/uapi/asm/inst.h struct r_format r_format; r_format 432 arch/mips/kernel/branch.c switch (insn.r_format.func) { r_format 434 arch/mips/kernel/branch.c regs->regs[insn.r_format.rd] = epc + 8; r_format 437 arch/mips/kernel/branch.c if (NO_R6EMU && insn.r_format.func == jr_op) r_format 439 arch/mips/kernel/branch.c regs->cp0_epc = regs->regs[insn.r_format.rs]; r_format 21 arch/mips/kernel/probes-common.h switch (insn.r_format.func) { r_format 305 arch/mips/kernel/process.c if (ip->r_format.opcode != mm_pool32a_op || r_format 306 arch/mips/kernel/process.c ip->r_format.func != mm_pool32axf_op) r_format 314 arch/mips/kernel/process.c if (ip->r_format.opcode != spec_op) r_format 316 arch/mips/kernel/process.c return ip->r_format.func == jalr_op || ip->r_format.func == jr_op; r_format 70 arch/mips/kernel/uprobes.c switch (inst.r_format.func) { r_format 107 arch/mips/kvm/dyntrans.c mfc0_inst.r_format.opcode = spec_op; r_format 108 arch/mips/kvm/dyntrans.c mfc0_inst.r_format.rd = inst.c0r_format.rt; r_format 109 arch/mips/kvm/dyntrans.c mfc0_inst.r_format.func = add_op; r_format 64 arch/mips/kvm/emulate.c switch (insn.r_format.func) { r_format 66 arch/mips/kvm/emulate.c arch->gprs[insn.r_format.rd] = epc + 8; r_format 69 arch/mips/kvm/emulate.c nextpc = arch->gprs[insn.r_format.rs]; r_format 1946 arch/mips/kvm/emulate.c switch (inst.r_format.opcode) { r_format 2513 arch/mips/kvm/emulate.c if (inst.r_format.opcode == spec3_op && r_format 2514 arch/mips/kvm/emulate.c inst.r_format.func == rdhwr_op && r_format 2515 arch/mips/kvm/emulate.c inst.r_format.rs == 0 && r_format 2516 arch/mips/kvm/emulate.c (inst.r_format.re >> 3) == 0) { r_format 2518 arch/mips/kvm/emulate.c int rd = inst.r_format.rd; r_format 2519 arch/mips/kvm/emulate.c int rt = inst.r_format.rt; r_format 2520 arch/mips/kvm/emulate.c int sel = inst.r_format.re & 0x7; r_format 1151 arch/mips/kvm/vz.c switch (inst.r_format.opcode) { r_format 1170 arch/mips/kvm/vz.c if (inst.r_format.rs || (inst.r_format.re >> 3)) r_format 1173 arch/mips/kvm/vz.c rd = inst.r_format.rd; r_format 1174 arch/mips/kvm/vz.c rt = inst.r_format.rt; r_format 1175 arch/mips/kvm/vz.c sel = inst.r_format.re & 0x7; r_format 167 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.opcode = cop1x_op; r_format 168 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.rs = r_format 170 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.rt = r_format 172 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.rd = 0; r_format 173 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.re = insn.mm_fp5_format.fd; r_format 174 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.func = func; r_format 253 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.opcode = spec_op; r_format 254 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.rs = insn.mm_fp4_format.fs; r_format 255 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.rt = r_format 257 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.rd = insn.mm_fp4_format.rt; r_format 258 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.re = 0; r_format 259 arch/mips/math-emu/cp1emu.c mips32_insn.r_format.func = movc_op; r_format 435 arch/mips/math-emu/cp1emu.c switch (insn.r_format.func) { r_format 437 arch/mips/math-emu/cp1emu.c if (insn.r_format.rd != 0) { r_format 438 arch/mips/math-emu/cp1emu.c regs->regs[insn.r_format.rd] = r_format 445 arch/mips/math-emu/cp1emu.c if (NO_R6EMU && insn.r_format.func == jr_op) r_format 447 arch/mips/math-emu/cp1emu.c *contpc = regs->regs[insn.r_format.rs]; r_format 56 arch/mips/oprofile/backtrace.c if (ip->r_format.func == jr_op && ip->r_format.rs == 31) r_format 16 drivers/gpu/drm/nouveau/nouveau_display.h u32 r_format;