rFPGA0_XB_RFInterfaceOE  591 drivers/staging/rtl8188eu/hal/bb_cfg.c 	reg[RF_PATH_B]->rfintfo = rFPGA0_XB_RFInterfaceOE;
rFPGA0_XB_RFInterfaceOE  594 drivers/staging/rtl8188eu/hal/bb_cfg.c 	reg[RF_PATH_B]->rfintfe = rFPGA0_XB_RFInterfaceOE;
rFPGA0_XB_RFInterfaceOE  974 drivers/staging/rtl8188eu/hal/phy.c 					      rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD};
rFPGA0_XB_RFInterfaceOE 1012 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_XB_RFInterfaceOE, BIT(10), 0x00);
rFPGA0_XB_RFInterfaceOE  393 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 	priv->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE;
rFPGA0_XB_RFInterfaceOE  398 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 	priv->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE;
rFPGA0_XB_RFInterfaceOE  578 drivers/staging/rtl8192u/r819xU_phy.c 	priv->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE;
rFPGA0_XB_RFInterfaceOE  588 drivers/staging/rtl8192u/r819xU_phy.c 	priv->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE;
rFPGA0_XB_RFInterfaceOE 1535 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		rFPGA0_XB_RFInterfaceOE,
rFPGA0_XB_RFInterfaceOE  407 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /*  16 LSBs if read 32-bit from 0x864 */
rFPGA0_XB_RFInterfaceOE  411 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /*  16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */