rFPGA0_XA_RFInterfaceOE  590 drivers/staging/rtl8188eu/hal/bb_cfg.c 	reg[RF_PATH_A]->rfintfo = rFPGA0_XA_RFInterfaceOE;
rFPGA0_XA_RFInterfaceOE  593 drivers/staging/rtl8188eu/hal/bb_cfg.c 	reg[RF_PATH_A]->rfintfe = rFPGA0_XA_RFInterfaceOE;
rFPGA0_XA_RFInterfaceOE  973 drivers/staging/rtl8188eu/hal/phy.c 					      rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE,
rFPGA0_XA_RFInterfaceOE 1011 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00);
rFPGA0_XA_RFInterfaceOE  603 drivers/staging/rtl8188eu/hal/usb_halinit.c 	if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
rFPGA0_XA_RFInterfaceOE  392 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 	priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE;
rFPGA0_XA_RFInterfaceOE  397 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 	priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE;
rFPGA0_XA_RFInterfaceOE 1396 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 	rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
rFPGA0_XA_RFInterfaceOE 1456 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 				rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE,
rFPGA0_XA_RFInterfaceOE  576 drivers/staging/rtl8192u/r819xU_phy.c 	priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE;
rFPGA0_XA_RFInterfaceOE  586 drivers/staging/rtl8192u/r819xU_phy.c 	priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE;
rFPGA0_XA_RFInterfaceOE 1095 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4),
rFPGA0_XA_RFInterfaceOE 1120 drivers/staging/rtl8192u/r819xU_phy.c 			rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4),
rFPGA0_XA_RFInterfaceOE 1534 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		rFPGA0_XA_RFInterfaceOE,
rFPGA0_XA_RFInterfaceOE  406 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /*  16 LSBs if read 32-bit from 0x860 */
rFPGA0_XA_RFInterfaceOE  410 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /*  16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */