rFPGA0_TxGainStage  602 drivers/staging/rtl8188eu/hal/bb_cfg.c 	reg[RF_PATH_A]->rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  603 drivers/staging/rtl8188eu/hal/bb_cfg.c 	reg[RF_PATH_B]->rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  412 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 	priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  413 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 	priv->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  414 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 	priv->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  415 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 	priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  567 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 		rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage,
rFPGA0_TxGainStage  650 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c 			rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage,
rFPGA0_TxGainStage  608 drivers/staging/rtl8192u/r819xU_phy.c 	priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  609 drivers/staging/rtl8192u/r819xU_phy.c 	priv->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  610 drivers/staging/rtl8192u/r819xU_phy.c 	priv->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  611 drivers/staging/rtl8192u/r819xU_phy.c 	priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage;
rFPGA0_TxGainStage  812 drivers/staging/rtl8192u/r819xU_phy.c 		rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC),
rFPGA0_TxGainStage  319 drivers/staging/rtl8712/rtl871x_mp.c 	set_bb_reg(pAdapter, rFPGA0_TxGainStage,
rFPGA0_TxGainStage   64 drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c 		PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_TxGainStage, BIT25, 1);
rFPGA0_TxGainStage   75 drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c 		PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_TxGainStage, BIT25, 0);