rFPGA0_IQK        565 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
rFPGA0_IQK        575 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
rFPGA0_IQK        616 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
rFPGA0_IQK        621 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
rFPGA0_IQK        647 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
rFPGA0_IQK        861 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x0);
rFPGA0_IQK        863 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
rFPGA0_IQK       1033 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
rFPGA0_IQK       1100 drivers/staging/rtl8188eu/hal/phy.c 	phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0);
rFPGA0_IQK        446 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        478 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
rFPGA0_IQK        507 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        557 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        569 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
rFPGA0_IQK        592 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
rFPGA0_IQK        621 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        660 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        693 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
rFPGA0_IQK        722 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        735 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        771 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        806 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
rFPGA0_IQK        831 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        877 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        917 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
rFPGA0_IQK        943 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK        983 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK       1018 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
rFPGA0_IQK       1043 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK       1585 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK       1599 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK       1636 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 				PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
rFPGA0_IQK       1669 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0);